Claims (9)
一種半導體結構，包括：一基底；一第一源/汲極區，形成於該基底中；一第二源/汲極區，形成於該基底中；一絕緣結構，位於該第一源/汲極區與該第二源/汲極區之間的該基底上；一第一堆疊結構，位於該第一源/汲極區與該第二源/汲極區之間的該基底上，其中該第一堆疊結構包括一第一介電層與一第一導電層，該第一導電層位於該第一介電層上；以及一第二堆疊結構，位於該第一堆疊結構上，且該第二堆疊結構具有一凸出部，延伸在該絕緣結構上以及在該絕緣結構與該第一堆疊結構之間的該基底上，其中該第二堆疊結構包括一第二介電層與一第二導電層，該第二導電層位於該第二介電層上。
A semiconductor structure comprising: a substrate; a first source/drain region formed in the substrate; a second source/drain region formed in the substrate; and an insulating structure located at the first source/汲a substrate between the polar region and the second source/drain region; a first stacked structure on the substrate between the first source/drain region and the second source/drain region, wherein The first stack structure includes a first dielectric layer and a first conductive layer, the first conductive layer is located on the first dielectric layer, and a second stacked structure is disposed on the first stacked structure, and the The second stack structure has a protrusion extending on the insulating structure and on the substrate between the insulating structure and the first stacked structure, wherein the second stacked structure comprises a second dielectric layer and a first And a second conductive layer on the second dielectric layer.
如申請專利範圍第1項所述之半導體結構，其中該第一介電層的厚度係小於該第二介電層的厚度。
The semiconductor structure of claim 1, wherein the first dielectric layer has a thickness less than a thickness of the second dielectric layer.
如申請專利範圍第1項所述之半導體結構，更包括數個互相分開的絕緣結構，位於該第一源/汲極區與該第二源/汲極區之間的該基底上。
The semiconductor structure of claim 1, further comprising a plurality of mutually separated insulating structures on the substrate between the first source/drain region and the second source/drain region.
如申請專利範圍第3項所述之半導體結構，其中該第二介電層的厚度係小於該絕緣結構的厚度。
The semiconductor structure of claim 3, wherein the thickness of the second dielectric layer is less than the thickness of the insulating structure.
如申請專利範圍第3項所述之半導體結構，其中該第二堆疊結構具有互相分開的數個該凸出部，該些凸出部
對應地延伸至該些絕緣結構上。
The semiconductor structure of claim 3, wherein the second stack structure has a plurality of the protrusions separated from each other, the protrusions
Correspondingly extending to the insulating structures.
如申請專利範圍第1項所述之半導體結構，更包括：一第一摻雜區，形成於該基底中，並具有一第一導電型；以及一第二摻雜區，形成於該第一摻雜區中，並具有相對於該第一導電型的一第二導電型，其中該第一源/汲極區係形成於該第一摻雜區中並具有該第一導電型，該第二源/汲極區係形成於該第二摻雜區中並具有該第一導電型。
The semiconductor structure of claim 1, further comprising: a first doped region formed in the substrate and having a first conductivity type; and a second doped region formed on the first a doped region and having a second conductivity type relative to the first conductivity type, wherein the first source/drain region is formed in the first doped region and has the first conductivity type, the first A two source/drain region is formed in the second doped region and has the first conductivity type.
如申請專利範圍第6項所述之半導體結構，更包括數個互相分開的頂摻雜區，形成於該第一源/汲極區與該第二源/汲極區之間的該第一摻雜區中，並具有該第二導電型。
The semiconductor structure of claim 6, further comprising a plurality of mutually separated top doped regions, the first formed between the first source/drain region and the second source/drain region In the doped region, and having the second conductivity type.
如申請專利範圍第1項所述之半導體結構，其中該第一介電層的側邊係對齊該第一導電層的側邊，該第二介電層的側邊係對齊該第二導電層的側邊。
The semiconductor structure of claim 1, wherein a side of the first dielectric layer is aligned with a side of the first conductive layer, and a side of the second dielectric layer is aligned with the second conductive layer. Side of the side.
一種半導體結構的形成方法，包括：形成一第一源/汲極區於一基底中；形成一第二源/汲極區於該基底中；形成一第一介電層於該第一源/汲極區與該第二源/汲極區之間的該基底上，並形成一第一導電層於該第一介電層上，以形成一第一堆疊結構；以及形成一第二介電層於該第一堆疊結構的該第一導電層上，並形成一第二導電層於該第二介電層上，以形成一
第二堆疊結構。A method of forming a semiconductor structure, comprising: forming a first source/drain region in a substrate; forming a second source/drain region in the substrate; forming a first dielectric layer on the first source/ Forming a first conductive layer on the first dielectric layer on the substrate between the drain region and the second source/drain region to form a first stacked structure; and forming a second dielectric Laminating on the first conductive layer of the first stacked structure, and forming a second conductive layer on the second dielectric layer to form a
The second stack structure.