TWI456578B - 非揮發性記憶體之管理方法 - Google Patents

非揮發性記憶體之管理方法 Download PDF

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TWI456578B
TWI456578B TW099108841A TW99108841A TWI456578B TW I456578 B TWI456578 B TW I456578B TW 099108841 A TW099108841 A TW 099108841A TW 99108841 A TW99108841 A TW 99108841A TW I456578 B TWI456578 B TW I456578B
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length
volatile memory
code
parity code
user data
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TW099108841A
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TW201040977A (en
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Cheng Wen Wu
Te Hsuan Chen
Yu Ying Hsiao
Yu Tsao Hsing
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Nat Univ Tsing Hua
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13Linear codes
    • H03M13/15Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/151Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
    • H03M13/152Bose-Chaudhuri-Hocquenghem [BCH] codes
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1068Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in sector programmable memories, e.g. flash disk
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2906Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
    • H03M13/2909Product codes
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/63Joint error correction and other techniques
    • H03M13/635Error control coding in combination with rate matching
    • H03M13/6356Error control coding in combination with rate matching by repetition or insertion of dummy data, i.e. rate reduction

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Probability & Statistics with Applications (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Quality & Reliability (AREA)
  • General Engineering & Computer Science (AREA)
  • Algebra (AREA)
  • Pure & Applied Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Claims (14)

  1. 一種非揮發性記憶體之管理方法,包含以下步驟:提供具有至少一區塊之該非揮發性記憶體,該區塊包含複數頁以儲存使用者資料及同位碼資料;分割該些頁其中之一為複數個分隔,各該些分隔包含該使用者資料及該同位碼資料;決定各該些分隔的碼字元長度,該碼字元長度包含具足夠儲存容量之訊息長度以儲存該使用者資料以及儲存該同位碼資料之同位碼長度;產生一第一與一第二額外同位碼資料,其中該第一與第二額外同位碼資料對應於該使用者資料;以及儲存該第一與該第二額外同位碼資料於從該些頁中選擇出的不同額外同位碼頁。
  2. 根據請求項1所述之非揮發性記憶體之管理方法,其中該碼字元長度係由BCH碼決定。
  3. 根據請求項1所述之非揮發性記憶體之管理方法,其中該碼字元長度係該訊息長度及該同位碼長度的總和。
  4. 根據請求項1所述之非揮發性記憶體之管理方法,其中該訊息長度包含位於該使用者資料前為0的位元。
  5. 根據請求項1所述之非揮發性記憶體之管理方法,其中該碼字元長度係由n=2m -1決定,其中n係為該碼字元長度,m則滿足下列不等式:2m-1 -1<該使用者資料及該同位碼資料之位元數<2m -1。
  6. 根據請求項1所述之非揮發性記憶體之管理方法,另包含藉由同時操作該使用者資料的該頁及該額外同位碼頁其中之一以存取該使用者資料之步驟。
  7. 根據請求項1所述之非揮發性記憶體之管理方法,其中該第一與該第二額外同位碼頁係該區塊之最下頁。
  8. 一種非揮發性記憶體之管理方法,包含以下步驟:提供具有至少一區塊之該非揮發性記憶體,該區塊包含複數頁以儲存使用者資料及同位碼資料;分割該些頁其中之一為複數個分隔,各該些分隔包含該使用者資料及該同位碼資料;決定各該分隔的碼字元長度,該碼字元長度包含具足夠儲存該使用者資料之儲存容量之訊息長度及儲存該同位碼資料之同位碼長度;產生一第一與一第二額外同位碼資料,其中該第一與第二額外同位碼資料對應於該使用者資料;以及儲存該第一與該第二額外同位碼資料於一相同額外同位碼頁。
  9. 根據請求項8所述之非揮發性記憶體之管理方法,其中該碼字元長度係由BCH碼決定。
  10. 根據請求項8所述之非揮發性記憶體之管理方法,其中該碼字元長度係該訊息長度及該同位碼長度的總和。
  11. 根據請求項8所述之非揮發性記憶體之管理方法,其中該訊息長度包含位於該使用者資料前為0的位元。
  12. 根據請求項8所述之非揮發性記憶體之管理方法,其中該碼字元長度係由n=2m -1決定,其中n係為該碼字元長度,m則滿足下列不等式:2m-1 -1<該使用者資料及該同位碼資料之位元數<2m -1。
  13. 根據請求項8所述之非揮發性記憶體之管理方法,另包含藉由同時操作該使用者資料的該頁及該額外同位碼頁其中之一來 存取該使用者資料之步驟。
  14. 根據請求項8所述之非揮發性記憶體之管理方法,其中該第一與該第二額外同位碼頁係該區塊之最下頁。
TW099108841A 2009-05-04 2010-03-25 非揮發性記憶體之管理方法 TWI456578B (zh)

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US12/435,055 US8307261B2 (en) 2009-05-04 2009-05-04 Non-volatile memory management method

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TW201040977A (en) 2010-11-16
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