Claims (10)
一種顯示系統,包括:一時序控制器,產生一起始信號以及一時脈信號;一掃描驅動器,根據該起始信號及該時脈信號,產生複數掃描信號;一資料驅動器,產生複數資料信號;複數畫素,根據該等掃描信號,接收該等資料信號,並且每一畫素包括:一液晶成分,設置在一畫素電極以及一第一共通電極之間,該畫素電極接收該等資料信號中之一第一資料信號,該第一共通電極接收一共通信號;以及一調整裝置,根據該起始信號以及該時脈信號,控制該第一資料信號與該共通信號間的壓差。A display system comprising: a timing controller for generating a start signal and a clock signal; a scan driver for generating a plurality of scan signals according to the start signal and the clock signal; and a data driver for generating a plurality of data signals; The pixels receive the data signals according to the scan signals, and each pixel includes: a liquid crystal component disposed between the pixel electrodes and a first common electrode, the pixel electrodes receiving the data signals a first data signal, the first common electrode receiving a common signal; and an adjusting device for controlling a voltage difference between the first data signal and the common signal according to the start signal and the clock signal.
如申請專利範圍第1項所述之顯示系統,其中該調整裝置根據該起始信號以及該時脈信號,產生一調整信號,用以控制第一資料信號以及該共通信號之至少一者。The display system of claim 1, wherein the adjusting device generates an adjustment signal for controlling at least one of the first data signal and the common signal according to the start signal and the clock signal.
如申請專利範圍第2項所述之顯示系統,其中該資料驅動器根據該調整信號,控制該第一資料信號的位準,其中該調整信號與一距離有關,該距離係為該等畫素中之一第一畫素與該資料驅動器間的距離,該第一畫素接收該第一資料信號。The display system of claim 2, wherein the data driver controls the level of the first data signal according to the adjustment signal, wherein the adjustment signal is related to a distance, wherein the distance is in the pixels a distance between the first pixel and the data driver, the first pixel receiving the first data signal.
如申請專利範圍第2項所述之顯示系統,更包括一電壓產生器,用以根據該調整信號,調整該共通信號,其中該調整信號與一距離有關,該距離係為該等畫素中之一第一畫素與該資料驅動器間的距離,該第一畫素接收該第一資料信號。The display system of claim 2, further comprising a voltage generator for adjusting the common signal according to the adjustment signal, wherein the adjustment signal is related to a distance, wherein the distance is in the pixels a distance between the first pixel and the data driver, the first pixel receiving the first data signal.
如申請專利範圍第2項所述之顯示系統,其中該調整裝置包括:一時序增益調整電路,包括:一計數單元,計數該時脈信號的脈衝數,用以產生至少一計數值,並具有至少一重置端,接收該起始信號,用以重置該計數值;一增益調整單元,根據該計數值,提供至少一阻抗值;以及一運算放大器,根據該阻抗值,產生該調整信號。The display system of claim 2, wherein the adjusting device comprises: a timing gain adjusting circuit, comprising: a counting unit, counting the number of pulses of the clock signal, for generating at least one count value, and having Receiving, at least one reset end, the start signal for resetting the count value; a gain adjustment unit providing at least one impedance value according to the count value; and an operational amplifier generating the adjustment signal according to the impedance value .
如申請專利範圍第5項所述之顯示系統,其中該時序增益調整電路200係為一數位類比轉換器,並包括:複數電阻,以串聯方式排列;以及複數第一級開關,耦接於該等電阻與複數第一節點之間;以及複數第二級開關,耦接於該等第一節點與複數第二節點之間,其中該等第二級開關的數量係為該等第一級開關的數量的一半。The display system of claim 5, wherein the timing gain adjustment circuit 200 is a digital analog converter, and includes: a plurality of resistors arranged in series; and a plurality of first stage switches coupled to the And a plurality of second-stage switches coupled between the first node and the plurality of second nodes, wherein the number of the second-stage switches is the first-stage switches Half of the number.
如申請專利範圍第5項所述之顯示系統,其中該增益調整單元包括:一第一可變電阻,根據該計數值,提供一第一阻抗值;一第二可變電阻,串聯該第一可變電阻,並根據該計數值,提供一第二阻抗值,該運算放大器根據該第一及第二阻抗值,產生該調整信號。The display system of claim 5, wherein the gain adjustment unit comprises: a first variable resistor, according to the count value, providing a first impedance value; a second variable resistor, connecting the first And a variable resistor, and according to the count value, providing a second impedance value, the operational amplifier generating the adjustment signal according to the first and second impedance values.
如申請專利範圍第7項所述之顯示系統,其中每一畫素更包括:一儲存電容,耦接於該畫素電極與一第二共通電極之間。The display system of claim 7, wherein each pixel further comprises: a storage capacitor coupled between the pixel electrode and a second common electrode.
如申請專利範圍第8項所述之顯示系統,其中該第一可變電阻耦接於一接地位準與該運算放大器之一反相輸入端之間,該第二可變電阻耦接於該反相輸入端與該運算放大器之一輸出端之間,該運算放大器之一非反相輸入端耦接該第二共通電極。The display system of claim 8, wherein the first variable resistor is coupled between a ground level and an inverting input of the operational amplifier, and the second variable resistor is coupled to the Between the inverting input terminal and one of the operational amplifiers, one of the operational amplifiers has a non-inverting input coupled to the second common electrode.
如申請專利範圍第8項所述之顯示系統,其中該第一可變電阻耦接於該第二共通電極與該運算放大器之一反相輸入端之間,該第二可變電阻耦接於該反相輸入端與該運算放大器之一輸出端之間,該運算放大器之一非反相輸入端耦接該第一共通電極。The display system of claim 8, wherein the first variable resistor is coupled between the second common electrode and one of the inverting input terminals of the operational amplifier, and the second variable resistor is coupled to Between the inverting input terminal and one of the output terminals of the operational amplifier, a non-inverting input terminal of the operational amplifier is coupled to the first common electrode.