TWI451466B - Field emission device and fabricating method thereof - Google Patents

Field emission device and fabricating method thereof Download PDF

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TWI451466B
TWI451466B TW100130532A TW100130532A TWI451466B TW I451466 B TWI451466 B TW I451466B TW 100130532 A TW100130532 A TW 100130532A TW 100130532 A TW100130532 A TW 100130532A TW I451466 B TWI451466 B TW I451466B
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layer
nano
substrate
field emission
emission structure
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TW201310492A (en
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Te Ming Chen
Chih Che Kuo
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Au Optronics Corp
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場發射結構及其製造方法Field emission structure and manufacturing method thereof

本申請案是有關於一種場發射結構及其製造方法,且特別是有關於一種有效降低屏蔽效應(screen effect)之場發射結構及其製造方法。The present application relates to a field emission structure and a method of fabricating the same, and more particularly to a field emission structure that effectively reduces the screen effect and a method of fabricating the same.

隨著科技的進步,體積龐大的陰極射線管(Cathode Ray Tube,CRT)顯示器已經漸漸地走入歷史。因此,場發射顯示器(Field Emission Display,FED)、液晶顯示器(Liquid Crystal Display,LCD)、電漿顯示器(Plasma Display Panel,PDP)等平面顯示器則逐漸地成為未來顯示器之主流。以場發射顯示器為例,由於場發射顯示器具有較短的光學反應時間(Optical Response Time),因此幾乎不會產生殘影。亦即,於液晶顯示器與電漿平面顯示器相較,場發射顯示器具有較高的顯示品質。此外,場發射顯示器還具有厚度薄、重量輕、視角廣、亮度高、工作溫度範圍較大以及省能源等優點,因此場發射顯示器已經逐漸受到全球業者之矚目。With the advancement of technology, the huge cathode ray tube (CRT) display has gradually entered history. Therefore, field display devices such as Field Emission Display (FED), Liquid Crystal Display (LCD), and Plasma Display Panel (PDP) are gradually becoming the mainstream of future displays. Taking the field emission display as an example, since the field emission display has a short optical response time, almost no image sticking occurs. That is, the field emission display has higher display quality than the liquid crystal display and the plasma flat display. In addition, field emission displays have the advantages of thin thickness, light weight, wide viewing angle, high brightness, large operating temperature range and energy saving. Therefore, field emission displays have gradually attracted the attention of the global industry.

常見的場發射源包括零維之奈米點(nano-dot)、一維之奈米線或碳奈米管、二維之奈米片狀體(nano-flake)、三維之奈米尖錐(nano-tip)。除了場發射源的材料功函數(work function)之外,場發射增強因子(field enhancement factor)亦是決定場發射源之場發射特性的另外一項重要因素。通常,一維的奈米線或碳奈米管具有較佳的場發射增強因 子,因為奈米線或碳奈米管具有較小的曲率半徑以及較大的長寬比。Common field emission sources include zero-dimensional nano-dot, one-dimensional nanowire or carbon nanotube, two-dimensional nano-flake, three-dimensional nano-tip (nano-tip). In addition to the material work function of the field emission source, the field enhancement factor is another important factor in determining the field emission characteristics of the field emission source. Generally, one-dimensional nanowires or carbon nanotubes have better field emission enhancement. Because the nanowire or carbon nanotube has a small radius of curvature and a large aspect ratio.

適當地控制奈米線或碳奈米管的密度可以有效地抑制屏蔽效應,而目前已有習知技術透過控制觸媒層之厚度、控制碳源、氫氣、氨氣的濃度比例,或是透過選擇性成長(selective growth)的方式來控制碳奈米管之密度。然而,上述之方法仍然無法十分有效地控制所成長之奈米碳管的密度。此外,前述之選擇性成長僅能夠於小面積上成長碳奈米管,無法於大面積上成長碳奈米管。Appropriate control of the density of the nanowire or carbon nanotube can effectively suppress the shielding effect. At present, the prior art controls the thickness of the catalyst layer, controls the concentration ratio of the carbon source, the hydrogen gas, the ammonia gas, or transmits Selective growth is the way to control the density of carbon nanotubes. However, the above methods still do not control the density of the growing carbon nanotubes very effectively. In addition, the selective growth described above can only grow carbon nanotubes in a small area, and it is impossible to grow carbon nanotubes over a large area.

承上述,如何在大面積上成長奈米碳管,並且有效地控制奈米碳管的密度,實為目前場發射領域所面臨的問題之一。In view of the above, how to grow carbon nanotubes on a large area and effectively control the density of carbon nanotubes is one of the problems faced by the field emission field.

本申請案提供一種場發射結構及其製造方法,以有效地控制碳奈米管的成長密度,進而降低屏蔽效應。The present application provides a field emission structure and a method of fabricating the same to effectively control the growth density of the carbon nanotubes, thereby reducing the shielding effect.

本申請案提供一種場發射結構,其包括一基板、一奈米尖錐、一觸媒層以及多個碳奈米管。奈米尖錐包括一配置於基板上之底部分(bottom portion)以及一位於底部分上方之尖端部分(tip portion)。觸媒層覆蓋奈米尖錐,而碳奈米管位於尖端部分的表面上。The application provides a field emission structure including a substrate, a nanometer taper, a catalyst layer, and a plurality of carbon nanotubes. The nano-cone includes a bottom portion disposed on the substrate and a tip portion positioned above the bottom portion. The catalyst layer covers the nano-cone and the carbon nanotube is located on the surface of the tip portion.

在本發明之一實施例中,前述之奈米尖錐為一角錐狀奈米尖錐或一圓錐狀奈米尖錐。In an embodiment of the invention, the nanometer tip cone is a pyramidal cone tip or a conical nanotip.

在本發明之一實施例中,前述之奈米尖錐之底部分為圓柱體或多邊形柱體,而尖端部分為圓錐體或角錐體。In an embodiment of the invention, the bottom of the aforementioned tip taper is divided into a cylinder or a polygonal cylinder, and the tip end portion is a cone or a pyramid.

在本發明之一實施例中,前述之碳奈米管係貫穿觸媒層,且暴露於觸媒層外。In an embodiment of the invention, the carbon nanotubes are passed through the catalyst layer and exposed to the outside of the catalyst layer.

在本發明之一實施例中,前述之底部分之材質包括半導體材料,而尖端部分之材質包括金屬或氮化鈦(TiNx)。In an embodiment of the invention, the material of the bottom portion comprises a semiconductor material, and the material of the tip portion comprises metal or titanium nitride (TiNx).

在本發明之一實施例中,前述之半導體材料例如為矽,而前述之金屬例如為鈦(Ti)或鉭(Ta)。In an embodiment of the invention, the aforementioned semiconductor material is, for example, germanium, and the aforementioned metal is, for example, titanium (Ti) or tantalum (Ta).

在本發明之一實施例中,前述之觸媒層之材質例如為鐵、鈷或鎳。In an embodiment of the invention, the material of the catalyst layer is, for example, iron, cobalt or nickel.

在本發明之一實施例中,前述之場發射結構可進一步包括一圖案化介電層以及一閘極,其中圖案化介電層配置於基板上,介電層具有一開口以容納奈米尖錐,而閘極配置於圖案化介電層上。In an embodiment of the invention, the field emission structure may further include a patterned dielectric layer and a gate, wherein the patterned dielectric layer is disposed on the substrate, and the dielectric layer has an opening to accommodate the nanotip The cone is disposed on the patterned dielectric layer.

在本發明之一實施例中,前述之基板包括一絕緣基材、一電極層、一阻抗層以及一半導體層,其中電極層配置於絕緣基材上,阻抗層配置於電極層上,而半導體層則配置於阻抗層上,且前述之奈米尖錐係配置於阻抗層上。In an embodiment of the invention, the substrate comprises an insulating substrate, an electrode layer, a resistive layer and a semiconductor layer, wherein the electrode layer is disposed on the insulating substrate, the resistive layer is disposed on the electrode layer, and the semiconductor The layer is disposed on the impedance layer, and the nanometer tip cone is disposed on the impedance layer.

在本發明之一實施例中,前述之奈米尖錐可進一步包括一位於尖端部分與底部分之間的中間部分(middle portion)。舉例而言,前述之底部分之材質例如為一半導體材料,中間部分之材質例如為一金屬或氮化鈦,而尖端部分之材質包括前述之金屬的氧化物或氮化鈦的氧化物。In an embodiment of the invention, the aforementioned tip taper may further include a middle portion between the tip end portion and the bottom portion. For example, the material of the bottom portion is, for example, a semiconductor material, the material of the middle portion is, for example, a metal or titanium nitride, and the material of the tip portion includes an oxide of the foregoing metal or an oxide of titanium nitride.

本申請案提供一種場發射結構的製造方法,包括下列步驟:於一基板上依序形成一第一材料層與一第二材料層;進行一氧化製程,使第二材料層氧化成一多孔性材料層,並使被多孔性材料層暴露之部分第一材料層氧化為多 個奈米點;移除多孔性材料層以暴露出第一材料層以及奈米點;以奈米點為罩幕,移除部分第一材料層以及部分基板以於基板上形成多個奈米尖錐;於各奈米尖錐上形成一觸媒層,且此觸媒層之厚度例如係介於2奈米至70奈米之間;以及於各奈米尖錐上分別形成多個碳奈米管。The present application provides a method for fabricating a field emission structure, comprising the steps of: sequentially forming a first material layer and a second material layer on a substrate; performing an oxidation process to oxidize the second material layer into a porous material a layer and oxidize a portion of the first material layer exposed by the porous material layer a nano-point; removing the porous material layer to expose the first material layer and the nano-dots; using a nano-dots as a mask to remove a portion of the first material layer and a portion of the substrate to form a plurality of nanoparticles on the substrate a tapered cone; forming a catalyst layer on each nanometer tip cone, and the thickness of the catalyst layer is, for example, between 2 nm and 70 nm; and forming a plurality of carbons on each of the nanometer tapers Nano tube.

在本發明之一實施例中,前述之第一材料層之材質例如為鈦、鉭或氮化鈦,而奈米點之材質例如為氧化鈦或氧化鉭。In an embodiment of the invention, the material of the first material layer is, for example, titanium, tantalum or titanium nitride, and the material of the nano point is, for example, titanium oxide or tantalum oxide.

在本發明之一實施例中,前述之第二材料層之材質例如為鋁。In an embodiment of the invention, the material of the second material layer is, for example, aluminum.

在本發明之一實施例中,前述之第二材料層被氧化後,多孔性材料層具有多個對應於奈米點之針孔(pin holes)。In an embodiment of the invention, after the second material layer is oxidized, the porous material layer has a plurality of pin holes corresponding to the nano-dots.

在本發明之一實施例中,前述之各奈米尖錐分別包括一配置於基板上之底部分、一位於底部分上方之尖端部分以及一位於尖端部分與底部分之間的中間部分,而在移除部分第一材料層與部分基板以形成奈米尖錐之後,奈米點分別構成尖端部分,未被移除的第一材料層構成中間部分,而未被移除的部分基板構成底部分。In an embodiment of the invention, each of the nanometer tapers includes a bottom portion disposed on the substrate, a tip portion disposed above the bottom portion, and an intermediate portion between the tip portion and the bottom portion, respectively. After removing a portion of the first material layer and a portion of the substrate to form a nano-tip, the nano-dots respectively form a tip portion, and the unremoved first material layer constitutes the intermediate portion, and the unremoved portion of the substrate constitutes the bottom portion section.

在本發明之一實施例中,前述之各奈米尖錐分別包括一配置於基板上之底部分以及一位於底部分上方之尖端部分,而在移除部分第一材料層與部分基板以形成奈米尖錐之後,奈米點完全被移除,未被移除的第一材料層構成尖端部分,而未被移除的部分基板構成底部分。In an embodiment of the invention, each of the nanometer tapers includes a bottom portion disposed on the substrate and a tip portion disposed above the bottom portion, and the first material layer and the portion of the substrate are removed to form a portion. After the nano-cone, the nano-dots are completely removed, the first layer of material that has not been removed constitutes the tip portion, and the portion of the substrate that has not been removed constitutes the bottom portion.

在本發明之一實施例中,前述之場發射結構的製造方 法可進一步包括下列步驟:在形成碳奈米管之前,於基板上依序形成一介電材料層與一導電材料層;以及移除部分導電材料層與部分介電材料層,以於基板上形成一閘極與一圖案化介電層,其中圖案化介電層具有一開口以容納奈米尖錐,且閘極配置於圖案化介電層上。In an embodiment of the invention, the manufacturer of the aforementioned field emission structure is The method may further include the steps of: sequentially forming a dielectric material layer and a conductive material layer on the substrate before forming the carbon nanotube; and removing a portion of the conductive material layer and the portion of the dielectric material layer on the substrate A gate and a patterned dielectric layer are formed, wherein the patterned dielectric layer has an opening to accommodate the nano-tip, and the gate is disposed on the patterned dielectric layer.

在本發明之一實施例中,前述之基板例如為一半導體基材。In an embodiment of the invention, the substrate is, for example, a semiconductor substrate.

在本發明之一實施例中,前述之基板包括一絕緣基材、一電極層、一阻抗層以及一半導體層,其中電極層配置於絕緣基材上,阻抗層配置於電極層上,半導體層配置於阻抗層上,前述之第一材料層係形成於半導體層上,而半導體層被部分移除,且未被移除的部分半導體層構成底部分。In an embodiment of the invention, the substrate comprises an insulating substrate, an electrode layer, a resistive layer and a semiconductor layer, wherein the electrode layer is disposed on the insulating substrate, the resistive layer is disposed on the electrode layer, and the semiconductor layer Disposed on the impedance layer, the aforementioned first material layer is formed on the semiconductor layer, and the semiconductor layer is partially removed, and a portion of the semiconductor layer not removed constitutes a bottom portion.

為讓本申請案之上述和其他目的、特徵和優點能更明顯易懂,下文特舉較佳實施例,並配合所附圖式,作詳細說明如下。The above and other objects, features, and advantages of the present invention will become more apparent and understood.

【第一實施例】[First Embodiment]

圖1A至圖1F為本發明第一實施例之場發射結構的製造方法。請參照圖1A,首先,於一基板100上依序形成一第一材料層110與一第二材料層120。在本實施例中,基板100例如為一半導體基材,而其材質例如為矽或是其他半導體材料。舉例而言,基板100之材質可為低電阻矽(low resistive silicon)。此外,形成於基材100上的第一材料層 110例如為鈦層、鉭層或氮化鈦(TiNx),而形成於第一材料層110上的第二材料層120例如為鋁層。值得注意的是,第二材料層120之材質可以是任何被氧化之後具備多孔特性(porosity)之材質。1A to 1F are views showing a method of fabricating a field emission structure according to a first embodiment of the present invention. Referring to FIG. 1A , first, a first material layer 110 and a second material layer 120 are sequentially formed on a substrate 100 . In the present embodiment, the substrate 100 is, for example, a semiconductor substrate, and the material thereof is, for example, germanium or other semiconductor material. For example, the material of the substrate 100 may be low resistive silicon. In addition, a first material layer formed on the substrate 100 110 is, for example, a titanium layer, a tantalum layer or titanium nitride (TiNx), and the second material layer 120 formed on the first material layer 110 is, for example, an aluminum layer. It should be noted that the material of the second material layer 120 may be any material having porous properties after being oxidized.

請參照圖1B,進行一氧化製程,以使第二材料層120氧化成一多孔性材料層130。在本實施例中,前述之氧化製程例如為一陽極氧化製程。Referring to FIG. 1B, an oxidation process is performed to oxidize the second material layer 120 into a porous material layer 130. In this embodiment, the foregoing oxidation process is, for example, an anodization process.

在前述之氧化製程進行的過程中,多孔性材料層130中會形成多個針孔(pin holes)130a,而這些針孔130a係隨機且均勻地分佈於多孔性材料層130中。分佈於多孔性材料層130中的針孔130a會將第一材料層110之部分表面暴露,並且使得針孔130a所暴露出來的第一材料層110被氧化為多個奈米點112。亦即,在前述之氧化製程進行的過程中,奈米點112的形成會晚於多孔性材料層130中針孔130a的形成。值得注意的是,奈米點112的尺寸、數量以及形成位置取決於多孔性材料層130中的針孔130a的尺寸、數量以及所在位置,此領域具有通常知識者可以透過調整氧化製程的配方來控制針孔130a的尺寸、數量以及所在位置,進而控制奈米點112的尺寸、數量以及形成位置。During the foregoing oxidation process, a plurality of pin holes 130a are formed in the porous material layer 130, and these pinholes 130a are randomly and uniformly distributed in the porous material layer 130. The pinhole 130a distributed in the porous material layer 130 exposes a portion of the surface of the first material layer 110, and causes the first material layer 110 exposed by the pinhole 130a to be oxidized into a plurality of nano-dots 112. That is, during the aforementioned oxidation process, the formation of the nano-dots 112 may be later than the formation of the pinholes 130a in the porous material layer 130. It should be noted that the size, number, and formation position of the nano-dots 112 depend on the size, number, and location of the pinholes 130a in the porous material layer 130, and the field has a formula that can be adjusted by the usual knowledge of the oxidation process. The size, number, and location of the pinholes 130a are controlled to control the size, number, and location of the nano-dots 112.

在本實施例中,奈米點112之材質與第一材料層110相關,當第一材料層110為鈦層或氮化鈦層時,所形成的奈米點112之材質為氧化鈦,當第一材料層110為鉭層時,所形成的奈米點112之材質為氧化鉭。In this embodiment, the material of the nano-dots 112 is related to the first material layer 110. When the first material layer 110 is a titanium layer or a titanium nitride layer, the formed nano-dots 112 are made of titanium oxide. When the first material layer 110 is a tantalum layer, the material of the formed nano-dots 112 is tantalum oxide.

請參照圖1C,移除多孔性材料層130以暴露出第一材料層110以及奈米點112。在本實施例中,移除多孔性 材料層130的方法例如為濕蝕刻Referring to FIG. 1C, the porous material layer 130 is removed to expose the first material layer 110 and the nano-dots 112. In this embodiment, the porosity is removed The method of material layer 130 is, for example, wet etching

請參照圖1D,以奈米點112為罩幕,移除部分未被奈米點112覆蓋之第一材料層110以及部分基板100以形成多個中間部分110a以及多個底部分100a。詳言之,在移除部分第一材料層110與部分基板100之後,未被移除的第一材料層110會構成中間部分110a,而未被移除的部分基板100構成底部分100a。在本實施例中,移除第一材料層110以及基板100的方法例如為乾蝕刻。Referring to FIG. 1D, with the nano-dots 112 as a mask, a portion of the first material layer 110 not covered by the nano-dots 112 and a portion of the substrate 100 are removed to form a plurality of intermediate portions 110a and a plurality of bottom portions 100a. In detail, after removing a portion of the first material layer 110 and a portion of the substrate 100, the first material layer 110 that has not been removed may constitute the intermediate portion 110a, and the portion of the substrate 100 that has not been removed constitutes the bottom portion 100a. In the present embodiment, the method of removing the first material layer 110 and the substrate 100 is, for example, dry etching.

在移除部分第一材料層110以及部分基板100的過程中,奈米點112亦會被部分移除而形成尖端部分112a。前述之尖端部分112a、中間部分110a以及底部分100a即構成奈米尖錐T,且奈米尖錐T會位於一厚度較薄的基板100b上。During the removal of a portion of the first material layer 110 and a portion of the substrate 100, the nano-dots 112 are also partially removed to form the tip portion 112a. The tip end portion 112a, the intermediate portion 110a, and the bottom portion 100a constitute the nano-tip T, and the nano-tip T is located on a thin substrate 100b.

在本實施例中,奈米尖錐T例如為一角錐狀奈米尖錐或一圓錐狀奈米尖錐,奈米尖錐T之底部分100a例如為為圓柱體或多邊形柱體,而尖端部分112a例如為圓錐體或角錐體。此外,底部分100a之材質與基板100b同為半導體材料(例如矽),中間部分110a與第一材料層110之材質同為金屬(例如鈦或鉭)或同為氮化鈦,而尖端部分112a與奈米點112之材質同為前述金屬的氧化物(例如氧化鈦或氧化鉭)或同為氮化鈦(TiNx)的氧化物(即氧化鈦)。In this embodiment, the nano-tip cone T is, for example, a pyramidal-shaped nano-cone or a conical nano-cone, and the bottom portion 100a of the nano-cone T is, for example, a cylinder or a polygonal cylinder, and the tip is The portion 112a is, for example, a cone or a pyramid. In addition, the material of the bottom portion 100a is the same as the substrate 100b (for example, germanium), and the material of the intermediate portion 110a and the first material layer 110 is the same as the metal (for example, titanium or tantalum) or the same as the titanium nitride, and the tip portion 112a. The material of the nano-dots 112 is the oxide of the aforementioned metal (for example, titanium oxide or cerium oxide) or the oxide of titanium nitride (TiNx) (that is, titanium oxide).

值得注意的是,在其他實施例中(如圖1D’所示),在移除部分第一材料層110以及部分基板100的過程中,奈米點112亦可被完全被移除。此時,未被移除的第一材料層110便會構成所謂的尖端部分110a’,而未被移除的 部分基板構成所謂的底部分100a,繪示於圖1D’中。前述之尖端部分110a’以及底部分100a’即構成奈米尖錐T”,且奈米尖錐T”會位於一厚度較薄的基板100b上。詳言之,奈米尖錐T”之尖端部分110a’之材質例如為金屬(如鈦或鉭)或氮化鈦。It should be noted that in other embodiments (as shown in FIG. 1D'), during the removal of portions of the first material layer 110 and portions of the substrate 100, the nano-dots 112 may also be completely removed. At this time, the first material layer 110 which has not been removed constitutes the so-called tip portion 110a' without being removed. A portion of the substrate constitutes a so-called bottom portion 100a, which is shown in Fig. 1D'. The aforementioned tip portion 110a' and the bottom portion 100a' constitute a nano-tip T", and the nano-tip T" will be located on a thin substrate 100b. In detail, the material of the tip end portion 110a' of the nano-tip T" is, for example, a metal such as titanium or tantalum or titanium nitride.

請參照圖1E,於各個奈米尖錐T上形成一觸媒層140。在本實施例中,所使用之觸媒層140的材質例如為鐵、鈷或鎳,其中該觸媒層140之厚度例如係介於2奈米至70奈米。Referring to FIG. 1E, a catalyst layer 140 is formed on each of the nano-tips T. In this embodiment, the material of the catalyst layer 140 used is, for example, iron, cobalt or nickel, wherein the thickness of the catalyst layer 140 is, for example, between 2 nm and 70 nm.

由於底部分100a’之材質為半導體材料,故底部分100a’會與觸媒層140反應而形成化合物。舉例而言,當底部分100a’之材質為矽,而觸媒層140為鐵、鈷或鎳等金屬時,底部分100a’與觸媒層140會反應而形成金屬矽化物(metal silicide)。此外,由於尖端部分112a之材質例如為氧化鈦或氧化鉭,故尖端部分112a不易與觸媒層140反應而形成化合物。Since the material of the bottom portion 100a' is a semiconductor material, the bottom portion 100a' reacts with the catalyst layer 140 to form a compound. For example, when the material of the bottom portion 100a' is 矽 and the catalyst layer 140 is a metal such as iron, cobalt or nickel, the bottom portion 100a' reacts with the catalyst layer 140 to form a metal silicide. Further, since the material of the tip end portion 112a is, for example, titanium oxide or yttrium oxide, the tip end portion 112a does not easily react with the catalyst layer 140 to form a compound.

請參照圖1F,於各個奈米尖錐T之尖端部分112a上分別形成多個碳奈米管150。由於底部分100a與觸媒層140會反應而形成化合物(例如為金屬矽化物),且尖端部分112a不易與觸媒層140反應而形成化合物,因此,尖端部分112a之表面上較容易成長出碳奈米管150,而底部分100a之表面上較容易成長出碳奈米管150。換言之,若要在尖端部分112a之表面成長出碳奈米管150,所需的成長溫度較低(約為攝氏200度至攝氏1000度);若要在底部分100a之表面成長出碳奈米管150,所需的成長溫度較高 (約為攝氏450度至攝氏1000度)。由上述可知,本實施例僅需透過適當的溫度控制,便可選擇性地在尖端部分112a之表面成長出碳奈米管150。Referring to FIG. 1F, a plurality of carbon nanotubes 150 are formed on the tip end portions 112a of the respective tip cones T. Since the bottom portion 100a reacts with the catalyst layer 140 to form a compound (for example, a metal halide), and the tip portion 112a does not easily react with the catalyst layer 140 to form a compound, the surface of the tip portion 112a is more likely to grow carbon. The nanotube tube 150 is more likely to grow out of the carbon nanotube tube 150 on the surface of the bottom portion 100a. In other words, if the carbon nanotube 150 is to be grown on the surface of the tip portion 112a, the required growth temperature is low (about 200 degrees Celsius to 1000 degrees Celsius); if carbon nanotubes are to be grown on the surface of the bottom portion 100a Tube 150, the required growth temperature is higher (about 450 degrees Celsius to 1000 degrees Celsius). As can be seen from the above, in this embodiment, the carbon nanotubes 150 can be selectively grown on the surface of the tip end portion 112a only by appropriate temperature control.

同樣地,當尖端部分110a’為金屬或氮化鈦時(如圖1D’所繪示),故尖端部分110a’不易與後續形成之觸媒層140反應而形成化合物,故圖1D’之尖端部分110a’與圖1D之尖端部分112a具有相同的功能,有助於碳奈米管150的選擇性成長。Similarly, when the tip portion 110a' is metal or titanium nitride (as shown in FIG. 1D'), the tip portion 110a' does not easily react with the subsequently formed catalyst layer 140 to form a compound, so the tip of FIG. 1D' The portion 110a' has the same function as the tip end portion 112a of FIG. 1D, contributing to the selective growth of the carbon nanotube 150.

如圖1F所示,本實施例之碳奈米管150係貫穿觸媒層140,且部分暴露於觸媒層140之外。As shown in FIG. 1F, the carbon nanotube 150 of the present embodiment penetrates the catalyst layer 140 and is partially exposed outside the catalyst layer 140.

【第二實施例】[Second embodiment]

圖2A至圖2H為本發明第二實施例之場發射結構的製造方法。本實施例之圖2A至圖2E所繪示之製程與第一實施例之圖1A至圖1E相同,故於此不再重述。2A to 2H are views showing a method of fabricating a field emission structure according to a second embodiment of the present invention. The process illustrated in FIG. 2A to FIG. 2E of the present embodiment is the same as that of FIG. 1A to FIG. 1E of the first embodiment, and thus will not be repeated herein.

請參照圖2F,在形成觸媒層140之後,於基板100b上依序形成一介電材料層160與一導電材料層170。由圖2F可知,介電材料層160與導電材料層170係全面性地覆蓋於基板100b、奈米尖錐T與觸媒層140上。Referring to FIG. 2F, after forming the catalyst layer 140, a dielectric material layer 160 and a conductive material layer 170 are sequentially formed on the substrate 100b. As can be seen from FIG. 2F, the dielectric material layer 160 and the conductive material layer 170 are entirely covered on the substrate 100b, the nano-tip T and the catalyst layer 140.

請參照圖2G,移除部分導電材料層170與部分介電材料層160,以於基板100b上形成一閘極170a與一圖案化介電層160a,其中圖案化介電層160a具有一開口162以容納奈米尖錐T,且閘極170a配置於圖案化介電層160a上。Referring to FIG. 2G, a portion of the conductive material layer 170 and a portion of the dielectric material layer 160 are removed to form a gate 170a and a patterned dielectric layer 160a on the substrate 100b, wherein the patterned dielectric layer 160a has an opening 162. The nano-tip T is accommodated, and the gate 170a is disposed on the patterned dielectric layer 160a.

請參照圖2H,於各個奈米尖錐T之尖端部分112a上 分別形成多個碳奈米管150。由於底部分100a與觸媒層140會反應而形成化合物(例如為金屬矽化物),且尖端部分112a不易與觸媒層140反應而形成化合物,因此,尖端部分112a之表面上較容易成長出碳奈米管150,而底部分100a之表面上較容易成長出碳奈米管150。換言之,若要在尖端部分112a之表面成長出碳奈米管150,所需的成長溫度較低(約為攝氏200度至攝氏1000度之間);若要在底部分100a之表面成長出碳奈米管150,所需的成長溫度較高(約為攝氏450度至攝氏1000度之間)。由上述可知,本實施例僅需透過適當的溫度控制,便可選擇性地在尖端部分112a之表面成長出碳奈米管150。Please refer to FIG. 2H on the tip end portion 112a of each nano-tip T A plurality of carbon nanotubes 150 are formed separately. Since the bottom portion 100a reacts with the catalyst layer 140 to form a compound (for example, a metal halide), and the tip portion 112a does not easily react with the catalyst layer 140 to form a compound, the surface of the tip portion 112a is more likely to grow carbon. The nanotube tube 150 is more likely to grow out of the carbon nanotube tube 150 on the surface of the bottom portion 100a. In other words, if the carbon nanotube 150 is to be grown on the surface of the tip portion 112a, the required growth temperature is low (about 200 degrees Celsius to 1000 degrees Celsius); if carbon is to be grown on the surface of the bottom portion 100a The nanotubes 150 have a higher growth temperature (about 450 degrees Celsius to 1000 degrees Celsius). As can be seen from the above, in this embodiment, the carbon nanotubes 150 can be selectively grown on the surface of the tip end portion 112a only by appropriate temperature control.

如圖2H所示,本實施例之碳奈米管150係貫穿觸媒層140,且部分暴露於觸媒層140之外。As shown in FIG. 2H, the carbon nanotube 150 of the present embodiment penetrates the catalyst layer 140 and is partially exposed outside the catalyst layer 140.

【第三實施例】[Third embodiment]

圖3A至圖3F為本發明第三實施例之場發射結構的製造方法。請參照圖3A至圖3F,本實施例與第一實施例類似,惟二者主要差異之處在於:本實施例所使用的基板100’與第一實施例所使用的基板100不同,故以下僅針對二實施例之差異處進行描述。3A to 3F are views showing a method of fabricating a field emission structure according to a third embodiment of the present invention. Referring to FIG. 3A to FIG. 3F, the present embodiment is similar to the first embodiment, but the main difference between the two is that the substrate 100' used in the embodiment is different from the substrate 100 used in the first embodiment, so Only the differences between the two embodiments will be described.

本實施例所使用之基板100’包括一絕緣基材S、一電極層E、一阻抗層R以及一半導體層SE,其中電極層E配置於絕緣基材S上,阻抗層R配置於電極層E上,半導體層SE配置於阻抗層R上,第一材料層110係形成於半導體層SE上。前述之半導體層SE材質可為矽或是其他半 導體材料。舉例而言,基板100之材質可為低電阻矽。The substrate 100' used in this embodiment includes an insulating substrate S, an electrode layer E, a resistive layer R, and a semiconductor layer SE. The electrode layer E is disposed on the insulating substrate S, and the resistive layer R is disposed on the electrode layer. In E, the semiconductor layer SE is disposed on the resistive layer R, and the first material layer 110 is formed on the semiconductor layer SE. The foregoing semiconductor layer SE material may be 矽 or other half Conductor material. For example, the material of the substrate 100 can be a low resistance 矽.

如圖3D所示,在以奈米點112為罩幕移除部分未被奈米點112覆蓋之第一材料層110以及部分基板100(即半導體層SE)之後,未被移除的第一材料層110會構成中間部分110a,而未被移除的半導體層會構成底部分SE’。在移除部分第一材料層110以及部分基板100的過程中,奈米點112亦會被部分移除而形成尖端部分112a。前述之尖端部分112a、中間部分110a以及底部分SE’即構成奈米尖錐T’,且奈米尖錐T’會位於基板100’之阻抗層R上。As shown in FIG. 3D, after the first material layer 110 not covered by the nano-dots 112 and the portion of the substrate 100 (ie, the semiconductor layer SE) are removed by the nano-dots 112 as a mask, the first is not removed. The material layer 110 will constitute the intermediate portion 110a, and the unremoved semiconductor layer will constitute the bottom portion SE'. During the removal of a portion of the first material layer 110 and a portion of the substrate 100, the nano-dots 112 are also partially removed to form the tip portion 112a. The tip end portion 112a, the intermediate portion 110a, and the bottom portion SE' constitute the nano-tip T', and the nano-tip T' will be located on the resistive layer R of the substrate 100'.

值得注意的是,在其他實施例中(如圖3D’所示),在移除部分第一材料層110以及部分基板100的過程中,奈米點112亦可被完全被移除。此時,未被移除的第一材料層110便會構成所謂的尖端部分110a’,而未被移除的半導體層SE構成所謂的底部分SE’,繪示於圖3D’中。前述之尖端部分110a’以及底部分SE’即構成奈米尖錐T'''。詳言之,奈米尖錐T'''之尖端部分110a’之材質例如為金屬或氮化鈦。It is noted that in other embodiments (as shown in Figure 3D'), the nano-dots 112 may also be completely removed during the removal of portions of the first material layer 110 and portions of the substrate 100. At this time, the first material layer 110 which has not been removed constitutes a so-called tip portion 110a', and the semiconductor layer SE which has not been removed constitutes a so-called bottom portion SE', which is shown in Fig. 3D'. The aforementioned tip end portion 110a' and the bottom portion SE' constitute the nano-tip cone T'''. In detail, the material of the tip end portion 110a' of the tip taper T''' is, for example, metal or titanium nitride.

同樣地,當尖端部分110a’為金屬或氮化鈦時(如圖3D’所繪示),故尖端部分110a’不易與後續形成之觸媒層140反應而形成化合物,故圖3D’之尖端部分110a’與圖3D之尖端部分112a具有相同的功能,有助於碳奈米管150的選擇性成長。Similarly, when the tip portion 110a' is metal or titanium nitride (as shown in FIG. 3D'), the tip portion 110a' does not easily react with the subsequently formed catalyst layer 140 to form a compound, so the tip of FIG. 3D' Portion 110a' has the same function as tip end portion 112a of Figure 3D, facilitating selective growth of carbon nanotube 150.

【第四實施例】Fourth Embodiment

圖4A至圖4H為本發明第四實施例之場發射結構的 製造方法。請參照圖4A至圖4H,本實施例與第二實施例類似,惟二者主要差異之處在於:本實施例所使用的基板100’與第二實施例所使用的基板100不同,故以下僅針對二實施例之差異處進行描述。4A to 4H are diagrams showing a field emission structure of a fourth embodiment of the present invention; Production method. Referring to FIG. 4A to FIG. 4H, this embodiment is similar to the second embodiment, but the main difference between the two is that the substrate 100' used in the embodiment is different from the substrate 100 used in the second embodiment, so Only the differences between the two embodiments will be described.

本實施例所使用之基板100’包括一絕緣基材S、一電極層E、一阻抗層R以及一半導體層SE,其中電極層E配置於絕緣基材S上,阻抗層R配置於電極層E上,半導體層SE配置於阻抗層R上,第一材料層110係形成於半導體層SE上。前述之半導體層SE材質可為矽或是其他半導體材料。舉例而言,基板100之材質可為低電阻矽。The substrate 100' used in this embodiment includes an insulating substrate S, an electrode layer E, a resistive layer R, and a semiconductor layer SE. The electrode layer E is disposed on the insulating substrate S, and the resistive layer R is disposed on the electrode layer. In E, the semiconductor layer SE is disposed on the resistive layer R, and the first material layer 110 is formed on the semiconductor layer SE. The foregoing semiconductor layer SE material may be germanium or other semiconductor material. For example, the material of the substrate 100 can be a low resistance 矽.

如圖4D所示,在以奈米點112為罩幕移除部分未被奈米點112覆蓋之第一材料層110以及部分基板100(即半導體層SE)之後,未被移除的第一材料層110會構成中間部分110a,而未被移除的半導體層會構成底部分SE’。在移除部分第一材料層110以及部分基板100的過程中,奈米點112亦會被部分移除而形成尖端部分112a。前述之尖端部分112a、中間部分110a以及底部分SE’即構成奈米尖錐T’,且奈米尖錐T’會位於基板100’之阻抗層R上。As shown in FIG. 4D, after the first material layer 110 not covered by the nano-dots 112 and a portion of the substrate 100 (ie, the semiconductor layer SE) are removed with the nano-dots 112 as a mask, the first is not removed. The material layer 110 will constitute the intermediate portion 110a, and the unremoved semiconductor layer will constitute the bottom portion SE'. During the removal of a portion of the first material layer 110 and a portion of the substrate 100, the nano-dots 112 are also partially removed to form the tip portion 112a. The tip end portion 112a, the intermediate portion 110a, and the bottom portion SE' constitute the nano-tip T', and the nano-tip T' will be located on the resistive layer R of the substrate 100'.

在本申請案之上述實施例中,利用奈米點作為罩幕以形成奈米尖錐可以有效地控制碳奈米管的成長密度,進而降低屏蔽效應。In the above embodiment of the present application, the use of a nano-dots as a mask to form a nano-tip can effectively control the growth density of the carbon nanotubes, thereby reducing the shielding effect.

雖然本申請案已以較佳實施例揭露如上,然其並非用以限定本申請案,任何熟習此技藝者,在不脫離本申請案 之精神和範圍內,當可作些許之更動與潤飾,因此本申請案之保護範圍當視後附之申請專利範圍所界定者為準。Although the present application has been disclosed in the above preferred embodiments, it is not intended to limit the application, and anyone skilled in the art will not depart from the present application. In the spirit and scope, the scope of protection of this application is subject to the definition of the scope of the patent application.

100、100b、100’‧‧‧基板100, 100b, 100'‧‧‧ substrates

100a、SE’‧‧‧底部分100a, SE’‧‧‧ bottom part

110‧‧‧第一材料層110‧‧‧First material layer

110a‧‧‧中間部分110a‧‧‧ middle part

112‧‧‧奈米點112‧‧‧Nee Point

112a、110a’‧‧‧尖端部分112a, 110a’‧‧‧ tip part

120‧‧‧第二材料層120‧‧‧Second material layer

130‧‧‧多孔性材料層130‧‧‧Porosive material layer

130a‧‧‧針孔130a‧‧ pinhole

T、T’、T”、T'''‧‧‧奈米尖錐T, T', T", T'''‧‧‧ nm rice cone

140‧‧‧觸媒層140‧‧‧ catalyst layer

150‧‧‧碳奈米管150‧‧‧Carbon nanotubes

160‧‧‧介電材料層160‧‧‧ dielectric material layer

160a‧‧‧圖案化介電層160a‧‧‧ patterned dielectric layer

162‧‧‧開口162‧‧‧ openings

170‧‧‧導電材料層170‧‧‧ Conductive material layer

170a‧‧‧閘極170a‧‧‧ gate

S‧‧‧絕緣基材S‧‧‧Insulation substrate

E‧‧‧電極層E‧‧‧electrode layer

R‧‧‧阻抗層R‧‧‧ impedance layer

SE‧‧‧半導體層SE‧‧‧Semiconductor layer

圖1A至圖1F為本發明第一實施例之場發射結構的製造方法。1A to 1F are views showing a method of fabricating a field emission structure according to a first embodiment of the present invention.

圖1D’為另一種奈米尖錐之剖面示意圖。Figure 1D' is a schematic cross-sectional view of another nano-tip.

圖2A至圖2H為本發明第二實施例之場發射結構的製造方法。2A to 2H are views showing a method of fabricating a field emission structure according to a second embodiment of the present invention.

圖3A至圖3F為本發明第三實施例之場發射結構的製造方法。3A to 3F are views showing a method of fabricating a field emission structure according to a third embodiment of the present invention.

圖3D’為另一種奈米尖錐之剖面示意圖。Figure 3D' is a schematic cross-sectional view of another nano-tip.

圖4A至圖4H為本發明第四實施例之場發射結構的製造方法。4A through 4H illustrate a method of fabricating a field emission structure in accordance with a fourth embodiment of the present invention.

100‧‧‧基板100‧‧‧Substrate

110‧‧‧第一材料層110‧‧‧First material layer

112‧‧‧奈米點112‧‧‧Nee Point

130‧‧‧多孔性材料層130‧‧‧Porosive material layer

130a‧‧‧針孔130a‧‧ pinhole

Claims (21)

一種場發射結構,包括:一基板;一奈米尖錐,包括一配置於該基板上之底部分以及一位於該底部分上方之尖端部分,其中該底部分之材質包括一半導體材料,而該尖端部分之材質包括金屬或氮化鈦;一觸媒層,覆蓋該奈米尖錐;以及多個碳奈米管,位於該尖端部分的表面上。 A field emission structure includes: a substrate; a nano-tip, comprising a bottom portion disposed on the substrate and a tip portion above the bottom portion, wherein the bottom portion is made of a semiconductor material, and the material The material of the tip portion includes metal or titanium nitride; a catalyst layer covering the nano-tip; and a plurality of carbon nanotubes on the surface of the tip portion. 如申請專利範圍第1項所述之場發射結構,其中該奈米尖錐為一角錐狀奈米尖錐或一圓錐狀奈米尖錐。 The field emission structure of claim 1, wherein the nano-cone is a pyramidal cone or a conical nano-cone. 如申請專利範圍第1項所述之場發射結構,其中該奈米尖錐之該底部分為圓柱體或多邊形柱體,而該尖端部分為圓錐體或角錐體。 The field emission structure of claim 1, wherein the bottom of the nano-cone is divided into a cylinder or a polygonal cylinder, and the tip portion is a cone or a pyramid. 如申請專利範圍第1項所述之場發射結構,其中該些碳奈米管貫穿該觸媒層,且暴露於該觸媒層外。 The field emission structure of claim 1, wherein the carbon nanotubes extend through the catalyst layer and are exposed outside the catalyst layer. 如申請專利範圍第1項所述之場發射結構,其中該半導體材料包括矽,而該金屬包括鈦(Ti)或鉭(Ta)。 The field emission structure of claim 1, wherein the semiconductor material comprises germanium and the metal comprises titanium (Ti) or tantalum (Ta). 如申請專利範圍第1項所述之場發射結構,其中該觸媒層之材質包括鐵、鈷或鎳,且該觸媒層之厚度介於約2奈米至70奈米之間。 The field emission structure of claim 1, wherein the material of the catalyst layer comprises iron, cobalt or nickel, and the thickness of the catalyst layer is between about 2 nm and 70 nm. 如申請專利範圍第1項所述之場發射結構,更包括:一圖案化介電層,配置於該基板上,該圖案化介電層具有一開口以容納該奈米尖錐;以及一閘極,配置於該圖案化介電層上。 The field emission structure of claim 1, further comprising: a patterned dielectric layer disposed on the substrate, the patterned dielectric layer having an opening to accommodate the nano-spike; and a gate The pole is disposed on the patterned dielectric layer. 如申請專利範圍第1項所述之場發射結構,其中該 基板包括:一絕緣基材;一電極層,配置於該絕緣基材上;一阻抗層,配置於該電極層上;以及一半導體層,配置於該阻抗層上,其中該奈米尖錐係配置於該阻抗層上。 The field emission structure of claim 1, wherein the field emission structure The substrate includes: an insulating substrate; an electrode layer disposed on the insulating substrate; a resistive layer disposed on the electrode layer; and a semiconductor layer disposed on the resistive layer, wherein the nano-cone is It is disposed on the impedance layer. 如申請專利範圍第1項所述之場發射結構,其中該奈米尖錐更包括一位於該尖端部分與該底部分之間的中間部分。 The field emission structure of claim 1, wherein the nano-cone further comprises an intermediate portion between the tip portion and the bottom portion. 如申請專利範圍第9項所述之場發射結構,其中該底部分之材質包括一半導體材料,該中間部分之材質包括一金屬或氮化鈦,而該尖端部分之材質包括該金屬之氧化物。 The field emission structure of claim 9, wherein the material of the bottom portion comprises a semiconductor material, the material of the intermediate portion comprises a metal or titanium nitride, and the material of the tip portion comprises the oxide of the metal . 如申請專利範圍第10項所述之場發射結構,其中該半導體材料包括矽,該金屬包括鈦(Ti)或鉭(Ta),而該金屬之氧化物包括氧化鈦(TiOx)或氧化鉭(TaOx)。 The field emission structure of claim 10, wherein the semiconductor material comprises germanium, the metal comprises titanium (Ti) or tantalum (Ta), and the oxide of the metal comprises titanium oxide (TiOx) or tantalum oxide ( TaOx). 一種場發射結構的製造方法,包括:於一基板上依序形成一第一材料層與一第二材料層;進行一氧化製程,使該第二材料層氧化成一多孔性材料層,並使被該多孔性材料層暴露之部分第一材料層氧化為多個奈米點;移除該多孔性材料層以暴露出該第一材料層以及該些奈米點;以該些奈米點為罩幕,移除部分該第一材料層以及部分該基板以形成多個奈米尖錐; 於各該奈米尖錐上形成一觸媒層;以及於各該奈米尖錐上分別形成多個碳奈米管。 A method for fabricating a field emission structure includes: sequentially forming a first material layer and a second material layer on a substrate; performing an oxidation process to oxidize the second material layer into a porous material layer and The exposed portion of the first material layer of the porous material layer is oxidized into a plurality of nano-dots; the porous material layer is removed to expose the first material layer and the nano-dots; and the nano-dots are used as a mask a screen, removing a portion of the first material layer and a portion of the substrate to form a plurality of nano-tips; Forming a catalyst layer on each of the nanometer cones; and forming a plurality of carbon nanotubes on each of the nanometer cones. 如申請專利範圍第12項所述之場發射結構的製造方法,其中該第一材料層之材質包括鈦、鉭或氮化鈦,而該些奈米點之材質包括氧化鈦或氧化鉭。 The method for manufacturing a field emission structure according to claim 12, wherein the material of the first material layer comprises titanium, tantalum or titanium nitride, and the material of the nano point comprises titanium oxide or tantalum oxide. 如申請專利範圍第12項所述之場發射結構的製造方法,其中該第二材料層之材質包括鋁。 The method of fabricating a field emission structure according to claim 12, wherein the material of the second material layer comprises aluminum. 如申請專利範圍第12項所述之場發射結構的製造方法,其中該第二材料層被氧化後,該多孔性材料層具有多個對應於該些奈米點之針孔。 The method of fabricating a field emission structure according to claim 12, wherein the porous material layer has a plurality of pinholes corresponding to the nano-dots after the second material layer is oxidized. 如申請專利範圍第12項所述之場發射結構的製造方法,其中各該奈米尖錐分別包括一配置於該基板上之底部分、一位於該底部分上方之尖端部分以及一位於該尖端部分與該底部分之間的中間部分,而在移除部分該第一材料層與部分該基板以形成該些奈米尖錐之後,該些奈米點分別構成該些尖端部分,未被移除的該第一材料層構成該些中間部分,而未被移除的部分該基板構成該些底部分。 The method for manufacturing a field emission structure according to claim 12, wherein each of the nanometer cones comprises a bottom portion disposed on the substrate, a tip portion located above the bottom portion, and a tip portion An intermediate portion between the portion and the bottom portion, and after removing the portion of the first material layer and a portion of the substrate to form the plurality of nano-tips, the nano-dots respectively constitute the tip portions, and are not moved The first layer of material is formed to form the intermediate portions, and the portion of the substrate that is not removed constitutes the bottom portions. 如申請專利範圍第12項所述之場發射結構的製造方法,其中各該奈米尖錐分別包括一配置於該基板上之底部分以及一位於該底部分上方之尖端部分,而在移除部分該第一材料層與部分該基板以形成該些奈米尖錐之後,該些奈米點完全被移除,未被移除的該第一材料層構成該些尖端部分,而未被移除的部分該基板構成該些底部分。 The method for manufacturing a field emission structure according to claim 12, wherein each of the nanometer cones comprises a bottom portion disposed on the substrate and a tip portion disposed above the bottom portion, and is removed After a portion of the first material layer and a portion of the substrate to form the nano-tips, the nano-dots are completely removed, and the un-removed first material layer constitutes the tip portions without being removed The divided portion of the substrate constitutes the bottom portions. 如申請專利範圍第12項所述之場發射結構的製造方法,更包括: 在形成該些碳奈米管之前,於該基板上依序形成一介電材料層與一導電材料層;以及移除部分該導電材料層與部分該介電材料層,以於該基板上形成一閘極與一圖案化介電層,其中該圖案化介電層具有一開口以容納該奈米尖錐,且該閘極配置於該圖案化介電層上。 The method for manufacturing a field emission structure according to claim 12, further comprising: Before forming the carbon nanotubes, a dielectric material layer and a conductive material layer are sequentially formed on the substrate; and a portion of the conductive material layer and a portion of the dielectric material layer are removed to form on the substrate. a gate and a patterned dielectric layer, wherein the patterned dielectric layer has an opening to accommodate the nano-tip, and the gate is disposed on the patterned dielectric layer. 如申請專利範圍第12項所述之場發射結構的製造方法,其中該基板包括一半導體基材。 The method of fabricating a field emission structure according to claim 12, wherein the substrate comprises a semiconductor substrate. 如申請專利範圍第12項所述之場發射結構的製造方法,其中該基板包括:一絕緣基材;一電極層,配置於該絕緣基材上;一阻抗層,配置於該電極層上;以及一半導體層,配置於該阻抗層上,其中該第一材料層係形成於該半導體層上,而該半導體層被部分移除,且未被移除的部分該半導體層構成各該奈米尖錐的一底部分。 The method of manufacturing the field emission structure of claim 12, wherein the substrate comprises: an insulating substrate; an electrode layer disposed on the insulating substrate; and a resistive layer disposed on the electrode layer; And a semiconductor layer disposed on the resistive layer, wherein the first material layer is formed on the semiconductor layer, and the semiconductor layer is partially removed, and the unselected portion of the semiconductor layer constitutes each of the nanometers a bottom portion of the tip. 如申請專利範圍第12項所述之場發射結構的製造方法,其中各該奈米尖錐分別包括一配置於該基板上之底部分、一位於該底部分上方之尖端部分,其中於各該奈米尖錐上分別形成多個碳奈米管之步驟中:若該些碳奈米管係在該些尖端部分之表面成長,則其所需的成長溫度約為攝氏200度至攝氏1000度;以及若該些碳奈米管係在該些底部分之表面成長,則其所需的成長溫度約為攝氏450度至攝氏1000度。 The method for manufacturing a field emission structure according to claim 12, wherein each of the nanometer cones comprises a bottom portion disposed on the substrate and a tip portion located above the bottom portion, wherein each of the tips In the step of forming a plurality of carbon nanotubes on the tip of the nanometer: if the carbon nanotubes grow on the surface of the tip portions, the required growth temperature is about 200 degrees Celsius to 1000 degrees Celsius. And if the carbon nanotubes grow on the surface of the bottom portions, the required growth temperature is about 450 degrees Celsius to 1000 degrees Celsius.
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