TWI449289B - Over temperature protection circuit and temperature calculation method therein - Google Patents

Description

Over temperature protection circuit and its temperature calculation method

The invention relates to an over temperature protection circuit, in particular to an over temperature protection circuit with temperature detection.

It is conventional to use a bipolar transistor (BJT) as a temperature sensing device, which utilizes the relationship between the base-to-emitter voltage and the ambient temperature in a bipolar transistor to detect the ambient temperature, but the ambient temperature is The influence of the base to the emitter in the bipolar transistor is small, so it is necessary to improve the resolution of the analog/digital converter in the over temperature protection circuit, thereby increasing the difficulty in designing the over temperature protection circuit.

The main object of the present invention is to provide an over temperature protection circuit with low circuit layout complexity and large temperature sensing range.

An over temperature protection circuit of the present invention includes an energy gap unit, a temperature sensor and a frequency converter. The energy gap unit provides a stable bias voltage, and the temperature sensor is electrically connected to the energy gap unit. The temperature sensor has a triple voltage generator, a ring oscillator and a buffer unit. The ring oscillator is electrically connected to the triple voltage generator and the buffer unit, and the buffer unit is electrically connected to the triple a voltage generator, the triple voltage generator outputs a correction voltage, the ring oscillator and the buffer unit receive the correction voltage and the stable bias voltage provided by the gap unit, and the buffer unit outputs a frequency signal, The frequency converter is electrically connected to the temperature sensor, and the frequency converter receives the frequency signal, the frequency converter has a first counter, a second counter and a digital operation list The second counter is electrically connected to the buffer unit of the temperature sensor, and the digital operation unit is electrically connected to the first counter and the second counter to output a temperature signal. If the temperature signal exceeds the standard, the second counter is electrically connected to the buffer unit. The digital computing unit outputs a warning signal to notify the system that the temperature is too high. The present invention detects the temperature by the relationship between the ambient temperature and the frequency of the ring oscillator, and outputs the output by the triple voltage generator. Correcting the voltage changes the frequency-temperature relationship of the ring oscillator, so that the frequency-temperature relationship approaches a linear relationship, so the number of samples of the frequency and temperature required to calculate the frequency-temperature relationship can be effectively reduced. The over temperature protection circuit 100 of the present invention can detect temperature data with minimal error between -40 ° C and 125 ° C to provide accurate over temperature protection.

Referring to FIG. 1 , an over temperature protection circuit 100 includes an energy gap unit 110 , a temperature sensor 120 , and a frequency converter 130 . The gap unit 110 provides a stable bias voltage. The temperature sensor 120 is electrically connected to the gap unit 110 and receives the stable bias voltage, and the frequency converter 130 is electrically connected to the temperature sensor 120.

Referring to FIG. 2 , the temperature sensor 120 has a triple voltage generator 121 , a ring oscillator 122 , a buffer unit 123 , and a redundancy unit 124 . The ring oscillator 122 , the buffer unit 123 , and The redundancy unit 124 is electrically connected to the triple voltage generator 121. The buffer unit 123 and the redundant unit 124 are electrically connected to the ring oscillator 122. The triple voltage generator 121 outputs a correction voltage. The type oscillator 122, the buffer unit 123 and the redundancy unit 124 receive the correction voltage and the energy The stable bias voltage is provided by the gap unit 110, and the buffer unit 123 outputs a frequency signal.

Referring to FIG. 2 , the ring oscillator 122 has a first delay circuit 125 , a second delay circuit 126 electrically connected to the first delay circuit 125 , and a second electrical connection circuit 126 . The third delay circuit 127 has a first correction terminal 125a, two input terminals 125b and two output terminals 125c. The second delay circuit 126 has a second correction terminal 126a, two input terminals 126b and two outputs. The third delay circuit 127 has a third correcting end 127a, two input ends 127b and two output ends 127c. The buffer unit 123 has a fourth correcting end 123a, two input ends 123b and a frequency output end 123c. The redundancy unit 124 has a first redundancy circuit 128 and a second redundancy circuit 129. The first redundancy circuit 128 has a fifth correction terminal 128a and two input terminals 128b. The second redundancy circuit 129 has a second redundancy circuit 129. a sixth correcting end 129a and two input ends 129b, wherein the first correcting end 125a, the second correcting end 126a, the third correcting end 127a, the fourth correcting end 123a, the fifth correcting end 128a, and the first The sixth calibration terminal 129a is electrically connected to the triple voltage generator 121 The two input terminals 123b of the buffer unit 123 are electrically connected to the two output ends 126c of the second delay circuit 126 and the third delay circuit 127. The input terminal 127b, according to the correction voltage of the triple voltage generator 121, corrects the linear relationship between the frequency of the frequency signal output by the buffer unit 123 and the ambient temperature output by the frequency output terminal 123c, and thus The number of samples and the number of samples required to calculate the frequency-temperature relationship can be effectively reduced.

Please refer to FIG. 2 again, the two input ends of the first redundant circuit 128 128b is electrically connected to the two input ends 125b of the first delay circuit 125. The two input ends 129b of the second redundancy circuit 129 are electrically connected to the two output ends 125c of the first delay circuit 125 and the second delay circuit 126. The two input terminals 126b are electrically connected to the redundant unit 124 to increase the reliability of the ring oscillator 122 during temperature sensing.

Please refer to FIG. 3 and FIG. 3 . First, referring to FIG. 3 , the frequency converter 130 receives the frequency signal output by the temperature sensor 120 , and the frequency converter 130 has a first counter 131 and a second. The counter 132 and a digital operation unit 133, the frequency signal receiving end 132b of the second counter 132 is electrically connected to the frequency output end 123c of the buffer unit 123 of the temperature sensor 120, and the digital operation unit 133 is electrically connected. The first counter 131 and the second counter 132 have a clock signal input terminal 131a and a module signal receiving terminal 131b. The second counter 132 further has a retest terminal 132a. The digital operation unit 133 of the frequency converter 130 includes a first frequency register 133a, a second frequency register 133b, a third frequency register 133c, a first operation register 133d, a second operation register 133e, an integer register 133f and a temperature register 133g, wherein the second counter 132 is electrically connected to the module signal receiving end 131b of the first counter 131, the first counter 131 electrical connection The re-test end 132a of the second counter 132, wherein the first counter 131 counts the positive edge number of one of the clock signals received by the clock signal receiving end 131a, and the second counter 132 counts the temperature sensor 120 The positive edge number of the frequency signal provided by the buffer unit 123, the digit operation unit 133 is configured to perform a numerical operation and store the value of the first counter 131, the value of the second counter 132, and a temperature obtained by the numerical operation. Signal, if the temperature When the degree signal exceeds the standard, the digit operation unit 133 outputs a warning signal to notify the system that the temperature is too high.

Please refer to FIG. 5 , which is a temperature calculation method of the frequency converter 130 according to the present invention. The method includes the following steps: (a) providing a frequency converter 130 having a first counter 131 , a second counter 132 , and a first The digital operation unit 133 has a clock signal input terminal 131a and a module signal receiving end 131b. The second counter 132 has a retest terminal 132a and a frequency signal receiving end 132b. The digit operation unit 133 Having a first frequency register 133a, a second frequency register 133b, a third frequency register 133c, a first operation register 133d, a second operation register 133e, an integer temporary storage The device 133f and a temperature register 133g, the first frequency register 133a, the second frequency register 133b, the third frequency register 133c, the first operation register 133d, and the second operation The initial value of the temporary register 133e, the integer register 133f and the temperature register 133g is set to zero; then the step (b) is performed to determine the state of the module signal received by the module signal receiving end 131b, if it is determined If the state is the first mode, skip to step (c). If the determination state is not the first mode, then skip to step (d), the step (c) is to input a first preset value to the first frequency register 133a, and input a second preset value to the second The frequency register 133b, the first preset value corresponds to a first preset temperature, the second preset value corresponds to a second preset temperature and jumps to step (h), and step (d) determines Whether the state of the module signal is the second mode, if it is the second mode, skip to step (e), and when the state is not the second mode, skip to step (f), and step (e) is the The clock signal input terminal 131a inputs a clock signal, and the frequency signal receiving end 132b inputs a first frequency signal, and causes the first counter 131 to count the positive edge number of the clock signal. The second counter 132 counts the number of positive edges of the first frequency signal. When the number of positive edges of the clock signal reaches a predetermined value, the value counted by the second counter 132 is stored in the first frequency register 133a. The value corresponds to the first preset temperature, the step (f) is to determine whether the state of the module signal is the third mode, and if it is the third mode, the step (g) is performed, when the state is not the third The modality jumps to step (h), the step (g) inputs a clock signal to the clock signal input terminal, and the frequency signal receiving end 132b inputs a second frequency signal and causes the first counter 131 to count. The number of positive edges of the clock signal, the second counter 132 counts the number of positive edges of the second frequency signal, and when the number of positive edges of the clock signal reaches a predetermined value, the value counted by the second counter 132 Stored in the second frequency register 133b, the value corresponds to the second preset temperature, the step (h) is to determine whether the state of the module signal is the fourth mode, and if it is the fourth mode, the step is performed. (i), when the state is not the fourth mode, then jump to step (b), step (i) is The clock signal input terminal 131a inputs a clock signal, and the frequency signal receiving end 132b inputs a third frequency signal, and causes the first counter 131 to count the positive edge number of the clock signal, and the second counter 132 counts the number. When the number of positive edges of the third frequency signal reaches a predetermined value, the value of the second counter 132 is stored in the third frequency register 133c, and the value corresponds to an ambient temperature.

Referring to FIG. 6, after step (i), the following steps are further included. First, step (i1) stores an operation value in the first operation register 133d, and stores a fixed value in the second operation. The storage unit 133e, the operation value is the value of the first frequency register 133a minus the value of the second frequency register 133b, and the fixed value is the first preset temperature minus the second preset temperature. Numerical value, followed by step (i2), step (i2) is to determine the The value of the first operation register 133d minus whether the value of the second operation register 133e is greater than zero, if it is greater than zero, the step (i3) is performed, and if it is not greater than zero, the step (i4) is skipped. In the example, the step (i3) is to perform a first numerical operation step and re-execute the step (i2), and the step (i4) is to determine whether the value of the first operation register 133d is greater than the second operation register 133e. One-half of the value, if it is greater than step (i5), if not greater, then jump to step (j), step (i5) is to perform a second numerical operation step, and step (j) is for the third The value of the frequency register 133c, the value of the first frequency register 133a, and the value of the integer register 133f perform a temperature value calculation, which is to subtract the value of the third frequency register 133c. Go to the value of the first frequency register 133a, multiply the subtracted data by the value of the integer register 133f, and finally add the multiplied data to the first temperature preset temperature to obtain a temperature signal, and finally, performing step (k) to store the temperature signal in a temperature register 133g The temperature sensors of the completion process.

Referring to FIG. 6 again, the first numerical operation step is to add the value of the integer register 133f to the integer register 133f, and subtract the value of the second operation register 133e. The value of the first operation register 133d, the data obtained by subtracting the two is stored in the second operation register 133e, and the second numerical operation step is to increase the value of the integer register 133f. The value is stored in the integer register 133f, wherein steps (i2) and (i3) are implemented by subtracting and looping to realize the value of the first operation register 133d divided by the value of the second operation register 133. In order to obtain the integer part of the quotient divided by the two values, and steps (i4) and (i5) determine the value of the first operation register 133d divided by the value of the second operation register 133. Whether the remainder of the remainder is carried.

The present invention detects the temperature by the correspondence between the ambient temperature and the frequency of the ring oscillator 122, and changes the frequency of the ring oscillator 122 by the correction voltage output by the triple voltage generator 121. The relationship between the ambient temperature causes the relationship to approach a linear relationship, so the number of samples of the frequency and temperature required to calculate the frequency-temperature relationship can be effectively reduced, and the temperature protection circuit 100 of the present invention is at ambient temperature. Temperature data with minimal error can be detected between -40 ° C and 125 ° C.

The scope of the present invention is defined by the scope of the appended claims, and any changes and modifications made by those skilled in the art without departing from the spirit and scope of the invention are within the scope of the present invention. .

100‧‧‧Over temperature protection circuit

110‧‧‧gap unit

120‧‧‧temperature sensor

121‧‧‧ Triple voltage generator

122‧‧‧ ring oscillator

123‧‧‧buffer unit

123a‧‧‧4th correction end

123b‧‧‧ input

123c‧‧‧ frequency output

124‧‧‧Redundant unit

125‧‧‧First delay circuit

125a‧‧‧First calibration end

125b‧‧‧ input

125c‧‧‧ output

126‧‧‧second delay circuit

126a‧‧‧second correction end

126b‧‧‧ input

126c‧‧‧output

127‧‧‧ Third delay circuit

127a‧‧‧ third correction end

127b‧‧‧ input

127c‧‧‧output

128‧‧‧First redundant circuit

128a‧‧‧Fixed Correction

128b‧‧‧ input

129‧‧‧second redundant circuit

129a‧‧‧ sixth correction end

129b‧‧‧ input

130‧‧‧ frequency converter

131‧‧‧First counter

131a‧‧‧clock signal input

131b‧‧‧module number receiving end

132‧‧‧Second counter

132a‧‧‧Retesting the end

132b‧‧‧frequency signal receiving end

133‧‧‧Digital unit

133a‧‧‧First frequency register

133b‧‧‧Second frequency register

133c‧‧‧ third frequency register

133d‧‧‧First Operation Register

133e‧‧‧Second operation register

133f‧‧‧Integer register

133g‧‧‧Temperature register

Clk‧‧‧ clock signal

Reset‧‧‧Reset signal

Retest‧‧‧Retest signal

Mode[1:0]‧‧‧Module signal

Temp_code‧‧‧temperature signal

Warning‧‧‧alert signal

Next_mode‧‧‧Operation Control Signal

Vcs‧‧‧corrected voltage

A ‧ ‧ provides a frequency converter having a first counter, a second counter and a digital operation unit, the digital operation unit having a first frequency register, a second frequency register, and a third a frequency register, a first operation register, a second operation register, an integer register, and a temperature register

b‧‧‧Determine whether the frequency converter receives one of the module signals as the first mode

C‧‧‧ input a first preset value to the first frequency register, and input a second preset value to the second frequency register

d‧‧‧Determine whether the module signal is the second mode

E‧‧‧ The second counter counts the positive edge of a first frequency signal and stores it in the first frequency register

f‧‧‧Determining whether the module signal is the third mode

G‧‧‧ The second counter counts the positive edge of a second frequency signal and stores it in the second frequency register

h‧‧‧Determine whether the module signal is the fourth mode

I‧‧‧ The second counter counts the positive edge of a third frequency signal and stores it in the third frequency register

I1‧‧‧ stores an operation value in a first operation register, and stores a fixed value in the second operation register

I2‧‧‧Review whether the value of the first operation register minus the value of the second operation register is greater than zero

I3‧‧‧ performs a first numerical operation step

I4‧‧‧Review whether the value of the first operation register is greater than one-half of the value of the second operation register

I5‧‧‧ performs a second numerical operation step

J‧‧‧ Perform temperature numerical calculation to obtain temperature signal

k‧‧‧Storing temperature signals in the temperature register

Figure 1 is a schematic illustration of an over temperature protection circuit in accordance with an embodiment of the present invention.

Figure 2 is a circuit diagram of a temperature sensor in accordance with an embodiment of the present invention.

Figure 3 is a circuit diagram of a frequency converter in accordance with an embodiment of the present invention.

Figure 4 is a schematic illustration of a digital arithmetic unit in accordance with an embodiment of the present invention.

Figure 5 is a flow chart of a method of calculating the temperature of the frequency converter in accordance with an embodiment of the present invention.

Figure 6 is a flow chart showing the temperature calculation method of the frequency converter according to an embodiment of the present invention.

100‧‧‧Over temperature protection circuit

110‧‧‧gap unit

120‧‧‧temperature sensor

130‧‧‧ frequency converter

Vbias‧‧‧Stability bias

Fout‧‧‧ frequency signal

Clk‧‧‧ clock signal

Reset‧‧‧Reset signal

Retest‧‧‧Retest signal

Mode[1:0]‧‧‧Module signal

Temp_code‧‧‧temperature signal

Warning‧‧‧alert signal

Next_mode‧‧‧Operation Control Signal

Claims (15)

An over temperature protection circuit comprising: a bandgap unit providing a stable bias voltage; a temperature sensor electrically connected to the bandgap unit, the temperature sensor having a triple voltage generator, a ring The oscillator and the buffer unit are electrically connected to the triple voltage generator and the buffer unit, the buffer unit is electrically connected to the triple voltage generator, and the triple voltage generator outputs a correction voltage. The ring oscillator and the buffer unit receive the correction voltage and the stable bias voltage provided by the gap unit, the buffer unit outputs a frequency signal, and a frequency converter electrically connected to the temperature sensor The frequency converter receives the frequency signal, the frequency converter has a first counter, a second counter, and a digital operation unit, and the second counter is electrically connected to the buffer unit of the temperature sensor, the digital operation unit The first counter and the second counter are electrically connected. The over temperature protection circuit of claim 1, wherein the ring oscillator has a first delay circuit, a second delay circuit electrically connected to the first delay circuit, and an electrical connection. a third delay circuit of the delay circuit, the first delay circuit has a first correction terminal, the second delay circuit has a second correction terminal, the third delay circuit has a third correction terminal, and the buffer unit has a first The fourth correction terminal, the second calibration terminal, the third calibration terminal, and the fourth calibration terminal are electrically connected to the triple voltage generator. The over temperature protection circuit of claim 2, wherein the two input ends of the buffer unit are electrically connected to the two output ends of the second delay circuit And two input ends of the third delay circuit. The over temperature protection circuit of claim 2, wherein the temperature sensor further has a redundant unit electrically connected to the ring oscillator and the triple voltage generator. The over temperature protection circuit of claim 4, wherein the redundant unit has a first redundant circuit and a second redundant circuit, and the two input ends of the first redundant circuit are electrically connected to the first The two input ends of the second redundant circuit are electrically connected to the two output ends of the first delay circuit and the two input ends of the second delay circuit. The over temperature protection circuit of claim 5, wherein the first redundancy circuit has a fifth correction terminal, the second redundancy circuit has a sixth correction terminal, the fifth correction terminal and the first The six correction terminals are electrically connected to the triple voltage generator. The over temperature protection circuit of claim 1, wherein the first counter of the frequency converter has a clock signal input end and a module signal receiving end, and the second counter is electrically connected to the first counter. The module signal receiving end. The over temperature protection circuit of claim 1, wherein the second counter of the frequency converter has a retest terminal, and the first counter is electrically connected to the retest terminal of the second counter. The over temperature protection circuit of the first aspect of the invention, wherein the digital operation unit of the frequency converter comprises a first frequency register, a second frequency register, a third frequency register, A first operation register, a second operation register, an integer register and a temperature register. A temperature calculation method for a frequency converter of an over temperature protection circuit, comprising: (a) providing a frequency converter having a first counter, a second counter, and a digital operation unit, the first counter having a clock signal input end and a module signal receiving end, the second counter having a Re-testing the terminal and a frequency signal receiving end, the first counter is electrically connected to the re-testing end of the second counter, the digital computing unit has a first frequency register, a second frequency register, and a first a three-frequency register and an integer register, wherein the initial values of the first frequency register, the second frequency register, the third frequency register, and the integer register are zero; (b) Determining the state of the module signal received by the receiving end of the module signal, if it is determined that the state is the first mode, then skipping to step (c), if it is determined that the state is not the first mode, then skipping to step (d) (c) inputting a first preset value to the first frequency register, and inputting a second preset value to the second frequency register, the first preset value corresponding to a first preset temperature The second preset value corresponds to a second preset temperature and jumps to step (h); (d) determines the Whether the state of the group signal is the second mode, and if it is the second mode, performing step (e), the clock signal input terminal inputs a clock signal, and the frequency signal receiving end inputs a first frequency signal, and the The first counter counts the number of positive edges of the clock signal, and the second counter counts the number of positive edges of the first frequency signal. When the number of positive edges of the clock signal reaches a predetermined value, the second counter counts The value is stored in the first frequency register, and the value corresponds to the first preset temperature. When the state is not the second mode, the process jumps to step (f); (f) determines whether the state of the module signal is For the third mode, if it is the third mode, skip to step (g), and if the state is not the third mode, skip to step (h); (g) the clock signal input terminal inputs a clock signal, the frequency signal receiving end inputs a second frequency signal, and causes the first counter to count the positive edge number of the clock signal, and the second counter counts the The number of positive edges of the second frequency signal, when the number of positive edges of the clock signal reaches a predetermined value, the value counted by the second counter is stored in the second frequency register, and the value corresponds to the second pre- Set the temperature; (h) determine whether the state of the module signal is the fourth mode, if it is the fourth mode, skip to step (i), and when the state is not the fourth mode, skip to the step (b) (i) the clock signal input terminal inputs a clock signal, the frequency signal receiving end inputs a third frequency signal, and causes the first counter to count the positive edge number of the clock signal, the second counter Counting the number of positive edges of the third frequency signal, when the number of positive edges of the clock signal reaches a predetermined value, storing the value of the second counter to the third frequency register, the value corresponding to an ambient temperature; And (j) the value of the third frequency register, the first The value of the frequency register and the integer register value of a temperature value computation performed to obtain a temperature signal. The method for calculating a temperature of a frequency converter of an over temperature protection circuit according to claim 10, wherein in the step of providing a frequency converter, the frequency converter further has a first operation register and a first The second operation register, between step (i) and step (j), further comprising: (i1) storing an operation value in the first operation register, and storing a fixed value in the second operation a temporary value, the operation value is a value of the first frequency register minus a value of the second frequency register, the fixed value is the first preset temperature minus the second preset temperature; (i2) determining whether the value of the first operation register minus the value of the second operation register is greater than zero, if it is greater than zero, jumping to step (i3), if not greater than zero, jumping to step (i4) (i3) performing a first numerical operation step and re-executing step (i2); (i4) determining whether the value of the first operational register is greater than one-half of the value of the second operational register, If it is not greater than the jump to step (i5), if it is not greater, then jump to step (j); and (i5) perform a second numerical operation. The temperature detecting method of the frequency converter of the over temperature protection circuit according to claim 11 , wherein the first numerical operation step is to add the value of the integer register to the integer and then store the integer temporary storage. The value of the second operation register is subtracted from the value of the first operation register, and the subtracted data is stored in the second operation register. The temperature detecting method of the frequency converter of the over temperature protection circuit according to claim 11, wherein the second numerical operation step is to add the value of the integer register to the integer register. in. The method for calculating the temperature of the frequency converter of the over temperature protection circuit according to claim 10, wherein after the step (j), the step of storing the temperature signal in a temperature register is further included. The temperature calculation method of the frequency converter of the over temperature protection circuit according to claim 11, wherein in the step (j), the temperature value calculation is performed by subtracting the value of the third frequency register from the third frequency register The value of a frequency register is multiplied by the subtracted data by the value of the integer register, and finally the multiplied data is added to the first temperature preset temperature.