TWI448060B - A system and method for adjusting a power converter - Google Patents

Description

System and method for adjusting a power converter

The present invention relates to an integrated circuit. More specifically, the present invention provides systems and methods for constant pressure mode and constant flow mode. Merely by way of example, the invention has been applied to flyback power converters with primary side sensing and regulation. However, it will be appreciated that the invention has a broader range of applications.

The flyback power converter is widely used in low power applications due to its simple structure and low cost. However, in a conventional flyback converter, output voltage adjustment is typically performed by secondary side feedback using an isolation arrangement of the photocoupler and TL431. In addition to increasing system cost, voltage drops due to cable losses are often difficult to compensate.

1 is a simplified conventional diagram for a switch mode flyback power conversion system with secondary side control. As shown in FIG. 1, the PWN controller 110 is used to control and drive the power MOSFET M1. Power MOSFET M1 is turned "on" and "off" to control the power delivered to the load on the secondary side. Therefore, a constant output voltage (CV) mode and a constant output current (CC) mode can be obtained by secondary side adjustment.

2 is a simplified conventional diagram showing the output voltage and output current characteristics of a flyback power conversion system. 2, if the output current I _o from zero to I _max, the range, the system operates at constant pressure (CV) mode. In the CV mode, the output voltage V _{o is,} for example, equal to V _max . Alternatively, if the output voltage is below _Vmax , the system operates in a constant current (CC) mode. In the CC mode, the output current I _o is equal to, for example, I _max . In another example, if the output terminal of the system is connected to a discharged battery, the system operates in CC mode.

In order to reduce the cost and size of the switch mode flyback power converter and also to increase its efficiency, power converters with primary side adjustment have become more and more popular. In the primary side adjustment, the output voltage is sensed by detecting the voltage of the auxiliary winding that is tightly coupled to the secondary winding. Since the voltage of the auxiliary winding reflects the output voltage associated with the secondary winding, the sensed voltage in the auxiliary winding can be used to adjust the secondary side output voltage. The expensive part of the TL431 and optocoupler is usually not needed, so the cost and size can be reduced. In addition, with the information of the sensed output voltage, the output current can be adjusted based on the internal calculation of the controller. Therefore, a sensing resistor for outputting a current is generally not required, and thus the overall conversion efficiency can be improved.

3 is a simplified conventional diagram of a switch mode flyback power conversion system with primary side sensing and regulation. 4 is another simplified conventional diagram of a switch mode flyback power conversion system with primary side sensing and regulation.

In FIG., The output voltage V _out is mapped to a DC voltage at node V _{INV INV} therefore be adjusted by adjusting the V _INV. In the primary side adjustment, the relationship between V _INV and V _out can be expressed as:

Where n is the ratio of the number of turns of the auxiliary winding to the number of turns of the secondary winding. In addition, V _D1 and V _D2 are forward diode voltage drops.

Setting Therefore, V _out is given by:

The output voltage is adjusted by adjusting the voltage of the auxiliary winding. For example, the sensed voltage V _{INV is} compared to a predetermined voltage level V _REF . The difference between V _INV and V _REF is associated with the error signal, and the difference between V _INV and V _REF is amplified by the error amplifier. The PWM/PFM signal is generated based at least in part on the amplified error signal.

The PWM/PFM signal controls the on/off of the power switch, thus controlling the power delivered to the secondary side. As a result, the difference between V _REF and the V _INV becomes smaller, and eventually, V _INV becomes equal to V _REF. Since V _INV is a reflection of the output voltage V _out , if certain conditions are met, the output voltage V _out can be linearly dependent on V _INV and therefore depends on V _REF .

Specifically, as shown below, and if the front ends of the diode D2 D1 to a constant voltage, the output voltage V _out linearly dependent on V _REF.

However, the forward voltage of the diode typically depends on the current flowing through the diode. Therefore, if the load current changes, the forward voltage of D2 changes. Since the current flowing through D1 does not change even when the output load current changes, the forward voltage of D1 is always constant.

5 is yet another simplified conventional diagram of a switch mode flyback power conversion system with primary side sensing and regulation. The power conversion system 2000 includes a primary winding 2010, a secondary winding 2012, an auxiliary winding 2014, a power switch 2020, a current sensing resistor 2030, an equivalent resistor 2040 of the output cable, resistors 2050 and 2052, and a rectifying diode 2060. And 2062. For example, power switch 2020 is an NPN bipolar transistor. In another example, power switch 2020 is a MOSFET transistor. In yet another example, the power switch 2020 is an IGBT transistor.

As shown in FIG. 5, in order to adjust the output voltage within a predetermined range, information related to the output voltage and the output load usually needs to be extracted. In discontinuous conduction mode (DCM), such information can be extracted by the auxiliary winding 2014. When the power switch 2020 is turned on, energy is stored in the secondary winding 2012. Then, when the power switch 2020 is turned off, the stored energy is released to the output terminal, and the voltage of the auxiliary winding 2014 maps the output voltage on the primary side as shown below.

Where V _FB represents the voltage at node 2054. R ₁ and R ₂ represent the resistance values of the resistors 2050 and 2052, respectively. In addition, n represents the turns ratio between the auxiliary winding 2014 and the secondary winding 2012. Specifically, n is equal to the number of turns of the auxiliary winding 2014 divided by the number of turns of the secondary winding 2012. V _o and I _o represent the output voltage and the output current, respectively. Further, respectively, V _D1 represents the forward voltage of the rectifying diode 2062, and V _D2 represents the forward voltage of the rectifying diode 2060. Further, _Req represents the resistance value of the equivalent resistor 2040, and k represents equal to Feedback coefficient.

FIG. 6 is a simplified diagram showing a conventional operational mechanism of the flyback power conversion system 2000. As shown in Figure 6, the controller wafer of the conversion system 2000 uses a sample and hold mechanism. When the demagnetization process on the secondary side is almost completed and the current I _{sec of the} secondary winding 2012 becomes almost zero, the voltage V _FB at the node 2054 (which is proportional to V _{aux of the} auxiliary winding 2012) is, for example, at point A of FIG. It was sampled. The sampled voltage value is typically held until the next voltage sample is taken. Through the negative feedback loop, the sampled voltage value can become equal to the reference voltage V _REF . therefore,

V _FB = V _REF (5)

By combining equations 4 and 5, the following equation can be obtained:

Based on Equation 6, the output voltage decreases as the output current increases. In addition, the control scheme described above generally has a poor adjustment of the output voltage due to the change in the forward voltage of the diode D2.

Furthermore, if the power conversion system 2000 is operating in a discontinuous conduction mode (DCM), the output current can also be adjusted to achieve a constant output current. As shown in Figure 6, the output current is equal to the average of the current I _sec of the secondary winding 2012 in each switching cycle, as follows:

Where N represents the turns ratio between the primary winding 2010 and the secondary winding 2012. Specifically, N is equal to the number of turns of the primary winding 2010 divided by the number of turns of the secondary winding 2012. In addition, T represents an integration period, and T _s represents a switching period equal to the reciprocal of the switching frequency of the power conversion system 2000. For example, T is equal to or greater than T _s . Further, R _s represents the resistance value of the current sensing resistor 2030. Moreover, V _{cs — pk} represents the peak value of the voltage V _cs sensed by the current sensing resistor 2030 in each switching cycle, and T _Demag represents the duration of the demagnetization process in each switching cycle. According to some conventional techniques, the output current can depend on the inductance of the primary winding; therefore, the output current typically undergoes large variations that are typically not effectively compensated for in high volume production.

Therefore, it is highly desirable to improve techniques for output voltage regulation and output current control, for example, it is highly desirable to perform primary winding inductance compensation.

The present invention relates to an integrated circuit. More specifically, the present invention provides systems and methods for constant pressure mode and constant flow mode. By way of example only, the invention has been applied to flyback power converters with primary side sensing and adjustment. However, it will be appreciated that the invention has a broader range of applications.

In accordance with an embodiment, a system for adjusting a power converter includes a first signal generator configured to receive at least a first sensed signal and at least generate a first output signal associated with demagnetization. Additionally, the system includes a sampling component configured to receive at least an input signal and a second output signal, to sample the input signal based on at least information associated with the second output signal, and to generate at least one or more sampled sizes associated with The third output signal. Moreover, the system includes an error amplifier configured to receive at least a third output signal and a first threshold voltage and to generate at least a fourth output signal through the capacitor, the capacitor being coupled to the error amplifier. Moreover, the system includes a compensation component configured to receive at least a fourth output signal and at least generate a compensation signal. The input signal is a combination of the compensation signal and the first sensed signal. A first sense signal is associated with a first winding coupled to a secondary winding of the power converter, and a secondary winding is associated with an output current and an output voltage of the power converter. Additionally, the system includes a first controller for adjusting at least the output current. For example, the first controller is configured to receive at least the first output signal and the third output signal and to generate at least the first control signal based on at least information associated with the first output signal and the third output signal. Additionally, the system includes a second controller for adjusting at least the output voltage. For example, the second controller is configured to receive at least a fourth output signal and to generate at least a second control signal and a third control signal based on at least information associated with the fourth output signal. Additionally, the system includes an oscillator configured to receive at least a first control signal and a second control signal and at least generate a clock signal, and a second signal generator configured to receive at least a clock signal, a third control signal, and a fourth control signal And at least an adjustment signal is generated. Additionally, the system includes a gate driver configured to receive at least an adjustment signal and output at least a drive signal to the switch. For example, the switch is configured to affect a first current flowing through a primary winding coupled to the secondary winding. Additionally, the system includes a third controller for adjusting at least the peak current. For example, the third controller is configured to receive the third control signal, the second sense signal, and the second threshold voltage, and output the fourth control signal to the second signal generator. In another example, the second sensed signal is associated with a first current flowing through a primary winding of the power converter.

In accordance with another embodiment, a system for adjusting a power converter includes a sampling component configured to receive at least an input signal, sample an input signal, and generate at least a first output signal associated with one or more sampled sizes. For example, the input signal is associated with at least a first winding coupled to a secondary winding of the power converter, and the secondary winding is associated with an output current and an output voltage of the power converter. Additionally, the system includes an error amplifier configured to receive at least a first output signal and a threshold voltage and to generate a second output signal through the capacitor and to generate a third output signal to which the capacitor is coupled. Additionally, the system includes a forward feed element configured to receive a third output signal and to generate a fourth output signal based on at least information associated with the third output signal; and a controller to adjust at least the output voltage. For example, the controller is configured to receive at least the second output signal and the fourth output signal and generate at least a first control signal. Additionally, the system includes a signal generator configured to receive at least a first control signal and to generate at least an adjustment signal based on at least information associated with the first control signal; and a gate driver configured to receive at least the adjustment signal and at least the drive signal Output to the switch. For example, the switch is configured to affect a first current flowing through a primary winding coupled to the secondary winding.

In accordance with yet another embodiment, a system for adjusting a power converter includes a sampling component configured to receive at least an input signal, sample an input signal, and generate at least a first output signal associated with one or more sampled sizes; An error amplifier configured to receive at least a first output signal and a threshold voltage and to generate a second output signal through the capacitor and to generate a third output signal, the capacitor being coupled to the error amplifier. Additionally, the system includes a forward feed element configured to receive a third output signal and to generate a fourth output signal based on at least information associated with the third output signal; and a controller configured to receive at least the second output signal and Four output signals, and at least a control signal is generated. Moreover, the system includes a compensation component configured to receive at least a second output signal and to generate at least a compensation signal based on at least information associated with the second output signal, the input signal being a combination of the compensation signal and another signal.

In accordance with yet another embodiment, a system for adjusting a power converter includes a first signal generator configured to receive at least an input signal and generate at least a first output signal associated with demagnetization and a second output signal associated with sampling . For example, the input signal is associated with at least a first winding coupled to a secondary winding of the power converter, and the secondary winding is associated with an output current and an output voltage of the power converter. Additionally, the system includes a sampling component configured to receive at least an input signal and a second output signal, to sample the input signal based on at least information associated with the second output signal, and to generate at least one or more sampled sizes associated with The third output signal. Additionally, the system includes a first controller for adjusting at least an output current, the first controller configured to receive at least the first output signal and the third output signal, and based at least on the first output signal and the third output signal The associated information is used to generate at least a first control signal. Additionally, the system includes an oscillator configured to receive at least a first control signal and to generate at least a clock signal based on at least information associated with the first control signal; and a second signal generator configured to receive at least the clock signal and the second Controlling the signal and generating at least the adjustment signal based on at least information associated with the clock signal and the second control signal. Additionally, the system includes a gate driver configured to receive at least an adjustment signal and output at least a drive signal to the switch. For example, the switch is configured to affect a first current flowing through a primary winding coupled to the secondary winding. Additionally, the system includes a third controller for adjusting at least the peak current, configured to receive at least the sensed signal and the threshold voltage, and output the second control signal to the second signal generator. For example, the sense signal is associated with a first current flowing through a primary winding of the power converter. The adjustment signal corresponds to a switching frequency and the first output signal corresponds to a demagnetization pulse width.

In accordance with yet another embodiment, a system for adjusting a power converter includes a controller for adjusting at least a peak current. For example, the controller is configured to receive at least the sensed signal and the first threshold signal and to generate at least a first control signal, and the sense signal is associated with a first current flowing through a primary winding of the power converter. Additionally, the system includes a signal generator configured to receive at least a first control signal and at least generate an adjustment signal; and a gate driver configured to receive at least the adjustment signal and output at least the drive signal to the switch. For example, the switch is configured to affect the first current. In another example, the controller includes a first comparator configured to receive the sensed signal and the first threshold voltage, and generate a comparison signal based on at least information associated with the sensed signal and the first threshold voltage; and a charge pump Configuring to receive the comparison signal and generate a second control signal based at least on information associated with the comparison signal. Additionally, the controller includes a threshold generator configured to receive the second control signal and generate a second threshold voltage based on at least information associated with the second control signal; and a second comparator configured to receive the second threshold voltage and sense The signal is measured and the first control signal is generated based at least on information associated with the second threshold voltage and the sensed signal.

In accordance with yet another embodiment, a method for adjusting a power converter includes receiving, by a first signal generator, at least an input signal and generating at least a first output signal associated with demagnetization and based on at least information associated with the input signal The associated second output signal is sampled. Additionally, the method includes receiving, by the sampling component, at least the input signal and the second output signal, sampling the input signal based on at least information associated with the second output signal, and generating at least one of associated with one or more sampled sizes a three output signal; at least a third output signal and a first threshold voltage are received by the error amplifier and a fourth output signal is generated by the capacitor, the capacitor being coupled to the error amplifier. Moreover, the method includes receiving at least a fourth output signal by the compensation component and generating at least a compensation signal based on at least information associated with the fourth output signal. For example, the input signal is a combination of a compensation signal and a first sensed signal. In another example, the first sense signal is associated with a first winding coupled to a secondary winding of the power converter, and the secondary winding is associated with an output current and an output voltage of the power converter. Additionally, the method includes receiving at least a first output signal and a third output signal by a first controller for adjusting at least an output current, and generating at least based on at least information associated with the first output signal and the third output signal a first control signal; at least receiving a fourth output signal by a second controller for adjusting at least the output voltage and generating at least a second control signal and a third control signal based on at least information associated with the fourth output signal. Moreover, the method includes receiving, by the oscillator, at least a first control signal and a second control signal and generating at least a clock signal by the oscillator; receiving, by the second signal generator, at least a clock signal, a third control signal, and a fourth control And generating at least an adjustment signal by the second signal generator. Additionally, the method includes receiving, by the gate driver, at least an adjustment signal and outputting at least the drive signal to the switch to affect a first current flowing through the primary winding coupled to the secondary winding; through a third controller for adjusting at least the peak current Receiving a third control signal, a second sensing signal, and a second threshold voltage, and outputting the fourth control signal to the second signal generator. For example, the second sense signal is associated with a first current flowing through a primary winding of the power converter.

In accordance with yet another embodiment, a method for adjusting a power converter includes receiving at least an input signal by a sampling element. For example, the input signal is associated with at least a first winding coupled to a secondary winding of the power converter, and the secondary winding is associated with an output current and an output voltage of the power converter. Additionally, the method includes sampling the input signal by the sampling element to generate at least a first output signal associated with one or more sampled sizes; receiving at least the first output signal and the threshold voltage by the error amplifier and generating a second through the capacitor An output signal is coupled to the error amplifier. Additionally, the method includes generating a third output signal by an error amplifier; receiving a third output signal by the forward feed element, and generating a fourth output signal based on at least information associated with the third output signal; by at least adjusting the output The controller of the voltage to receive at least the second output signal and the fourth output signal and to generate at least the first control signal based on at least information associated with the second output signal and the fourth output signal. Moreover, the method includes receiving, by the signal generator, at least the first control signal and generating at least the adjustment signal based on at least information associated with the first control signal; receiving at least the adjustment signal by the gate driver and outputting at least the drive signal to the switch To affect the first current flowing through the primary winding coupled to the secondary winding.

In accordance with yet another embodiment, a method for adjusting a power converter includes receiving, by a sampling component, at least an input signal, sampling an input signal by the sampling component, and generating at least a first output associated with one or more sampled sizes signal. Additionally, the method includes receiving, by the error amplifier, at least the first output signal and the threshold voltage and generating a second output signal by the capacitor based on at least information associated with the first output signal and the threshold voltage, and based at least on the first output signal The information associated with the threshold voltage produces a third output signal that is coupled to the error amplifier. Additionally, the method includes receiving a third output signal by the forward feed element and generating a fourth output signal based on at least information associated with the third output signal; receiving at least the second output signal and the fourth output signal by the controller And generating at least a control signal based on at least information associated with the second output signal and the fourth output signal. Moreover, the method includes receiving at least a second output signal by the compensation component and generating at least a compensation signal based on at least information associated with the second output signal, the input signal being a combination of the compensation signal and another signal.

In accordance with yet another embodiment, a method for adjusting a power converter includes receiving at least an input signal by a first signal generator. For example, the input signal is associated with at least a first winding coupled to a secondary winding of the power converter, and the secondary winding is associated with an output current and an output voltage of the power converter. Additionally, the method includes generating at least a first output signal associated with demagnetization and a second output signal associated with the sample based on at least information associated with the input signal; receiving at least the input signal and the second output signal by the sampling element Generating an input signal based on at least information associated with the second output signal and generating at least a third output signal associated with one or more sampled sizes. Moreover, the method includes receiving at least a first output signal and a third output signal by a first controller for adjusting at least an output current, and generating at least based on at least information associated with the first output signal and the third output signal a first control signal; receiving, by the oscillator, at least the first control signal and generating at least a clock signal based on at least information associated with the first control signal. Moreover, the method includes receiving, by the second signal generator, at least a clock signal and a second control signal, and generating at least an adjustment signal based on at least information associated with the clock signal and the second control signal; receiving at least an adjustment by the gate driver The signal and at least the drive signal is output to the switch to affect a first current flowing through the primary winding coupled to the secondary winding. Moreover, the method includes receiving at least the sensed signal and the threshold voltage by a third controller for adjusting at least the peak current, and outputting the second control signal to the second signal generator. The sense signal is associated with a first current flowing through a primary winding of the power converter, the adjustment signal corresponds to a switching frequency, and the first output signal corresponds to a demagnetization pulse width.

In accordance with yet another embodiment, a method for adjusting a power converter includes receiving at least a sensed signal and a first threshold signal by a controller for adjusting at least a peak current. For example, the sense signal is associated with a first current flowing through a primary winding of the power converter. Additionally, the method includes generating at least a first control signal based on at least information associated with the sensed signal and the first threshold voltage; receiving, by the signal generator, at least the first control signal and based at least on the first control signal The information is to generate at least an adjustment signal; at least the adjustment signal is received by the gate driver and at least the drive signal is output to the switch to affect the first current. The processing for generating at least the first control signal includes receiving, by the first comparator, the sensed signal and the first threshold voltage, and generating a comparison signal based on at least information associated with the sensed signal and the first threshold voltage; Receiving a comparison signal and generating a second control signal based on at least information associated with the comparison signal; receiving a second control signal by the threshold generator and generating a second threshold voltage based on at least information associated with the second control signal; A second comparator receives the second threshold voltage and the sensed signal and generates a first control signal based on at least information associated with the second threshold voltage and the sensed signal.

Many benefits are obtained by the present invention compared to conventional techniques. Certain embodiments of the present invention may reduce partial counting and/or reduce system cost. Some embodiments of the invention may improve reliability and/or efficiency. Certain embodiments of the present invention may simplify circuit design in a switch mode flyback power converter. Some embodiments of the present invention provide a primary side sensing and adjustment scheme. For example, primary side sensing and adjustment schemes can improve load adjustment. In another example, the primary side sensing and adjustment scheme can compensate for the primary winding inductance variation to achieve a constant output current in a flyback converter employing primary side regulation. Certain embodiments of the present invention may provide a constant output current that does not change with changes in primary winding inductance in CC mode.

In accordance with yet another embodiment, a system for adjusting a power converter includes a first signal generator configured to receive a first sensed signal and generate an output signal associated with demagnetization. The first sense signal is associated with a first winding coupled to a secondary winding of a power converter, and the secondary winding is associated with at least an output current of the power converter. Additionally, the system includes a ramp signal generator configured to receive the output signal and generate a ramp signal; and a first comparator configured to receive the ramp signal and the first threshold signal and based at least on the ramp signal and The information associated with the first threshold signal produces a first comparison signal. Additionally, the system includes a second comparator configured to receive the second sensed signal and the second threshold signal and to generate a second comparison signal, the second sensed signal being coupled to a secondary coupled to the power converter The first current of the primary winding of the winding is associated. Additionally, the system includes a second signal generator configured to receive at least the first comparison signal and the second comparison signal and generate an adjustment signal; and a gate driver configured to receive the adjustment signal and output a drive signal to the switch . The switch is configured to affect the first current flowing through the primary winding. The output signal is associated with a demagnetization duration and the drive signal is associated with a switching period. The system is also configured to maintain a constant ratio of the demagnetization duration to the switching period.

In accordance with yet another embodiment, a method for adjusting a power converter includes receiving a first sensed signal. The first sense signal is associated with a first winding coupled to a secondary winding of the power converter, and the secondary winding is associated with at least an output current of the power converter. Additionally, the method includes generating an output signal based on at least information associated with the first sensed signal. The output signal is associated with demagnetization. Additionally, the method includes receiving the output signal; generating a ramp signal based on at least information associated with the output signal; receiving the ramp signal and a first threshold signal; processing and the ramp signal and the first threshold signal Associated information; generating a first comparison signal based at least on information associated with the ramp signal and the first threshold signal. Additionally, the method includes receiving a second sensed signal and a second thresholded signal. The second sense signal is associated with a first current flowing through a primary winding coupled to a secondary winding of the power converter. Additionally, the method includes processing information associated with the second sensed signal and the second threshold signal; generating a second based on at least information associated with the second sensed signal and the second threshold signal Comparing a signal; receiving the first comparison signal and the second comparison signal; processing information associated with the first comparison signal and the second comparison signal; based at least on the first comparison signal and the The information associated with the second comparison signal produces an adjustment signal. Additionally, the method includes receiving the adjustment signal; outputting a drive signal to the switch based on at least information associated with the adjustment signal to affect the first current flowing through the primary winding. The output signal is associated with a demagnetization duration and the drive signal is associated with a switching period. The ratio of the demagnetization duration to the switching period is kept constant.

In accordance with yet another embodiment, a system for adjusting a power converter includes a first signal generator configured to receive at least an input signal and at least generate an output signal associated with demagnetization, the input signal being at least coupled to an output of a power converter Current is associated. Additionally, the system includes a first controller configured to receive at least the output signal and to generate at least a first control signal based on at least information associated with the output signal; a second controller configured to receive the first sense The signal and the first threshold signal are measured and a second control signal is generated. The first sensed signal is associated with a first current flowing through a primary winding of the power converter. Additionally, the system includes an oscillator configured to receive at least the first control signal and to generate at least a clock signal based on at least information associated with the first control signal; a second signal generator configured to receive at least The clock signal and the second control signal are described, and at least an adjustment signal is generated. Additionally, the system includes a gate driver configured to receive at least the adjustment signal and output at least a drive signal to the switch. The switch is configured to affect the first current flowing through the primary winding. The output signal is associated with a demagnetization duration and the drive signal is associated with a switching period. The system is also configured to maintain a constant ratio of the demagnetization duration to the switching period and to maintain a peak of the first sensed signal constant in magnitude.

In accordance with yet another embodiment, a method for adjusting a power converter includes receiving at least an input signal and generating at least an output signal based on at least information associated with the input signal. The input signal is at least related to an output current of the power converter, and the output signal is related to demagnetization. Additionally, the method includes receiving at least the output signal; processing information associated with the output signal; generating at least a clock signal based on at least information associated with the output signal. Additionally, the method includes receiving a sense signal and a threshold signal. The sense signal is associated with a first current flowing through a primary winding of the power converter. Moreover, the method includes processing information associated with the sensed signal and the threshold signal; generating a control signal based at least on information associated with the sensed signal and the threshold signal; receiving at least the clock signal and The control signal; processing information associated with the clock signal and the control signal; generating at least an adjustment signal based on at least information associated with the clock signal and the control signal. Additionally, the method includes receiving at least the adjustment signal; at least outputting a drive signal to the switch based on at least information associated with the adjustment information to affect the first current flowing through the primary winding. The output signal is associated with a demagnetization duration and the drive signal is associated with a switching period. The ratio of the demagnetization duration to the switching period is kept constant, and the peak of the first sensing signal is kept constant in magnitude.

In accordance with yet another embodiment, a system for adjusting a power converter includes a first signal generator configured to receive a first sensed signal and generate a first output signal associated with demagnetization. The first sense signal is associated with a first winding coupled to a secondary winding of a power converter, and the secondary winding is associated with at least an output current of the power converter. Additionally, the system includes a first ramp signal generator configured to receive the first output signal and generate a first ramp signal; a first comparator configured to receive the first ramp signal and a first threshold signal, and at least A first comparison signal is generated based on information associated with the first ramp signal and the first threshold signal. Additionally, the system includes a peak detector configured to receive the drive signal and the second sense signal and generate a peak signal. The second sense signal is associated with a first current flowing through a primary winding coupled to a secondary winding of the power converter. Additionally, the system includes an amplifier configured to receive the peak signal and a second threshold signal and to generate a second output signal through a capacitor, the capacitor being coupled to the amplifier; a second comparator configured to receive the second The signal and the second ramp signal are output and a second comparison signal is generated. Additionally, the system includes a second signal generator configured to receive at least the first comparison signal and the second comparison signal and generate an adjustment signal; and a gate driver configured to receive the adjustment signal and to the peak The detector and the switch output the drive signal. The switch is configured to affect the first current flowing through the primary winding.

In accordance with yet another embodiment, a method for adjusting a power converter includes receiving a first sensed signal. The first sense signal is associated with a first winding coupled to a secondary winding of the power converter, and the secondary winding is associated with at least an output current of the power converter. Additionally, the method includes generating a first output signal based on at least information associated with the first sensed signal; receiving the first output signal; generating a first ramp based on at least information associated with the first output signal signal. The first output signal is related to demagnetization. Additionally, the method includes receiving the first ramp signal and a first threshold signal; processing information associated with the first ramp signal and the first threshold signal; based at least on the first ramp signal and the The information associated with the first threshold signal produces a first comparison signal; the drive signal and the second sense signal are received. The second sense signal is associated with a first current flowing through a primary winding coupled to a secondary winding of the power converter. Additionally, the method includes processing information associated with the drive signal and the second sensed signal; generating a peak signal based on at least information associated with the drive signal and the second sensed signal; receiving the a peak signal and a second threshold signal; processing information associated with the peak signal and the second threshold signal; generating a second output signal based on at least information associated with the peak signal and the second threshold signal. Additionally, the method includes receiving the second output signal and the second ramp signal; processing information associated with the second output signal and the second ramp signal; based at least on the second output signal and the The information associated with the second ramp signal produces a second comparison signal. Additionally, the method includes receiving the first comparison signal and the second comparison signal; processing information associated with the first comparison signal and the second comparison signal; based at least on the first comparison signal and The information associated with the second comparison signal produces an adjustment signal. Additionally, the method includes receiving the adjustment signal; and outputting the drive signal based on at least information associated with the adjustment signal to affect the first current flowing through the primary winding.

In accordance with yet another embodiment, a system for adjusting a power converter includes a first signal generator configured to receive a first sensed signal and generate an output signal associated with demagnetization. The first sense signal is associated with a first winding coupled to a secondary winding of the power converter, and the secondary winding is associated with at least an output current of the power converter. Additionally, the system includes a peak detector configured to receive the drive signal and the second sense signal and generate a peak signal. The second sense signal is associated with a first current flowing through a primary winding coupled to a secondary winding of the power converter. Additionally, the system includes a second signal generator configured to process at least information associated with the output signal and the peak signal and to generate an adjustment signal. Additionally, the system includes a gate driver configured to receive the adjustment signal and output the drive signal to the peak detector and switch. The switch is configured to affect the first current flowing through the primary winding. The output signal is associated with a demagnetization duration and the drive signal is associated with a switching period. The system is also configured to maintain a constant ratio of the demagnetization duration to the switching period; and to maintain an average magnitude of the peak signal constant during the first duration.

In accordance with yet another embodiment, a method for adjusting a power converter includes receiving a first sensed signal. The first sense signal is associated with a first winding coupled to a secondary winding of the power converter, and the secondary winding is associated with at least an output current of the power converter. Additionally, the method includes generating an output signal based on at least information associated with the first sensed signal; receiving the drive signal and the second sensed signal; and processing information associated with the drive signal and the second sensed signal. A first sensed signal is associated with demagnetization and the second sensed signal is associated with a first current flowing through a primary winding coupled to a secondary winding of the power converter. Moreover, the method includes generating a peak signal based on at least information associated with the drive signal and the second sensed signal; processing at least information associated with the output signal and the peak signal; based at least on The output signal and the information associated with the peak signal produce an adjustment signal. Additionally, the method includes receiving the adjustment signal; outputting the drive signal to a switch based on at least information associated with the adjustment signal to affect at least the first current flowing through the primary winding. The output signal is associated with a demagnetization duration and the drive signal is associated with a switching period. Keeping the ratio of the demagnetization duration to the switching period constant; and keeping the average magnitude of the peak signal constant during the first duration.

In accordance with yet another embodiment, a system for adjusting a power converter includes a first signal generator configured to receive a first sensed signal and generate a first output signal associated with demagnetization. The first sense signal is associated with a first winding coupled to a secondary winding of a power converter, and the secondary winding is associated with at least an output current of the power converter. Additionally, the system includes a peak detector configured to receive the drive signal and the second sense signal and generate a peak signal. The second sense signal is associated with a first current flowing through a primary winding coupled to a secondary winding of the power converter. Additionally, the system includes a second signal generator configured to receive the drive signal, the first output signal, and the peak signal, and to generate a second output signal; an amplifier configured to receive the second output signal and The threshold signal and a third output signal is generated by a capacitor that is coupled to the amplifier. Additionally, the system includes a comparator configured to receive the third output signal and the ramp signal and to generate a comparison signal; a third signal generator configured to receive at least the comparison signal and the clock signal and generate an adjustment signal. Additionally, the system includes a gate driver configured to receive the adjustment signal and output the drive signal to the peak detector, the second signal generator, and a switch. The switch is configured to affect the first current flowing through the primary winding.

In accordance with yet another embodiment, a method for adjusting a power converter includes receiving a first sensed signal. The first sense signal is associated with a first winding coupled to a secondary winding of a power converter, and the secondary winding is associated with at least an output current of the power converter. Additionally, the method includes generating a first output signal associated with demagnetization; receiving the drive signal and the second sense signal. The second sense signal is associated with a first current flowing through a primary winding coupled to a secondary winding of the power converter. Moreover, the method includes processing information associated with the drive signal and the second sensed signal; generating a peak signal based on at least information associated with the drive signal and the second sensed signal. Additionally, the method includes receiving the drive signal, the first output signal, and the peak signal; processing information associated with the drive signal, the first output signal, and the peak signal; at least based on The information associated with the drive signal, the first output signal, and the peak signal produces a second output signal. Additionally, the method includes receiving the second output signal and a threshold signal; processing information associated with the second output signal and the threshold signal; at least based on being associated with the second output signal and the threshold signal The information produces a third output signal. Additionally, the method includes receiving the third output signal and a ramp signal; processing information associated with the third output signal and the ramp signal; at least based on being associated with the third output signal and the ramp signal The information produces a comparison signal. Moreover, the method includes receiving the comparison signal and a clock signal; processing information associated with the comparison signal and the clock signal; generating an adjustment signal based at least on information associated with the comparison signal and the clock signal. Additionally, the method includes receiving the adjustment signal; and outputting the drive signal based on at least information associated with the adjustment signal to affect the first current flowing through the primary winding.

In accordance with yet another embodiment, a system for adjusting a power converter includes a first signal generator configured to receive a first sensed signal and generate a first output signal associated with demagnetization. The first sense signal is associated with a first winding coupled to a secondary winding of the power converter, and the secondary winding is associated with at least an output current of the power converter. Additionally, the system includes a peak detector configured to receive the drive signal and the second sense signal and generate a peak signal. The second sense signal is associated with a first current flowing through a primary winding coupled to a secondary winding of the power converter, and the second signal generator is configured to receive the drive signal, the first The signal and the peak signal are output and a second output signal is generated. Additionally, the system includes an amplifier configured to receive the second output signal and a threshold signal and to generate a third output signal through a capacitor; a third signal generator configured to receive the third output signal and the first input signal and generate The fourth output signal. The capacitor is coupled to the amplifier, the first input signal being proportional to a second input signal received by the primary winding. Additionally, the system includes a comparator configured to receive the fourth output signal and the second sense signal and generate a comparison signal; a fourth signal generator configured to receive at least the comparison signal and the clock signal and generate an adjustment signal. Additionally, the system includes a gate driver configured to receive the adjustment signal and output the drive signal to the peak detector, the second signal generator, and a switch. The switch is configured to affect the first current flowing through the primary winding.

In accordance with yet another embodiment, a method for adjusting a power converter includes receiving a first sensed signal. The first sense signal is associated with a first winding coupled to a secondary winding of the power converter, and the secondary winding is associated with at least an output current of the power converter. Additionally, the method includes generating a first output signal associated with demagnetization; receiving the drive signal and the second sense signal. The second sense signal is associated with a first current flowing through a primary winding coupled to a secondary winding of the power converter. Moreover, the method includes processing information associated with the drive signal and the second sensed signal; generating a peak signal based on at least information associated with the drive signal and the second sensed signal. Additionally, the method includes receiving the drive signal, the first output signal, and the peak signal; processing information associated with the drive signal, the first output signal, and the peak signal; at least based on The information associated with the drive signal, the first output signal, and the peak signal produces a second output signal. Additionally, the method includes receiving the second output signal and a threshold signal; processing information associated with the second output signal and the threshold signal; at least based on being associated with the second output signal and the threshold signal The information generates a third output signal; the third output signal and the first input signal are received. The first input signal is proportional to a second input signal received by the primary winding. Additionally, the method includes processing information associated with the third output signal and the first input signal; generating a fourth output signal based on at least information associated with the third output signal and the first input signal Receiving the fourth output signal and the second sensing signal; processing information associated with the fourth output signal and the second sensing signal; based at least on the fourth output signal and the second The information associated with the sensed signal produces a comparison signal. Moreover, the method includes receiving at least the comparison signal and a clock signal; processing information associated with the comparison signal and the clock signal; generating an adjustment signal based at least on information associated with the comparison signal and the clock signal . Additionally, the method includes receiving the adjustment signal; and outputting the drive signal based on at least information associated with the adjustment signal to affect the first current flowing through the primary winding.

In accordance with yet another embodiment, a system for adjusting a power converter includes a first signal generator configured to receive a first sensed signal and generate a first output signal associated with demagnetization. The first sense signal is associated with a first winding coupled to a secondary winding of the power converter, and the secondary winding is associated with at least an output current of the power converter. Additionally, the system includes a peak detector configured to receive the drive signal and the second sense signal and generate a peak signal. The second sense signal is associated with a first current flowing through a primary winding coupled to a secondary winding of the power converter. Additionally, the system includes a second signal generator configured to receive at least the drive signal, the first output signal, and the peak signal, and to generate a second output signal; an amplifier configured to receive the second output signal And a threshold signal and a third output signal is generated by the capacitor, the capacitor being coupled to the amplifier. Additionally, the system includes a third signal generator configured to receive the first sensed signal, the third output signal, and the drive signal and to generate a fourth output signal; a comparator configured to receive the fourth The signal and the second sensed signal are output and a comparison signal is generated. Additionally, the system includes a fourth signal generator configured to receive at least the comparison signal and the clock signal and generate an adjustment signal; a gate driver configured to receive the adjustment signal and to the peak detector, the second signal A generator, the third signal generator, and a switch output the drive signal, the switch configured to affect the first current flowing through the primary winding.

In accordance with yet another embodiment, a method for adjusting a power converter includes receiving a first sensed signal. The first sense signal is associated with a first winding coupled to a secondary winding of the power converter, and the secondary winding is associated with at least an output current of the power converter. Additionally, the method includes generating a first output signal associated with demagnetization; receiving the drive signal and the second sense signal. The second sense signal is associated with a first current flowing through a primary winding coupled to a secondary winding of the power converter. Moreover, the method includes processing information associated with the drive signal and the second sensed signal; generating a peak signal based on at least information associated with the drive signal and the second sensed signal. Additionally, the method includes receiving the drive signal, the first output signal, and the peak signal; processing information associated with the drive signal, the first output signal, and the peak signal; at least based on The information associated with the drive signal, the first output signal, and the peak signal produces a second output signal. Additionally, the method includes receiving the second output signal and a threshold signal; processing information associated with the second output signal and the threshold signal; at least based on being associated with the second output signal and the threshold signal The information produces a third output signal. Additionally, the method includes receiving the first sensed signal, the third output signal, and the drive signal; processing associated with the first sensed signal, the third output signal, and the drive signal Information; generating a fourth output signal based on at least information associated with the first sensed signal, the third output signal, and the drive signal. Additionally, the method includes receiving the fourth output signal and the second sensed signal; processing information associated with the fourth output signal and the second sensed signal; based at least on the fourth output The information associated with the signal and the second sensed signal produces a comparison signal. Moreover, the method includes receiving at least the comparison signal and a clock signal; processing information associated with the comparison signal and the clock signal; generating an adjustment signal based at least on information associated with the comparison signal and the clock signal . Moreover, the method includes receiving the adjustment signal; and outputting the drive signal based on at least information associated with the adjustment signal to affect the first current flowing through the primary winding.

In accordance with yet another embodiment, a system for adjusting a power converter includes a first signal generator configured to receive a first sensed signal and generate an output signal associated with demagnetization. The first sense signal is associated with a first winding coupled to a secondary winding of the power converter, and the secondary winding is associated with at least an output current of the power converter. Additionally, the system includes a peak detector configured to receive the drive signal and the second sense signal and generate a peak signal. The second sense signal is associated with a first current flowing through a primary winding coupled to a secondary winding of the power converter. Additionally, the system includes a second signal generator configured to process at least information associated with the output signal and the peak signal and to generate an adjustment signal; and a gate driver configured to receive the adjustment signal and at least The peak detector and switch output the drive signal. The switch is configured to affect the first current flowing through the primary winding. The drive signal is associated with a switching period and the output signal is associated with a demagnetization duration. The demagnetization duration is equal to the demagnetization peak after being multiplied by the peak signal in magnitude. The system is also configured to maintain the switching period constant such that the average magnitude of the demagnetization peak remains constant during the first duration and the output current is held constant.

In accordance with yet another embodiment, a method for adjusting a power converter includes receiving a first sensed signal. The first sense signal is associated with a first winding coupled to a secondary winding of the power converter, and the secondary winding is associated with at least an output current of the power converter. Additionally, the method includes generating an output signal associated with demagnetization; receiving the drive signal and the second sense signal. The second sense signal is associated with a first current flowing through a primary winding coupled to a secondary winding of the power converter. Additionally, the method includes processing information associated with the drive signal and the second sensed signal; generating a peak signal based on at least information associated with the drive signal and the second sensed signal; Deriving information associated with the output signal and the peak signal; generating an adjustment signal based at least on information associated with the output signal and the peak signal. Moreover, the method includes receiving the adjustment signal; and outputting the drive signal based on at least information associated with the adjustment signal to affect the first current flowing through the primary winding. The drive signal is associated with a switching period and the output signal is associated with a demagnetization duration. The demagnetization duration is equal to the demagnetization peak after being multiplied by the peak signal in magnitude. The switching period is kept constant such that the average magnitude of the demagnetization peak remains constant during the first duration and the output current is held constant.

One or more of these benefits may be obtained depending on the embodiment. These and various additional objects, features and advantages of the present invention will be <RTIgt;

The present invention relates to an integrated circuit. More specifically, the present invention provides systems and methods for constant pressure mode and constant flow mode. By way of example only, the invention has been applied to flyback power converters with primary side sensing and adjustment. However, it should be understood that the invention has a broader range of applications.

7 is a simplified diagram of a switched mode power conversion system with primary side sensing and adjustment, in accordance with an embodiment of the present invention. This illustration is only an example and should not unduly limit the scope of the claimed patent. Those skilled in the art will recognize many variations, substitutions and modifications.

The switched mode power conversion system 500 includes a primary winding 502, a secondary winding 504, and an auxiliary winding 506. Additionally, conversion system 500 includes resistors 510, 512, and 580. Additionally, the conversion system 500 includes a capacitor 526, a switch 550, and a diode 554. Additionally, transform system 500 includes the following components:

• Element 520 for generating Demag signals and Sampling_clk signals; • Element 522 for sampling and holding one or more signals; • Error amplifier 524; • Element 532 for load compensation; • For constant voltage (CV) Controlled element 534; • element 538 for generating a PWM/PFM adjustment signal; • element 540 for current sensing (CS) peak adjustment; • element 542 for constant current (CC) control; • for generating An element 546 of the gate drive signal; an oscillator 562; and an element 568 for forward feed.

In one embodiment, components 520, 522, 532, 534, 538, 540, 542, 546, and 568, error amplifier 524, and oscillator 562 are located on wafer 590. For example, wafer 590 includes at least terminals 516, 530, 552, and 566. Although the above has been illustrated with a selected set of elements for system 500, many alternatives, modifications, and variations are possible. For example, some of the elements can be expanded and/or combined. Other components can be inserted into those components mentioned above. Depending on the embodiment, the arrangement of the components can be interchanged with other components that are replaced. For example, system 500 is a switch mode flyback power conversion system. Further details of these elements can be found in the present specification, and more particularly below.

As shown in FIG 7, according to an embodiment of the present invention, the output voltage V _out is sensed by the primary-side converting system 500. For example, sensing output voltage V _out is at least partially dependent on the turns ratio between the auxiliary winding and the secondary winding 504 506. For example, secondary winding 504 is tightly coupled to auxiliary winding 506. In another example, secondary winding 504 sends signal 556 to diode 554 and is coupled to the output of conversion system 500 via diode 554.

In one embodiment, the output signal 508 of the auxiliary winding 506 is represented by V _AUX . In another embodiment, the output signal 508 is processed through a voltage divider that includes a resistor 510 (ie, R ₁ ) and a resistor 512 (ie, R ₂ ). Output signal 514 (i.e., V _INV ) is fed from the voltage divider to terminal 516 (i.e., terminal INV). For example, output signal 514 is load compensated by load compensated component 532. In another example, the compensated signal 514 is fed into both elements 520 and 522.

According to an embodiment, component load compensation 532 includes one or more devices as shown in Figures 14(a), 14(b), 15(a), and/or 15(b). According to another embodiment, element 520 includes certain devices as shown in Figures 10 and 11. For example, component 520 outputs a Sampling_clk signal to element 522. Holding_clk signal 522 is generated using Sampling_clk, element.

In one embodiment, element 522 samples compensated signal 514 based on the Sampling_clk signal and holds the sampled signal based on the Holding_clk signal. For example, element 522 samples compensated signal 514 near the end of demagnetization and holds the sampled signal until the next sample. In another example, the sample and hold process is illustrated in FIG.

Furthermore, as shown in FIG. 7, the sampled and held signal _{Vsamp is} sent from component 522 to error amplifier 524. According to some embodiments, error amplifier 524 includes some of the devices shown in Figures 14(a), 14(b), 15(a), and/or 15(b). Error amplifier 524 also receives reference signal V _ref . For example, the reference signal V _ref is compensated based on the output load of the transform system 500. In another example, signal V _{samp is} compared to reference signal V _ref and its difference is amplified by error amplifier 524. In one embodiment, error amplifier 524 produces an output signal 528 through capacitor 526. For example, capacitor 526 is coupled to error amplifier 524 through terminal 530 (ie, terminal COMP). In another example, output signal 528 (ie, V _COMP ) reflects the load condition. In yet another example, V _COMP is used to affect the PWM/PFM switching frequency and the PWM/PFM pulse width to adjust the output voltage V _out .

As shown in FIG. 7, output signal 528 is sent to load compensated component 532 and component 534. For example, element 534 remains constant output voltage V _out at constant pressure (CV) mode manipulation. In another example, element 534 sends control signal 536 to element 538 and control signal 558 to oscillator 562. In response, oscillator 562 outputs a clock signal 560 to component 538.

Additionally, in one embodiment, error amplifier 524 also outputs signal 570 to element 568, in response, element 568 generates signal 572 and sends it to element 534. In another embodiment, element 534 receives both signal 572 and signal 528.

As shown in Figure 7, element 520 also sends a Demag signal to element 542, which also receives signal _Vsamp . In response, element 542 outputs control signal 592. According to an embodiment, control signal 592 is used to keep output current _Iout constant in a constant current (CC) mode. For example, element 542 includes one or more devices as shown in FIG. In another example, element 542 locks the switching frequency by oscillator 562 based on the primary winding inductance and thus compensates for variations in the primary winding inductance. In yet another example, the output current _Iout in the constant current (CC) mode is made independent of the primary winding inductance.

According to one embodiment, element 538 receives signals 560, 536, and 592, and signal 574 from element 540. Element 540 receives Vth_oc in addition to signal 564 from terminal 566 (ie, terminal CS). For example, Vth_oc represents a predetermined threshold voltage level. In another example, signal 564 is a voltage signal. In response, element 538 outputs control signal 544 to element 546, which in turn sends drive signal 548 to switch 550. For example, control signal 544 is an adjustment signal. In another example, the switch is a power MOSFET. In yet another example, the switch is a power source BJT. In yet another example, the switch is connected to element 546 by terminal 552 (ie, terminal Gate). In yet another example, the drive signal 548 is represented by V _Gate .

According to one embodiment, control signal 544 is used to determine the on time and switching frequency of the PWM/PFM control. For example, a larger V _COMP size will result in a longer on-time and will therefore produce a higher power level delivered to the output. In another example, a larger V _COMP size will result in a higher switching frequency and thus will result in a higher power level being delivered to the output. According to another embodiment, the on-time of the PWM/PFM control is determined by element 538 and the switching frequency of the PWM/PFM control is determined by oscillator 562.

As noted above and further emphasized herein, FIG. 7 is merely an example and should not unduly limit the scope of the claimed scope. Those skilled in the art will recognize many variations, substitutions and modifications. For example, transform system 500 also includes one or more components not shown in FIG. In another example, transform system 500 also includes one or more connections not shown in FIG. In yet another example, transform system 500 includes one or more components that are different than the components shown in FIG. In yet another example, transform system 500 includes one or more connections that are different than the connections shown in FIG. In yet another example, capacitor 526 can be used for another circuit replacement of loop stabilization compensation.

FIG. 8 is a simplified timing diagram of signal sampling and holding performed by element 522 as part of switch mode power conversion system 500, in accordance with an embodiment of the present invention. This illustration is only an example and should not unduly limit the scope of the claimed patent. Those skilled in the art will recognize many variations, substitutions and modifications.

As shown in Figure 8, waveform 610 represents V _Gate as a function of time, waveform 620 represents V _AUX as a function of time, waveform 630 represents V _INV as a function of time, and waveform 660 represents V _samp as a function of time. . Additionally, waveform 640 represents the Sample_clk signal as a function of time, and waveform 650 represents the Holding_clk signal as a function of time.

Referring to FIG. 7, a signal V _Gate as shown by waveform 610 is sent to switch 550. For example, in accordance with an embodiment of the invention, after switch 550 is turned off by the V _Gate , energy stored in primary winding 502 is transferred to both auxiliary winding 506 and secondary winding 504. In another example, signal V _AUX as shown by waveform 620 is analogous to signal 556 at secondary winding 504. In one embodiment, the signal 556 reflecting the output voltage V _out near the end of each period when demagnetization. In yet another example, signal V _INV as shown by waveform 630 is analogous to signal V _AUX as shown by waveform 620 during each demagnetization period.

Further, according to an embodiment of the present invention, the waveform signal shown in FIG Sampling_clk pulse 640 is generated at the end of the demagnetization period. According to another embodiment, the pulse of the signal Holding_clk shown by waveform 650 is generated at the end of the demagnetization period.

According to an embodiment, as shown by waveform 630, signal V _INV is sampled at the falling edge of the Sampling_clk signal and is held during the remainder of the clock cycle. For example, the sampled and held values of signal V _INV are used to generate signal V _samp . In another example, signal amplitude V _a reflects the output voltage of element 522.

As noted above and further emphasized herein, FIG. 8 is merely an example and should not unduly limit the scope of the claimed scope. Those skilled in the art will recognize many variations, substitutions and modifications. For example, V _a changes from one sampling clock cycle to another sampling clock cycle, so V _samp also changes in size from one sampling clock cycle to another sampling clock cycle.

9 is a simplified diagram showing certain elements for output voltage adjustment of a switched mode power conversion system 500 in accordance with an embodiment of the present invention. This illustration is only an example and should not unduly limit the scope of the claimed patent. Those skilled in the art will recognize many variations, substitutions and modifications.

As shown in Figures 7 and 9, according to an embodiment, the voltage divider receives signal 508 from auxiliary winding 506 and outputs signal 514 to terminal INV. In another embodiment, signal 514 is load compensated by load compensated component 532. The compensated signal 514 is fed to both elements 520 and 522.

For example, element 522 samples compensated signal 514 near the end of demagnetization and holds the sampled signal until the next sample. The sampled and held signal V _{samp is} sent from component 522 to error amplifier 524, which also receives reference signal V _ref . The signal V _{samp is} compared to the reference signal V _ref and its difference is amplified by the error amplifier 524.

In one embodiment, error amplifier 524 produces an output signal 528 through capacitor 526. For example, capacitor 526 is coupled to error amplifier 524 through terminal 530 (ie, terminal COMP). In another example, output signal 528 (ie, V _COMP ) reflects the load condition and affects the PWM/PFM switching frequency and the PWN/PFM pulse width to adjust the output voltage V _out .

As shown in Figures 7 and 9, an output signal 528 (i.e., V _COMP ) is sent to element 534, in accordance with an embodiment. For example, element 534 sends control signal 536 to element 538 and control signal 558 to oscillator 562. In one embodiment, control signal 558 is the current injected into oscillator 562. In response, oscillator 562 processes control signal 558 to determine the frequency of clock signal 560 and also outputs clock signal 560 to element 538. In another example, element 538 receives both signals 560 and 536 and outputs control signal 544 to element 546. Element 546 processes the control signal 544 to determine both the PWM/PFM switching frequency and the PWM/PFM pulse width. In one embodiment, the PWM/PFM pulse width is used to determine the current of the primary winding 502. The current of primary winding 502, along with the PWM/PFM switching frequency, is used to adjust the output voltage and maintain its constant magnitude in CV mode.

According to one embodiment, if the magnitude of _Vcomp is less than a predetermined value, then power conversion system 500 is in CV mode. For example, if the voltage V _samp is equal in magnitude to V _ref , then V _{comp is} less than a predetermined value. In CV mode, V _{comp is} used to adjust the PWM/PFM switching frequency and/or pulse width. For example, both control PWM / PFM switching frequency and PWM / PFM pulse width, so that the output voltage V _out remains constant.

According to another embodiment, if the magnitude of _Vcomp exceeds a predetermined value, power conversion system 500 is in CC mode. For example, if the voltage V _samp is less than V _ref in size, V _comp will exceed a predetermined value. In the CC mode, in order to adjust the output current I _out , the voltage V _samp is used to control the switching frequency. For example, PWM / PFM switching frequency is linearly proportional to V _samp, V _samp turn proportional to the output voltage V _out.

As described above, with reference to Figure 7, element 520 includes the apparatus as shown in Figures 10 and 11 in accordance with some embodiments of the present invention.

FIG. 10 is a simplified diagram showing certain devices for generating a Demag signal as an element 520 that is part of a switched mode power conversion system 500 in accordance with an embodiment of the present invention. This illustration is only an example and should not unduly limit the scope of the claimed patent. Those skilled in the art will recognize many variations, substitutions and modifications.

As shown in Figures 7 and 10, signal V _INV is received by element 520 and compared to two threshold voltages. One threshold voltage is V _th1 and the other threshold voltage is V _samp -V _th2 . _Vth1 and _Vth2 are predetermined constants, and _Vsamp is the previously sampled voltage received from element 522. The Demag signal is generated based at least in part on the comparison of the signal V _INV with the two threshold voltages. For example, the demagnetization period is detected to generate a Demag signal.

11 is a simplified diagram showing certain devices for generating a Sampling_clk signal for component 520 that is part of a switched mode power conversion system 500 in accordance with an embodiment of the present invention. This illustration is only an example and should not unduly limit the scope of the claimed patent. Those skilled in the art will recognize many variations, substitutions and modifications.

As shown in Figure 10, a Demag signal is generated. Based at least in part on the Demag signal, other signals P _in1 , P _in2 , S _ync1 , S _ync2 , S amp1 and Samp2 are also generated, as shown in FIG. The duration information of the Demag signal is stored by the integrator. For example, the integrator includes switches and capacitors 910 and 920 (ie, capacitors C1 and C2, respectively). In another example, the voltages of capacitors C1 and C2 are V _C1 at node 912 and V _C2 at node 922, respectively.

In one embodiment, the switches are controlled by signals P _in1 and P _in2 . In another embodiment, the stored duration information of the Demag signal is used to determine the timing of the next pulse of the Sampling_clk signal. For example, the next pulse of the Sampling_clk signal appears just before the end of the demagnetization period, as shown in FIG. Additionally, the width of the next pulse is determined by a one-shot device 930.

12 is a simplified timing diagram showing the generation of a Sampling_clk signal for component 520 that is part of a switched mode power conversion system 500 in accordance with an embodiment of the present invention. This illustration is only an example and should not unduly limit the scope of the claimed patent. Those skilled in the art will recognize many variations, substitutions and modifications.

As shown in FIG. 12, waveform 1010 represents a Sampling_clk signal as a function of time, waveform 1020 represents a Tpau signal as a function of time, and waveform 1030 represents a Samp1 signal as a function of time. Additionally, waveform 1040 represents V _C2 as a function of time. Further, the waveform 1050 represents a function of time as S _{ync 2} signal 1060 represents a waveform as a function of time P _in1 signal, and the waveform 1070 represents a Demag signal as a function of time. For example, Sampling_clk signal, Tpau signal, Samp1 _signal, S ync2 signal, P _in1 signal and a Demag signal.

According to one embodiment, the timing of the Sampling_clk signal is determined based on the timing and duration of the Demag signal in the previous cycle, and each of the P _in1 and P _in2 signals is generated based, at least in part, on the duration of the Demag signal in the current cycle. . For example, the duration of the signal is Demag Demag signal pulse width shown in Figure 12. According to another embodiment, the Samp1 signal has the same pulse width as the Samp2 signal. For example, the pulse width is equal to the time interval between the cutoff of the switch 550 and the next sample. In another example, the Samp1 and Samp2 signals are used to determine the timing of the Sampling_clk signal.

In one embodiment, the relationship between the P _in1 signal and the Samp 2 signal can be described by the difference equation below.

βP _{in 1} ( k -1)- α * Samp ₂ ( k -1)- A * δ ( k )= Samp ₂ ( k ) (9)

Wherein P _in1 represents the P _in1 signal, and Samp ₂ represents the Samp2 signal. This relationship can be further described by the following Z transform: βP _{in 1} ( Z ) Z ^-1 - α * Samp ₂ ( Z ) Z ^-1 - A = Samp ₂ ( Z ) (10) and

Where A is a constant initial value.

In addition, the second item (time → ∞); therefore

As can be seen from Equation 12, the pulse width of the Samp2 signal is updated every cycle according to the duration of the Demag signal in the previous cycle.

FIG. 13 is a simplified timing diagram of a switched mode power conversion system 500 in accordance with another embodiment of the present invention. This illustration is only an example and should not unduly limit the scope of the claimed patent. Those skilled in the art will recognize many variations, substitutions and modifications.

As shown, the waveform 1110 represents a 13 V _out as a function of time, the waveform 1120 represents V _INV as a function of time, and the waveform 1130 represents a Demag signal as a function of time. Additionally, waveform 1140 represents the voltage level of signal 564 at terminal CS as a function of time, and waveform 1150 represents signal 548 at terminal Gate as a function of time.

As described above, with reference to Figure 7, load-compensating element 532 includes as shown in Figures 14(a), 14(b), 15(a), and/or 15(b), in accordance with some embodiments of the present invention. One or more The devices, and error amplifier 524, include some of the devices shown in Figures 14(a), 14(b), 15(a), and/or 15(b).

14(a) is a simplified diagram showing certain devices of load-compensated component 532 and error amplifier 524 as part of switch mode power conversion system 500 in accordance with an embodiment of the present invention. This illustration is only an example and should not unduly limit the scope of the claimed patent. Those skilled in the art will recognize many variations, substitutions and modifications.

As shown in FIG. 14(a), load compensated component 532 includes current source 1230, and error amplifier 524 includes component 1210 and transconductance amplifier 1220. For example, element 1210 determines the difference in size between the two input signals.

For example, component 1210 receives voltage signal V _samp and reference signal V _ref and produces signal 570 having a magnitude equal to V _ref -V _samp . In another example, transconductance amplifier 1220 amplifies signal 570 to produce output signal 528. According to one embodiment, output signal 528 is received by capacitor 526. For example, capacitor 526 acts as a low pass filter for the closed loop. Additionally, element 568, which is part of the forward feed path, provides zero to the closed loop to improve the operational stability of the conversion system 500.

Current source 1230 produces a current I_COMPEN_P that varies with the output load. The current I_COMPEN_P flows through the terminal INV and the resistor 512. For example, the current I_COMPEN_P is used to compensate for the voltage drop caused by the cable and other voltage losses that vary with the output current _Iout . In another example, the I_COMPEN_P current reaches its maximum value under no load conditions and becomes zero at full load conditions.

According to one embodiment, by compensating the load, output voltage V _out can be expressed as follows.

Where n is the turns ratio between the auxiliary winding 506 and the secondary winding 504. Further, V _D1 diode 554 is forward diode voltage drop, and

For example, the last term in Equation 13 represents a compensation factor for canceling the voltage drop caused by the cable.

14(b) is a simplified diagram showing certain devices of current source 1230 as part of load-compensated component 532 in switch mode power conversion system 500 in accordance with an embodiment of the present invention. This illustration is only an example and should not unduly limit the scope of the claimed patent. Those skilled in the art will recognize many variations, substitutions and modifications.

Referring to FIG. 14(a), load compensated component 532 includes current source 1230. As shown in FIG. 14(b), current source 1230 includes a voltage to current converter 1240, a constant current source 1250, and an element 1260. For example, element 1260 determines the difference in size between the two input signals.

For example, signal 528 (ie, V _COMP ) is received by voltage to current converter 1240 and converted to current I_COMPEN. In another example, the constant current source 1250 produces a constant current Icc. Both current Icc and I_COMPEN are received by element 1260, which produces current I_COMPEN_P. In one embodiment, the current I_COMPEN_P is equal to Icc-I_COMPEN. In another embodiment, if V _COMP becomes larger, the current I_COMPEN_P becomes smaller.

Figure 15 (a) is a simplified diagram showing certain devices of load-compensated component 532 and error amplifier 524 as part of a switched mode power conversion system 500 in accordance with another embodiment of the present invention. This illustration is only an example and should not unduly limit the scope of the claimed patent. Those skilled in the art will recognize many variations, substitutions and modifications.

As shown in FIG. 15(a), the load compensating element 532 includes a current sink 1330, and the error amplifier 524 includes an element 1310 and a transconductance amplifier 1320. For example, element 1310 determines the difference in size between the two input signals.

For example, a voltage signal receiving element 1310 V _samp and the reference signal V _ref, and generates a size equal to _V ref- V _samp signal 570. In another example, transconductance amplifier 1320 amplifies signal 570 to produce output signal 528. According to one embodiment, output signal 528 is received by capacitor 526. For example, capacitor 526 acts as a low pass filter for the closed loop. Additionally, element 568, which is part of the forward feed path, provides zero to the closed loop to improve the operational stability of the conversion system 500.

Current tank 1330 produces a current I_COMPEN_N that varies with the output load. Current I_COMPEN_N flows through resistor 510 and terminal INV. For example, the current I_COMPEN_N is used to compensate for the voltage drop caused by the cable and other voltage losses that vary with the output current _Iout . In another example, the I_COMPEN_N current reaches its maximum value at full load conditions and becomes zero when there is no load condition.

Figure 15 (b) is a simplified diagram showing certain devices of current sink 1330 as part of load-compensated component 532 in switch mode power conversion system 500 in accordance with an embodiment of the present invention. This illustration is only an example and should not unduly limit the scope of the claimed patent. Those skilled in the art will recognize many variations, substitutions and modifications.

Referring to Figure 15(a), the load compensating element 532 includes a current sink 1330. As shown in FIG. 15(b), the current sink 1330 includes a voltage to current converter 1340 and a current mirror including resistors 1350 and 1360. For example, signal 528 (ie, V _COMP ) is received by voltage to current converter 1340 and converted to current I_COMPEN. In another example, current I_COMPEN is received by a current mirror that produces current I_COMPEN_N. In one embodiment, the current I_COMPEN_N is equal to m x I_COMPEN, and m is a positive integer. In another embodiment, if V _COMP becomes larger, the current I_COMPEN_N also becomes larger.

16 is a simplified diagram showing a CMOS implementation of component 568 and error amplifier 524 as part of a switched mode power conversion system 500 in accordance with an embodiment of the present invention. This illustration is only an example and should not unduly limit the scope of the claimed patent. Those skilled in the art will recognize many variations, substitutions and modifications.

17 is a simplified diagram showing certain devices of element 542 as part of a switched mode power conversion system 500 in accordance with an embodiment of the present invention. This illustration is only an example and should not unduly limit the scope of the claimed patent. Those skilled in the art will recognize many variations, substitutions and modifications.

As shown in FIG. 17, component 542 includes voltage to current converter 1510, component 1520, and phase locked loop 1530. For example, element 1520 determines the difference in size between the two input signals. In another example, element 1520 receives signal 1512 from voltage to current converter 1510 and signal 1534 from phase locked loop 1530, and outputs a signal 1522 representing the difference between the magnitude of signal 1512 and signal 1534.

As shown in Figures 7 and 17, element 522 samples signal 514 and produces signal _Vsamp . Additionally, the Demag signal is generated by element 520. In one embodiment, the duration of the Demag signal is proportional to the current of the primary winding 502 and is also proportional to the current of the secondary winding 504. For example, the duration of the signal is Demag Demag signal pulse width shown in Figure 12.

In one embodiment, if the signal V _samp is smaller in magnitude than the signal V _ref , then the magnitude of V _comp exceeds a predetermined value and the power conversion system 500 is in CC mode. For example, when the size of V _comp reaches its maximum value, the CC mode is detected. In another embodiment, in CC mode, the PWM/PFM switching frequency is controlled by voltage _Vsamp . For example, PWM / PFM switching frequency is linearly proportional to V _samp, V _samp turn proportional to the output voltage V _out.

For example, in CC mode, V _out in discontinuous conduction mode (DCM) is given by:

Where Po represents the output power of the conversion system 500. In addition, Vo and Io represent the output voltage V _out and the output current I _{out , respectively} . Further, Lp represents the inductance of the primary winding 502, Fsw represents the switching frequency, and Ip represents the peak current of the primary winding 502. η is a constant.

If Fsw is proportional to V _samp , Fsw is also proportional to Vo, as follows.

F _sw =ε Vo (16)

Where ε is a constant. Combine equations 15 and 16, then

Since η and ε are constants, if Ip and Lp are precisely controlled, the output current Io is constant. However, if Lp is not precisely controlled, Io may change even in CC mode.

Where α is a constant, then

Therefore, if Ip is precisely controlled and if Equation 18 is satisfied, Io can be made constant.

Further, the flyback operation, in accordance with an embodiment, the inductance Ls of the winding 504 may be via a secondary, the secondary winding 504 and the peak current _{I P} _sec output voltage Vo to determine the duration of demagnetization, as follows. For example, the demagnetization duration is the same as the duration of the Demag signal (eg, the pulse width of the Demag signal shown in Figure 12).

Since Ls is proportional to Lp and I _{p_sec} is proportional to Ip,

Where β is a constant. If Equation 18 is satisfied, then

Therefore, if Ip is precisely controlled, then

Where γ is a constant. Combine equations 19 and 24,

According to an embodiment, as shown in FIGS. 7 and 17, in the CC mode, the PWM/PFM switching frequency is locked by the phase locked loop 1530.

And Io γI _p (27)

According to another embodiment, T _Demag-based F _sw is adjusted according to equation 26, γ is kept constant. For example, it is a constant equal to or greater than 0.25 and equal to or less than 0.75. Therefore, as long as _Ip other than γ is also controlled to be constant according to Equation 27, the output current Io is kept constant.

For example, element 542 locks switching frequency F _SW according to the inductance of primary winding 502 and thus compensates for variations in primary winding inductance. In yet another example, the output current _Iout in the constant current (CC) mode is made independent of the primary winding inductance. According to an embodiment, as shown in FIGS. 7 and 17, the oscillator 562 is from the signal 1522 of the component 1520 that is part of the component 542, and also sends a clock signal 1532 to the phase locked loop 1530 that is part of the component 542.

18 is a simplified diagram showing certain devices of component 542 for constant output current (CC) control as part of switch mode power conversion system 500 in accordance with an embodiment of the present invention. This illustration is only an example and should not unduly limit the scope of the claimed patent. Those skilled in the art will recognize many variations, substitutions and modifications.

As shown in FIG. 18, element 542 includes pulse copy circuit 1620, phase detector 1630, charge pump 1640, and self-calibration circuit 1650. In one embodiment, pulse copy circuit 1620 receives the signal from element 520 and clock signal 1614 from clock divider 1610 and produces signal 1629. Clock signal 1614 is represented by CLK4 and signal 1629 is represented by D2C . For example, the D2C signal is a copy of the Demag signal, but is synchronized with the clock signal CLK4.

In another embodiment, pulse copy circuit 1620 includes NAND (reverse) gates 1622, MOS transistors 1634 and 1626, and capacitors 1628. For example, NAND gate 1622 receives the Demag signal and clock signal 1614 and produces a voltage signal D2 . As shown in FIG. 18, the voltage signal D2 controls the MOS transistor 1624. For example, if the signal D2 is a logic low level, the MOS transistor 1624 through the current I _p2 capacitor 1628 is charged. In another example, if signal D2 is at a logic high level, MOS transistor 1626 discharges capacitor 1628 by current I _n2 1654. According to one embodiment, immediately prior to such discharge, the voltage of capacitor 1628 reflects the pulse width at the low voltage level of signal D2 . According to another embodiment, the current I _p2 is equal to the current I _n2 . For example, low voltage pulse signal D2 and the signal D2C high voltage pulse on time is the same time. In another example, the rising edge of signal D2C is synchronized with the falling edge of clock signal 1614. In yet another example, the rising edge of signal D2C is synchronized with the falling edge of clock signal 1612 represented by CLK2 .

19 is a simplified timing diagram for generating a D2C signal by a pulse copy circuit 1620 that is part of a switched mode power conversion system 500 in accordance with an embodiment of the present invention. This illustration is only an example and should not unduly limit the scope of the claimed patent. Those skilled in the art will recognize many variations, substitutions and modifications.

Waveform 1710 represents clock signal CLK2 as a function of time, waveform 1720 represents clock signal CLK4 as a function of time, and waveform 1730 represents a Demag signal as a function of time. Additionally, waveform 1740 represents the D2 signal as a function of time, and waveform 1750 represents the D2C signal as a function of time.

As shown in FIG. 19, as a result, the rising edge of the D2C signal is synchronized with the falling edge of the clock signal CLK2 and the falling edge of the clock signal CLK4 . Further, as shown in FIG. 19, the pulse width at the high voltage level of the Demag signal is the same as the pulse width at the high voltage level of the D2C signal.

Referring to Figure 18, signal 1629 is output from pulse copy circuit 1620 to phase detector 1630. Phase detector 1630 includes a D flip-flop 1632. For example, the D flip-flop 1632 compares the pulse width at the high voltage level of the D2C signal with the pulse width at the low voltage level of the clock signal CLK2 .

In one embodiment, if the pulse width at the high voltage level of the D2C signal is greater than the pulse width at the low voltage level of the clock signal CLK2 , the signal 1634 at the Q terminal is at a high voltage level and the signal 1636 at the QN terminal is low. Voltage level. In another embodiment, if the pulse width at the high voltage level of the D2C signal is less than the pulse width at the low voltage level of the clock signal CLK2 , the signal 1634 at the Q terminal is at a low voltage level, and the signal 1636 at the QN terminal is High voltage level.

As shown in FIG. 18, signals 1634 and 1636 are received by charge pump 1640. Charge pump 1640 includes a capacitor 1642. For example, capacitor 1642 is charged or discharged in response to signals 1634 and 1636. In another example, the capacitor charge and discharge current of 1642 represented by signal I _cc is used to adjust 1644.

According to an embodiment, current signal 1644 is received by oscillator 562, which generates clock signal 1660. For example, current signal 1644 is used to adjust the bias current of oscillator 562 to adjust the frequency of clock signal 1660.

As noted above and further emphasized herein, FIG. 7 is merely an example and should not unduly limit the scope of the claimed scope. Those skilled in the art will recognize many variations, substitutions and modifications. For example, as shown in FIG. 18, transform system 500 includes a clock divider 1610 that receives clock signal 1660 and generates clock signals 1612 and 1614.

According to one embodiment, the frequency of clock signal 1612 is half the frequency of clock signal 1660. According to another embodiment, the frequency of the clock signal 1612 is twice as large as the frequency of the clock signal 1614. For example, as shown in FIG. 19, the falling edge of clock signal 1614 (ie, clock signal CLK4 ) is synchronized with the falling edge of clock signal 1612 (ie, clock signal CLK2 ).

Returning to Figure 18, clock signals 1612 and 1614 are output to element 542 for constant current (CC) control. For example, clock signal 1532 as shown in FIG. 17 represents clock signals 1612 and 1614. In another example, although clock divider 1610 is not explicitly shown in FIGS. 7 and 17, clock divider 1610 is part of transform system 500, in accordance with an embodiment.

In response, element 542 produces a current signal 1644 that is received by oscillator 562. For example, current signal 1644 is signal 1534 as shown in FIG. According to one embodiment, oscillator 562, clock divider 1610, and element 542 form a loop.

For example, the loop has a sufficiently high gain. In another example, after the loop becomes stable, the period of the clock signal 1612 is locked twice as long as the pulse width at the high voltage level of the Demag signal. In one embodiment, the pulse width at the high voltage level of the Demag signal is the same as the pulse width at the high voltage level of the clock signal 1612 (ie, the clock signal CLK2 ), as shown in FIG. In another embodiment, the period of the clock signal 1612 is equal to a pulse multiplied by the pulse width at the high voltage level of the Demag signal. For example, the constant is equal to 1/γ.

Further, as shown in FIG. 19 and as described above, according to an embodiment of the present invention, the pulse width at the high voltage level of the Demag signal is the same as the pulse width at the high voltage level of the D2C signal. Therefore, for example, the pulse width at the high voltage level of the D2C signal is the same as the pulse width at the high voltage level of the clock signal CLK2 .

Referring again to FIG. 18, since the calibration circuit 1650 is configured to calibrate the magnitude of current I _P2 and a current I of size _n2. For example, the magnitude of the current I _p2 is equal to the magnitude of the current I _n2 .

According to one embodiment, as shown in FIG. 18, the Demag signal and clock signal CLK4 are fed to a loop comprising an oscillator 562, a clock divider 1610, and an element 542. The loop adjusting the frequency of the clock signal CLK2 to clock signal CLK2 so that the frequency is locked to the frequency of the signal Demag. For example, the frequency of the clock signal CLK2 is equal to the switching frequency of the drive signal 548, as shown in Equation 26.

As described above, in one embodiment, the output current _{Iout is} determined by the peak current _Ip of the primary winding 502 when the switch 550 is turned off. However, the peak current _Ip may vary with the AC input voltage (eg, VAC in Figure 7) due to the propagation delay of the control circuit. For example, a higher AC input voltage will result in a higher peak current _Ip and vice versa. Therefore, according to one embodiment, the peak current _Ip should be accurately controlled at a constant level regardless of the input AC voltage.

20 is a simplified diagram showing certain devices of component 540 for current sensing (CS) peak adjustment as part of switch mode power conversion system 500 in accordance with an embodiment of the present invention. This illustration is only an example and should not unduly limit the scope of the claimed patent. Those skilled in the art will recognize many variations, substitutions and modifications.

As shown in FIG. 20, component 540 includes a high speed comparator 1810, a charge pump 1820, a dynamic threshold generator 1830, and an overcurrent protection (OCP) comparator 1840.

In one embodiment, high speed comparator 1810 receives Vth_oc in addition to signal 564 from terminal 566 (ie, terminal CS). For example, the current flowing through the primary winding 502 is sensed by a resistor 580, and the resistance of the resistor 580 is represented by Rs. As shown in FIG. 7, current 582, whose magnitude is represented by Is, flows through resistor 580, and in response, resistor 580 produces a voltage signal 564 whose magnitude is represented by Vcs. In another example, when switch 550 has just turned off, Vcs is compared to Vth_oc.

In another embodiment, high speed comparator 1810 compares Vth_oc with signal 564 and produces comparison signal 1812. Comparison signal 1812 is represented by OCP_det. For example, comparison signal 1812 is received by charge pump 1820. In another example, charge pump 1820 includes RS latch 1822 and capacitor 1824. In one embodiment, RS latch 1822 receives comparison signal 1812 and, in response, controls charging and discharging of capacitor 1824. In another embodiment, capacitor 1824 provides a voltage signal 1826 that is received by dynamic threshold generator 1830.

In yet another embodiment, dynamic threshold generator 1830 converts voltage signal 1826 into a current signal. For example, the converted current signal is processed by a current mirror that produces a dynamic current signal 1832. Dynamic current signal 1832 is represented by Iocp_PWN. In another example, current signal 1832 is received by dynamic resistor 1834 and dynamic resistor 1834 is represented by R2. In one embodiment, dynamic resistor 1834 includes linear resistor 1836 and transistors 1838 and 1839. For example, transistors 1838 and 1839 provide temperature dependent resistance compensation.

In another embodiment, dynamic resistor 1834 converts current signal 1832 to voltage signal 1835. Voltage signal 1835 is represented by OCP_ref. For example, if Vth_oc is smaller in magnitude than voltage signal 564, voltage signal 1835 will be adjusted lower by dynamic threshold generator 1830. In another example, if Vth_oc is greater in magnitude than voltage signal 564, voltage signal 1835 will be adjusted higher by dynamic threshold generator 1830.

As shown in FIG. 20, voltage signal 1835 is received by an overcurrent protection (OCP) comparator 1840. OCP comparator 1840 also receives signal 564 from terminal 566 (ie, terminal CS). For example, OCP comparator 1840 compares OCP_ref with signal 564 and produces signal 574. In another example, signal 574 is received by element 538 to adjust the peak current of primary winding 502.

As noted above, signal 564 is compared, for example, by high speed comparator 1810 to Vth_OC and compared by OCP comparator 1840 with OCP_ref. In one embodiment, high speed comparator 1810, charge pump 1820, dynamic threshold generator 1830, OCP comparator 1840, and other components form a loop with high gain. In another embodiment, even if the change in line voltage results in a change in the slope of signal 564, the peak current of primary winding 502 is maintained at a constant level. In yet another embodiment, even if the propagation delay of the PWM/PFM signal changes, the peak current of the primary winding 502 is maintained at a constant level.

According to yet another embodiment, as shown in FIG. 20, a comparison signal 1812 is used to control the charge pump 1820 to regulate the voltage signal 1835 represented by OCP_ref. For example, voltage signal 1835 is used as the threshold voltage for OCP comparator 1840. As a result, according to some embodiments of the present invention, the peak current of the primary winding 502 is adjusted by the inner loop such that the peak current is equal to , not the size of the pipeline voltage. Therefore, based on Equation 25, the constant output current is, for example, as follows.

In another example, the output voltage Vo is controlled by adjusting the output signal 514 represented by V _INV . Therefore, according to some embodiments of the present invention, the constant voltage Vo and the constant current Io can be obtained in the CV mode and the CC mode, respectively. For example, the CC mode can be applied to charge the battery until the voltage of the battery reaches a predetermined size.

In accordance with another embodiment, a system for adjusting a power converter (eg, as shown in FIG. 7) includes a first signal generator (eg, as shown by element 520) configured to receive at least an input signal and generate at least Demagnetizing the associated first output signal and the sampling associated second output signal. Additionally, the system includes a sampling component (e.g., as shown by component 522) configured to receive at least an input signal and a second output signal, to sample the input signal based on at least information associated with the second output signal, and to generate at least one Or a plurality of third output signals associated with the sampled size. Moreover, the system includes an error amplifier (e.g., as shown by error amplifier 524) configured to receive at least a third output signal and a first threshold voltage and to generate at least a fourth output signal through the capacitor, the capacitor being coupled to the error amplifier. Additionally, the system includes a compensation component (eg, as shown by load-compensated component 532) configured to receive at least a fourth output signal and at least generate a compensation signal. The input signal is a combination of the compensation signal and the first sensed signal. A first sense signal is associated with a first winding coupled to a secondary winding of the power converter, and a secondary winding is associated with an output current and an output voltage of the power converter. Additionally, the system includes a first controller (e.g., as shown by element 542) for adjusting at least the output current. For example, the first controller is configured to receive at least the first output signal and the third output signal and to generate at least the first control signal based on at least information associated with the first output signal and the third output signal. Additionally, the system includes a second controller (e.g., as shown by element 534) for adjusting at least the output voltage. For example, the second controller is configured to receive at least a fourth output signal and to generate at least a second control signal (eg, as indicated by signal 558) and a third control signal based on at least information associated with the fourth output signal (eg, , as shown by signal 536). Additionally, the system includes an oscillator (eg, as shown by oscillator 562) configured to receive at least a first control And generating at least a clock signal, and a second signal generator (e.g., as shown by element 538) configured to receive at least a clock signal, a third control signal, and a fourth control signal and at least generate an adjustment signal . Additionally, the system includes a gate driver (e.g., as shown by element 546) configured to receive at least an adjustment signal and at least output a drive signal to the switch. For example, the switch is configured to affect a first current flowing through a primary winding coupled to the secondary winding. Additionally, the system includes a third controller (e.g., as shown by element 540) for adjusting at least the peak current. For example, the third controller is configured to receive the third control signal, the second sense signal, and the second threshold voltage, and output the fourth control signal to the second signal generator. In another example, the second sensed signal is associated with a first current flowing through a primary winding of the power converter.

For example, the system also includes a forward feed element (eg, as shown by element 568) configured to receive a fifth output signal from an error amplifier (eg, as shown by error amplifier 524) and output the sixth output signal to The second controller (e.g., as shown by element 534). In another example, the system is configured to adjust the output current to a constant current level when the fourth output signal is greater than a predetermined value in magnitude, and to output the voltage when the fourth output signal is less than the predetermined value in magnitude Adjust to a constant voltage level. In yet another example, the sampling element (eg, as shown by element 522) is configured to perform at least one sampling process on the revenue signal at or near the end of the demagnetization period, generating a first sampled size, and maintaining the first Once the sample size is reached until a second sampled size is produced, the first sampled size and the second sampled size are two of the one or more sampled sizes. In yet another example, the first signal generator (eg, as shown by element 520 and as shown in FIGS. 7 and 10) is further configured to end the third output signal, based at least on information associated with the third output signal. A third threshold voltage, the third threshold voltage is compared in magnitude to the revenue signal, and the first output signal is generated based on at least information associated with the third threshold voltage and the revenue signal.

In accordance with yet another embodiment, a system for adjusting a power converter (eg, as shown in Figures 7 and 9) includes a sampling element (e.g., as shown by element 522) configured to receive at least an input signal, sample an input signal And generating at least a first output signal associated with one or more sampled sizes. For example, the input signal is associated with at least a first winding coupled to a secondary winding of the power converter, and the secondary winding is associated with an output current and an output voltage of the power converter. Additionally, the system includes an error amplifier (e.g., as shown by error amplifier 524) configured to receive at least a first output signal and a threshold voltage and through circuitry for loop stabilization compensation. A second output signal is generated and a third output signal is generated. For example, a circuit for loop stabilization compensation is a capacitor (e.g., as shown by capacitor 526) and the capacitor is coupled to the error amplifier. Additionally, the system includes a forward feed element (eg, as shown by element 568) configured to receive a third output signal and to generate a fourth output signal based on at least information associated with the third output signal; and a controller (eg, , as shown by element 534), for adjusting at least the output voltage. For example, the controller is configured to receive at least the second output signal and the fourth output signal and generate at least a first control signal. Moreover, the system includes a signal generator (eg, as shown by element 538) configured to receive at least a first control signal and to generate at least an adjustment signal based on at least information associated with the first control signal; and a gate driver (eg, As shown by element 546, it is configured to receive at least an adjustment signal and at least output a drive signal to the switch. For example, the switch is configured to affect a first current flowing through a primary winding coupled to the secondary winding.

For example, the controller (e.g., as shown by element 534) is further configured to adjust the output voltage to a constant voltage level when the second output signal is less than a predetermined value in magnitude. In another example, the system further includes a compensation component (eg, as shown by load-compensated component 532) configured to receive at least the second output signal and generate a compensation signal based on at least information associated with the second output signal. For example, the input signal is a combination of a compensation signal and a sensed signal, and the sensed signal is associated with at least a first winding coupled to the secondary winding.

According to yet another embodiment, a system for adjusting a power converter is shown, for example, by Figures 7, 14(a) and 14(b) or by Figures 7, 15(a) and 15(b). The system includes a sampling element (eg, as shown by element 522) configured to receive at least an input signal, sample the input signal, and generate at least a first output signal associated with one or more sampled sizes; and an error amplifier (eg, As shown by error amplifier 524, configured to receive at least a first output signal and a threshold voltage and to generate a second output signal through a capacitor, and to generate a third output signal, the capacitor being coupled to the error amplifier. Additionally, the system includes a forward feed element (eg, as shown by element 568) configured to receive a third output signal and to generate a fourth output signal based on at least information associated with the third output signal; and a controller (eg, As shown by element 534, configured to receive at least a second output signal and a fourth output signal and to generate at least a control signal. Additionally, the system includes a compensating element (eg, as shown by load compensating element 532) configured to receive at least a second output signal and based at least on the second input The information associated with the signal is used to generate at least a compensation signal, which is a combination of the compensation signal and another signal.

For example, the second output signal is a voltage signal, and the signal is a current signal. In another example, the system further includes a signal generator (eg, as shown by element 538) configured to receive at least the control signal and to generate at least the adjustment signal based on at least information associated with the control signal; and a gate driver ( For example, as shown by element 546, is configured to receive at least an adjustment signal and at least output a drive signal to the switch that is configured to affect the current flowing through the primary winding of the power converter.

In accordance with yet another embodiment, a system for adjusting a power converter (eg, as shown in Figures 7 and 17) includes a first signal generator (e.g., as shown by element 520) configured to receive at least an input signal and At least a first output signal associated with demagnetization and a second output signal associated with the sampling are generated. For example, the input signal is associated with at least a first winding coupled to a secondary winding of the power converter, and the secondary winding is associated with an output current and an output voltage of the power converter. Additionally, the system includes a sampling component (e.g., as shown by component 522) configured to receive at least an input signal and a second output signal, to sample the input signal based on at least information associated with the second output signal, and to generate at least one Or a plurality of third output signals associated with the sampled size. Additionally, the system includes a first controller (eg, as shown by element 542) for adjusting at least an output current, the first controller configured to receive at least a first output signal and a third output signal, and based at least on Information associated with an output signal and a third output signal to generate at least a first control signal. Moreover, the system includes an oscillator (eg, as shown by oscillator 562) configured to receive at least a first control signal and to generate at least a clock signal based on at least information associated with the first control signal; and a second signal generation The device (e.g., as shown by element 538) is configured to receive at least a clock signal and a second control signal and to generate at least an adjustment signal based on at least information associated with the clock signal and the second control signal. Additionally, the system includes a gate driver (e.g., as shown by element 546) configured to receive at least an adjustment signal and at least output a drive signal to the switch. For example, the switch is configured to affect a first current flowing through a primary winding coupled to the secondary winding. Additionally, the system includes a third controller (eg, as shown by element 540) for adjusting at least the peak current, configured to receive at least the sensed signal and the threshold voltage, and output the second control signal to the second signal generator (For example, as shown by element 538). For example, feeling The measured signal is associated with a first current flowing through a primary winding of the power converter. The adjustment signal corresponds to a switching frequency and the first output signal corresponds to a demagnetization pulse width.

For example, the switching frequency is inversely proportional to the demagnetization pulse width, the switching period is proportional to the demagnetization pulse width, and the output current is proportional to the peak current. In another example, the peak current is constant and the output current is constant. In another example, in the system of claim 12 (eg, as shown in Figures 7 and 17), the first controller (e.g., as shown by element 542) includes a voltage to current converter (e.g., As shown in voltage to current converter 1510, configured to end the third output signal and claim a second current; a phase locked loop (eg, as shown by phase locked loop 1530) configured to receive at least a first output signal and a clock And generating a third current; and determining a component (eg, as shown by component 1520) configured to receive the second current and the third current, determining a difference in magnitude between the second current and the third current, and based at least on The information associated with the second current and the third current produces a first control signal.

In accordance with yet another embodiment, a system for adjusting a power converter (eg, as shown in Figures 7 and 20) includes a controller for adjusting at least a peak current (e.g., as shown by element 540). For example, the controller is configured to receive at least the sensed signal and the first threshold signal and to generate at least a first control signal, and the sense signal is associated with a first current flowing through a primary winding of the power converter. Additionally, the system includes a signal generator (e.g., as shown by element 538) configured to receive at least a first control signal and at least generate an adjustment signal; and a gate driver (e.g., as shown by element 546) configured to receive at least an adjustment The signal and at least the drive signal is output to the switch. For example, the switch is configured to affect the first current. In another example, the controller (eg, as shown by element 540) includes a first comparator (eg, as shown by high speed comparator 1810) configured to receive the sensed signal and the first threshold voltage and is based at least on Information associated with the sense signal and the first threshold voltage produces a comparison signal; and a charge pump (eg, as shown by charge pump 1820) configured to receive the comparison signal and generate a second based on at least information associated with the comparison signal control signal. Additionally, the controller (eg, as shown by element 540) includes a threshold generator (eg, as shown by dynamic threshold generator 1830) configured to receive the second control signal and based at least on information associated with the second control signal Generating a second threshold voltage; and a second comparator (eg, as shown by OCP comparator 1840) configured to receive the second threshold voltage and the sensed signal and based at least on the second threshold voltage and the sensed signal The information generates a first control signal.

In accordance with yet another embodiment, a method for adjusting a power converter (eg, as implemented in FIG. 7) includes receiving at least an input signal by a first signal generator (eg, as indicated by element 520) and based at least on an input signal The associated information is to generate at least a first output signal associated with the demagnetization and a second output signal associated with the sample. Additionally, the method includes receiving at least an input signal and a second output signal by a sampling element (eg, as shown by element 522), sampling the input signal based on at least information associated with the second output signal, and generating at least one or a plurality of third output signals associated with the sampled size; receiving at least a third output signal and a first threshold voltage by an error amplifier (eg, as shown by error amplifier 524) and generating at least a fourth output signal through the capacitor, the capacitor Is coupled to the error amplifier. Moreover, the method includes receiving at least a fourth output signal by a compensation component (eg, as shown by load-compensated component 532) and generating at least a compensation signal based on at least information associated with the fourth output signal. For example, the input signal is a combination of a compensation signal and a first sensed signal. In another example, the first sense signal is associated with a first winding coupled to a secondary winding of the power converter, and the secondary winding is associated with an output current and an output voltage of the power converter. Additionally, the method includes receiving at least a first output signal and a third output signal by a first controller (eg, as shown by element 542) for adjusting at least an output current, and based at least on the first output signal and the third Outputting information associated with the signal to generate at least a first control signal; receiving at least a fourth output signal by at least a second controller (eg, as indicated by element 534) for adjusting the output voltage and based at least on the fourth output signal The associated information is to generate at least a second control signal (e.g., as indicated by signal 558) and a third control signal (e.g., as indicated by signal 536). Moreover, the method includes receiving at least a first control signal and a second control signal by an oscillator (eg, as shown by oscillator 562) and generating at least a clock signal by the oscillator (eg, as shown by oscillator 562); At least a clock signal, a third control signal, and a fourth control signal are received by a second signal generator (e.g., as indicated by element 538) and at least an adjustment is generated by the second signal generator (e.g., as indicated by element 538) signal. Additionally, the method includes receiving at least an adjustment signal through a gate driver (eg, as indicated by element 546) and outputting at least the drive signal to the switch to affect a first current flowing through the primary winding coupled to the secondary winding; A third controller that adjusts at least the peak current (eg, as indicated by element 540) to receive the third control signal, the second sense signal, and the second threshold voltage, and output the fourth control signal to Second signal generator. For example, the second sense signal is associated with a first current flowing through a primary winding of the power converter.

In another example, the method further includes receiving, by the forward feed element (eg, as indicated by element 568), a fifth output signal from an error amplifier (eg, as shown by error amplifier 524), and based at least on The five output signal associated information outputs a sixth output signal to a second controller (e.g., as indicated by element 534). In yet another example, the method further includes adjusting the output current to a constant current level when the fourth output signal is greater than a predetermined value in magnitude, and adjusting the output voltage to be when the fourth output signal is less than a predetermined value in magnitude Constant voltage level. In yet another example, the processing for sampling the input signal includes sampling the input signal at the end of the first demagnetization period or near the end of the first demagnetization period, generating a first sampled size corresponding to the first demagnetization period, Or sampling the input signal near the end of the second demagnetization period and generating a second sampled size associated with the second demagnetization period. The first sampled size and the second sampled size are two of one or more sampled sizes. In yet another example, the processing for generating at least the third output signal includes maintaining the first sampled size until the second sampled size is generated. In yet another example, in the method (eg, as implemented in Figures 7 and 10), the processing for generating at least a first output signal associated with demagnetization and a second output signal associated with sampling comprises receiving a third output signal determining a third threshold voltage based on at least information associated with the third output signal, comparing the third threshold voltage to an input signal, and based at least on the third threshold voltage and the input signal The information produces a first output signal.

In accordance with yet another embodiment, a method for adjusting a power converter (eg, as shown in Figures 7 and 9) includes receiving at least an input signal by a sampling element (e.g., as shown by element 522). For example, the input signal is associated with at least a first winding coupled to a secondary winding of the power converter, and the secondary winding is associated with an output current and an output voltage of the power converter. Additionally, the method includes sampling the input signal by a sampling element (eg, as indicated by element 522), generating at least a first output signal associated with one or more sampled sizes; passing an error amplifier (eg, as error amplifier 524) Shown) receiving at least a first output signal and a threshold voltage and generating a second output signal through a capacitor, the capacitor being coupled to the error amplifier. Moreover, the method includes generating a third output signal by an error amplifier; receiving a third output signal by the forward feed element, and generating a fourth output signal based on at least information associated with the third output signal Receiving at least a second output signal and a fourth output signal by a controller for adjusting at least the output voltage (eg, as indicated by element 534) and based at least on the second output signal and the fourth output signal Information to generate at least a first control signal. Moreover, the method includes receiving at least a first control signal by a signal generator (eg, as indicated by element 538) and generating at least an adjustment signal based on at least information associated with the first control signal; through a gate driver (eg, eg Element 546 is shown to receive at least the adjustment signal and at least output the drive signal to the switch to affect the first current flowing through the primary winding coupled to the secondary winding.

For example, the method also includes adjusting the output voltage to a constant voltage level if the second output signal is less than a predetermined value in magnitude. In another example, the method includes receiving at least a second output signal by a compensation component (eg, as shown by load-compensated component 532) and generating a compensation signal based on at least information associated with the second output signal. The input signal is a combination of a compensation signal and a sensed signal, and the sensed signal is associated with at least a first winding coupled to the secondary winding.

According to yet another embodiment, a method for adjusting a power converter is shown, for example, by Figures 7, 14(a) and 14(b) or by Figures 7, 15(a) and 15(b). The method includes receiving at least an input signal by a sampling element (e.g., as shown by element 522), sampling the input signal by the sampling element (e.g., as indicated by element 522), and generating at least one or more sampled sizes. The first output signal of the joint. Additionally, the method includes receiving at least a first output signal and a threshold voltage by an error amplifier (eg, as shown by error amplifier 524) and generating a second output through the capacitor based on at least information associated with the first output signal and the threshold voltage And generating a third output signal based on at least information associated with the first output signal and the threshold voltage, the capacitor being coupled to the error amplifier. Additionally, the method includes receiving a third output signal by a forward feed element (eg, as indicated by element 568) and generating a fourth output signal based on at least information associated with the third output signal; by a controller (eg, The second output signal and the fourth output signal are received at least as indicated by element 534, and at least the control signal is generated based on at least information associated with the second output signal and the fourth output signal. Moreover, the method includes receiving at least a second output signal by a compensation component (eg, as shown by load-compensated component 532) and generating at least a compensation signal based on at least information associated with the second output signal, the input signal being a compensation signal A combination with another signal.

For example, the second output signal is a voltage signal and the compensation signal is a current signal. In another example, the method further includes at least receiving by the signal generator (e.g., as indicated by element 538) Receiving a control signal to generate at least an adjustment signal based on at least information associated with the control signal, receiving at least an adjustment signal through a gate driver (eg, as indicated by element 546), and outputting at least the drive signal to the switch to affect flow through the power source The current of the primary winding of the converter.

In accordance with yet another embodiment, a method for adjusting a power converter (eg, as implemented in Figures 7 and 17) includes receiving at least an input signal by a first signal generator (e.g., as shown by element 520). For example, the input signal is associated with at least a first winding coupled to a secondary winding of the power converter, and the secondary winding is associated with an output current and an output voltage of the power converter. Additionally, the method includes generating at least a first output signal associated with demagnetization and a second output signal associated with the sample based at least on information associated with the input signal; by sampling elements (eg, as indicated by element 522) At least receiving the input signal and the second output signal, sampling the input signal based on at least information associated with the second output signal, and generating at least a third output signal associated with the one or more sampled sizes. Moreover, the method includes receiving at least a first output signal and a third output signal by a first controller (eg, as shown by element 542) for adjusting at least an output current, and based at least on the first output signal and the third Outputting information associated with the signal to generate at least a first control signal; receiving at least a first control signal by an oscillator (eg, as shown by oscillator 562) and generating at least a clock based on at least information associated with the first control signal signal. Moreover, the method includes receiving at least a clock signal and a second control signal by a second signal generator (eg, as indicated by element 538) and generating at least an adjustment based on at least information associated with the clock signal and the second control signal The signal is received by the gate driver (eg, as indicated by element 546) and at least the drive signal is output to the switch to affect the first current flowing through the primary winding coupled to the secondary winding. Moreover, the method includes receiving at least the sensed signal and the threshold voltage by a third controller (eg, as shown by element 540) for adjusting at least the peak current, and outputting the second control signal to the second signal generator ( For example, as shown by element 538). The sense signal is associated with a first current flowing through a primary winding of the power converter, the adjustment signal corresponds to a switching frequency, and the first output signal corresponds to a demagnetization pulse width.

For example, the switching frequency is inversely proportional to the demagnetization pulse width and the output current is proportional to the peak current. In another example, the peak current is constant and the output current is constant.

In yet another example, the processing for generating at least the first control signal includes passing a voltage to current converter (eg, such as a voltage to current converter 1510, as shown, for example, by FIGS. 7 and 17). Illustrating) receiving a third output signal, generating a second current based on at least information associated with the third output signal, receiving at least a first output signal and a clock through a phase locked loop (eg, as shown by phase locked loop 1530) And generating a third current based on at least information associated with the first output signal and the clock signal. Additionally, the processing for generating at least the first control signal includes receiving the second current and the third current by determining an element (eg, as indicated by element 1520) and based at least on information associated with the second current and the third current A first control signal is generated, the determining component configured to determine a difference in magnitude between the second current and the third current.

According to yet another embodiment, a method for adjusting a power converter (eg, as shown in Figures 7 and 20) includes receiving at least a controller (e.g., as shown by element 540) for adjusting at least a peak current. Sensing the signal and the first threshold signal. For example, the sense signal is associated with a first current flowing through a primary winding of the power converter. Additionally, the method includes generating at least a first control signal based on at least information associated with the sensed signal and the first threshold voltage; receiving at least the first control signal by the signal generator (eg, as indicated by element 538) and at least At least an adjustment signal is generated based on information associated with the first control signal; at least the adjustment signal is received by the gate driver (eg, as indicated by element 546) and at least the drive signal is output to the switch to affect the first current. The process for generating at least the first control signal includes receiving the sensed signal and the first threshold voltage by a first comparator (eg, as shown by high speed comparator 1810), and based at least on the sensed signal and the first threshold voltage The associated information produces a comparison signal; the comparison signal is received by a charge pump (eg, as shown by charge pump 1820) and the second control signal is generated based at least on information associated with the comparison signal; by a threshold generator (eg, eg Dynamic threshold generator 1830 is shown to receive the second control signal and generate a second threshold voltage based on at least information associated with the second control signal; receive by a second comparator (eg, as shown by OCP comparator 1840) A second threshold voltage and a sensed signal, and generating a first control signal based on at least information associated with the second threshold voltage and the sensed signal.

Many benefits are obtained by the present invention compared to conventional techniques. Certain embodiments of the present invention may reduce partial counting and/or reduce system cost. Some embodiments of the invention may improve reliability and/or efficiency. Certain embodiments of the present invention may simplify circuit design in a switch mode flyback power converter. Some embodiments of the present invention provide a primary side sensing and adjustment scheme. For example, primary side sensing and adjustment schemes can improve load adjustment. In another example, the primary side sensing and adjustment scheme can compensate for the primary winding inductance variation for the flyback variant with primary side adjustment A constant output current is obtained in the converter. Certain embodiments of the present invention may provide a constant output current that does not change with changes in primary winding inductance in CC mode.

Referring to Equation 8, if N is a constant, in order to keep I _o constant, it should also be made keep constant. Since R _s is a constant, at least the following methods exist to make Keep constant: (a keep V _{cs_pk} constant and make Keep constant; (b) make Keep constant and make Keep constant; or (c) make Keep constant and keep T _s constant; some embodiments of the invention use the above method (a), (b) or (c) to implement a constant current (CC) mode in which the output current is maintained at a constant level Regardless of the inductance level and output voltage of the primary winding, secondary winding and auxiliary winding.

21 is a simplified diagram of a switched mode power conversion system with primary side sensing and adjustment in accordance with yet another embodiment of the present invention. This illustration is only an example and should not unduly limit the scope of the claimed patent. Those skilled in the art will recognize many variations, substitutions and modifications.

The power conversion system 2100 includes a primary winding 2110, a secondary winding 2112, an auxiliary winding 2114, resistors 2120, 2122, and 2124, a switch 2130, a demagnetization detecting element 2150, a current source 2160, a current tank 2162, switches 2164 and 2166, and a NOT (non- Gate 2170, capacitor 2172, comparators 2180 and 2182, flip-flop element 2190, and drive element 2192. For example, demagnetization detecting element 2150, current source 2160, current sink 2162, switches 2164 and 2166, NOT gate 2170, capacitor 2172, comparators 2180 and 2182, flip-flop element 2190, and drive element 2192 are located on wafer 2140. In another example, wafer 2140 includes at least terminals 2142, 2144, and 2146. In yet another example, system 2100 is a switch mode flyback power conversion system.

As discussed above and emphasized herein, FIG. 21 is merely an example, which should not unduly limit the scope of the claimed scope. Those skilled in the art will recognize many variations, substitutions and modifications. For example, a leading edge-edge blanking element is inserted between terminal 2146 and comparator 2180, and the inserted rising edge blanking element receives the signal from terminal 2146 and outputs signal 2147 to comparator 2180.

22 is a simplified diagram of a demagnetization detecting element 2150 as part of a switched mode power conversion system 2100 in accordance with an embodiment of the present invention. This illustration is only an example and should not unduly limit the scope of the claimed patent. Those skilled in the art will recognize many variations, substitutions and modifications. The demagnetization detecting element 2150 includes a comparator 2210, flip-flop elements 2220 and 2222, NOT gates 2230 and 2223, and an AND gate 2240.

23 is a simplified timing diagram of a switched mode power conversion system 2100 including demagnetization detecting elements 2150 as shown in FIGS. 21 and 22, in accordance with an embodiment of the present invention. This illustration is only an example and should not unduly limit the scope of the claimed patent. Those skilled in the art will recognize many variations, substitutions and modifications.

As shown in FIG. 23, waveform 2310 represents feedback signal 2143 (eg, V _FB ) as a function of time, waveform 2320 represents Demag signal 2151 as a function of time, and waveform 2330 represents ramp signal 2165 as a function of time (eg, , V _ramp ). Additionally, waveform 2340 represents control signal 2185 as a function of time, waveform 2350 represents drive signal 2193 as a function of time, and waveform 2360 represents sense signal 2147 (eg, V _cs ) as a function of time.

As shown in Figures 21 and 23, when drive signal 2193 (corresponding to waveform 2350) is at a logic high level, switch 2130 is turned "on" and thus closed. According to one embodiment, the current 2111 flowing through the primary winding 2110 ramps up linearly, and the signal 2147 (eg, V _cs ) also ramps up linearly. For example, signal 2147 (eg, V _cs ) is received by comparator 2180, which also receives threshold signal 2181 (eg, V _thoc ). In another example, comparator 2180 compares signal 2147 (eg, V _cs ) to threshold signal 2181 (eg, V _thoc ) and outputs comparison signal 2187 to flip-flop element 2190 . In one embodiment, the trigger element 2190 also receives a control signal 2185 from the comparator 2182 and produces an adjustment signal 2191. In another embodiment, the adjustment signal 2191 is received by the driver element 2192, and in response, the driver element 2192 generates a drive signal 2193.

As shown by waveforms 2350 and 2360, if signal 2147 (eg, V _cs ) reaches threshold signal 2181 (eg, V _thoc ) in _magnitude , drive signal 2193 changes from a logic high level to a logic low level, and switch 2130 is turned off and thus Was disconnected. For example, when the switch 2130 is turned off, the stored energy is delivered to the output of the power conversion system 2100, and the demagnetization process begins. In another example, during the demagnetization process, the current flowing through the primary winding 2112 decreases linearly.

As shown in FIG. 21, the output voltage (eg, V _aux ) of the auxiliary winding 2114 reflects the output voltage (eg, V _o ) of the power conversion system 2100 and is converted by the resistors 2120 and 2122 into a feedback signal 2143 (eg, V). _FB ). For example, the feedback signal 2143 (eg, V _FB ) is received by the comparator 2210 that is part of the demagnetization detecting component 2150. In another example, comparator 2210 compares feedback signal 2143 (eg, V _FB ) to threshold signal 2211 (eg, 0.1V).

As shown by waveforms 2310 and 2320, when feedback signal 2143 (e.g., _VFB ) rises above threshold signal 2211 (e.g., 0.1V), Demag signal 2151 becomes a logic high level, which indicates the beginning of the demagnetization process. Furthermore, when the feedback signal 2143 (eg, V _FB ) falls below the threshold signal 2211 (eg, 0.1 V), the Demag signal 2151 becomes a logic low level, which indicates the end of the demagnetization process. For example, when the current flowing through the secondary winding 2112 drops to almost zero, the demagnetization process ends. In another example, after the demagnetization process ends, the power conversion system 2100 enters a resonant oscillation state, and the feedback signal 2143 (eg, V _FB ) (corresponding to the waveform 2310 ) is approximately sinusoidal.

As shown in FIG. 21, the Demag signal 2151 is received by the switch 2166 and the NOT gate 2170, and the NOT gate 2170 outputs the signal 2171 to the switch 2164 in response. For example, if the Demag signal 2151 is at a logic high level, the switch 2164 is open and the switch 2166 is closed. Thus, according to one embodiment, capacitor 2172 is discharged through current sink 2162 and ramp signal 2165 (eg, V _ramp ) drops linearly. In another example, if the Demag signal 2151 is at a logic low level, the switch 2164 is closed and the switch 2166 is open. Thus, according to another embodiment, capacitor 2172 is charged by current source 2160 and ramp signal 2165 (eg, V _ramp ) rises linearly.

According to yet another embodiment, the ramp signal 2165 (eg, V _ramp ) is received by the comparator 2182, which also receives the threshold signal 2183 (eg, V _ref ). For example, comparator 2182 compares ramp signal 2165 (eg, V _ramp ) to threshold signal 2183 (eg, V _ref ) and outputs control signal 2185 to flip-flop element 2190. As shown by waveforms 2330 and 2350, if ramp signal 2165 (eg, V _ramp ) reaches threshold signal 2183 (eg, V _ref ) in magnitude, drive signal 2193 changes from a logic low level to a logic high level, and switch 2130 conducts. .

As shown in FIGS. 21, 22 and 23, for example, the switching cycle of the power conversion system 2100 is as follows:

Where T _s represents the switching period and T _Demag represents the duration of the demagnetization process. I ₂ represents the magnitude of the charging current of the current source 2160, and I ₁ represents the magnitude of the discharging current of the current sink 2162.

In one embodiment, if

then

Where V _{cs_pk} represents the peak value of signal 2147 (eg, V _cs ), and V _thoc represents the magnitude of threshold signal 2181. In addition, I _p represents the peak value of the current 2111 flowing through the primary winding 2110, and R _s represents the resistance value of the resistor 2124. In another embodiment, assuming an efficiency of 100% between the primary winding 2110 and the secondary winding 2112, the output current is:

Where I _o represents the output current and N represents the turns ratio between the primary winding 2110 and the secondary winding 2112. Using Equations 29 and 31, Equation 32 becomes:

For example, based on Equation 33, since I ₁ , I ₂ , V _{thoc ,} and R _s are constant, the output current I _o is constant. In another example, power conversion system 2100 is intended to make V _{cs_pk} and Both kept constant, so that the output current I _o is kept constant.

24 is a simplified diagram of a switched mode power conversion system with primary side sensing and adjustment, in accordance with another embodiment of the present invention. This illustration is only an example and should not unduly limit the scope of the claimed patent. Those skilled in the art will recognize many variations, substitutions and modifications.

The switched mode power conversion system 2400 includes the following components: • an element 2420 for generating a Demag signal and a Sampling_clk signal; • an element 2422 for sampling and holding one or more signals; • an element 2438 for generating a PWM/PFM adjustment signal • Element 2440 for current sensing (CS) peak adjustment; • Element 2446 for generating gate drive signal; • Oscillator 2462; • Voltage to current converter 2510; • Used to determine the size of two input signals The difference component 2520; the clock divider 2610; the pulse copy circuit 2620; and the phase detector and the charge pump 2635.

In one embodiment, elements 2420, 2422, 2438, 2440, and 2446, oscillator 2462, voltage to current converter 2510, element 2520, clock divider 2610, pulse copy circuit 2620, and phase detector and charge pump 2635 Located on wafer 2490. For example, wafer 2490 includes at least terminals 2416, 2452, and 2466.

Although the above has been illustrated with a selected set of elements for system 2400, many alternatives, modifications, and variations are possible. For example, some of the elements can be expanded and/or combined. In another example, a rising edge blanking element is inserted between terminal 2466 and element 2440, and the inserted rising edge blanking element receives the signal from terminal 2466 and outputs signal 2464 to element 2440. Depending on the embodiment, the arrangement of the components can be interchanged with other components that are replaced. Further details of these elements can be found in this specification.

For example, switch mode power conversion system 2400 is identical to switch mode power conversion system 500. In another example, wafer 2490 is identical to wafer 590. In yet another example, terminals 2416, 2452, and 2466 are identical to terminals 516, 552, and 566, respectively.

In yet another example, elements 2420, 2422, 2438, 2440, and 2446 are identical to elements 520, 522, 538, 540, and 546, respectively, and oscillator 2462 is the same as oscillator 562. In yet another example, voltage to current converter 2510 is the same as voltage to current converter 1510, and element 2520 is identical to element 1520. In yet another example, clock divider 2610 and pulse copy circuit 2620 are identical to clock divider 1610 and pulse copy circuit 1620, respectively, and phase detector and charge pump 2635 includes phase detector 1630 and charge pump 1640. Referring back to Figures 17 and 18, element 542 includes voltage to current converter 1510, element 1520, and phase locked loop 1530, and phase locked loop 1530 includes at least pulse copy circuit 1620, phase detector 1630, and charge pump, according to one embodiment. 1640.

In yet another example, signals 2414, 2444, 2448, 2460, 2464, and 2474 are the same as signals 514, 544, 548, 560, 564, and 574, respectively. In yet another example, signals 2512 and 2522 are identical to signals 1512 and 1522, respectively. In yet another example, signals 2612, 2614, 2629, 2644, and 2660 are the same as signals 1612, 1614, 1629, 1644, and 1660.

25 is a simplified diagram showing certain devices of an element 2440 for current sensing (CS) peak adjustment as part of a switched mode power conversion system 2400 in accordance with an embodiment of the present invention. This illustration is only an example and should not unduly limit the scope of the claimed patent. Those skilled in the art will recognize many variations, substitutions and modifications. As shown in FIG. 25, element 2440 includes a high speed comparator 2710, a logic control element 2722, a charge pump 2724, a dynamic threshold generator 2730, and an overcurrent protection (OCP) comparator 2740.

For example, component 2440 includes the same high speed comparator 2710, dynamic threshold generator 2730, and overcurrent protection (OCP) comparator 2740 as high speed comparator 1810, dynamic threshold generator 1830, and overcurrent protection (OCP) comparator 1840. In another example, logic control element 2722 and charge pump 2724 form charge pump 1820. In yet another example, signals 2464 and 2474 are the same as signals 564 and 574, respectively. In yet another example, signals 2712, 2726, and 2735 are identical to signals 1812, 1826, and 1835, respectively.

Returning to Figure 24, in accordance with one embodiment, the switched mode power conversion system 2400 is a flyback power converter. In another embodiment, the switched mode power conversion system 2400 includes one or more components for controlling the switching frequency, and one or more components for controlling the peak current flowing through the primary winding. For example, the peak current is adjusted to a predetermined level regardless of the line AC input voltage.

According to another embodiment, the output voltage of the switched mode power conversion system 2400 is represented by a signal 2414 (eg, V _FB ) through a terminal 2416 (eg, terminal FB). For example, signal 2414 (eg, V _FB ) is sampled and held by element 2422, and output V _{samp of} element 2422 is received by voltage to current converter 2510. In another example, voltage to current converter 2510, together with element 2520, produces a signal 2522 that is used to determine the frequency of signal 2660 generated by oscillator 2462.

According to yet another embodiment, signal 2414 (eg, V _FB ) is received by element 2420. For example, element 2420 outputs a Demag signal to pulse copy circuit 2620, and the Demag signal represents the duration of the demagnetization process (eg, T _Demag ). In yet another example, the signal is processed by a phase locked loop that includes an oscillator 2462, a clock divider 2610, a pulse copy circuit 2620, a phase detector and charge pump 2635, and an element 2520. In yet another example, the phase locked loop adjusts the oscillation frequency of the signal 2660 such that

Where β is a constant. In yet another example, β is equal to two.

26 is a simplified timing diagram of a switched mode power conversion system 2400 in accordance with an embodiment of the present invention. This illustration is only an example and should not unduly limit the scope of the claimed patent. Those skilled in the art will recognize many variations, substitutions and modifications.

As shown in Figure 26, waveform 2680 represents signal 2612 (e.g., CLK2) as a function of time, and waveform 2682 represents signal 2614 (e.g., CLK4) as a function of time. Additionally, waveform 2684 represents the Demag signal as a function of time, waveform 2686 represents signal 2629 as a function of time, and waveform 2688 represents signal 2522 as a function of time.

For example, at the falling edge of signal 2614 (corresponding to waveform 2682), the Demag signal (corresponding to waveform 2684) is synchronized to signal 2629 (corresponding to waveform 2686). In another example, at the falling edge of signal 2629 (corresponding to waveform 2686), signal 2612 (corresponding to waveform 2680) is sampled.

According to one embodiment, if the value sampled from signal 2612 corresponds to a logic low level, the duration of the demagnetization process (eg, T _Demag ) is less than half a cycle of signal 2612 (corresponding to waveform 2680). In accordance with another embodiment, in response, signal 2522 (corresponding to waveform 2688) decreases in magnitude, resulting in a decrease in the frequency of signal 2612 (corresponding to waveform 2680).

25 and/or 20 illustrate one or more implementations for adjusting the peak current of a primary winding in accordance with certain embodiments. For example, in a constant current (CC) mode, the peak value of the sensed voltage (eg, V _cs ) is adjusted to a predetermined level by feedback regardless of the line AC input voltage and/or delay time.

In another example, as shown in FIG. 25, when the power switch (eg, switch 550) has just turned off, signal 2464 (eg, V _cs ) is compared by comparator 2710 with a predetermined threshold signal (eg, V _{th — oc} ). According to one embodiment, comparator 2710 outputs signal 2712 to adjust signal 2735 (eg, signal OCP_ref), which is used as the threshold voltage of comparator 2740. According to another embodiment, the peak value of the sensed voltage (eg, V _cs ) is adjusted to a predetermined level (eg, V _{th — oc} ) by such feedback such that the output current of the switched mode power conversion system 2400 remains constant.

27 is a simplified timing diagram of an element 540 or 2440 for current sensing (CS) peak adjustment, respectively, as part of a switched mode power conversion system 500 or 2400, in accordance with some embodiments of the present invention. This illustration is only an example and should not unduly limit the scope of the claimed patent. Those skilled in the art will recognize many variations, substitutions and modifications.

Referring to Figures 27 and 20, waveform 2780 represents signal 560 (e.g., CLK) as a function of time, and waveform 2782 represents signal 564 (e.g., CS) as a function of time, in accordance with one embodiment. According to another embodiment, waveform 2784 represents signal LEB_b as a function of time, and waveform 2786 represents signal 1812 (eg, OCP_det) as a function of time. According to yet another embodiment, waveform 2790 represents a signal (eg, UP) as a function of time as a result of signal Charge_con_b and signal Charge, and waveform 2792 represents as a function of time as signal Charge_con and signal Charge_b The resulting signal (for example, DOWN). For example, the signal Charge and the signal Charge_b are both short pulse signals. According to another embodiment, the waveform 2794 represents a signal as a function of time 1826 (e.g., V _control), 1835 and the waveform 2796 represents a signal as a function of time (e.g., OCP_ref).

As shown in FIG. 27, according to one embodiment, if the peak value of signal 564 (corresponding to waveform 2782) is less than Vth_oc (eg, 0.9V), then signal 1812 (corresponding to waveform 2786) is at a logic low level, and signal 1835 (corresponding to Gradually increase at waveform 2796). According to another embodiment, if signal 564 (corresponding to waveform 2782) becomes greater than Vth_oc (eg, 0.9V) during a period of time, then signal 1812 (corresponding to waveform 2786) is at a logic high level during the same time period, and Signal 1835 (corresponding to waveform 2796) is stepped down to dynamically obtain a constant peak of the sensed voltage (eg, V _cs ) at a predetermined level (eg, V _{th — oc} ).

28 is a simplified diagram of a switched mode power conversion system with primary side sensing and adjustment in accordance with yet another embodiment of the present invention. This illustration is only an example and should not unduly limit the scope of the claimed patent. Those skilled in the art will recognize many variations, substitutions and modifications.

The power conversion system 2800 includes a primary winding 2810, a secondary winding 2812, an auxiliary winding 2814, resistors 2820, 2822, and 2824, a switch 2830, a ramp generator 2832, and a transconductance a large 2834, cycle-by-cycle peak generator 2836, rising edge blanking element 2838, demagnetization detecting element 2850, current source 2860, current sink 2862, switches 2864 and 2866, NOT gate 2870, Capacitors 2872 and 2858, comparators 2880 and 2882, flip-flop element 2890, and drive element 2892.

For example, ramp generator 2832, transconductance amplifier 2834, cycle-by-cycle peak detector 2836, rising edge blanking element 2838, demagnetization detecting element 2850, current source 2860, current sink 2862, switches 2864 and 2866, NOT gate 2870, capacitor 2872 Comparators 2880 and 2882, flip-flop element 2890, and drive element 2892 are located on wafer 2840. In another example, wafer 2840 includes at least terminals 2842, 2844, 2846, and 2848. In yet another example, system 2800 is a switch mode flyback power conversion system. In still another example, the demagnetization detecting element 2850 is the same as the demagnetization detecting element 2150 as shown in FIG.

29 is a simplified timing diagram of a switched mode power conversion system 2800 in accordance with an embodiment of the present invention. This illustration is only an example and should not unduly limit the scope of the claimed patent. Those skilled in the art will recognize many variations, substitutions and modifications.

As shown in Figure 29, waveform 2910 represents input signal 2813 (e.g., V _in ) as a function of time, waveform 2920 represents ramp signal 2833 (e.g., V _B ) as a function of time, and waveform 2922 represents as a function of time. Signal 2881 (eg, CMP). Additionally, waveform 2930 represents sense signal 2847 (eg, V _cs ) as a function of time, and waveform 2940 represents peak signal 2837 (eg, V _c2 ) as a function of time.

Moreover, waveform 2950 represents feedback signal 2843 (eg, V _FB ) as a function of time, and waveform 2960 represents Demag signal 2851 as a function of time, and waveform 2970 represents another ramp signal 2865 as a function of time (eg, V _A ). Additionally, waveform 2980 represents control signal 2885 as a function of time, and waveform 2990 represents drive signal 2893 as a function of time.

As shown in Figures 28 and 29, when drive signal 2893 (corresponding to waveform 2990) is at a logic high level, switch 2830 is turned "on". According to one embodiment, current 2811 flowing through primary winding 2810 ramps up linearly, and signal 2847 (eg, V _cs ) also ramps up linearly through rising edge blanking element 2838. For example, signal 2847 (e.g., _Vcs ) is received by cycle-by-cycle peak detector 2836, which detects peaks of signal 2847 during each switching cycle and outputs peak signal 2837 (corresponding to waveform 2940), peak signal 2837 represents the peak value of the detected signal 2847. In another example, peak signal 2837 (eg, V _c2 ) is received by transconductance amplifier 2834, which also receives reference signal 2835 (eg, V _ref2 ).

According to one embodiment, the voltage difference between peak signal 2837 (eg, _Vc2 ) and reference signal 2835 (eg, _Vref2 ) is amplified and converted to a current signal, which in turn is converted by capacitor 2858 to voltage signal 2881 ( For example, CMP). According to another embodiment, voltage signal 2881 (corresponding to waveform 2922) is received by comparator 2880, and comparator 2880 also receives ramp signal 2833 (corresponding to waveform 2920).

For example, the magnitude of voltage signal 2881 (eg, CMP) is constant over time. In another example, comparator 2880 compares voltage signal 2881 (corresponding to waveform 2922) to ramp signal 2833 (corresponding to waveform 2920) and outputs comparison signal 2887 to flip-flop component 2890. In one embodiment, the trigger element 2890 also receives the control signal 2885 from the comparator 2882 and generates an adjustment signal 2891. In another embodiment, the adjustment signal 2891 is received by the driver element 2892, and in response, the driver element 2892 generates a drive signal 2893.

As shown by waveforms 2920 and 2990, if ramp signal 2833 (eg, V _B ) reaches voltage signal 2881 (eg, CMP), drive signal 2893 changes from a logic high level to a logic low level and switch 2830 turns off. For example, when switch 2830 is turned off, the stored energy is delivered to the output of power conversion system 2800 and the demagnetization process begins. In another example, during the demagnetization process, the current flowing through the secondary winding 2812 ramps down linearly.

As shown in FIG. 28, the output voltage of the auxiliary winding 2814 (eg, V _aux ) reflects the output voltage of the power conversion system 2800 (eg, V _o ), and is converted by the resistors 2820 and 2822 into a feedback signal 2843 (eg, V _{FB )} ). For example, feedback signal 2843 (eg, V _FB ) is received by demagnetization detection component 2850, which derivatizes feedback signal 2843 (eg, V _FB ) to a threshold signal (eg, 0.1 V).

According to one embodiment, as shown by waveforms 2950 and 2960, when feedback signal 2843 (eg, V _FB ) rises above a threshold signal (eg, 0.1 V), Demag signal 2851 becomes a logic high level indicating demagnetization processing Start. According to another embodiment, when the feedback signal 2843 (eg, V _FB ) falls below a threshold signal (eg, 0.1 V), the Demag signal 2851 becomes a logic low level, which indicates the end of the demagnetization process. For example, when the current flowing through the secondary winding 2812 drops to almost zero, the demagnetization process ends. In another example, after the demagnetization process ends, the power conversion system 2800 enters a resonant oscillation state, and the feedback signal 2843 (eg, V _FB ) (corresponding to the waveform 2310 ) is approximately sinusoidal.

As shown in FIG. 28, Demag signal 2851 is received by switch 2866 and NOT gate 2870, and NOT gate 2870 outputs signal 2871 to switch 2864 in response. For example, if Demag signal 2851 is at a logic high level, switch 2864 is open and switch 2866 is closed. Thus, according to one embodiment, capacitor 2872 is discharged through current sink 2862 and ramp signal 2865 (eg, V _A ) drops linearly. In another example, if Demag signal 2851 is at a logic low level, switch 2864 is closed and switch 2866 is open. Thus, according to another embodiment, capacitor 2872 is charged by current source 2860 and ramp signal 2865 (eg, V _A ) rises linearly.

According to yet another embodiment, the ramp signal 2865 (eg, V _A ) is received by the comparator 2882, which also receives the threshold signal 2883 (eg, V _ref1 ). For example, comparator 2882 compares ramp signal 2865 (eg, V _A ) to threshold signal 2883 (eg, V _ref1 ) and outputs control signal 2885 to flip-flop component 2890. As shown by waveforms 2970 and 2990, if ramp signal 2865 (eg, V _A ) reaches threshold signal 2883 (eg, V _ref1 ) in magnitude, drive signal 2893 changes from a logic low level to a logic high level, and switch 2830 conducts. .

30 is a simplified diagram of a cycle-by-cycle peak detector 2836 as part of a power conversion system 2800 in accordance with an embodiment of the present invention. This illustration is only an example and should not unduly limit the scope of the claimed patent. Those skilled in the art will recognize many variations, substitutions and modifications.

In one embodiment, the cycle-by-cycle peak detector 2836 includes a comparator 3010, switches 3020, 3022, and 3024, a buffer 3030, capacitors 3040 and 3042, a current source 3050, and a monostable generator 3060. In another embodiment, switches 3022 and 3024 are controlled by signals 3062 and 3064, respectively, and signals 3062 and 3064 are generated by monostable generator 3060 in response to drive signal 2893. For example, signals 3062 and 3064 are each a monostable signal having a pulse width of 300 ns.

31 is a simplified timing diagram of a cycle-by-cycle peak detector 2836 as part of a power conversion system 2800 in accordance with an embodiment of the present invention. This illustration is only an example and should not unduly limit the scope of the claimed patent. Those skilled in the art will recognize many variations, substitutions and modifications.

As shown in FIG. 31, waveform 3110 represents drive signal 2893 as a function of time, and waveform 3120 represents sense signal 2847 (eg, _Vcs ) as a function of time. Additionally, waveform 3130 represents monostable signal 3062 as a function of time, and waveform 3140 represents monostable signal 3064 as a function of time. Additionally, waveform 3150 represents signal 3023 (e.g., _Vc1 ) as a function of time, and waveform 3160 represents signal 3031 as a function of time. Additionally, waveform 3170 represents a peak signal 2837 (e.g., _Vc2 ) as a function of time.

As shown in Figures 30 and 31, monostable generator 3060 receives drive signal 2893 (corresponding to waveform 3110) and produces a monostable signal 3062 (corresponding to waveform 3130) in response to the rising edge of drive signal 2893. For example, monostable signal 3062 has a pulse width of 300 ns. In another example, when monostable signal 3062 is at a logic high level, switch 3022 is closed; therefore, capacitor 3040 is discharged and signal 3023 (corresponding to waveform 3150) falls to a logic low level.

In yet another example, signal 3023 (corresponding to waveform 3150) is received by comparator 3010, which compares signal 3023 with signal 2847 (corresponding to waveform 3120). According to one embodiment, if signal 2847 is greater in magnitude than signal 3023, switch 3020 is closed and capacitor 3022 is charged by current source 3050. According to another embodiment, if signal 3023 reaches signal 2847 in size, switch 3020 is turned off; therefore, signal 3023 represents the peak of signal 2874 in the corresponding signal period until switch 3022 passes the next of monostable signal 3022. The pulse is closed again. According to yet another embodiment, signal 3023 is received by buffer 3030, which generates signal 3031 (corresponding to waveform 3160).

According to yet another embodiment, monostable generator 3060 receives drive signal 2893 (corresponding to waveform 3110) and produces a monostable signal 3064 (corresponding to waveform 3140) in response to the falling edge of drive signal 2893. For example, monostable signal 3064 has a pulse width of 300 ns. In another example, when monostable signal 3064 is at a logic high level, switch 3024 is closed; therefore, capacitor 3042 is charged and signal 2837 (corresponding to waveform 3170) is used to sample signal 3031. In yet another example, the sampled signal 3031 is held on capacitor 3042 and output as signal 2837, which represents the peak of signal 2874 in the corresponding signal period until the next pulse of drive signal 2844 arrives.

Referring to FIG. 28, for example, the switching cycle of the power conversion system 2800 is as follows:

Where T _s represents the switching period and T _Demag represents the duration of the demagnetization process. I ₂ represents the magnitude of the charging current of the current source 2860, and I ₁ represents the magnitude of the discharging current of the current sink 2862.

According to one embodiment, the AC input signal 2815 is converted to a rectified input signal 2813 (eg, V _in ) as follows:

Wherein V _in represents the rectified input signal 2813. In addition, V _rms represents the root mean square size of the AC input signal 2815, and T _AC represents the period of the AC input signal 2815. For example, T _AC is equal to 20ms.

In another example, therefore, the peak signal 2837 is

Where V _c2 represents the peak signal 2837. In addition, t _on represents the pulse width of the drive signal 2893, and R _s represents the resistance value of the resistor 2824. Further, L _p represents the inductance of the primary winding 2810.

In yet another example, as shown in FIG. 28, the peak signal 2837 is averaged such that the average of the peak signal 2837 is equal to the reference signal 2835. According to an embodiment, if

then,

Wherein, g _m is the transconductance of transconductance amplifier 2834, and the capacitance value of the capacitor C _cmp of 2858. In addition, T represents an integration period, and K is a positive integer much larger than one. For example, T is equal to or greater than T _AC . In another example, K is not less than 3. In yet another example, K is equal to 3, 5, 6, 10 or 20. In yet another example, the bandwidth of the transconductance amplifier 2834 is much smaller than the frequency of the AC input signal 2815. Further, V _{cs_ave} represents the average value of the peak signal 2837, and V _ref2 represents the reference signal 2835. Furthermore, V _{cs — pk} represents the peak value of signal 2847, which is for example equal to V _c2 .

According to another embodiment, as shown in FIG. 28,

Wherein I ₀ represents the output current of the switched mode power conversion system 2800, and N represents the turns ratio between the primary winding 2810 and the secondary winding 2812. In addition, R _s represents the resistance value of the resistor 2824, and T _s represents the switching period of the power conversion system 2800. In addition, T _Demag represents the duration of the demagnetization process in each switching cycle.

According to a further embodiment, combining equations 35 and 39 with equation 40, the following equation can be obtained:

For example, based on Equation 41, since I ₁ , I ₂ , V _ref2 , R _s and N are all constants, the output current I _o is constant. In another example, power conversion system 2800 enables with Keep constant to keep the output current I _o constant. In one embodiment, by satisfying at least Equation 38 keep constant. In another embodiment, by satisfying at least Equation 35 keep constant.

As noted above and emphasized herein, FIG. 28 is merely an example and should not unduly limit the scope of the claimed scope. Those skilled in the art will recognize many variations, substitutions and modifications. For example, power conversion system 2800 includes one or more bulk capacitors for converting AC input signal 2815 to a DC signal received by primary winding 2810, as shown in FIG.

32 is a simplified diagram of a switched mode power conversion system with primary side sensing and adjustment in accordance with yet another embodiment of the present invention. This illustration is only an example and should not unduly limit the scope of the claimed patent. Those skilled in the art will recognize many variations, substitutions and modifications.

For example, the power conversion system 3200 is identical to the power conversion system 2800 except that the power conversion system 3200 further includes capacitors 3210 and 3220, a resistor 3230, and an inductor 3240. In another example, capacitors 3210 and 3220, resistor 3230, and inductor 3240 are used to convert AC input signal 3215 to DC input signal 3213 (eg, V _in ).

According to one embodiment, power conversion system 2800 has the advantage of not requiring the use of one or more bulk capacitors and converting the AC input signal to a DC input signal received by primary winding 2810. According to yet another embodiment, nevertheless, power conversion system 2800 can operate using one or more of such bulk capacitors, as shown in FIG.

33 is a simplified diagram of a switched mode power conversion system with primary side sensing and adjustment in accordance with yet another embodiment of the present invention. This illustration is only an example and should not unduly limit the scope of the claimed patent. Those skilled in the art will recognize many variations, substitutions and modifications.

The power conversion system 3300 includes a primary winding 3310, a secondary winding 3312, an auxiliary winding 3314, resistors 3320, 3322, and 3324, a switch 3330, a transconductance amplifier 3334, a cycle-by-cycle peak detector 3336, a rising edge blanking element 3338, and a demagnetization detection. Element 3350, oscillator 3360, AND gate 3366, capacitor 3358, integrator 3370, comparator 3382, flip-flop element 3390, and drive element 3392.

For example, transconductance amplifier 3334, cycle-by-cycle peak detector 3336, rising edge blanking component 3338, demagnetization detecting component 3350, oscillator 3360, AND gate 3366, integrator 3370, comparator 3382, flip-flop component 3390, and drive component 3392 Located on wafer 3340. In another example, wafer 3340 includes at least terminals 3342, 3344, 3346, and 3348. In yet another example, system 3300 is a switch mode flyback power conversion system. In still another example, the demagnetization detecting element 3350 is the same as the demagnetization detecting element 2150 as shown in FIG. In yet another example, the cycle-by-cycle peak detector 3336 is identical to the cycle-by-cycle peak detector 2836 shown in FIG. In yet another example, integrator 3370 is a cycle-by-cycle integrator that is reset after each switching cycle (eg, at the end of the demagnetization process within each switching cycle).

Figure 34 is a simplified diagram of an integrator 3370 as part of a power conversion system 3300 in accordance with an embodiment of the present invention. This illustration is only an example and should not unduly limit the scope of the claimed patent. Those skilled in the art will recognize many variations, substitutions and modifications.

In one embodiment, integrator 3370 includes switches 3420, 3422, and 3424, a buffer 3430, capacitors 3440 and 3442, transistors 3450, 3452, and 3454, an amplifier 3460, a monostable generator 3462, and a resistor 3470. In another embodiment, the switch 3320 is controlled by the Demag signal 3351. In yet another embodiment, switches 3422 and 3424 are controlled by signals 3461 and 3463, respectively. For example, signal 3461 is generated by monostable generator 3460 in response to drive signal 3393. In another example, signal 3463 is generated by monostable generator 3462 in response to Demag signal 3351.

35 is a simplified timing diagram of a switched mode power conversion system 3300 including an integrator 3370 as shown in FIGS. 33 and 34, in accordance with an embodiment of the present invention. This illustration is only an example and should not unduly limit the scope of the claimed patent. Those skilled in the art will recognize many variations, substitutions and modifications.

As shown in FIG. 35, waveform 3510 represents drive signal 3393 as a function of time, waveform 3520 represents sensed signal 3347 (eg, V _cs ) as a function of time, and waveform 3530 represents peak signal 3337 as a function of time ( For example, V _c2 ). Additionally, waveform 3540 represents monostable signal 3461 as a function of time, and waveform 3550 represents monostable signal 3463 as a function of time. Additionally, waveform 3560 represents the Demag signal 3351 as a function of time. Additionally, waveform 3570 represents signal 3423 as a function of time, and waveform 3580 represents signal 3372 as a function of time.

As shown in Figures 34 and 35, monostable generator 3462 receives drive signal 3393 (corresponding to waveform 3510) and generates signal 3461 (corresponding to waveform 3540) in response to the rising edge of drive signal 3393. For example, signal 3461 is a monostable signal. In another example, when the monostable signal 3461 is at a logic high level, the switch 3422 is closed; therefore, the capacitor 3440 is discharged and the signal 3423 (corresponding to waveform 3570) falls to a logic low level.

According to one embodiment, when the Demag signal 3351 (corresponding to waveform 3560) is at a logic high level, the switch 3420 is closed. According to another embodiment, peak signal 3337 (corresponding to waveform 3530) is received by amplifier 3460, which converts peak signal 3337, which is a voltage signal, into a current signal, which is used when switch 3420 is closed by Demag signal 3351. To charge capacitor 3440. For example, capacitor 3440 outputs signal 3423 (corresponding to waveform 3570). In another example, signal 3423 is received by buffer 3030, which generates signal 3431.

According to yet another embodiment, monostable generator 3462 receives Demag signal 3351 (corresponding to waveform 3560) and generates signal 3463 (corresponding to waveform 3550) in response to the falling edge of Demag signal 3351. For example, signal 3463 is a monostable signal. In another example, when monostable signal 3463 is at a logic high level, switch 3424 is closed; therefore, capacitor 3442 is charged and signal 3372 (corresponding to waveform 3580) is used to sample signal 3431. In yet another example, the sampled signal 3431 is held on capacitor 3442 and output as signal 3372 until the next pulse of drive signal 3344 arrives.

According to yet another embodiment, the signal 3372 is

Where V _c4 represents the signal 3372 and V _c2 represents the peak signal 3337. In addition, T _Demag represents the duration of the demagnetization process in each switching cycle. Further, R ₃ represents the resistance value of the resistor 3470, and C ₃ represents the capacitance value of the capacitor 3440.

36 is a simplified diagram of an oscillator 3360 as part of a power conversion system 3300 in accordance with an embodiment of the present invention. This illustration is only an example and should not unduly limit the scope of the claimed patent. Those skilled in the art will recognize many variations, substitutions and modifications.

In one embodiment, the oscillator 3360 includes at least a resistor 3640 and a capacitor 3650. In another embodiment, oscillator 3360 receives reference signals 3610, 3620, and 3630 and generates clock signal 3362 and ramp signal 3364. In yet another embodiment, the period of clock signal 3362 and ramp signal 3364 is determined by:

Wherein, T _osc represents the period of the clock signal 3362 and the ramp signal 3364. Further, V _refl, V _ref2 and V _ref3 are 3610,3620 and 3630 denotes a reference signal. Further, R ₅ represents the resistance value of the resistor 3640, and C ₅ represents the capacitance value of the capacitor 3650.

In yet another embodiment, the switching period of the power conversion system 3300 is equal to the period of the clock signal 3362 and the ramp signal 3364, and the switching frequency is determined as follows:

Where F _sw represents the switching frequency of the power conversion system 3300. For example, power conversion system 3300 operates at a fixed switching frequency.

37 is a simplified timing diagram of a switched mode power conversion system 3300 in accordance with an embodiment of the present invention. This illustration is only an example and should not unduly limit the scope of the claimed patent. Those skilled in the art will recognize many variations, substitutions and modifications.

As shown in FIG. 37, waveform 3710 represents input signal 3313 (eg, V _in ) as a function of time, and waveform 3720 represents drive signal 3393 as a function of time. Additionally, waveform 3730 represents clock signal 3362 as a function of time, waveform 3740 represents ramp signal 3364 as a function of time, and waveform 3742 represents signal 3381 (eg, CMP) as a function of time. Moreover, waveform 3750 represents sense signal 3347 (eg, V _cs ) as a function of time, and waveform 3760 represents peak signal 3337 (eg, V _c2 ) as a function of time. In addition, waveform 3770 represents Demag signal 3351 as a function of time, and waveform 3780 represents signal 3372 as a function of time.

As shown in Figures 33 and 37, at the rising edge of clock signal 3362 (corresponding to waveform 3730), drive signal 3393 (corresponding to waveform 3720) becomes a logic high level and switch 3330 is turned "on". According to one embodiment, the current 3311 flowing through the primary winding 3310 ramps up linearly, and the signal 3347 (eg, V _cs ) also ramps up linearly through the rising edge blanking element 3338. For example, signal 3347 (eg, V _cs ) is received by cycle-by-cycle peak detector 3336, which detects the peak of signal 3347 in each switching cycle and outputs peak signal 3337 (corresponding to waveform 3760), the peak signal 3337 represents the peak value of the detected signal 3347. In another example, peak signal 3337 (eg, V _c2 ) is received by integrator 3370, which also receives drive signal 3393 (corresponding to waveform 3720) and Demag signal 3351 (corresponding to waveform 3770), and to transconductance Amplifier 3334 outputs a signal 3372 (corresponding to waveform 3780).

According to one embodiment, transconductance amplifier 3334 also receives reference signal 3335 (eg, V _ref ), and in response, amplifies and converts the voltage difference between signal 3372 (eg, V _c4 ) and reference signal 3335 (eg, V _ref ) The current signal is in turn converted by capacitor 3358 into a voltage signal 3381 (eg, CMP). According to another embodiment, voltage signal 3381 (corresponding to waveform 3742) is received by comparator 3382, and comparator 3382 also receives ramp signal 3364 (corresponding to waveform 3740).

For example, the magnitude of voltage signal 3381 (eg, CMP) is constant over time. In another example, comparator 3382 compares voltage signal 3381 (corresponding to waveform 3742) to ramp signal 3364 (corresponding to waveform 3740) and outputs a comparison signal 3385 to flip-flop element 3390. In one embodiment, flip-flop element 3390 also receives at least clock signal 3362 from oscillator 3360 and produces signal 3391. In another embodiment, signal 3391 is received by AND gate 3366, which also receives clock signal 3362 and produces an adjustment signal 3368. In yet another embodiment, driver component 3392 receives adjustment signal 3368 and generates drive signal 3393.

As shown by waveforms 3720, 3740, and 3742, if ramp signal 3364 reaches voltage signal 3381 (eg, CMP), drive signal 3393 changes from a logic high level to a logic low level and switch 3330 turns off. For example, when the switch 3330 is turned off, the stored energy is delivered to the output of the power conversion system 3300 and the demagnetization process begins. In another example, during the demagnetization process, the current flowing through the secondary winding 3312 linearly ramps down.

As shown in FIG. 33, the output voltage of the auxiliary winding 3314 (eg, V _aux ) reflects the output voltage (eg, V _o ) of the power conversion system 3300 and is converted by the resistors 3320 and 3322 into a feedback signal 3343 (eg, V _{FB ).} ). For example, feedback signal 3343 (eg, V _FB ) is received by demagnetization detecting component 3350, which derivatizes feedback signal 3343 (eg, V _FB ) with a threshold signal (eg, 0.1 V).

According to one embodiment, when the feedback signal 3343 (eg, V _FB ) rises above a threshold signal (eg, 0.1 V), the Demag signal 3351 becomes a logic high level that indicates the beginning of the demagnetization process, as shown by waveform 3770. According to another embodiment, when the feedback signal 3343 (eg, V _FB ) falls below a threshold signal (eg, 0.1 V), the Demag signal 3351 becomes a logic low level indicating the end of the demagnetization process. For example, when the current flowing through the secondary winding 3312 drops to almost zero, the demagnetization process ends. In another example, after the demagnetization process ends, the power conversion system 3300 enters a resonant oscillation state, and the feedback signal 3343 (eg, V _FB ) is approximately a sine wave. According to yet another embodiment, as shown by waveforms 3720 and 3730, at the next rising edge of clock signal 3362, drive signal 3393 again becomes a logic high level and switch 3330 is again turned "on".

In one embodiment, the AC input signal 3315 is converted to a rectified input signal 3313 (eg, V _in ) as follows:

Wherein V _in represents the rectified input signal 3313. In addition, V _rms represents the root mean square size of the AC input signal 3315, and T _AC represents the period of the AC input signal 3315. For example, T _AC is equal to 20ms.

In another example, the peak signal 3337 is

Where V _c2 represents the peak signal 3337. In addition, t _on represents the pulse width of the drive signal 3393, and R _s represents the resistance value of the resistor 3324. Further, L _p represents the inductance of the primary winding 3310.

In yet another example, based on equation 42, signal 3372 is equal to

Where V _c4 represents the signal 3372 and T _Demag represents the duration of the demagnetization process in each switching cycle. In addition, R ₃ represents the resistance value of the resistor 3470, and C ₃ represents the capacitance value of the capacitor 3440. Furthermore, V _{cs — pk} represents the peak value of signal 3347, which is for example equal to V _c2 .

In yet another example, as shown in FIG. 33, signal 3372 is averaged and the average of signal 3372 is equal to reference signal 3335. According to an embodiment, if

Wherein, g _m is the transconductance of transconductance amplifier 3334, and the capacitance value of the capacitor C _cmp 3358. In addition, T represents an integration period, and K is a positive integer much larger than one. For example, T is equal to or greater than T _AC . In another example, K is not less than 3. In yet another example, K is equal to 3, 5, 6, 10, or 20. In yet another example, the transconductance amplifier 3334 has a bandwidth that is much smaller than the frequency of the AC input signal 3315. Further, V _{c4 — ave} represents the average value of the signal 3372, and V _ref represents the reference signal 3335.

According to another embodiment, combining equations 47 and 49, the following equation can be obtained:

According to yet another embodiment, based on equation 44, power conversion system 3300 operates at a fixed switching frequency, then

Wherein I ₀ represents the output current of the switched mode power conversion system 3300, and N represents the turns ratio between the primary winding 3310 and the secondary winding 3312. In addition, R _s represents the resistance value of the resistor 3324, which is a constant. Further, T _s represents the switching period of the power conversion system 3300, which is a constant equal to 1/ F _sw .

According to a further embodiment, combining equations 44 and 50 with equation 51, the following equation can be obtained:

For example, based on Equation 54, since K ₀ , V _ref , R _s and N are both constant, the output current I _o is constant. In another example, power conversion system 3300 is intended to And T _{s are} kept constant to keep the output current I _o constant. In one embodiment, by satisfying at least equation 48 keep constant. In another embodiment, it is kept constant by making T _s satisfying the equation of at least 44.

As shown in FIG. 33, in one embodiment, the rectified input voltage 3313 (eg, V _in ) is determined by

In another embodiment, the peak value of the current 3311 flowing through the primary winding 3310 is determined by the following equation

Where I _p represents the peak value of the current 3311, and L _p represents the inductance of the primary winding 3310. In addition, t _on represents the pulse width of the drive signal 3393.

38 is a simplified timing diagram of certain currents of a switched mode power conversion system 3300 in accordance with an embodiment of the present invention. This illustration is only an example and should not unduly limit the scope of the claimed patent. Those skilled in the art will recognize many variations, substitutions and modifications.

For example, waveform 3810 represents the current as a function of time 3311 and the waveform 3820 represents the input current as a function of the rectified time 3317 (e.g., I _in). In another example, the rectified input current 3317 (eg, I _in ) corresponds to a rectified input voltage 3313 (eg, V _in ) as shown in FIG.

As shown, in one embodiment, the rectified current via the input 3317 (e.g., I _in) Embodiment 38

Wherein I _in represents the rectified input current 3317. In another embodiment, combining Equation 56 with Equation 57, it is possible to obtain:

In yet another embodiment,

Where V _cmp represents the signal 3381. In addition, V _ref2 and V _ref3 are constants representing reference signals 3620 and 3630, respectively. For example, based on Equation 59, if equation 48 is satisfied, then t _on is constant for at least one period of AC input signal 3315, and thus, V _cmp is constant for at least one period of AC input signal 3315.

Then, according to equation 58,

I _in = M × V _in (61)

According to one embodiment, as shown in FIG. 38, based on Equation 44, the power conversion system switching period T _s 3300 is constant; therefore the power conversion system, M is a positive integer at least one cycle of the AC input signal 3315, and The power factor (PF) of the 3300 is equal to 1 or substantially equal to one. For example, the power conversion system 3300 has a power factor (PF) equal to or greater than 0.9. According to another embodiment, the power factor (PF) of the power conversion system 3300 is close to 1 by satisfying at least Equations 44 and 48.

As noted above and emphasized herein, FIG. 33 is merely an example and should not unduly limit the scope of the claimed scope. Those skilled in the art will recognize many variations, substitutions and modifications. For example, power conversion system 3300 includes one or more bulk capacitors for converting AC input signal 3315 into a DC signal received by primary winding 3310, as shown in FIG.

39 is a simplified diagram of a switched mode power conversion system with primary side sensing and adjustment in accordance with yet another embodiment of the present invention. This illustration is only an example and should not unduly limit the scope of the claimed patent. Those skilled in the art will recognize many variations, substitutions and modifications.

For example, power conversion system 3900 is identical to power conversion system 3300 except that power conversion system 3900 also includes capacitors 3910 and 3920, resistor 3930, and inductor 3940. In another example, capacitors 3910 and 3920, resistor 3930, and inductor 3940 are used to convert AC input signal 3915 to DC input signal 3913 (eg, V _in ).

Referring to Figures 33 and 39, according to one embodiment, power conversion system 3900 can obtain a constant output current with a power factor equal to one or substantially equal to one. For example, the power conversion system 3900 has a power factor (PF) equal to or greater than 0.9. According to another embodiment, power conversion system 3300 is used to provide power to one or more of the light emitting diodes, as shown in FIG.

40 is a simplified diagram of a switched mode power conversion system 3300 for powering a light emitting diode in accordance with yet another embodiment of the present invention. This illustration is only an example and should not unduly limit the scope of the claimed patent. Those skilled in the art will recognize many variations, substitutions and modifications. For example, power conversion system 3300 is used to provide power to one or more light emitting diodes 4010.

41 is a simplified diagram of a switched mode power conversion system with primary side sensing and adjustment in accordance with yet another embodiment of the present invention. This illustration is only an example and should not unduly limit the scope of the claimed patent. Those skilled in the art will recognize many variations, substitutions and modifications.

The power conversion system 4100 includes a primary winding 4110, a secondary winding 4112, an auxiliary winding 4114, resistors 4120, 4122, 4124, 4126, and 4128, a switch 4130, a transconductance amplifier 4134, a cycle-by-cycle peak detector 4136, and a rising edge occluding component. 4138, demagnetization detecting element 4150, oscillator 4160, AND gate 4166, capacitor 4158, integrator 4170, comparator 4182, multiplier 4184, flip-flop element 4190, and drive element 4192.

For example, transconductance amplifier 4134, cycle-by-cycle peak detector 4136, rising edge blanking element 4138, demagnetization detecting element 4150, oscillator 4160, AND gate 4166, integrator 4170, comparator 4182, multiplier 4184, flip-flop element 4190 And the driving element 4192 is located on the wafer 4140. In another example, wafer 4140 includes at least terminals 4142, 4144, 4146, 4148, and 4149. In yet another example, system 4100 is a switch mode flyback power conversion system.

In still another example, the demagnetization detecting element 4150 is the same as the demagnetization detecting element 2150 as shown in FIG. In yet another example, the cycle-by-cycle peak detector 4136 is identical to the cycle-by-cycle peak detector 2836 shown in FIG. In yet another example, the integrator 4170 is the same as the integrator 3370 shown in FIG. In yet another example, the oscillator 4160 is identical to the oscillator 3360 shown in FIG. In yet another example, the integrator 4170 is a cycle-by-cycle integrator that is reset after each switching cycle (eg, at the end of the demagnetization process within each switching cycle).

42 is a simplified timing diagram of a switched mode power conversion system 4100 in accordance with an embodiment of the present invention. This illustration is only an example and should not unduly limit the scope of the claimed patent. Those skilled in the art will recognize many variations, substitutions and modifications.

As shown in FIG. 42, waveform 4210 represents input signal 4113 (eg, V _in ) as a function of time, and waveform 4220 represents drive signal 4193 as a function of time, and waveform 4230 represents clock signal 4162 as a function of time. Additionally, waveform 4240 represents signal 4183 (eg, MULT) as a function of time, and waveform 4242 represents signal 4181 (eg, CMP) as a function of time. Moreover, waveform 4250 represents sensed signal 4147 (eg, V _cs ) as a function of time, and waveform 4260 represents peak signal 4137 (eg, V _c2 ) as a function of time, and waveform 4262 represents a signal as a function of time 4185. In addition, waveform 4270 represents Demag signal 4151 as a function of time, and waveform 4280 represents signal 4172 as a function of time.

As shown in FIGS. 41 and 42, at the rising edge of signal 4162 (corresponding to waveform 4230), drive signal 4193 (corresponding to waveform 4220) becomes a logic high level and switch 4130 is turned "on". According to one embodiment, the current 4111 flowing through the primary winding 4110 ramps up linearly, and the signal 4147 (eg, V _cs ) also ramps up linearly through the rising edge blanking element 4138. For example, signal 4147 (eg, V _cs ) is received by cycle-by-cycle peak detector 4136, which detects the peak of signal 4147 during each switching cycle and outputs a peak signal 4137 (corresponding to waveform 4260), the peak signal 4137 represents the peak value of the detected signal 4147. In another example, peak signal 4137 (eg, V _c2 ) is received by integrator 4170, which also receives drive signal 4193 (corresponding to waveform 4220) and Demag signal 4151 (corresponding to waveform 4270), and is transconducted Amplifier 4134 outputs a signal 4172 (corresponding to waveform 4280).

According to one embodiment, transconductance amplifier 4134 also receives reference signal 4135 (eg, V _ref ), and in response, amplifies and converts the voltage difference between signal 4172 (eg, V _c4 ) and reference signal 4135 (eg, V _ref ) The current signal is in turn converted by capacitor 4158 into a voltage signal 4181 (eg, CMP). For example, voltage signal 4181 (eg, CMP) is constant in magnitude over time. In another example, voltage signal 4181 (corresponding to waveform 4242) is received by multiplier 4184, and multiplier 4184 also receives signal 4183 (corresponding to waveform 4240). In yet another example, signal 4183 is proportional to input signal 4113 (eg, V _in ) by resistors 4126 and 4128.

In accordance with another embodiment, multiplier 4184 in response outputs a signal 4185 (corresponding to waveform 4262) to comparator 4182, which also receives sense signal 4147 (corresponding to waveform 4250). For example, comparator 4182 compares signal 4185 (corresponding to waveform 4262) to sensed signal 4147 (corresponding to waveform 4250) and outputs a comparison signal 4187 to flip-flop element 4190. In one embodiment, flip-flop element 4190 also receives at least clock signal 4162 from oscillator 4160 and produces signal 4191. In another embodiment, signal 4191 is received by AND gate 4166, which also receives clock signal 4162 and generates adjustment signal 4168. In yet another embodiment, driver element 4192 receives adjustment signal 4168 and generates drive signal 4193.

As shown by waveforms 4220, 4250, and 4262, if signal 4147 reaches signal 4185, drive signal 4193 changes from a logic high level to a logic low level and switch 4130 turns off. For example, when the switch 4130 is turned off, the stored energy is delivered to the output of the power conversion system 4100 and the demagnetization process begins. In another example, during the demagnetization process, the current flowing through the secondary winding 4112 decreases linearly.

As shown in FIG. 41, the output voltage (eg, V _aux ) of the auxiliary winding 4114 reflects the output voltage (eg, V _o ) of the power conversion system 4100 and is converted by the resistors 4120 and 4122 into a feedback signal 4143 (eg, V _{FB ).} ). For example, the feedback signal 4143 (eg, V _FB ) is received by the demagnetization detecting element 4150, which compares the feedback signal 4143 (eg, V _FB ) with a threshold signal (eg, 0.1 V).

According to one embodiment, when the feedback signal 4143 (eg, V _FB ) rises above a threshold signal (eg, 0.1V), the Demag signal 4151 becomes a logic high level that indicates the beginning of the demagnetization process, as shown by waveform 4270. According to another embodiment, when the feedback signal 4143 (eg, V _FB ) falls below a threshold signal (eg, 0.1V), the Demag signal 4151 becomes a logic low level, which indicates the end of the demagnetization process. For example, when the current flowing through the secondary winding 4112 drops to almost zero, the demagnetization process ends. In another example, after the demagnetization process ends, the power conversion system 4100 enters a resonant oscillation state, and the feedback signal 4143 (eg, V _FB ) is approximately a sine wave. According to yet another embodiment, as shown by waveforms 4220 and 4230, at the next rising edge of clock signal 4162, drive signal 4193 again becomes a logic high level and switch 4130 turns "on" again.

In one embodiment, as shown in Figure 41, the output current is

Where I ₀ represents the output current of the switched mode power conversion system 4100. Further, N is a constant indicating a turns ratio between the primary winding 4110 and the secondary winding 4112. Further, R _s represents the resistance value of the resistor 4124, and V _ref represents the reference signal 4135, and both R _s and V _ref are constant. Further, K ₀ is a constant.

For example, to obtain equation 62, power conversion system 4100 operates at a fixed switching frequency, and

Wherein, g _m is the transconductance of transconductance amplifier 4134, and the capacitance value of the capacitor C _cmp of 4158. In addition, T _AC represents the period of the AC input signal 4115, and K is a positive integer much greater than one. For example, K is not less than 3. In another example, K is equal to 3, 5, 6, 10, or 20. In yet another example, the transconductance amplifier 4134 has a bandwidth that is much smaller than the frequency of the AC input signal 4115.

In yet another example, based on Equation 62, since K ₀ , V _ref , R _{s ,} and N are both constants, the output current I _o is constant. In another example, power conversion system 4100 is intended to And T _{s are} kept constant to keep the output current I _o constant. I represents the integration period. For example, T is equal to or greater than T _AC . In one embodiment, by satisfying at least Equation 63 keep constant. In another embodiment, T _s to make the oscillator 3360 is kept constant by.

As shown in Figure 41, in one embodiment, signal 4185 is determined as follows:

Where V _{cs_pk} represents the peak value of the sensing signal 4147 and V _mp represents the signal 4185. In addition, α is a constant coefficient of the multiplier 4184. Further, V _cmp represents signal 4181, and V _mult represents signal 4183. Further, R ₃ and R ₄ represent the resistance values of the resistors 4126 and 4128, respectively, and V _in represents the rectified input voltage 4113.

In another example, the peak value of the sensed signal 4147 is

Wherein t _on represents the pulse width of the drive signal 4193, and R _s represents the resistance value of the resistor 4124. In addition, L _p represents the inductance of the primary winding 4110.

By combining equations 64 and 65, the following equation can be obtained:

For example, based on equation 66, if equation 63 is satisfied, then t _on is constant for at least one period of AC input signal 4115, and thus, V _cmp is constant for at least one period of AC input signal 4115.

In another example, shown in Figure 41, the input rectified voltage 4113 (e.g., V _in) corresponding to the rectified input current 4117 (e.g., I _in) to

Wherein, I _in represents the rectified input current 4117, and T _s represents the switching period of the power conversion system 4100.

in case

Then, according to Equation 67, I _in = M × V _in (69)

According to one embodiment, shown in Figure 41, a switching power conversion system 4100 is constant period T _s, and constant t _on at least one cycle of the AC input signal 4115; therefore, the AC input signal M 4115 The positive power is also a positive integer for at least one cycle, and the power factor (PF) of the power conversion system 4100 is equal to one or substantially equal to one. For example, the power conversion system 4100 has a power factor (PF) equal to or greater than 0.9. According to another embodiment, the power factor (PF) of the power conversion system 4100 is equal to 1 or substantially equal to 1 by at least keeping the switching frequency constant and satisfying Equation 63.

As noted above and emphasized herein, FIG. 41 is merely an example and should not unduly limit the scope of the claimed scope. Those skilled in the art will recognize many variations, substitutions and modifications. For example, power conversion system 4100 includes one or more bulk capacitors for converting AC input signal 4115 into a DC signal received by primary winding 4110.

Referring to FIG. 41, according to one embodiment, power conversion system 4100 can obtain a constant output current with a power factor equal to one or substantially equal to one. According to another embodiment, power conversion system 4100 is used to provide power to one or more of the light emitting diodes, as shown in FIG.

43 is a simplified diagram of a switched mode power conversion system 4100 for powering a light emitting diode in accordance with yet another embodiment of the present invention. This illustration is only an example and should not unduly limit the scope of the claimed patent. Those skilled in the art will recognize many variations, substitutions and modifications. For example, power conversion system 4100 is used to provide power to one or more light emitting diodes 4310.

44 is a simplified diagram of a switched mode power conversion system with primary side sensing and adjustment in accordance with yet another embodiment of the present invention. This illustration is only an example and should not unduly limit the scope of the claimed patent. Those skilled in the art will recognize many variations, substitutions and modifications.

The power conversion system 4400 includes a primary winding 4410, a secondary winding 4412, an auxiliary winding 4414, resistors 4420, 4422, and 4424, a switch 4426, an amplifier 4428, a switch 4430, a transconductance amplifier 4434, a cycle-by-cycle peak detector 4436, and a rising edge cover. There are no component 4438, demagnetization detecting component 4450, oscillator 4460, AND gate 4466, capacitor 4458, integrator 4470, comparator 4482, multiplier 4484, flip-flop component 4490, and drive component 4492.

For example, transconductance amplifier 4434, cycle-by-cycle peak detector 4436, rising edge blanking element 4438, demagnetization detecting element 4450, oscillator 4460, AND gate 4466, integrator 4470, comparator 4482, multiplier 4484, flip-flop element 4490 And the drive element 4492 is located on the wafer 4440. In another example, wafer 4440 includes at least terminals 4442, 4444, 4446, and 4448. In yet another example, system 4400 is a switch mode flyback power conversion system. In yet another example, integrator 4470 is a cycle-by-cycle integrator that is reset after each switching cycle (eg, at the end of the demagnetization process within each switching cycle).

According to one embodiment, primary winding 4410, secondary winding 4412, auxiliary winding 4414, resistors 4420, 4422, and 4424, switch 4430, transconductance amplifier 4434, cycle-by-cycle peak detector 4436, rising edge blanking element 4438, demagnetization detection Element 4450, oscillator 4460, The AND gate 4466, the capacitor 4458, the integrator 4470, the comparator 4482, the flip-flop element 4490, and the drive element 4492 are respectively identical to the following elements: primary winding 4110, secondary winding 4112, auxiliary winding 4114, resistors 4120, 4122, and 4124 Switch 4130, transconductance amplifier 4134, cycle-by-cycle peak detector 4136, rising edge blanking element 4138, demagnetization detecting element 4150, oscillator 4160, AND gate 4166, capacitor 4158, integrator 4170, comparator 4182, flip-flop element 4190, and drive element 4192.

According to another embodiment, the switch 4430 is controlled by the drive signal 4493. For example, if drive signal 4493 is at a logic high level, switch 4430 is closed. In another embodiment, when switch 4493 is closed, feedback signal 4443 (eg, V _FB ) is clamped to a potential by amplifier 4428 (eg, an operational amplifier). In yet another example, the feedback signal 4443 (eg, V _FB ) is set to zero, and the current signal 4484 is determined by

Where I _FB represents the current signal 4484. In addition, V _in represents the rectified input voltage 4413, and V _aux represents the auxiliary voltage 4419. Further, N _aux is the number of turns of the auxiliary winding 4414, and N _p is the number of turns of the primary winding 4410. Further, R ₁ represents the resistance value of the resistor 4420.

In yet another example, based on equation 70, current signal 4484 is proportional to rectified input voltage 4413 as follows:

According to yet another embodiment, current signal 4484 is received by multiplier 4484, which also receives voltage signal 4481 and outputs signal 4485 to comparator 4482. For example, signal 4485 is determined by: V _mo = b × V _cmp × I _FB (72)

Where V _mo represents the signal 4485. In addition, V _cmp represents a voltage signal 4481, and b is a constant coefficient of the multiplier 4484.

In another example, combining Equation 72 with Equation 64, it can be seen that signal 4485 is similar to signal 4185 and is proportional to the product of voltage signal 4481 and rectified input voltage 4413, as follows:

According to one embodiment, the power conversion system 4400 is intended to And T _{s are} kept constant to keep the output current I _o constant. For example, by satisfying at least Equation 63 keep constant. In another example, to make the T _s by the oscillator 4460 is kept constant.

According to another embodiment, the power factor (PF) of the power conversion system 4400 is equal to 1 or substantially equal to 1 by at least keeping the switching frequency constant and satisfying Equation 63, as shown by at least Equation 73. For example, the power conversion system 4400 has a power factor (PF) equal to or greater than 0.9.

As noted above and emphasized herein, FIG. 44 is merely an example and should not unduly limit the scope of the claimed scope. Those skilled in the art will recognize many variations, substitutions and modifications. For example, power conversion system 4400 includes one or more bulk capacitors for converting AC input signal 4415 into a DC signal received by primary winding 4410.

Referring to FIG. 44, according to one embodiment, power conversion system 4400 can obtain a constant output current with a power factor equal to one or substantially equal to one. According to another embodiment, power conversion system 4400 is used to provide power to one or more of the light emitting diodes, as shown in FIG.

45 is a simplified diagram of a switched mode power conversion system 4400 for powering a light emitting diode in accordance with yet another embodiment of the present invention. This illustration is only an example and should not unduly limit the scope of the claimed patent. Those skilled in the art will recognize many variations, substitutions and modifications. For example, power conversion system 4400 is used to provide power to one or more of the light emitting diodes 4510.

In accordance with another embodiment, a system for adjusting a power converter (eg, as shown in FIG. 21) includes a first signal generator (eg, as shown by demagnetization detecting element 2150) configured to receive a first sensing The signal also produces an output signal associated with the demagnetization. The first sense signal is associated with a first winding coupled to a secondary winding of a power converter, and the secondary winding is associated with at least an output current of the power converter. Additionally, the system includes a ramp signal generator (eg, as shown by a combination of NOT gate 2170, current source 2160, current sink 2162, switch 2164, 2166, and capacitor 2172) configured to receive the output signal and generate a ramp signal ( For example, as shown by signal 2165; and a first comparator (eg, as shown by comparator 2182) configured to receive the ramp signal and a first threshold signal (eg, as indicated by signal 2183), and based at least on Information associated with the ramp signal and the first threshold signal produces a first comparison signal. Additionally, the system includes a second comparator (eg, as shown by comparator 2180) configured to receive a second sensed signal (eg, as shown by signal 2147) and a second threshold signal and to generate a second comparison signal. The second sense signal is associated with a first current flowing through a primary winding coupled to a secondary winding of the power converter. Moreover, the system includes a second signal generator (eg, as shown by flip-flop element 2190) configured to receive at least the first comparison signal and the second comparison signal and generate an adjustment signal (eg, as signal 2191 And a gate driver (eg, as shown by driver component 2192) configured to receive the adjustment signal and output a drive signal to the switch (eg, as shown by signal 2193). The switch is configured to affect the first current flowing through the primary winding. The output signal is associated with a demagnetization duration (eg, T _Demag ), and the drive signal is associated with a switching period (eg, T _s ). The system is also configured to maintain a constant ratio of the demagnetization duration to the switching period.

In accordance with yet another embodiment, a method for adjusting a power converter (eg, as implemented in FIG. 21) includes receiving a first sensed signal. The first sense signal is associated with a first winding coupled to a secondary winding of the power converter, and the secondary winding is associated with at least an output current of the power converter. Additionally, the method includes generating an output signal based on at least information associated with the first sensed signal. The output signal is associated with demagnetization. Additionally, the method includes receiving the output signal; generating a ramp signal based on at least information associated with the output signal; receiving the ramp signal and a first threshold signal; processing and the ramp signal and the first threshold signal Associated information; generating a first comparison signal based at least on information associated with the ramp signal and the first threshold signal. Additionally, the method includes receiving a second sensed signal and a second thresholded signal. The second sense signal is associated with a first current flowing through a primary winding coupled to a secondary winding of the power converter. Additionally, the method includes processing information associated with the second sensed signal and the second threshold signal; generating a second based on at least information associated with the second sensed signal and the second threshold signal Comparing a signal; receiving the first comparison signal and the second comparison signal; processing information associated with the first comparison signal and the second comparison signal; based at least on the first comparison signal and the The information associated with the second comparison signal produces an adjustment signal. Additionally, the method includes receiving the adjustment signal; outputting a drive signal to the switch based on at least information associated with the adjustment signal to affect the first current flowing through the primary winding. The output signal is associated with a demagnetization duration and the drive signal is associated with a switching period. The ratio of the demagnetization duration to the switching period is kept constant.

In accordance with yet another embodiment, a system for adjusting a power converter (eg, as shown in FIG. 7 or FIG. 24) includes a first signal generator (eg, as shown by element 520 or element 2420) configured to receive at least The input signal and at least an output signal associated with demagnetization is generated, the input signal being associated with at least an output current of the power converter. Additionally, the system includes a first controller (e.g., as shown in element 542 or as shown in combination of voltage to current converter 2510, element 2520, pulse copy circuit 2620, and phase detector and charge pump 2635) configured to receive at least Deriving an output signal and generating at least a first control signal based on at least information associated with the output signal; a second controller (eg, as shown by element 540 or element 2440) configured to receive the first sensed signal and The first threshold signal and a second control signal is generated. The first sensed signal is associated with a first current flowing through a primary winding of the power converter. Additionally, the system includes an oscillator (eg, as shown by oscillator 562 or oscillator 2462) configured to receive at least the first control signal and generate at least based on at least information associated with the first control signal A clock signal; a second signal generator (e.g., as shown by element 538 or element 2438) configured to receive at least the clock signal and the second control signal and to generate at least an adjustment signal. Additionally, the system includes a gate driver (e.g., as shown by element 546 or element 2446) configured to receive at least the adjustment signal and output at least a drive signal to the switch. The switch is configured to affect the first current flowing through the primary winding. The output signal is associated with a demagnetization duration (eg, T _Demag ), and the drive signal is associated with a switching period (eg, T _s ). The system is also configured to maintain a constant ratio of the demagnetization duration to the switching period and to maintain a peak of the first sensed signal constant in magnitude.

In accordance with yet another embodiment, a method for adjusting a power converter (eg, as implemented in FIG. 7 or FIG. 24) includes receiving at least an input signal and generating at least an output based on at least information associated with the input signal signal. The input signal is at least related to an output current of the power converter, and the output signal is related to demagnetization. Additionally, the method includes receiving at least the output signal; processing information associated with the output signal; generating at least a clock signal based on at least information associated with the output signal. Additionally, the method includes receiving a sense signal and a threshold signal. The sense signal is associated with a first current flowing through a primary winding of the power converter. Moreover, the method includes processing information associated with the sensed signal and the threshold signal; generating a control signal based at least on information associated with the sensed signal and the threshold signal; receiving at least the clock signal and The control signal; processing the clock signal and the Controlling information associated with the signal; generating at least an adjustment signal based at least on information associated with the clock signal and the control signal. Additionally, the method includes receiving at least the adjustment signal; at least outputting a drive signal to the switch based on at least information associated with the adjustment information to affect the first current flowing through the primary winding. The output signal is associated with a demagnetization duration and the drive signal is associated with a switching period. The ratio of the demagnetization duration to the switching period is kept constant, and the peak of the first sensing signal is kept constant in magnitude.

In accordance with yet another embodiment, a system for adjusting a power converter (eg, as shown in FIG. 28 or 32) includes a first signal generator (eg, as shown by demagnetization detecting element 2850) configured to receive a first sense The signal is measured and a first output signal associated with demagnetization is generated. The first sense signal is associated with a first winding coupled to a secondary winding of a power converter, and the secondary winding is associated with at least an output current of the power converter. Additionally, the system includes a first ramp signal generator (eg, as shown by a combination of current source 2860, current sink 2862, switch 2864, switch 2866, NOT gate 2870, and capacitor 2872) configured to receive the first output signal And generating a first ramp signal (eg, as shown by signal 2865); a first comparator (eg, as shown by comparator 2882) configured to receive the first ramp signal and a first threshold signal (eg, such as a signal) 2883), and generating a first comparison signal (eg, as indicated by signal 2885) based at least on information associated with the first ramp signal and the first threshold signal. Additionally, the system includes a peak detector (e.g., as shown by cycle-by-cycle peak detector 2836) configured to receive a drive signal (e.g., as indicated by signal 2893) and a second sense signal (e.g., as signal 2847 shows And generate a peak signal (eg, as shown by signal 2837). The second sense signal is associated with a first current flowing through a primary winding coupled to a secondary winding of the power converter. Moreover, the system includes an amplifier (eg, as shown by transconductance amplifier 2834) configured to receive the peak signal and a second threshold signal (eg, as shown by signal 2835) and to generate a second output signal through the capacitor (eg, As indicated by signal 2881, the capacitor is coupled to the amplifier; a second comparator (eg, as shown by comparator 2880) is configured to receive the second output signal and the second ramp signal (eg, as Signal 2833 is shown) and a second comparison signal is generated (e.g., as indicated by signal 2887). Additionally, the system includes a second signal generator (eg, as shown by flip-flop element 2890) configured to receive at least the first comparison signal and the second comparison signal and generate an adjustment signal (eg, as signal 2891) And a gate driver (eg, as shown by drive element element 2892) configured to receive the adjustment signal and output the drive signal to the peak detector and switch. The switch is configured to affect the first current flowing through the primary winding.

In accordance with yet another embodiment, a method for adjusting a power converter (eg, as implemented in FIG. 28 or FIG. 32) includes receiving a first sensed signal. The first sense signal is associated with a first winding coupled to a secondary winding of the power converter, and the secondary winding is associated with at least an output current of the power converter. Additionally, the method includes generating a first output signal based on at least information associated with the first sensed signal; receiving the first output signal; generating a first ramp based on at least information associated with the first output signal signal. The first output signal is related to demagnetization. Additionally, the method includes receiving the first ramp signal and a first threshold signal; processing information associated with the first ramp signal and the first threshold signal; based at least on the first ramp signal and the The information associated with the first threshold signal produces a first comparison signal; the drive signal and the second sense signal are received. The second sense signal is associated with a first current flowing through a primary winding coupled to a secondary winding of the power converter. Additionally, the method includes processing information associated with the drive signal and the second sensed signal; generating a peak signal based on at least information associated with the drive signal and the second sensed signal; receiving the a peak signal and a second threshold signal; processing information associated with the peak signal and the second threshold signal; generating a second output signal based on at least information associated with the peak signal and the second threshold signal. Additionally, the method includes receiving the second output signal and the second ramp signal; processing information associated with the second output signal and the second ramp signal; based at least on the second output signal and the The information associated with the second ramp signal produces a second comparison signal. Additionally, the method includes receiving the first comparison signal and the second comparison signal; processing information associated with the first comparison signal and the second comparison signal; based at least on the first comparison signal and The information associated with the second comparison signal produces an adjustment signal. Additionally, the method includes receiving the adjustment signal; and outputting the drive signal based on at least information associated with the adjustment signal to affect the first current flowing through the primary winding.

In accordance with yet another embodiment, a system for adjusting a power converter (eg, as shown in FIG. 28 or FIG. 32) includes a first signal generator (eg, as shown by demagnetization detecting element 2850) configured to receive a first The signal is sensed and an output signal associated with demagnetization is generated (eg, as shown by signal 2851). The first sense signal is associated with a first winding coupled to a secondary winding of the power converter, and the secondary winding is associated with at least an output current of the power converter. Additionally, the system includes a peak detector (e.g., as shown by cycle-by-cycle peak detector 2836) configured to receive the drive signal and the second sense signal and generate a peak signal (e.g., as shown by signal 2837). The second sense signal is associated with a first current flowing through a primary winding coupled to a secondary winding of the power converter. Moreover, the system includes a second signal generator (e.g., as shown by flip-flop element 2890) configured to process at least the output signal (e.g., as shown by signal 2851) and the peak signal (e.g., a signal) Corresponding information is shown in 2837 and an adjustment signal is generated (e.g., as indicated by signal 2891). Additionally, the system includes a gate driver (eg, as shown by drive element element 2892) configured to receive the adjustment signal and output the drive signal to the peak detector and switch. The switch is configured to affect the first current flowing through the primary winding. The output signal is associated with a demagnetization duration (eg, T _Demag ), and the drive signal is associated with a switching period (eg, T _s ). The system is also configured to maintain a constant ratio of the demagnetization duration to the switching period; and to maintain an average magnitude of the peak signal constant during a first duration (eg, T).

In accordance with yet another embodiment, a method for adjusting a power converter (eg, as implemented in FIG. 28 or 32) includes receiving a first sensed signal. The first sense signal is associated with a first winding coupled to a secondary winding of the power converter, and the secondary winding is associated with at least an output current of the power converter. Additionally, the method includes generating an output signal based on at least information associated with the first sensed signal; receiving the drive signal and the second sensed signal; and processing information associated with the drive signal and the second sensed signal. A first sensed signal is associated with demagnetization and the second sensed signal is associated with a first current flowing through a primary winding coupled to a secondary winding of the power converter. Moreover, the method includes generating a peak signal based on at least information associated with the drive signal and the second sensed signal; processing at least information associated with the output signal and the peak signal; based at least on The output signal and the information associated with the peak signal produce an adjustment signal. Additionally, the method includes receiving the adjustment signal; outputting the drive signal to a switch based on at least information associated with the adjustment signal to affect at least the first current flowing through the primary winding. The output signal is associated with a demagnetization duration (eg, T _Demag ), and the drive signal is associated with a switching period (eg, T _s ). Keeping the ratio of the demagnetization duration to the switching period constant; and keeping the average magnitude of the peak signal constant during a first duration (eg, T).

In accordance with yet another embodiment, a system for adjusting a power converter (eg, as shown in FIG. 33, FIG. 39, or FIG. 40) includes a first signal generator (eg, as shown by demagnetization detecting element 3350) configured A first sensed signal is received and a first output signal associated with demagnetization is generated. The first sense signal is associated with a first winding coupled to a secondary winding of a power converter, and the secondary winding is associated with at least an output current of the power converter. Additionally, the system includes a peak detector (e.g., as shown by cycle-by-cycle peak detector 3336) configured to receive a drive signal (e.g., as indicated by signal 3393) and a second sense signal (e.g., as indicated by signal 3347) And generate a peak signal (eg, as shown by signal 3337). The second sense signal is associated with a first current flowing through a primary winding coupled to a secondary winding of the power converter. Moreover, the system includes a second signal generator (eg, as shown by integrator 3370) configured to receive the drive signal, the first output signal, and the peak signal, and to generate a second output signal (eg, As shown by signal 3372), an amplifier (eg, as shown by transconductance amplifier 3334) is configured to receive the second output signal and a threshold signal (eg, as shown by signal 3335) and to generate a third output signal through the capacitor (eg, For example, as shown by signal 3381, the capacitor is coupled to the amplifier. Additionally, the system includes a comparator (eg, as shown by comparator 3382) configured to receive the third output signal and the ramp signal (eg, as shown by signal 3364) and to generate a comparison signal (eg, as signal 3385) a third signal generator (eg, as shown by a combination of element 3366 and flip-flop element 3390) configured to receive at least the comparison signal and a clock signal (eg, as indicated by clock signal 3362) and The signal is adjusted (eg, as indicated by adjustment signal 3368). Additionally, the system includes a gate driver (e.g., as shown by drive element 3392) configured to receive the adjustment signal and output the drive signal to the peak detector, the second signal generator, and the switch. The switch is configured to affect the first current flowing through the primary winding.

In accordance with yet another embodiment, a method for adjusting a power converter (eg, as implemented in FIG. 33, FIG. 39, or FIG. 40) includes receiving a first sensed signal. The first sense signal is associated with a first winding coupled to a secondary winding of a power converter, and the secondary winding is associated with at least an output current of the power converter. Additionally, the method includes generating a first output signal associated with demagnetization; receiving the drive signal and the second sense signal. The second sense signal is associated with a first current flowing through a primary winding coupled to a secondary winding of the power converter. Additionally, the method includes processing information associated with the drive signal and the second sensed signal; at least Information associated with the drive signal and the second sensed signal produces a peak signal. Additionally, the method includes receiving the drive signal, the first output signal, and the peak signal; processing information associated with the drive signal, the first output signal, and the peak signal; at least based on The information associated with the drive signal, the first output signal, and the peak signal produces a second output signal. Additionally, the method includes receiving the second output signal and a threshold signal; processing information associated with the second output signal and the threshold signal; at least based on being associated with the second output signal and the threshold signal The information produces a third output signal. Additionally, the method includes receiving the third output signal and a ramp signal; processing information associated with the third output signal and the ramp signal; at least based on being associated with the third output signal and the ramp signal The information produces a comparison signal. Moreover, the method includes receiving the comparison signal and a clock signal; processing information associated with the comparison signal and the clock signal; generating an adjustment signal based at least on information associated with the comparison signal and the clock signal. Additionally, the method includes receiving the adjustment signal; and outputting the drive signal based on at least information associated with the adjustment signal to affect the first current flowing through the primary winding.

In accordance with yet another embodiment, a system for adjusting a power converter (eg, as shown in FIG. 41 or 43) includes a first signal generator (eg, as shown by demagnetization detecting element 4150) configured to receive a first sense The signal is measured (e.g., as indicated by signal 4143) and a first output signal associated with demagnetization is generated (e.g., as indicated by signal 4151). The first sense signal is associated with a first winding coupled to a secondary winding of the power converter, and the secondary winding is associated with at least an output current of the power converter. Additionally, the system includes a peak detector (e.g., as shown by cycle-by-cycle peak detector 4136) configured to receive a drive signal (e.g., as indicated by signal 4193) and a second sense signal (e.g., as indicated by signal 4147). And generate a peak signal (eg, as shown by signal 4137). The second sense signal is associated with a first current flowing through a primary winding coupled to a secondary winding of the power converter, and a second signal generator (eg, as shown by integrator 4170) is configured to The drive signal, the first output signal, and the peak signal are received and a second output signal is generated (eg, as indicated by signal 4172). Moreover, the system includes an amplifier (eg, as shown by transconductance amplifier 4134) configured to receive the second output signal and a threshold signal (eg, as shown by signal 4135) and to generate a third output signal through the capacitor (eg, As shown by signal 4181), a third signal generator (eg, as shown by multiplier 4184) is configured to receive the third output signal and the first input signal (eg, For example, as shown by signal 4183) and a fourth output signal is generated (e.g., as indicated by signal 4185). The capacitor is coupled to the amplifier, the first input signal being proportional to a second input signal received by the primary winding (e.g., as indicated by signal 4113). Additionally, the system includes a comparator (eg, as shown by comparator 4182) configured to receive the fourth output signal and the second sense signal and generate a comparison signal (eg, as indicated by signal 4187); the fourth signal A generator (eg, as shown by a combination of AND gate 4166 and flip-flop element 4190) is configured to receive at least the comparison signal and a clock signal (eg, as shown by signal 4162) and generate an adjustment signal (eg, as signal 4168) Shown). Additionally, the system includes a gate driver (e.g., as shown by signal 4192) configured to receive the adjustment signal and output the drive signal to the peak detector, the second signal generator, and the switch. The switch is configured to affect the first current flowing through the primary winding.

In accordance with yet another embodiment, a method for adjusting a power converter (eg, as implemented in FIG. 41 or 43) includes receiving a first sensed signal. The first sense signal is associated with a first winding coupled to a secondary winding of the power converter, and the secondary winding is associated with at least an output current of the power converter. Additionally, the method includes generating a first output signal associated with demagnetization; receiving the drive signal and the second sense signal. The second sense signal is associated with a first current flowing through a primary winding coupled to a secondary winding of the power converter. Moreover, the method includes processing information associated with the drive signal and the second sensed signal; generating a peak signal based on at least information associated with the drive signal and the second sensed signal. Additionally, the method includes receiving the drive signal, the first output signal, and the peak signal; processing information associated with the drive signal, the first output signal, and the peak signal; at least based on The information associated with the drive signal, the first output signal, and the peak signal produces a second output signal. Additionally, the method includes receiving the second output signal and a threshold signal; processing information associated with the second output signal and the threshold signal; at least based on being associated with the second output signal and the threshold signal The information generates a third output signal; the third output signal and the first input signal are received. The first input signal is proportional to a second input signal received by the primary winding. Additionally, the method includes processing information associated with the third output signal and the first input signal; generating a fourth output signal based on at least information associated with the third output signal and the first input signal Receiving the fourth output signal and the second sensing signal; processing information associated with the fourth output signal and the second sensing signal; at least And comparing the information associated with the fourth output signal and the second sensing signal to generate a comparison signal. Moreover, the method includes receiving at least the comparison signal and a clock signal; processing information associated with the comparison signal and the clock signal; generating an adjustment signal based at least on information associated with the comparison signal and the clock signal . Additionally, the method includes receiving the adjustment signal; and outputting the drive signal based on at least information associated with the adjustment signal to affect the first current flowing through the primary winding.

In accordance with yet another embodiment, a system for adjusting a power converter (eg, as shown in FIG. 44 or 45) includes a first signal generator (eg, as shown by demagnetization detecting element 4450) configured to receive a first A sense signal (eg, as shown by signal 4443) and produces a first output signal associated with demagnetization (eg, as indicated by signal 4451). The first sense signal is associated with a first winding coupled to a secondary winding of the power converter, and the secondary winding is associated with at least an output current of the power converter. Additionally, the system includes a peak detector (e.g., as shown by cycle-by-cycle peak detector 4436) configured to receive a drive signal (e.g., as shown by signal 4493) and a second sense signal (e.g., as indicated by signal 4447). And generate a peak signal (eg, as shown by signal 4437). The second sense signal is associated with a first current flowing through a primary winding coupled to a secondary winding of the power converter. Moreover, the system includes a second signal generator (eg, as shown by integrator 4470) configured to receive at least the drive signal, the first output signal, and the peak signal, and to generate a second output signal (eg, As shown by signal 4472; an amplifier (eg, as shown by transconductance amplifier 4434) configured to receive the second output signal and a threshold signal (eg, as shown by signal 4435) and to generate a third output signal through the capacitor The capacitor is coupled to the amplifier (e.g., as shown by signal 4481). Additionally, the system includes a third signal generator (eg, as shown by a combination of switch 4426, amplifier 4428, and multiplier 4484) configured to receive the first sensed signal, the third output signal, and the drive And generating a fourth output signal (eg, as shown by signal 4485); a comparator (eg, as shown by comparator 4482) configured to receive the fourth output signal and the second sense signal and generate a comparison signal. Additionally, the system includes a fourth signal generator (eg, as shown by a combination of AND gate 4466 and flip-flop element 4490) configured to receive at least the comparison signal and clock signal (eg, as indicated by signal 4462) and generate Adjusting the signal (eg, as indicated by signal 4468); a gate driver (eg, as shown by drive element 4492) configured to receive the adjustment signal and to the peak detector, the second signal generator, the A third signal generator and switch outputs the drive signal, the switch configured to affect the first current flowing through the primary winding.

In accordance with yet another embodiment, a method for adjusting a power converter (eg, as implemented in FIG. 44 or 45) includes receiving a first sensed signal. The first sense signal is associated with a first winding coupled to a secondary winding of the power converter, and the secondary winding is associated with at least an output current of the power converter. Additionally, the method includes generating a first output signal associated with demagnetization; receiving the drive signal and the second sense signal. The second sense signal is associated with a first current flowing through a primary winding coupled to a secondary winding of the power converter. Moreover, the method includes processing information associated with the drive signal and the second sensed signal; generating a peak signal based on at least information associated with the drive signal and the second sensed signal. Additionally, the method includes receiving the drive signal, the first output signal, and the peak signal; processing information associated with the drive signal, the first output signal, and the peak signal; at least based on The information associated with the drive signal, the first output signal, and the peak signal produces a second output signal. Additionally, the method includes receiving the second output signal and a threshold signal; processing information associated with the second output signal and the threshold signal; at least based on being associated with the second output signal and the threshold signal The information produces a third output signal. Additionally, the method includes receiving the first sensed signal, the third output signal, and the drive signal; processing associated with the first sensed signal, the third output signal, and the drive signal Information; generating a fourth output signal based on at least information associated with the first sensed signal, the third output signal, and the drive signal. Additionally, the method includes receiving the fourth output signal and the second sensed signal; processing information associated with the fourth output signal and the second sensed signal; based at least on the fourth output The information associated with the signal and the second sensed signal produces a comparison signal. Moreover, the method includes receiving at least the comparison signal and a clock signal; processing information associated with the comparison signal and the clock signal; generating an adjustment signal based at least on information associated with the comparison signal and the clock signal . Moreover, the method includes receiving the adjustment signal; and outputting the drive signal based on at least information associated with the adjustment signal to affect the first current flowing through the primary winding.

According to yet another embodiment, a system for adjusting a power converter (eg, as shown in FIG. 33, FIG. 39, FIG. 40, FIG. 41, FIG. 43, FIG. 44, or FIG. 45) includes a first signal generator (eg, As shown by demagnetization detecting element 3350, configured to receive the first sensing signal and generate an output signal associated with demagnetization. The first sense signal is associated with a first winding coupled to a secondary winding of the power converter, and the secondary winding is associated with at least an output current of the power converter. Additionally, the system includes a peak detector (eg, as shown by cycle-by-cycle peak detector 3336) configured to receive the drive signal and the second sense signal and generate a peak signal (eg, as indicated by signal 3337). The second sense signal is associated with a first current flowing through a primary winding coupled to a secondary winding of the power converter. Moreover, the system includes a second signal generator (eg, as shown by a combination of element 3366 and flip-flop element 3390) configured to process at least the output signal (eg, as shown by signal 3351) and the peak signal (eg, as indicated by signal 3337) associated information, and generating an adjustment signal (eg, as indicated by adjustment signal 3368); and a gate driver (eg, as shown by drive element 3392) configured to receive the adjustment signal And outputting the drive signal to at least the peak detector and the switch. The switch is configured to affect the first current flowing through the primary winding. The drive signal is associated with a switching period (eg, T _s ), and the output signal is associated with a demagnetization duration (eg, T _Demag ). The demagnetization duration is equal to the demagnetization peak after being multiplied by the peak signal in magnitude. The system is also configured to maintain the switching period constant such that the average magnitude of the demagnetization peak remains constant during a first duration (eg, T) and the output current is held constant.

In accordance with yet another embodiment, a method for adjusting a power converter (eg, as implemented in Figures 33, 39, 40, 41, 43, 44, or 45) includes receiving a first sensed signal. The first sense signal is associated with a first winding coupled to a secondary winding of the power converter, and the secondary winding is associated with at least an output current of the power converter. Additionally, the method includes generating an output signal associated with demagnetization; receiving the drive signal and the second sense signal. The second sense signal is associated with a first current flowing through a primary winding coupled to a secondary winding of the power converter. Additionally, the method includes processing information associated with the drive signal and the second sensed signal; generating a peak signal based on at least information associated with the drive signal and the second sensed signal; Deriving information associated with the output signal and the peak signal; generating an adjustment signal based at least on information associated with the output signal and the peak signal. Moreover, the method includes receiving the adjustment signal; and outputting the drive signal based on at least information associated with the adjustment signal to affect the first current flowing through the primary winding. The drive signal is associated with a switching period (eg, T _s ), and the output signal is associated with a demagnetization duration (eg, T _Demag ). The demagnetization duration is equal to the demagnetization peak after being multiplied by the peak signal in magnitude. The switching period is kept constant such that the average magnitude of the demagnetization peak remains constant during a first duration (eg, T) and the output current is held constant.

Although a particular embodiment of the invention has been described, it will be understood by those skilled in the art that <RTIgt; Therefore, it is to be understood that the invention is not limited by the particular embodiment shown, but only by the scope of the appended claims.

110‧‧‧PWM controller

500‧‧‧Switch Mode Power Conversion System

502‧‧‧Primary winding

504‧‧‧Secondary winding

506‧‧‧Auxiliary winding

508, 514, 528‧‧‧ output signals

510, 512, 580‧‧‧ resistors

516, 530, 552, 566‧‧‧ terminals

520, 522, 532, 534, 538, 540, 542, 546, 568‧‧‧ components

524‧‧‧Error amplifier

526‧‧‧ capacitor

532‧‧‧Load-compensated components

536, 556, 564, 570, 572, 574‧‧ signals

544, 558, 592‧‧‧ control signals

548‧‧‧Drive signal

550‧‧‧ switch

554‧‧‧ diode

560‧‧‧clock signal

562‧‧‧Oscillator

582‧‧‧ Current

590‧‧‧ wafer

592‧‧‧Control signal

610, 620, 630, 640, 650, 660‧‧‧ waveforms

910, 920‧‧ ‧ capacitor

912, 922‧‧‧ nodes

930‧‧‧monostable device

1010, 1020, 1030, 1040, 1050, 1060, 1070‧‧‧ waveforms

1110, 1120, 1130, 1140, 1150‧‧‧ waveforms

1210, 1260, 1310, 1520‧‧‧ components

1220‧‧‧ Transconductance amplifier

1230‧‧‧current source

1240‧‧‧Voltage to Current Converter

1250‧‧ ‧ constant flow source

1320‧‧‧ Transconductance amplifier

1330‧‧‧ Current trough

1340‧‧‧Voltage to Current Converter

1350, 1360‧‧‧ resistors

1510‧‧‧Voltage to Current Converter

1512, 1522, 1534‧‧‧ signals

1530‧‧‧ phase-locked loop

1532, 1612, 1614‧‧‧ clock signals

1610‧‧‧clock divider

1620‧‧‧ pulse copy circuit

1622‧‧‧NAND (Reverse) Gate

1624, 1626‧‧‧MOS transistor

1628‧‧‧ capacitor

1629, 1634, 1636‧‧ signals

1630‧‧‧ phase detector

1632‧‧‧D trigger

1640‧‧‧Charge pump

1642‧‧‧ capacitor

1644‧‧‧ Current signal

1650‧‧‧ self-calibrating circuit

1654‧‧‧ Current

1660‧‧‧clock signal

1710, 1720, 1730, 1740, 1750‧‧‧ waveforms

1810‧‧‧High speed comparator

1812‧‧‧Comparative signal

1820‧‧‧Charge pump

1822‧‧‧RS latch

1824‧‧‧ capacitor

1826‧‧‧ voltage signal

1830‧‧‧Dynamic Threshold Generator

1832‧‧‧ Dynamic current signal

1834‧‧‧Dynamic Resistors

1835‧‧‧ voltage signal

1836‧‧‧linear resistor

1838, 1839‧‧‧Optoelectronics

1840‧‧‧OCP comparator

2000‧‧‧Power Conversion System

2010‧‧‧Primary winding

2012‧‧‧Secondary winding

2014‧‧‧Auxiliary winding

2020‧‧‧Power switch

2030‧‧‧ Current sensing resistor

2040‧‧‧ equivalent resistor for output cable

2050, 2052‧‧‧ resistors

2054‧‧‧ nodes

2060, 2062‧ ‧ rectifying diode

2100‧‧‧Power Conversion System

2110‧‧‧Primary winding

2111‧‧‧ Current

2112‧‧‧Secondary winding

2114‧‧‧Auxiliary winding

2120, 2122, 2124‧‧‧ resistors

2130‧‧‧Switch

2142, 2144, 2146‧‧‧ terminals

2143‧‧‧Feedback signal

2147‧‧‧Sensing signal

2150‧‧‧Demagnetization detection element

2151‧‧‧ signal

2160‧‧‧current source

2162‧‧‧ Current trough

2164, 2166‧‧ ‧ switch

2165‧‧‧Ramp signal

2170‧‧‧NOT gate

2171‧‧‧ signal

2172‧‧‧ capacitor

2180, 2182‧‧‧ comparator

2181, 2183, 2211‧‧‧ threshold signal

2185‧‧‧Control signal

2187‧‧‧Comparative signal

2190‧‧‧Flip-flop components

2191‧‧‧Adjustment signal

2192‧‧‧Drive components

2193‧‧‧Drive signal

2210‧‧‧ Comparator

2220, 2222‧‧‧ trigger components

2230, 2232‧‧‧NOT gate

2240‧‧‧AND gate

2310, 2320, 2330, 2340, 2350, 2360‧‧‧ waveforms

2400‧‧‧Switch Mode Power Conversion System

2414, 2444, 2448, 2460, 2464, 2474‧‧‧ signals

2416, 2452, 2466‧‧‧ terminals

2420, 2422, 2438, 2440, 2446‧‧‧ components

2448‧‧‧ signal

2462‧‧‧Oscillator

2490‧‧‧ wafer

2510‧‧‧Voltage to Current Converter

2512, 2522, 2612, 2614, 2629, 2644, 2660‧ ‧ signals

2520‧‧‧ components

2610‧‧‧clock divider

2620‧‧‧Pulse copy circuit

2635‧‧‧ Phase detector and charge pump

2680, 2682, 2684, 2686, 2688‧‧‧ waveforms

2710‧‧‧ comparator

2712, 2726‧‧‧ signals

2722‧‧‧Logical Control Components

2724‧‧‧Charge pump

2730‧‧‧Dynamic Threshold Generator

2735‧‧‧Adjustment signal

2740‧‧‧OCP comparator

2780, 2782, 2784, 2786, 2790, 2792, 2794, 2796‧‧‧ waveforms

2800‧‧‧Power Conversion System

2810‧‧‧Primary winding

2811‧‧‧ Current

2812‧‧‧Secondary winding

2813‧‧‧ Input signal

2814‧‧‧Auxiliary winding

2815‧‧‧AC input signal

2820, 2822, 2824‧‧‧ resistors

2830‧‧‧Switch

2832‧‧‧Slope generator

2833‧‧‧Ramp signal

2834‧‧‧Transconductance amplifier

2835‧‧‧ reference signal

2836‧‧‧cycle-by-cycle peak detector

2837‧‧‧peak signal

2838‧‧‧Rising edge blanking element

2840‧‧‧ wafer

2842, 2844, 2846, 2848 ‧ ‧ terminals

2843‧‧‧Feedback signal

2847‧‧‧Sensing signal

2850‧‧‧Demagnetization detection element

2851‧‧‧ Demag signal

2858, 2872‧‧ ‧ capacitor

2860‧‧‧current source

2862‧‧‧ Current trough

2864, 2866‧‧ ‧ switch

2865‧‧‧Ramp signal

2870‧‧‧NOT gate

2871, 2874, 2881‧‧ signals

2880, 2882‧‧‧ comparator

2883‧‧‧ threshold signal

2885‧‧‧Control signal

2887‧‧‧Comparative signal

2890‧‧‧Flip-flop components

2891‧‧‧Adjustment signal

2892‧‧‧Drive components

2893‧‧‧Drive signal

2910, 2920, 2922, 2930, 2940,

2950, 2960, 2970, 2980, 2990‧‧‧ waveforms

3010‧‧‧ Comparator

3020, 3022, 3024‧‧ ‧ switch

3023, 3031‧‧ signals

3030‧‧‧buffer

3040, 3042‧‧ ‧ capacitor

3050‧‧‧current source

3060‧‧‧monostable generator

3062, 3064‧‧‧ signals

3110, 3120, 3130, 3140, 3150, 3160, 3170‧‧‧ waveforms

3200‧‧‧Power Conversion System

3210‧‧‧ capacitor

3213‧‧‧DC input signal

3215‧‧‧AC input signal

3220‧‧‧ capacitor

3230‧‧‧Resistors

3240‧‧‧Inductors

3300‧‧‧Power Conversion System

3310‧‧‧Primary winding

3311‧‧‧ Current

3312‧‧‧Secondary winding

3313‧‧‧ Input signal

3314‧‧‧Auxiliary winding

3315‧‧‧AC input signal

3317‧‧‧Input current

3320, 3322, 3324‧‧‧ resistors

3330‧‧‧Switch

3334‧‧‧Transconductance amplifier

3335‧‧‧ reference signal

3336‧‧‧ Cycle-by-cycle peak detector

3337‧‧‧peak signal

3338‧‧‧Rising edge blanking element

3340‧‧‧ wafer

3342, 3344, 3346, 3348‧‧‧ terminals

3343‧‧‧ feedback signal

3347‧‧‧Sensing signal

3350‧‧‧Demagnetization detection element

3351‧‧‧ Demag signal

3358‧‧‧ capacitor

3360‧‧‧Oscillator

3362‧‧‧clock signal

3364‧‧‧Ramp signal

3366‧‧‧AND gate

3368‧‧‧Adjustment signal

3370‧‧‧ integrator

3372‧‧‧ signal

3381‧‧‧ voltage signal

3382‧‧‧ Comparator

3385‧‧‧Comparative signal

3390‧‧‧Flip-flop components

3391‧‧‧Signal

3392‧‧‧Drive components

3393‧‧‧Drive signal

3420, 3422, 3424‧‧ ‧ switch

3423, 3431‧‧ signals

3430‧‧‧buffer

3440, 3442‧‧ ‧ capacitor

3450, 3452, 3454‧‧‧ transistors

3460‧‧Amplifier

3461, 3463‧‧ signals

3462‧‧‧monostable generator

3470‧‧‧Resistors

3510, 3520, 3530, 3540, 3550, 3560, 3570, 3580‧‧‧ waveforms

3610, 3620, 3630‧‧‧ reference signals

3640‧‧‧Resistors

3650‧‧‧ capacitor

Waveforms of 3710, 3720, 3730, 3740, 3742, 3750, 3760, 3770, 3780, 3810, 3820‧‧‧

3900‧‧‧Power Conversion System

3910, 3920‧‧ ‧ capacitor

3913‧‧‧DC input signal

3915‧‧‧AC input signal

3930‧‧‧Resistors

3940‧‧‧Inductors

4010‧‧‧Lighting diode

4100‧‧‧Power Conversion System

4110‧‧‧Primary winding

4111‧‧‧ Current

4112‧‧‧Secondary winding

4113‧‧‧ Input signal

4114‧‧‧Auxiliary winding

4115‧‧‧AC input signal

4117‧‧‧ Current

4120, 4122, 4124, 4126, 4128‧‧‧ resistors

4130‧‧‧Switch

4134‧‧‧Transconductance amplifier

4135‧‧‧ reference signal

4136‧‧‧ Cycle-by-cycle peak detector

4137‧‧‧peak signal

4138‧‧‧Rising edge blanking element

4140‧‧‧ wafer

4142, 4144, 4146, 4148, 4149‧‧‧ terminals

4143‧‧‧Feedback signal

4147‧‧‧Sensing signal

4150‧‧‧Demagnetization detection element

4151‧‧‧ Demag signal

4158‧‧‧ capacitor

4160‧‧‧Oscillator

4162‧‧‧clock signal

4166‧‧‧AND gate

4168‧‧‧Adjustment signal

4170‧‧‧ integrator

4172‧‧‧ Output signal

4181‧‧‧ voltage signal

4182‧‧‧ Comparator

4183‧‧‧ signal

4184‧‧‧Multiplier

4185, 4187, 4191‧‧ signals

4190‧‧‧Flip-flop components

4192‧‧‧ drive components

4193‧‧‧Drive signal

4210, 4220, 4230, 4240, 4242, 4250, 4260, 4262, 4270, 4280‧‧‧ waveforms

4310‧‧‧Lighting diode

4400‧‧‧Power Conversion System

4410‧‧‧Primary winding

4412‧‧‧Secondary winding

4413‧‧‧ Input voltage

4414‧‧‧Auxiliary winding

4415‧‧‧AC input signal

4419‧‧‧Auxiliary voltage

4420, 4422, 4424‧‧‧ resistors

4426, 4430‧‧ ‧ switch

4428‧‧Amplifier

4434‧‧‧Transconductance amplifier

4435, 4437, 4447‧‧‧ signals

4436‧‧‧ Cycle-by-cycle peak detector

4438‧‧‧Rising edge blanking element

4440‧‧‧ wafer

4442, 4444, 4446, 4448‧‧‧ terminals

4443‧‧‧Feedback signal

4450‧‧‧Demagnetization detection element

4451, 4462, 4468, 4472‧‧ signals

4458‧‧‧ capacitor

4460‧‧‧Oscillator

4466‧‧‧AND gate

4470‧‧‧ integrator

4481‧‧‧ voltage signal

4482‧‧‧ Comparator

4483‧‧‧ Current signal

4484‧‧‧Multiplier

4485‧‧‧ Output signal

4490‧‧‧Flip-flop components

4492‧‧‧Drive components

4493‧‧‧Drive signal

4510‧‧‧Lighting diode

1 is a simplified conventional diagram for a switch mode flyback power conversion system with secondary side control; FIG. 2 is a simplified conventional diagram showing output voltage and output current characteristics of a flyback power conversion system; 3 is a simplified conventional diagram of a switch mode flyback power conversion system with primary side sensing and regulation; and FIG. 4 is another simplified conventional diagram of a switch mode flyback power conversion system with primary side sensing and regulation Figure 5 is yet another simplified conventional diagram of a switch mode flyback power conversion system with primary side sensing and regulation; Figure 6 is a simplified diagram showing the conventional operating mechanism of a flyback power conversion system; Is a simplified diagram of a switched mode power conversion system having primary side sensing and adjustment in accordance with an embodiment of the present invention; and FIG. 8 is a signal sampling and hold performed by an element that is part of a switched mode power conversion system in accordance with an embodiment of the present invention. Simplified timing diagram of FIG. 9 is a simplified diagram showing certain elements for output voltage adjustment of a switched mode power conversion system in accordance with an embodiment of the present invention; FIG. A switch mode power conversion system according to the embodiment of the present invention, elements of the embodiment for generating a simplified diagram of a part of some apparatus Demag signal; FIG. 11 is a diagram illustrating a part of the element according to the embodiment of a switch mode power conversion system according to the present invention A simplified diagram of some of the apparatus for generating a Sampling_clk signal; FIG. 12 is a simplified timing diagram showing the generation of a Sampling_clk signal as an element of a portion of a switched mode power conversion system in accordance with an embodiment of the present invention; A simplified timing diagram of a switched mode power conversion system in accordance with another embodiment of the present invention; and FIG. 14(a) is a simplified diagram showing certain components of an element and an error amplifier as part of a switched mode power conversion system in accordance with an embodiment of the present invention. Figure 14 (b) is a simplified diagram showing some of the devices as a current source for a portion of the components in a switched mode power conversion system in accordance with an embodiment of the present invention; Figure 15 (a) is shown as A simplified diagram of some of the components of the switched mode power conversion system and certain devices of the error amplifier of another embodiment of the invention; Figure 15(b) A simplified diagram showing certain devices that are current sources that are part of the elements of a switched mode power conversion system in accordance with an embodiment of the present invention; FIG. 16 is a diagram showing portions of a switched mode power conversion system in accordance with an embodiment of the present invention. A simplified diagram of a CMOS implementation of components and error amplifiers; FIG. 17 is a simplified diagram showing certain devices of components that are part of a switched mode power conversion system in accordance with an embodiment of the present invention; A simplified diagram of some of the apparatus for constant output current (CC) control of a portion of a switched mode power conversion system of an embodiment of the invention; FIG. 19 is for use as a switched mode power conversion system in accordance with an embodiment of the present invention A portion of the pulse copy circuit produces a simplified timing diagram of the D2C signal; FIG. 20 is a diagram showing certain components for current sensing (CS) peak adjustment as part of a switched mode power conversion system 500 in accordance with an embodiment of the present invention. A simplified diagram of a device; FIG. 21 is a switch mode power conversion system with primary side sensing and adjustment in accordance with yet another embodiment of the present invention. Figure 22 is a simplified diagram of a demagnetization detecting element as part of a switched mode power conversion system in accordance with an embodiment of the present invention; and Figure 23 is a demagnetization detection as shown in Figures 21 and 22 in accordance with an embodiment of the present invention. FIG. 24 is a simplified pictorial diagram of a switched mode power conversion system having primary side sensing and adjustment in accordance with another embodiment of the present invention; FIG. 25 is a diagram showing implementation as a method in accordance with the present invention; A simplified diagram of some of the apparatus for current sensing (CS) peaking of a portion of a switched mode power conversion system; FIG. 26 is a simplified timing diagram of a switched mode power conversion system in accordance with an embodiment of the present invention; 27 is a simplified timing diagram of elements for current sensing (CS) peak adjustment, respectively, as part of a switched mode power conversion system, in accordance with some embodiments of the present invention; FIG. 28 is a primary side feel in accordance with yet another embodiment of the present invention. A simplified diagram of a measured and adjusted switched mode power conversion system; FIG. 29 is a simplified diagram of a switched mode power conversion system in accordance with an embodiment of the present invention. Figure 30 is a simplified diagram of a cycle-by-cycle peak detector as part of a power conversion system in accordance with an embodiment of the present invention; Figure 31 is a simplified timing of a cycle-by-cycle peak detector as part of a power conversion system in accordance with an embodiment of the present invention; Figure 32 is a simplified diagram of a switched mode power conversion system with primary side sensing and adjustment in accordance with yet another embodiment of the present invention; Figure 33 is a switch mode with primary side sensing and adjustment in accordance with yet another embodiment of the present invention. A simplified diagram of a power conversion system; FIG. 34 is a simplified diagram of an integrator as part of a power conversion system in accordance with an embodiment of the present invention; and FIG. 35 includes an integrator as shown in FIGS. 33 and 34 in accordance with an embodiment of the present invention. Simplified timing diagram of a switched mode power conversion system; FIG. 36 is a simplified diagram of an oscillator as part of a power conversion system in accordance with an embodiment of the present invention; and FIG. 37 is a simplified timing diagram of a switched mode power conversion system in accordance with an embodiment of the present invention. Figure 38 is a simplified timing diagram of certain currents of a switched mode power conversion system in accordance with an embodiment of the present invention; Figure 39 is based on A further simplified embodiment of a switch mode power conversion system having primary side sensing and adjustment; and FIG. 40 is a simplified illustration of a switched mode power conversion system for powering a light emitting diode in accordance with yet another embodiment of the present invention. Figure 41 is a simplified diagram of a switched mode power conversion system with primary side sensing and adjustment in accordance with yet another embodiment of the present invention; and Figure 42 is a simplified timing diagram of a switched mode power conversion system in accordance with an embodiment of the present invention; 43 is a simplified diagram of a switched mode power conversion system for powering a light emitting diode in accordance with yet another embodiment of the present invention; and FIG. 44 is a switch mode power conversion having primary side sensing and adjustment in accordance with yet another embodiment of the present invention. A simplified diagram of a system; and FIG. 45 is a simplified diagram of a switched mode power conversion system for powering a light emitting diode in accordance with yet another embodiment of the present invention.

500. . . Switch mode power conversion system

502. . . Primary winding

504. . . Secondary winding

506. . . Auxiliary winding

508, 514, 528. . . output signal

510, 512, 580. . . Resistor

516, 530, 552, 566. . . Terminal

520, 522, 534, 538, 540, 542, 546, 568. . . element

524. . . Error amplifier

526. . . Capacitor

532. . . Load compensated component

536, 556, 564, 570, 572, 574. . . signal

544, 558, 592. . . control signal

548. . . Drive signal

550. . . switch

560. . . Clock signal

562. . . Oscillator

582. . . Current

590. . . Wafer

Claims (62)

A system for adjusting a power converter, the system comprising: a first signal generator configured to receive a first sensed signal and generate an output signal associated with the demagnetization, the first sensed signal coupled to a first winding of a primary winding of a power converter, the secondary winding being associated with at least one output current of the power converter; a ramp signal generator configured to receive the output signal and generate a ramp signal; a first comparator configured to receive the ramp signal and a first threshold signal and generate a first comparison signal based on at least information associated with the ramp signal and the first threshold signal; a second comparator configured Receiving a second sensing signal and a second threshold signal and generating a second comparison signal, the second sensing signal and a first current flowing through a primary winding coupled to the primary winding of the power converter Corresponding; a second signal generator configured to receive at least the first comparison signal and the second comparison signal and generate an adjustment signal; and a gate drive Configuring to receive the adjustment signal and output a drive signal to a switch, the switch configured to affect the first current flowing through the primary winding; wherein: the output signal is associated with a demagnetization duration; the drive signal and the switch The cycle is associated; and the system is further configured to maintain a constant ratio of the demagnetization duration to the switching cycle. The system of claim 1, further configured to maintain a peak of the second sensed signal constant in size. The system of claim 2, further configured to maintain the output current constant. The system of claim 1, wherein: the ramp signal generator comprises a capacitor, a current source and a current sink; wherein: the capacitor is configured to pass when the output signal is at a first logic level The current sink is discharged and is charged by the current source when the output signal is at a second logic level; and the capacitor is further configured to output the ramp signal. The system of claim 4, wherein: the first logic level is a logic high level; and the second logic level is a logic low level. The system of claim 1, wherein the second signal generator comprises a flip-flop element. A method for adjusting a power converter, the method comprising: receiving a first sense signal associated with a first winding coupled to a primary winding of a power converter, the secondary The winding is associated with at least one output current of the power converter; generating an output signal based on at least information associated with the first sensed signal, the output signal being associated with demagnetization; receiving the output signal; based at least on the output signal The associated information generates a ramp signal; receiving the ramp signal and a first threshold signal; processing information associated with the ramp signal and the first threshold signal; at least based on correlating with the ramp signal and the first threshold signal The information generates a first comparison signal; receiving a second sensing signal and a second threshold signal, the second sensing signal and a first current flowing through a primary winding coupled to the primary winding of the power converter Correlating current; processing information associated with the second sensing signal and the second threshold signal; based at least on the second sensing signal and the second threshold signal The associated information generates a second comparison signal; receiving the first comparison signal and the second comparison signal; processing information associated with the first comparison signal and the second comparison signal; based at least on the first comparison signal And the information associated with the second comparison signal generates an adjustment signal; receiving the adjustment signal; and outputting a drive signal to a switch based on at least information associated with the adjustment signal to affect the first flow through the primary winding a current; wherein: the output signal is associated with a demagnetization duration; the drive signal is associated with a switching period; and the ratio of the demagnetization duration to the switching period is maintained constant. A system for adjusting a power converter, the system comprising: a first signal generator configured to receive at least one input signal and at least generate an output signal associated with demagnetization, the input signal being coupled to at least a power converter An output current is associated; a first controller configured to receive at least the output signal and to generate at least a first control signal based on at least information associated with the output signal; a second controller configured to receive a a first sensing signal and a first threshold signal and generating a second control signal, the first sensing signal being associated with a first current flowing through a primary winding of the power converter; an oscillator configured to Receiving at least the first control signal and generating at least one clock signal based on at least information associated with the first control signal; a second signal generator configured to receive at least the clock signal and the second control signal, and Generating at least one adjustment signal; and a gate driver configured to receive at least the adjustment signal and output at least one drive to a switch No. the switch is configured to affect the first current flowing through the primary winding; wherein: the output signal is associated with a demagnetization duration; and the drive signal is associated with a switching period; wherein the system is further configured to: The ratio of the demagnetization duration to the switching period remains constant; and the peak of the first sensing signal is kept constant in magnitude. The system of claim 8, further comprising: a compensation component configured to generate at least one compensation signal; wherein: the input signal is a combination of the compensation signal and a second sensing signal; The sense signal is associated with a first winding coupled to the primary winding of the power converter; and the secondary winding is associated with at least the output current of the power converter. A method for adjusting a power converter, the method comprising: receiving at least an input signal, the input signal being associated with at least one output current of a power converter; generating at least one output based on at least information associated with the input signal a signal related to demagnetization; receiving at least the output signal; processing information associated with the output signal; generating at least one clock signal based on at least information associated with the output signal; receiving a sensing signal and a threshold a signal associated with a first current flowing through a primary winding of the power converter; processing information associated with the sensed signal and the threshold signal; based at least on the sensed signal and the threshold The signal associated information generates a control signal; receives at least the clock signal and the control signal; processes information associated with the clock signal and the control signal; at least based on information associated with the clock signal and the control signal Generating an adjustment signal; receiving at least the adjustment signal; based at least on an association associated with the adjustment information Transmitting at least one drive signal to a switch to affect the first current flowing through the primary winding; wherein: the output signal is associated with a demagnetization duration; the drive signal is associated with a switching period; causing the demagnetization duration The ratio to the switching period is kept constant; and the peak value of the sensing signal is kept constant in magnitude. A system for adjusting a power converter, the system comprising: a first signal generator configured to receive a first sensed signal and generate a first output signal associated with the demagnetization, the first sensed signal and Coupled to a first winding of a primary winding of a power converter, the secondary winding being associated with at least one output current of the power converter; a first ramp signal generator configured to receive the first output signal and generate a first ramp signal; a first comparator configured to receive the first ramp signal and a first threshold signal, and based at least on The first ramp signal and the information associated with the first threshold signal generate a first comparison signal; a peak detector configured to receive a drive signal and a second sense signal and generate a peak signal, the second sense A signal is associated with a first current coupled to a primary winding of the power converter; an amplifier configured to receive the peak signal and a second threshold signal and to generate a second output signal through a capacitor, the capacitor Coupled to the amplifier; a second comparator configured to receive the second output signal and a second ramp signal and to generate a second comparison signal; a second signal generator configured to receive the first comparison And the second comparison signal, and generating an adjustment signal; and a gate driver configured to receive the adjustment signal and detect the peak And a switch outputting the drive signal, the switch is arranged to affect the first current flowing through the primary winding. The system of claim 11, wherein: the first output signal is associated with a demagnetization duration; the drive signal is associated with a switching period; and the system is further configured to cause the demagnetization duration to be associated with the switch The ratio of cycles remains constant. The system of claim 12, further configured to maintain the average size of the peak signal constant during a first duration. The system of claim 13 is further configured to maintain the output current constant. The system of claim 11, wherein the peak signal represents a peak magnitude of the second sensed signal during each switching cycle of the drive signal. The system of claim 11, wherein: the first ramp signal generator comprises a capacitor, a current source and a current sink; wherein: The capacitor is configured to be discharged through the current slot when the first output signal is at a first logic level, and to be charged by the current source when the first output signal is at a second logic level; and the capacitor is further Configure to output the first ramp signal. The system of claim 16, wherein: the first logic level is a logic high level; and the second logic level is a logic low level. The system of claim 11, wherein the second signal generator comprises a flip-flop element. The system of claim 11, further comprising a second ramp signal generator configured to generate the second ramp signal. The system of claim 11, wherein the amplifier comprises a transconductance amplifier. A method for adjusting a power converter, the method comprising: receiving a first sense signal associated with a first winding coupled to a primary winding of a power converter, the secondary The winding is associated with at least one output current of the power converter; generating a first output signal based on at least information associated with the first sensing signal, the first output signal being related to demagnetization; receiving the first output signal; Generating a first ramp signal based on the information associated with the first output signal; receiving the first ramp signal and a first threshold signal; processing information associated with the first ramp signal and the first threshold signal; Generating a first comparison signal based on the information associated with the first ramp signal and the first threshold signal; receiving a driving signal and a second sensing signal, the second sensing signal coupled to the power conversion Correlating a first current of a primary winding of the device; processing information associated with the drive signal and the second sensed signal; based at least on the drive signal and the second Information associated with the sensing signal to generate a peak signal; Receiving the peak signal and a second threshold signal; processing information associated with the peak signal and the second threshold signal; generating a second output signal based on at least information associated with the peak signal and the second threshold signal; Receiving the second output signal and a second ramp signal; processing information associated with the second output signal and the second ramp signal; generating at least based on information associated with the second output signal and the second ramp signal a second comparison signal; receiving the first comparison signal and the second comparison signal; processing information associated with the first comparison signal and the second comparison signal; based at least on the comparison with the first comparison signal and the second comparison The signal associated information produces an adjustment signal; receiving the adjustment signal; and outputting the drive signal based on at least information associated with the adjustment signal to affect the first current flowing through the primary winding. A system for adjusting a power converter, the system comprising: a first signal generator configured to receive a first sensed signal and generate an output signal associated with the demagnetization, the first sensed signal coupled to a first winding of a primary winding of a power converter associated with at least one output current of the power converter; a peak detector configured to receive a drive signal and a second sense signal And generating a peak signal, the second sense signal being associated with a first current flowing through a primary winding coupled to the power converter; a second signal generator configured to process at least the output signal and the a correlation signal associated with the peak signal and generating an adjustment signal; and a gate driver configured to receive the adjustment signal and output the drive signal to the peak detector and a switch, the switch configured to affect the current flowing through the primary winding a first current; wherein: the output signal is associated with a demagnetization duration; and the drive signal is associated with a switching period; wherein the system Configured to: The ratio of the demagnetization duration to the switching period is kept constant; and the average magnitude of the peak signal is held constant for a first duration. The system of claim 22, further configured to maintain the output current constant. A method for adjusting a power converter, the method comprising: receiving a first sense signal associated with a first winding coupled to a primary winding of a power converter, the secondary The winding is related to at least one output current of the power converter; generating an output signal based on at least information associated with the first sensing signal, the first sensing signal being related to demagnetization; receiving a driving signal and a second sense Detecting a signal; processing information associated with the drive signal and the second sense signal, the second sense signal being associated with a first current flowing through a primary winding coupled to the power converter; at least based on The information associated with the drive signal and the second sensed signal produces a peak signal; at least processing information associated with the output signal and the peak signal; generating at least one information based on the output signal and the peak signal associated with the information Adjusting the signal; receiving the adjustment signal; and outputting the drive signal to a switch based on at least information associated with the adjustment signal to affect at least the flow through the primary a first current of the group; wherein: the output signal is associated with a demagnetization duration; the drive signal is associated with a switching period; maintaining a ratio of the demagnetization duration to the switching period; and averaging the peak signal The size remains constant for a first duration. A system for adjusting a power converter, the system comprising: a first signal generator configured to receive a first sensed signal and generate a first output signal associated with the demagnetization, the first sensed signal and Coupled to a first winding of a primary winding of a power converter, the secondary winding being associated with at least an output current of the power converter; a peak detector configured to receive a drive signal and a second sense signal and to generate a peak signal, the second sense signal being associated with a first current flowing through a primary winding coupled to the power converter a second signal generator configured to receive the drive signal, the first output signal and the peak signal, and generate a second output signal; an amplifier configured to receive the second output signal and a threshold signal and pass a capacitor generates a third output signal, the capacitor is coupled to the amplifier; a comparator configured to receive the third output signal and a ramp signal and generate a comparison signal; a third signal generator configured to Receiving the comparison signal and a clock signal, and generating an adjustment signal; and a gate driver configured to receive the adjustment signal and output the driving signal to the peak detector, the second signal generator and a switch, the switch configuration To affect the first current flowing through the primary winding. The system of claim 25, wherein: the drive signal is associated with a switching cycle; and the system is further configured to maintain the switching cycle constant. The system of claim 26, wherein: the first output signal is associated with a demagnetization duration; the demagnetization duration is multiplied by the peak signal by a magnitude equal to a demagnetization peak; and the system further The configuration is such that the average size of the demagnetization peak remains constant during the first duration. The system of claim 27, further configured to maintain the output current constant. The system of claim 25, further configured to: maintain the output current constant; and maintain the power factor substantially equal to one. The system of claim 29, further configured to provide at least the output current to the one or more light emitting diodes. The system of claim 25, further comprising an oscillator configured to generate the clock signal and the ramp signal. The system of claim 25, wherein the third signal generator comprises a flip-flop element coupled to a gate. The system of claim 25, wherein the second output signal is proportional in magnitude to the demagnetization duration and the product of the peak signal. The system of claim 25, wherein the peak signal represents a peak magnitude of the second sensed signal during each switching cycle of the drive signal. The system of claim 25, wherein the amplifier comprises a transconductance amplifier. The system of claim 25, wherein the second signal generator comprises a cycle-by-cycle integrator that is reset for each switching cycle. A method for adjusting a power converter, the method comprising: receiving a first sense signal associated with a first winding coupled to a primary winding of a power converter, the secondary winding At least associated with an output current of the power converter; generating a first output signal associated with demagnetization; receiving a drive signal and a second sense signal, the second sense signal coupled to the power supply Generating a first current of a primary winding of the converter; processing information associated with the drive signal and the second sense signal; generating at least one information based on the information associated with the drive signal and the second sense signal a peak signal; receiving the driving signal, the first output signal, and the peak signal; processing information associated with the driving signal, the first output signal, and the peak signal; based at least on the driving signal, the first output signal And the information associated with the peak signal generates a second output signal; receiving the second output signal and a threshold signal; processing the second output signal and the threshold signal Associated information; based at least on a third output signal and generating the second output signal and the threshold value information associated with the signal; Receiving the third output signal and a ramp signal; processing information associated with the third output signal and the ramp signal; generating a comparison signal based on at least information associated with the third output signal and the ramp signal; receiving the Comparing a signal and a clock signal; processing information associated with the comparison signal and the clock signal; generating an adjustment signal based on at least information associated with the comparison signal and the clock signal; receiving the adjustment signal; and based at least on The information associated with the adjustment signal outputs the drive signal to affect the first current flowing through the primary winding. A system for adjusting a power converter, the system comprising: a first signal generator configured to receive a first sensed signal and generate a first output signal associated with the demagnetization, the first sensed signal and Coupled to a first winding of a primary winding of a power converter, the secondary winding being associated with at least one output current of the power converter; a peak detector configured to receive a drive signal and a second sense Measuring a signal and generating a peak signal, the second sense signal being associated with a first current flowing through a primary winding coupled to the power converter; a second signal generator configured to receive the drive signal, The first output signal and the peak signal, and generating a second output signal; an amplifier configured to receive the second output signal and a threshold signal and generate a third output signal through a capacitor, the capacitor being coupled to the An A third signal generator configured to receive the third output signal and a first input signal and generate a fourth output signal, the first The input signal is proportional to a second input signal received by the primary winding; a comparator configured to receive the fourth output signal and the second sense signal and generate a comparison signal; a fourth signal generator configured to Receiving at least the comparison signal and a clock signal and generating an adjustment signal; A gate driver configured to receive the adjustment signal and output the drive signal to the peak detector, the second signal generator, and a switch configured to affect the first current flowing through the primary winding. The system of claim 38, wherein the third signal generator comprises a multiplier for generating the fourth output signal, the fourth output signal being equal in magnitude to the third output signal multiplied by The first input signal. The system of claim 38, wherein: the drive signal is associated with a switching cycle; and the system is further configured to maintain the switching cycle constant. The system of claim 38, wherein: the first output signal is associated with a demagnetization duration; the demagnetization duration is multiplied by the peak signal to be equal in magnitude to a demagnetization peak; and the system is further The configuration is such that the average size of the demagnetization peak remains constant during the first duration. The system of claim 38, further configured to maintain the output current constant. The system of claim 38, further configured to: maintain the output current constant; and maintain the power factor substantially equal to one. The system of claim 38, further configured to provide at least the output current to the one or more light emitting diodes. The system of claim 38, wherein the second output signal is proportional in magnitude to the product of the demagnetization duration and the peak signal. The system of claim 38, wherein the peak signal represents a peak magnitude of the second sensed signal during each switching cycle of the drive signal. The system of claim 38, wherein the second signal generator comprises a cycle-by-cycle integrator that is reset for each switching cycle. A method for adjusting a power converter, the method comprising: Receiving a first sensing signal associated with a first winding coupled to a primary winding of a power converter, the secondary winding being associated with at least an output current of the power converter; generating a first output signal associated with demagnetization; receiving a drive signal and a second sense signal, the second sense signal being associated with a first current flowing through a primary winding coupled to the power converter; processing Information associated with the drive signal and the second sensed signal; generating a peak signal based on at least information associated with the drive signal and the second sensed signal; receiving the drive signal, the first output signal, and the peak a signal; processing information associated with the drive signal, the first output signal, and the peak signal; generating a second output signal based on at least information associated with the drive signal, the first output signal, and the peak signal; receiving The second output signal and a threshold signal; processing information associated with the second output signal and the threshold signal; based at least on the second output signal and the threshold The associated information generates a third output signal; receiving the third output signal and a first input signal, the first input signal being proportional to a second input signal received by the primary winding; processing and the third Generating an information associated with the first input signal; generating a fourth output signal based on at least information associated with the third output signal and the first input signal; receiving the fourth output signal and the second sensing signal Processing information associated with the fourth output signal and the second sensing signal; generating a comparison signal based on at least information associated with the fourth output signal and the second sensing signal; receiving at least the comparison signal and a clock signal; processing information associated with the comparison signal and the clock signal; generating an adjustment signal based on at least information associated with the comparison signal and the clock signal; receiving the adjustment signal; The drive signal is output based on at least information associated with the adjustment signal to affect the first current flowing through the primary winding. A system for adjusting a power converter, the system comprising: a first signal generator configured to receive a first sensed signal and generate a first output signal associated with the demagnetization, the first sensed signal and Coupled to a first winding of a primary winding of a power converter, the secondary winding being associated with at least one output current of the power converter; a peak detector configured to receive a drive signal and a second sense Measuring a signal and generating a peak signal, the second sense signal being associated with a first current flowing through a primary winding coupled to the power converter; a second signal generator configured to receive the drive signal, The first output signal and the peak signal, and generating a second output signal; an amplifier configured to receive the second output signal and a threshold signal and generate a third output signal through a capacitor, the capacitor being coupled to the An third signal generator configured to receive the first sensing signal, the third output signal, and the driving signal and generate a fourth output a comparator configured to receive the fourth output signal and the second sensing signal and generate a comparison signal; a fourth signal generator configured to receive at least the comparison signal and a clock signal and generate an adjustment signal And a gate driver configured to receive the adjustment signal and output the drive signal to the peak detector, the second signal generator, the third signal generator, and a switch configured to affect flow through the primary winding The first current. The system of claim 49, wherein the third signal generator comprises: a switch configured to receive the first sensing signal and controlled by the driving signal; a multiplier configured to output the first a four output signal; and an operational amplifier coupled to the switch and the multiplier. The system of claim 49, wherein: the drive signal is associated with a switching cycle; and the system is further configured to maintain the switching cycle constant. The system of claim 51, wherein: the first output signal is associated with a demagnetization duration; the demagnetization duration is multiplied by the peak signal to be equal in magnitude to a demagnetization peak; and the system is further The configuration is such that the average size of the demagnetization peak remains constant during the first duration. The system of claim 52, further configured to maintain the output current constant. The system of claim 49, further configured to: maintain the output current constant; and maintain the power factor substantially equal to one. The system of claim 49, further configured to provide at least the output current to the one or more light emitting diodes. The system of claim 49, wherein the second output signal is proportional in magnitude to the demagnetization duration and the product of the peak signal. The system of claim 49, wherein the peak signal represents a peak magnitude of the second sensed signal during each switching cycle of the drive signal. The system of claim 49, wherein the second signal generator comprises a cycle-by-cycle integrator that is reset for each switching cycle. A method for adjusting a power converter, the method comprising: receiving a first sense signal associated with a first winding coupled to a primary winding of a power converter, the secondary The winding is associated with at least one output current of the power converter; generating a first output signal associated with the demagnetization; receiving a drive signal and a second sense signal, the second sense signal coupled to the power supply A first current associated with a primary winding of the converter; processing information associated with the drive signal and the second sensed signal; generating a peak based on at least information associated with the drive signal and the second sensed signal Receiving the drive signal, the first output signal, and the peak signal; processing information associated with the drive signal, the first output signal, and the peak signal; Generating a second output signal based on at least information associated with the drive signal, the first output signal, and the peak signal; receiving the second output signal and a threshold signal; processing is associated with the second output signal and the threshold signal Linking information; generating a third output signal based on at least information associated with the second output signal and the threshold signal; receiving the first sensing signal, the third output signal, and the driving signal; processing and the first Sensing signal, the third output signal and information associated with the driving signal; generating a fourth output signal based on at least information associated with the first sensing signal, the third output signal, and the driving signal; receiving the a fourth output signal and the second sensing signal; processing information associated with the fourth output signal and the second sensing signal; based at least on information associated with the fourth output signal and the second sensing signal Generating a comparison signal; receiving at least the comparison signal and a clock signal; processing information associated with the comparison signal and the clock signal; based at least on the comparison signal And information associated with the clock signal to generate a conditioned signal; receiving the adjustment signal; and based on information associated with at least the adjusting signal of the output drive signal, to affect the current flowing through the first primary winding. A system for adjusting a power converter, the system comprising: a first signal generator configured to receive a first sensed signal and generate an output signal associated with the demagnetization, the first sensed signal coupled to a first winding of a primary winding of a power converter associated with at least one output current of the power converter; a peak detector configured to receive a drive signal and a second sense signal And generating a peak signal, the second sense signal being associated with a first current flowing through a primary winding coupled to the power converter; a second signal generator configured to process at least the output signal and the The information associated with the peak signal and generating an adjustment signal; a gate driver configured to receive the adjustment signal and output the drive signal to at least the peak detector and a switch, the switch configured to affect the first current flowing through the primary winding; wherein: the drive signal is related to a switching period The output signal is associated with a demagnetization duration; and the demagnetization duration is multiplied by the peak signal by a magnitude equal to a demagnetization peak; wherein the system is further configured to: maintain the switching period constant; The average magnitude of the demagnetization peak remains constant for a first duration; and the output current is held constant. The system of claim 60, further configured to maintain the power factor substantially equal to one. A method for adjusting a power converter, the method comprising: receiving a first sense signal associated with a first winding coupled to a primary winding of a power converter, the secondary The winding is associated with at least one output current of the power converter; generating an output signal associated with the demagnetization; receiving a drive signal and a second sense signal, the second sense signal coupled to the power converter Correlating a first current of a primary winding; processing information associated with the drive signal and the second sense signal; generating a peak signal based on at least information associated with the drive signal and the second sense signal Processing information associated with the output signal and the peak signal; generating an adjustment signal based at least on information associated with the output signal and the peak signal; receiving the adjustment signal; and based at least on information associated with the adjustment signal Outputting the drive signal to affect the first current flowing through the primary winding; wherein: the drive signal is associated with a switching period; the output signal is Demagnetizing duration is associated; and the demagnetization duration is multiplied by the peak signal by a magnitude equal to a demagnetization peak; wherein: the switching period is kept constant; the average magnitude of the demagnetization peak is maintained for a first duration Constant; and keep the output current constant.