TWI441341B - Multilayer ceramic devices for computer products and sintering method thereof - Google Patents

Multilayer ceramic devices for computer products and sintering method thereof Download PDF

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TWI441341B
TWI441341B TW99124808A TW99124808A TWI441341B TW I441341 B TWI441341 B TW I441341B TW 99124808 A TW99124808 A TW 99124808A TW 99124808 A TW99124808 A TW 99124808A TW I441341 B TWI441341 B TW I441341B
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ceramic
shrinkage
green body
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TW201205820A (en
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Wen Hsi Lee
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Univ Nat Cheng Kung
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用於電腦產品的積層陶瓷元件及其燒結方法Multilayer ceramic component for computer product and sintering method thereof

本案係關於一種用於電腦產品的積層陶瓷元件及其燒結方法。尤其,本案係關於利用快速的升溫速度,並以抑制燒結收縮的方式,燒結一生坯所形成的用於電腦產品的積層陶瓷元件。This case relates to a laminated ceramic component for a computer product and a sintering method thereof. In particular, the present invention relates to a laminated ceramic component for a computer product formed by sintering a green body by using a rapid heating rate and suppressing sintering shrinkage.

在資訊與無線通訊結合的市場趨勢,以及現代人對於電腦產品的多功能與高性能等要求下,各種電腦產品中的電子元件也隨之趨向更加輕薄短小或是在原尺寸下具有更好的性能。以其中的被動元件來看,積層陶瓷元件的應用範圍相當廣泛。然而,若要達到輕薄短小且同時要維持良好的電性,除了從原材料的性質進行改善外,更可由製程方向著手,改良內部的結構,使其中的內電極層以及陶瓷層薄層化,達到更好的電子元件特性。In the market trend of combining information and wireless communication, as well as the versatility and high performance of modern computer products, the electronic components in various computer products tend to be lighter, thinner or have better performance in the original size. . In terms of passive components, the application range of laminated ceramic components is quite extensive. However, in order to achieve thinness and shortness while maintaining good electrical properties, in addition to improving the properties of the raw materials, it is also possible to start with the process direction, improve the internal structure, and thin the internal electrode layer and the ceramic layer. Better electronic component characteristics.

現今的積層陶瓷元件1如第一圖(a)所示,其製作方法係透過網印的技術,將導體電極層121印製在陶瓷層122上,再利用多層堆疊的方式,經燒結製程後形成。最後於其兩端提供一電極端13,以使其可與外接電路電性連接。然而,陶瓷層122與導體電極層121本身具有不同的材料特性,將導致燒結過程中,由於開始收縮的溫度以及收縮率等差異,使得導體電極層121本身充滿著缺陷,而不具有電極的連續性。Nowadays, the laminated ceramic component 1 is as shown in the first figure (a), and the manufacturing method thereof is to print the conductor electrode layer 121 on the ceramic layer 122 by a screen printing technique, and then use a multi-layer stacking method, after the sintering process. form. Finally, an electrode terminal 13 is provided at both ends thereof so as to be electrically connected to the external circuit. However, the ceramic layer 122 and the conductor electrode layer 121 themselves have different material properties, which will cause the conductor electrode layer 121 itself to be filled with defects due to the difference in temperature at which shrinkage starts and shrinkage, etc., without continuous electrode. Sex.

為了解決電極連續性的問題,現今主要有兩種方式。首先,可透過快速升溫的方式,拉近陶瓷層122與導體電極層121之間開始收縮的時間差異,儘可能的使不同的材料同時開始收縮,以降低電極的不連續性。此外,亦可於積層陶瓷元件在未燒結前,如第一圖(b)所示的方法,以平行導體電極層121以及陶瓷層122的表面之方式,於導體電極層121以及陶瓷層122所形成的元件層12外,提供一層抑制層11的方式,其中抑制層11的開始收縮溫度高於陶瓷層122。而在燒結的過程中,選擇一個不會使抑制層11燒結的燒結溫度,使不收縮的抑制層11來抑制陶瓷層122的收縮,如此可降低陶瓷層122與導體電極層121收縮量的差異。In order to solve the problem of electrode continuity, there are mainly two ways. First, the difference in time between the start of shrinkage between the ceramic layer 122 and the conductor electrode layer 121 can be brought about by the rapid temperature rise, and the different materials can be simultaneously contracted as much as possible to reduce the discontinuity of the electrode. In addition, before the ceramic element is laminated, as shown in the first figure (b), the surface of the parallel conductor electrode layer 121 and the ceramic layer 122 may be applied to the conductor electrode layer 121 and the ceramic layer 122. Outside of the formed element layer 12, a manner of suppressing the layer 11 is provided, wherein the suppression layer 11 has a higher initial shrinkage temperature than the ceramic layer 122. In the sintering process, a sintering temperature which does not cause the suppression layer 11 to be sintered is selected, so that the shrinkage-free suppression layer 11 suppresses the shrinkage of the ceramic layer 122, so that the difference in the shrinkage amount between the ceramic layer 122 and the conductor electrode layer 121 can be reduced. .

然而上述兩種方式,仍存在著許多問題。以快速升溫來看,由於陶瓷層122的收縮率通常遠大於導體電極層121的收縮率,為了降低兩者間收縮率的差異,會於導體電極層121中加入一些陶瓷粉體,來提高導體電極層121的收縮率。然而,這將導致導體電極層121的厚度提升。在輕薄短小的元件要求下,導體電極層121的層數會因厚度的增加而受到限制,使得積層陶瓷元件無法具有較高的電性質。以抑制層11來抑制燒結收縮來看,由於抑制層11是設置在積層陶瓷元件的上下表面,因此較接近抑制層11的陶瓷層122以及較遠離抑制層11的陶瓷層122,會因抑制的力量的明顯差異,導致積層陶瓷元件因內部應力的不均勻,而使內部的晶粒尺寸大小差異極大,這將使陶瓷層122的電性質嚴重不均,因此就算是同一批製造的積層陶瓷元件,由於晶粒尺寸的不同,其電性質也產生明顯的差異,而使產品的良率明顯下降。However, there are still many problems in the above two methods. In terms of rapid temperature rise, since the shrinkage rate of the ceramic layer 122 is usually much larger than that of the conductor electrode layer 121, in order to reduce the difference in shrinkage between the two, a ceramic powder is added to the conductor electrode layer 121 to improve the conductor. The shrinkage rate of the electrode layer 121. However, this will result in an increase in the thickness of the conductor electrode layer 121. Under the requirements of light and short components, the number of layers of the conductor electrode layer 121 is limited by the increase in thickness, so that the laminated ceramic component cannot have high electrical properties. In view of suppressing the sintering shrinkage by the suppression layer 11, since the suppression layer 11 is provided on the upper and lower surfaces of the laminated ceramic element, the ceramic layer 122 closer to the suppression layer 11 and the ceramic layer 122 farther from the suppression layer 11 are suppressed. The obvious difference in strength leads to the unevenness of the internal stress of the laminated ceramic component, which makes the internal grain size difference greatly, which will make the electrical properties of the ceramic layer 122 severely uneven, so even the same batch of fabricated ceramic components Due to the difference in grain size, the electrical properties are also significantly different, and the yield of the product is significantly reduced.

本案申請人鑑於習知技術中的不足,經過悉心試驗與研究,並一本鍥而不捨之精神,終構思出本案「用於電腦產品的積層陶瓷元件及其燒結方法」,以結合抑制層抑制燒結收縮以及快速升溫燒結的特性之方法,選擇收縮率比陶瓷層小的材料作為抑制層,以快速升溫的方式升溫到陶瓷層與抑制層都會進行燒結的溫度。由於陶瓷層與抑制層都會進行燒結,這將使抑制的效果相對只有陶瓷層進行燒結來的小,然而由於快速升溫的緣故,不但可彌補抑制能力的不足,而且陶瓷層與抑制層的收縮時間差的大幅下降,能同時降低了內應力嚴重不均所導致電性分布過寬的問題。In view of the shortcomings in the prior art, the applicant of this case, after careful experimentation and research, and a perseverance spirit, finally conceived the case "the laminated ceramic component for computer products and its sintering method" to inhibit the sintering shrinkage by combining the inhibitory layer. And a method of rapidly heating and sintering characteristics, selecting a material having a shrinkage ratio smaller than that of the ceramic layer as a suppression layer, and heating the temperature to a temperature at which both the ceramic layer and the suppression layer are sintered by rapid temperature rise. Since both the ceramic layer and the suppression layer are sintered, the effect of suppression is small compared to the sintering of only the ceramic layer. However, due to the rapid temperature rise, not only the insufficient suppression ability but also the shrinkage time of the ceramic layer and the suppression layer can be compensated for. The sharp drop in the amount of energy can reduce the problem of excessive electrical stress caused by excessive internal stress.

為了增進用於電腦產品的積層陶瓷元件的良率,本發明透過於未燒結的積層陶瓷元件的生坯上,設置一個收縮率小於陶瓷層的抑制層,並將其以快速的升溫速度升溫到一燒結溫度,以進行一燒結製程。In order to improve the yield of the laminated ceramic component for a computer product, the present invention transmits a suppressing layer having a shrinkage ratio smaller than that of the ceramic layer on the green body of the unsintered laminated ceramic component, and heats it up to a rapid heating rate. A sintering temperature is performed to perform a sintering process.

本發明之目的係在提升用於電腦產品的積層陶瓷元件的良率之基礎概念下,透過控制積層陶瓷元件中的陶瓷晶粒尺寸,使其晶粒尺寸的大小均勻一致,來達到每個積層陶瓷元間的電性值差異降至最低,以使電性分布狹窄。The object of the present invention is to improve the size of the ceramic grain in the laminated ceramic component by controlling the size of the ceramic grain in the laminated ceramic component under the basic concept of improving the yield of the laminated ceramic component for the computer product. The difference in electrical values between ceramic elements is minimized to narrow the electrical distribution.

為了達到上述目的,本發明提出一種電腦商品的之製作方法,該方法包括下列步驟:於一生坯上形成一抑制層;以及將該生坯及該抑制層一起以每分鐘高於10℃的一升溫速率升溫至一燒結溫度,以形成一積層陶瓷元件。In order to achieve the above object, the present invention provides a method of fabricating a computer product, the method comprising the steps of: forming a suppression layer on a green body; and combining the green body and the suppression layer with a temperature higher than 10 ° C per minute. The rate of temperature rise is raised to a sintering temperature to form a laminated ceramic component.

根據上述構想,該電腦產品包括桌上型電腦、筆記型電腦、麥金塔電腦、平板電腦、準系統電腦、掌上型電腦或小筆電。According to the above concept, the computer product includes a desktop computer, a notebook computer, a Macintosh computer, a tablet computer, a barebones computer, a palmtop computer or a small notebook.

根據上述構想,該升溫速率為每分鐘高於50℃。According to the above concept, the heating rate is higher than 50 ° C per minute.

根據上述構想,該生坯以及該抑制層在該燒結溫度分別具有一第一收縮量以及一第二收縮量,且該第一收縮量大於該第二收縮量,以使該生坯以及該抑制層在該燒結溫度下,該抑制層抑制該生坯的收縮。According to the above concept, the green body and the suppression layer respectively have a first shrinkage amount and a second shrinkage amount at the sintering temperature, and the first shrinkage amount is greater than the second shrinkage amount, so that the green body and the suppression The layer inhibits shrinkage of the green body at the sintering temperature.

根據上述構想,該生坯係由複數陶瓷生坯以及複數電極生坯交替堆疊所形成。According to the above concept, the green body is formed by alternately stacking a plurality of ceramic green bodies and a plurality of electrode green bodies.

根據上述構想,該抑制層形成於該生坯的一第一表面以及一第二表面,且該第一表面以及該第二表面相對。According to the above concept, the suppression layer is formed on a first surface and a second surface of the green body, and the first surface and the second surface are opposite.

根據上述構想,該第一表面以及該第二表面與該等陶瓷生坯以及該等電極生坯平行。According to the above concept, the first surface and the second surface are parallel to the ceramic green bodies and the electrode green bodies.

根據上述構想,該等陶瓷生坯經燒結後產生複數晶粒,該等晶粒具有一粒徑分布,該粒徑分布實質上趨近單一分布。According to the above concept, the ceramic green bodies are sintered to produce a plurality of crystal grains, and the crystal grains have a particle size distribution, and the particle size distribution substantially approaches a single distribution.

根據上述構想,該生坯具有與該等陶瓷生坯垂直之一側表面,經該升溫速率升溫至該燒結溫度,致使該側表面經燒結後仍維持與該等陶瓷生坯垂直。According to the above concept, the green body has a side surface perpendicular to the ceramic green bodies, and the temperature is raised to the sintering temperature by the temperature increase rate, so that the side surface remains perpendicular to the ceramic green bodies after being sintered.

根據上述構想,該方法更包括下列步驟:將該電子元件設置於該電腦產品中。According to the above concept, the method further comprises the step of placing the electronic component in the computer product.

為了達到上述目的,本發明另提出一種電腦產品,其包括:由一生坯燒結所形成一積層陶瓷元件,且該積層陶瓷元件更包括:複數陶瓷層,其具有複數晶粒,且該等晶粒的一粒徑分布實質上趨近單一分布;以及複數電極層,其與該等陶瓷層交替堆疊,以形成一元件。In order to achieve the above object, the present invention further provides a computer product comprising: a laminated ceramic component formed by sintering a green body, and the laminated ceramic component further comprises: a plurality of ceramic layers having a plurality of crystal grains, and the crystal grains A particle size distribution substantially approaches a single distribution; and a plurality of electrode layers alternately stacked with the ceramic layers to form an element.

根據上述構想,該積層陶瓷元件更包括:一抑制層,形成於該元件上,與該等陶瓷層平行。其中該等陶瓷層的一第一開始燒結溫度低於該抑制層的一第二開始燒結溫度,且該生坯係以高於10℃的一升溫速率升溫至一燒結溫度,以進行燒結According to the above concept, the laminated ceramic component further includes: a suppression layer formed on the component in parallel with the ceramic layers. Wherein a first initial sintering temperature of the ceramic layers is lower than a second initial sintering temperature of the suppression layer, and the green body is heated to a sintering temperature at a temperature increase rate higher than 10 ° C for sintering

根據上述構想,該等陶瓷層以及該抑制層在該燒結溫度分別具有一第一收縮量以及一第二收縮量,且該第一收縮量大於該第二收縮量,以使該等陶瓷層以及該抑制層在該燒結溫度下,該抑制層抑制該等陶瓷層的收縮。According to the above concept, the ceramic layers and the suppression layer respectively have a first shrinkage amount and a second shrinkage amount at the sintering temperature, and the first shrinkage amount is greater than the second shrinkage amount, so that the ceramic layers and The suppression layer inhibits shrinkage of the ceramic layers at the sintering temperature.

本案所提出之「用於電腦產品的積層陶瓷元件及其燒結方法」將可由以下的實施例說明而得到充分瞭解,使得熟習本技藝之人士可以據以完成之,然而本案之實施並非可由下列實施例而被限制其實施型態,熟習本技藝之人士仍可依據除既揭露之實施例的精神推演出其他實施例,該等實施例皆當屬於本發明之範圍。The "layered ceramic component for computer products and its sintering method" proposed in the present application will be fully understood by the following examples, so that those skilled in the art can complete it. However, the implementation of the present invention may not be implemented by the following For example, those skilled in the art can devise other embodiments in light of the spirit of the embodiments disclosed herein, and such embodiments are within the scope of the invention.

請參閱第二圖,係說明本發明的各材料間在不同溫度下收縮率的示意圖。由圖可以明顯看出,電極層221於較低的溫度即開始進行收縮,而陶瓷層222次之,抑制層21開始收縮的溫度相對是最高的。此外,電極層221因多為金屬粉末,相對於陶瓷層222以及抑制層21的陶瓷粉末具有較低的收縮率。Please refer to the second figure for a schematic diagram showing the shrinkage at various temperatures between the various materials of the present invention. As is apparent from the figure, the electrode layer 221 starts to shrink at a lower temperature, and the ceramic layer 222 is second, and the temperature at which the suppression layer 21 starts to shrink is relatively highest. Further, since the electrode layer 221 is mostly a metal powder, it has a low shrinkage ratio with respect to the ceramic powder of the ceramic layer 222 and the suppression layer 21.

此外,在不同溫度下,抑制層21的收縮率皆小於陶瓷層222的收縮率。因此,當陶瓷層222開始燒結進行收縮時,抑制層21由於具有相對較低的收縮率,會抑制陶瓷層222的收縮,進而抑制陶瓷層222的收縮率及其晶粒成長。由於陶瓷層222的收縮率受到抑制層21的抑制,將使電極層221與陶瓷層222之間的收縮率差異明顯降低,而能使電極層221本身具有高度的電極連續性。Further, the shrinkage rate of the suppression layer 21 is smaller than the shrinkage ratio of the ceramic layer 222 at different temperatures. Therefore, when the ceramic layer 222 starts to be sintered for shrinkage, the suppression layer 21 has a relatively low shrinkage ratio, suppresses shrinkage of the ceramic layer 222, and further suppresses shrinkage of the ceramic layer 222 and grain growth thereof. Since the shrinkage rate of the ceramic layer 222 is suppressed by the suppression layer 21, the difference in shrinkage ratio between the electrode layer 221 and the ceramic layer 222 is remarkably lowered, and the electrode layer 221 itself can have a high electrode continuity.

在第二圖中,有兩條代表不同的升溫速率的直線,每小時200℃的升溫速率(每分鐘約3.3℃)以正常升溫直線24表示,每小時3000℃的升溫速率(每分鐘約50℃)以快速升溫直線25表示。透過快速升溫的效果,可使陶瓷層222與抑制層21的收縮時間差,從大約18分鐘降低到大約2分鐘。因此,若在正常升溫直線24的狀況下,由於陶瓷層222相對於抑制層21,具有長達約18分鐘的單獨收縮時間,而在長時間的單獨收縮下,陶瓷層222會有內部應力嚴重不均的問題。請參閱第三圖(a),係為在正常升溫速率下,具抑制層的積層陶瓷元件經燒結後的外觀示意圖。由陶瓷層與電極層所組成的元件層32,其與抑制層31所接觸的外層323,在正常升溫直線24的狀況下,會因受到抑制層31內應力的效果,而大幅降低其收縮率。然而在元件層32中心的內層324部分,由於遠離了抑制層31,其受到抑制層31內應力的影響相對較少,因此其收縮率的降低效果明顯較差。因此,內層324與外層323由於收縮率的明顯差異,再加上元件層32相較於抑制層31長時間的單獨收縮,使得元件層32的第一側表面325皆呈現內凹的現象,充分展現內外層間收縮率不均以及內應力有差異的現象。In the second figure, there are two straight lines representing different heating rates. The heating rate of 200 ° C per hour (about 3.3 ° C per minute) is expressed by the normal heating line 24, and the heating rate of 3000 ° C per hour (about 50 per minute) °C) is represented by a rapid temperature rise line 25. By the effect of rapid temperature rise, the shrinkage time of the ceramic layer 222 and the suppression layer 21 can be reduced from about 18 minutes to about 2 minutes. Therefore, if the ceramic layer 222 has a separate shrinkage time of up to about 18 minutes with respect to the suppression layer 21 under the condition of the normal temperature rise line 24, the ceramic layer 222 may have severe internal stress under long-term individual shrinkage. The problem of unevenness. Please refer to the third figure (a), which is a schematic view of the appearance of the laminated ceramic component with the suppression layer after sintering at a normal heating rate. The element layer 32 composed of the ceramic layer and the electrode layer, and the outer layer 323 which is in contact with the suppression layer 31, under the condition of the normal temperature rising line 24, is greatly reduced in shrinkage due to the effect of the stress in the suppression layer 31. . However, in the portion of the inner layer 324 at the center of the element layer 32, since it is far from the suppression layer 31, it is relatively less affected by the stress in the suppression layer 31, so that the effect of reducing the shrinkage rate is remarkably inferior. Therefore, due to the significant difference in shrinkage ratio between the inner layer 324 and the outer layer 323, and the individual shrinkage of the element layer 32 compared to the suppression layer 31 for a long time, the first side surface 325 of the element layer 32 is concave. It fully demonstrates the phenomenon of uneven shrinkage and internal stress between the inner and outer layers.

請合併參閱第二圖以及第三圖(b),其中第三圖(b)係為在快速升溫速率下,積層陶瓷元件經燒結後的外觀示意圖。若將升溫速率提高為快速升溫直線25,由於陶瓷層222與抑制層21開始收縮的時間差異從18分鐘大幅縮短為2分鐘,因此陶瓷層222單獨收縮的時間大幅縮短,所以內層324與外層323間的收縮差異大幅縮小,使元件層32的第二側表面326仍保持與抑制層表面垂直的狀態,表現出較均勻的收縮現象。Please refer to the second figure and the third figure (b) in combination, wherein the third figure (b) is a schematic view of the appearance of the laminated ceramic component after sintering at a rapid heating rate. If the temperature increase rate is increased to the rapid temperature rise line 25, since the difference in time between the start of shrinkage of the ceramic layer 222 and the suppression layer 21 is greatly shortened from 18 minutes to 2 minutes, the time for the ceramic layer 222 to individually shrink is greatly shortened, so the inner layer 324 and the outer layer are shortened. The difference in shrinkage between the 323 is greatly reduced, so that the second side surface 326 of the element layer 32 remains in a state perpendicular to the surface of the suppression layer, exhibiting a relatively uniform shrinkage phenomenon.

一般的積層陶瓷元件主要應用於電容器、電感器以及電阻器等。本案將以電容器為例以說明本案之技術內容,然其應用範圍不限於電容器的使用。一般電容器的電容值與材料的介電常數、介電層厚度以及電極面積有關。透過本案的抑制燒結收縮以及快速升溫,皆可使電極層具有高度的電極連續性,也就是說電極層會幾乎保持與未燒結時的電極面積相同,因此電極面積幾乎不變的狀況下,其所造成的良率影響相對較低。此外,由於高度的電極連續性,即表示陶瓷層本身並未侵入電極層,而中斷電極與電極間的連結,所以陶瓷層的厚度不會因電極的收縮而異常增厚,因此介電層厚度亦不會造成良率的重大影響。因此,介電常數的控制將是保有電極連續性後,急需克服的問題。General laminated ceramic components are mainly used in capacitors, inductors, and resistors. In this case, the capacitor will be taken as an example to illustrate the technical content of the case, but its application range is not limited to the use of capacitors. The capacitance of a typical capacitor is related to the dielectric constant of the material, the thickness of the dielectric layer, and the area of the electrode. Through the suppression of sintering shrinkage and rapid temperature rise in the present case, the electrode layer can have a high degree of electrode continuity, that is, the electrode layer will almost remain the same as the electrode area when unsintered, so that the electrode area is almost constant, The resulting yield impact is relatively low. In addition, due to the high continuity of the electrode, that is, the ceramic layer itself does not intrude into the electrode layer, and the connection between the electrode and the electrode is interrupted, the thickness of the ceramic layer is not abnormally thickened by the contraction of the electrode, and thus the thickness of the dielectric layer It will not cause a significant impact on yield. Therefore, the control of the dielectric constant will be an urgent problem to be overcome after the continuity of the electrode is maintained.

請參閱第四圖,係為積層陶瓷電容器常使用的BaTiO3 的晶粒尺寸與介電常數的關係圖。由第四圖可發現當晶粒尺寸在10 μm以上時,其介電常數仍會保持恒定,不會因晶粒尺寸而產生變化。當晶粒尺寸小於10 μm時,介電常數開始隨著晶粒尺寸的變化而產生差異。然而,現在針對元件輕薄短小的要求下,除了降低陶瓷層內的晶粒數外,亦可降低晶粒尺寸,因此如何在降低晶粒尺寸的條件下,控制晶粒尺寸分布的範圍,以避免元件的介電常數分布範圍過大,而導致產品的良率下降。Please refer to the fourth figure, which is a graph showing the relationship between the grain size and dielectric constant of BaTiO 3 which is commonly used in multilayer ceramic capacitors. From the fourth figure, it can be found that when the grain size is above 10 μm, the dielectric constant remains constant and does not change due to grain size. When the grain size is less than 10 μm, the dielectric constant starts to vary with the change in grain size. However, nowadays, in order to reduce the number of crystal grains in the ceramic layer, the grain size can be reduced in addition to reducing the number of crystal grains in the ceramic layer, so how to control the range of grain size distribution under the condition of reducing the grain size to avoid The dielectric constant distribution of the component is too large, resulting in a decrease in the yield of the product.

在本發明中,由於抑制層抑制收縮的效果,在燒結收縮的過程中,抑制層除了抑制陶瓷層的收縮外,由於生坯經熱壓密合的動作,抑制層的粉末會提供內應力,來抑制陶瓷層粉末在抑制層表面上的晶界擴散現象,致使陶瓷層粉末不易進行晶粒的成長。然而就第三圖(a)來看,由元件層32的外觀可明顯發現,內層324與外層323之間內應力的影響差距極大,而產生了內凹的第一側表面325。由此可看出,抑制層31對於內層324與外層323間,抑制晶粒成長的效果也具有明顯的差異。由於同一層上的晶粒所受的內應力效果相近,因此其晶粒成長受抑制的效果也相近,故同一層內部的晶粒的粒徑分布實質上趨近單一分布(monodisperse),意即其具有狹窄的晶粒分布,然而在正常升溫速率下,內層324與外層323由於晶粒成長受抑制的情形具有差異,而使得內層324的晶粒明顯會比外層323大,使得元件層32整體的晶粒的粒徑分布相對廣泛。In the present invention, since the suppressing layer suppresses the shrinkage effect, in addition to suppressing the shrinkage of the ceramic layer during the sintering shrinkage, the powder of the suppressing layer provides internal stress due to the action of the green compact by the thermocompression bonding. The grain boundary diffusion phenomenon of the ceramic layer powder on the surface of the suppression layer is suppressed, so that the ceramic layer powder is less likely to grow crystal grains. However, as seen from the third diagram (a), it is apparent from the appearance of the element layer 32 that the influence of the internal stress between the inner layer 324 and the outer layer 323 is extremely large, and the concave first side surface 325 is produced. From this, it can be seen that the suppression layer 31 also has a significant difference in the effect of suppressing grain growth between the inner layer 324 and the outer layer 323. Since the grains on the same layer are subjected to similar internal stress effects, the grain growth is suppressed by the same effect, so that the grain size distribution of the grains inside the same layer substantially approaches a single distribution (monodisperse), that is, It has a narrow crystal grain distribution, however, at a normal heating rate, the inner layer 324 and the outer layer 323 are different in that the grain growth is suppressed, so that the inner layer 324 has a larger crystal grain than the outer layer 323, so that the element layer The overall grain size distribution of 32 grains is relatively wide.

就第三圖(b)來看,由元件層32的外觀可明顯看出,內層324與外層323之間的內應力差距極小,因此兩者間具有抑制晶粒成長的效果之內應力相近,所以內層324與外層323之間的晶粒尺寸差異極小,使得元件層32整體晶粒的粒徑分布仍實質上可維持近乎單一分布的狀態,而維持整體元件層32具有狹窄的晶粒分布。如此一來,元件與元件間介電常數的差異將極小化,使積層陶瓷電容器的電性分布狹窄,而良率可大幅提升。As seen from the third figure (b), it is apparent from the appearance of the element layer 32 that the internal stress difference between the inner layer 324 and the outer layer 323 is extremely small, so that the internal stress having the effect of suppressing grain growth is similar between the two. Therefore, the difference in grain size between the inner layer 324 and the outer layer 323 is extremely small, so that the particle size distribution of the entire crystal grain of the element layer 32 is still substantially maintained in a nearly monolithic state, while maintaining the monolithic element layer 32 with narrow crystal grains. distributed. As a result, the difference in dielectric constant between the device and the device is minimized, the electrical distribution of the multilayer ceramic capacitor is narrowed, and the yield can be greatly improved.

請參閱第五圖,其係為本發明製作積層陶瓷元件的一生坯5示意圖。其中生坯5具有複數陶瓷生坯522、複數電極生坯521以及一抑制層生坯51。複數陶瓷生坯522與複數電極生坯521係交替堆疊而形成一元件生坯52,而元件生坯52具有一上表面527以及一下表面528,其中上表面527以及下表面528皆與陶瓷生坯522以及電極生坯521平行。抑制層生坯51係以平行陶瓷生坯522平面的方式,形成於上表面527以及下表面528上。Please refer to the fifth figure, which is a schematic view of a green body 5 for making a laminated ceramic component according to the present invention. The green body 5 has a plurality of ceramic green bodies 522, a plurality of electrode green bodies 521, and a suppression layer green body 51. The plurality of ceramic green bodies 522 and the plurality of electrode green bodies 521 are alternately stacked to form an element green body 52, and the element green body 52 has an upper surface 527 and a lower surface 528, wherein the upper surface 527 and the lower surface 528 are combined with the ceramic green body 522 and the electrode green body 521 are parallel. The suppression layer green body 51 is formed on the upper surface 527 and the lower surface 528 so as to be parallel to the plane of the ceramic green body 522.

陶瓷生坯522、抑制層生坯51以及電極層生坯521經燒結後,分別具有一第一收縮量、一第二收縮量以及一第三收縮量。於本發明中,由於陶瓷分坯522、抑制層生坯51以及電極層521皆會因燒結而產生收縮現象,因此抑制層生坯51的第二收縮量需小於陶瓷生坯522的的第一收縮量,才可使抑制層生坯51達到抑制陶瓷生坯522收縮的效果。此外,陶瓷生坯522的開始燒結溫度亦低於抑制層生坯51的開始燒結溫度。The ceramic green body 522, the suppression layer green body 51, and the electrode layer green body 521 are sintered to have a first shrinkage amount, a second shrinkage amount, and a third shrinkage amount, respectively. In the present invention, since the ceramic green body 522, the suppression layer green body 51, and the electrode layer 521 are all contracted by sintering, the second shrinkage amount of the suppression layer green body 51 needs to be smaller than that of the ceramic green body 522. The amount of shrinkage allows the suppression layer green body 51 to achieve the effect of suppressing the shrinkage of the ceramic green body 522. Further, the initial sintering temperature of the ceramic green body 522 is also lower than the initial sintering temperature of the green layer 51 of the suppression layer.

請參閱第六圖,其係為本發明積層陶瓷元件的製作流程圖,其步驟包括:(S61)交替堆疊複數陶瓷生坯以及複數電極生坯以形成一元件生坯;(S62)在元件生坯上形成一抑制層生坯;(S63)以高於每分鐘10℃的升溫速率升溫至一燒結溫度;(S64)以該燒結溫度進行一燒結製程,以完成一積層陶瓷元件。Please refer to the sixth drawing, which is a flow chart of the fabrication of the laminated ceramic component of the present invention, the steps comprising: (S61) alternately stacking a plurality of ceramic green bodies and a plurality of electrode green bodies to form a component green body; (S62) in the component raw A suppression layer green body is formed on the blank; (S63) is heated to a sintering temperature at a temperature increase rate of more than 10 ° C per minute; (S64) a sintering process is performed at the sintering temperature to complete a laminated ceramic component.

請合併參閱第五圖以及第六圖,在步驟S61中,複數陶瓷生坯522係具有一第一收縮率,此外,複數陶瓷生坯522與複數電極生坯521堆疊所形成的元件生坯52可以陶瓷生坯522作為最外層,以與後續的同為陶瓷材料的抑制層生坯51進行堆疊。Referring to the fifth and sixth figures, in step S61, the plurality of ceramic green bodies 522 have a first shrinkage ratio, and further, the plurality of ceramic green bodies 522 and the plurality of electrode green bodies 521 are stacked to form the component green body 52. The ceramic green body 522 can be used as the outermost layer to be stacked with the subsequent suppression layer green body 51 which is also a ceramic material.

在步驟S62中,於元件生坯52上所形成的抑制層生坯51具有一第二收縮率,且第二收縮率須小於該第一收縮率。因此,後續步驟於該燒結溫度進行燒結時,陶瓷生坯522以及抑制層生坯51分別會具有一第一收縮量以及小於第一收縮量的一第二收縮量。由於抑制層生坯51的第二收縮量較小,因此可抑制陶瓷生坯522的收縮而達到抑制收縮以及抑制晶粒成長的效果。此外,陶瓷生坯522的第一開始燒結溫度亦可低於抑制層生坯51的第二開始燒結溫度。In step S62, the suppression layer green body 51 formed on the element green body 52 has a second shrinkage ratio, and the second shrinkage ratio must be smaller than the first shrinkage ratio. Therefore, when the subsequent step is performed at the sintering temperature, the ceramic green body 522 and the suppression layer green body 51 respectively have a first shrinkage amount and a second shrinkage amount smaller than the first shrinkage amount. Since the second shrinkage amount of the green layer 51 of the suppression layer is small, the shrinkage of the ceramic green body 522 can be suppressed to achieve the effect of suppressing shrinkage and suppressing grain growth. Further, the first initial sintering temperature of the ceramic green body 522 may also be lower than the second initial sintering temperature of the suppression layer green body 51.

在步驟S63中,將元件生坯52以及抑制層生坯51所形成的生坯5,以每分鐘高於10℃以上的升溫速率升溫至一燒結溫度,較佳地,該升溫速率可為每分鐘高於25℃以上,甚至高於每分鐘50℃以上。而該燒結溫度至少需高於陶瓷生坯的該第一開始燒結溫度,較佳地,該燒結溫度需使元件生坯52中的陶瓷生坯522可完成燒結,甚至於該燒結溫度可使生坯5中的各層皆完成燒結。In step S63, the green body 5 formed by the element green body 52 and the suppression layer green body 51 is heated to a sintering temperature at a temperature increase rate higher than 10 ° C per minute, preferably, the temperature increase rate may be The minutes are above 25 ° C, even above 50 ° C per minute. The sintering temperature is at least higher than the first initial sintering temperature of the ceramic green body. Preferably, the sintering temperature is such that the ceramic green body 522 in the component green body 52 can be sintered, and even the sintering temperature can be made. Each of the layers in the blank 5 is sintered.

在步驟S64中,生坯5於該燒結溫度下,進行一燒結製程,以獲得本發明之積層陶瓷元件。In step S64, the green body 5 is subjected to a sintering process at the sintering temperature to obtain the laminated ceramic component of the present invention.

請參閱第七圖,其係為本發明積層陶瓷元件7的示意圖。積層陶瓷元件7具有複數陶瓷層722、複數電極層721以及一抑制層71。其中,複數陶瓷層722係與複數電極層721交替堆疊,而形成一元件層72。抑制層71係以平行陶瓷層722表面的方式,形成於元件層72之上,且元件層72另具有一側表面726。此外,由於抑制層71係用以抑制複數陶瓷層722在燒結期間的收縮,並非屬於積層陶瓷元件7的元件層72,因此於積層陶瓷元件7燒結完成後,亦可將抑制層71去除。Please refer to the seventh figure, which is a schematic view of the laminated ceramic component 7 of the present invention. The laminated ceramic component 7 has a plurality of ceramic layers 722, a plurality of electrode layers 721, and a suppression layer 71. The plurality of ceramic layers 722 are alternately stacked with the plurality of electrode layers 721 to form an element layer 72. The suppression layer 71 is formed over the element layer 72 in a manner parallel to the surface of the ceramic layer 722, and the element layer 72 further has a side surface 726. Further, since the suppression layer 71 serves to suppress shrinkage of the plurality of ceramic layers 722 during sintering, it does not belong to the element layer 72 of the laminated ceramic element 7, and therefore, after the sintering of the laminated ceramic element 7, the suppression layer 71 can be removed.

在前述實施例中,在形成積層陶瓷元件7之前,其係透過本發明之製程方式,由一生坯5經燒結所形成。因此,陶瓷層722的第一開始燒結溫度可低於抑制層71的第二開始燒結溫度。此外,陶瓷層722以及抑制層71於燒結製程中的一燒結溫度下,分別具有一第一收縮量以及一第二收縮量。由於為達到本案抑制收縮之效果,該第二收縮量需低於該第一收縮量,以使抑制層71抑制陶瓷層722的收縮。而在該燒結溫度下,至少須使陶瓷層722可完成燒結,較佳地,該燒結溫度可致使陶瓷層722以及抑制層71皆完成燒結。In the foregoing embodiment, prior to the formation of the laminated ceramic component 7, it is formed by sintering a green body 5 by the process of the present invention. Therefore, the first start sintering temperature of the ceramic layer 722 may be lower than the second start sintering temperature of the suppression layer 71. In addition, the ceramic layer 722 and the suppression layer 71 have a first shrinkage amount and a second shrinkage amount, respectively, at a sintering temperature in the sintering process. Since the effect of suppressing shrinkage in the present case is achieved, the second contraction amount is required to be lower than the first contraction amount, so that the suppression layer 71 suppresses shrinkage of the ceramic layer 722. At the sintering temperature, at least the ceramic layer 722 must be sintered. Preferably, the sintering temperature causes the ceramic layer 722 and the suppression layer 71 to complete sintering.

在前述實施例中,由於抑制層71抑制陶瓷層722收縮的效果,再加上快速的升溫速率所造成的效應,使得陶瓷層722不會有內應力不平均的現象。因此,元件層72的側表面726經快速的升溫速率至該燒結溫度燒結後,仍可與陶瓷層722以及電極層721的平面垂直,不會有內凹的現象。In the foregoing embodiment, since the effect of suppressing the shrinkage of the ceramic layer 722 by the suppressing layer 71, coupled with the effect caused by the rapid heating rate, the ceramic layer 722 does not have an uneven internal stress. Therefore, the side surface 726 of the element layer 72 can be perpendicular to the plane of the ceramic layer 722 and the electrode layer 721 after being rapidly heated to the sintering temperature, without a concave phenomenon.

在前述實施例中,陶瓷層722在未燒結的生坯期間,係以陶瓷粉末所形成,經燒結後會形成複數陶瓷晶粒。其中這些陶瓷晶粒由於抑制層71抑制收縮的效果,其晶粒成長也受到陶瓷層722中的內應力所抑制。由於同一平面上的晶粒所受的內應力效果相當,因此同一平面的晶粒,其晶粒成長受抑制的效果也相同,故同一平面的晶粒的粒徑分布實質上趨近於單一分布。此外,由於元件層72的側表面726並無內凹的現象,因此元件層72的中心部分與外層部分所受的到內應力並無明顯差距,因此中心部份以及外層部分的粒徑分布應為實質上相近。故,本發明之積層陶瓷元件7的陶瓷層722之粒徑分布實質上趨近單一分布。因此,本發明中不同的積層陶瓷元件之間的電性分布,因晶粒尺寸分布狹窄的緣故,使電性分布隨之狹窄化,而可提升良率。In the foregoing embodiment, the ceramic layer 722 is formed of a ceramic powder during the unsintered green body, and a plurality of ceramic grains are formed after sintering. Among these ceramic crystal grains, the crystal grain growth is also suppressed by the internal stress in the ceramic layer 722 due to the effect of suppressing the shrinkage of the layer 71. Since the internal stress of the grains on the same plane is equivalent, the grain growth of the same plane is suppressed by the same effect, so that the grain size distribution of the grains in the same plane is substantially closer to a single distribution. . In addition, since the side surface 726 of the element layer 72 is not concave, the central portion of the element layer 72 and the outer layer portion are not significantly different from the internal stress, so the particle size distribution of the central portion and the outer portion should be To be substantially similar. Therefore, the particle size distribution of the ceramic layer 722 of the laminated ceramic component 7 of the present invention substantially approaches a single distribution. Therefore, in the present invention, the electrical distribution between the different laminated ceramic elements is narrowed due to the narrow grain size distribution, and the electrical distribution is narrowed, and the yield can be improved.

本發明所述之積層陶瓷元件,若是做為一電容器時,其電極層、陶瓷層以及抑制層材料分別可為鎳、BaTiO3 (簡稱BT)以及(Ba,Ca)(Ti,Zr)O3 (簡稱BCTZ)。然本發明不限於前述之材料,只要滿足申請專利範圍所述之精神,經修改變化皆不脫如附申請專利範圍所欲保護者。When the laminated ceramic component of the present invention is used as a capacitor, the electrode layer, the ceramic layer and the suppression layer material may be nickel, BaTiO 3 (abbreviated as BT) and (Ba,Ca)(Ti,Zr)O 3 , respectively. (referred to as BCTZ). However, the present invention is not limited to the foregoing materials, and as long as it satisfies the spirit of the scope of the patent application, the modifications and modifications are not intended to be protected by the scope of the patent application.

本發明所述之用於電腦產品的積層陶瓷元件及其燒結製造方法,其係可應用於電容器、電感器或電阻器等被動元件。由於被動元件的應用範圍很廣,因此本發明之用於電腦產品的積層陶瓷元件及其燒結製造方法可應用於桌上型電腦、筆記型電腦、麥金塔電腦、平板電腦、準系統電腦、掌上型電腦、小筆電等所有的電腦產品中The laminated ceramic component for a computer product and the method for sintering the same according to the present invention can be applied to a passive component such as a capacitor, an inductor or a resistor. Since the passive component has a wide application range, the laminated ceramic component for the computer product of the present invention and the sintering manufacturing method thereof can be applied to a desktop computer, a notebook computer, a Macintosh computer, a tablet computer, a barebone computer, Palm-sized computers, small notebooks, and other computer products

請參閱第八圖,其係為本發明具有積層陶瓷元件的電腦產品8的示意圖。電腦產品8具有至少一電路板81,而電路板81具有至少一積層陶瓷元件82。其中此積層陶瓷元件82可為電容器、電感器或電阻器等被動元件。此外,圖上的積層陶瓷元件82以及電路板81的設置位置僅用以示意,並不限於圖上所設定的位置。亦即積層陶瓷元件82以及電路板81可置在電腦產品8上的任何位置。Please refer to the eighth drawing, which is a schematic diagram of a computer product 8 having a laminated ceramic component of the present invention. The computer product 8 has at least one circuit board 81, and the circuit board 81 has at least one laminated ceramic element 82. The laminated ceramic component 82 can be a passive component such as a capacitor, an inductor or a resistor. Further, the positions of the laminated ceramic elements 82 and the circuit board 81 on the drawing are merely for illustration, and are not limited to the positions set on the drawing. That is, the laminated ceramic component 82 and the circuit board 81 can be placed anywhere on the computer product 8.

以上所述實施例僅係為了方便說明而舉例,並非限制本發明。因此熟悉本技藝之人士在不違背本發明之精神,對於上述實施例進行修改、變化,然皆不脫如附申請專利範圍所欲保護者。The embodiments described above are merely illustrative for convenience of description and are not intended to limit the invention. Therefore, those skilled in the art can make modifications and changes to the above embodiments without departing from the spirit and scope of the invention.

1、7、82‧‧‧積層陶瓷元件1, 7, 82‧‧‧ laminated ceramic components

121‧‧‧導體電極層121‧‧‧Conductor electrode layer

11、21、31、71‧‧‧抑制層11, 21, 31, 71‧‧‧ suppression layer

12、32、72‧‧‧元件層12, 32, 72‧‧‧ component layer

122、222、722‧‧‧陶瓷層122, 222, 722‧‧‧ ceramic layers

13‧‧‧電極端13‧‧‧ electrode end

221、721‧‧‧電極層221, 721‧‧‧ electrode layer

24‧‧‧正常升溫直線24‧‧‧Normal heating line

25‧‧‧快速升溫直線25‧‧‧Rapid heating line

323‧‧‧外層323‧‧‧ outer layer

324‧‧‧內層324‧‧‧ inner layer

325‧‧‧第一側表面325‧‧‧ first side surface

326‧‧‧第二側表面326‧‧‧ second side surface

5‧‧‧生坯5‧‧‧Green

51‧‧‧抑制層生坯51‧‧‧Suppression layer green body

52‧‧‧元件生坯52‧‧‧Component blank

521‧‧‧電極生坯521‧‧‧electrode blank

522‧‧‧陶瓷生坯522‧‧‧Ceramic green body

527‧‧‧上表面527‧‧‧ upper surface

528‧‧‧下表面528‧‧‧ lower surface

S61-S64‧‧‧步驟S61-S64‧‧‧Steps

726‧‧‧側表面726‧‧‧ side surface

8‧‧‧電腦產品8‧‧‧Computer products

81‧‧‧電路板81‧‧‧Circuit board

第一圖(a)為常見的積層陶瓷元件結構示意圖;The first figure (a) is a schematic view of the structure of a common laminated ceramic component;

第一圖(b)為具有不收縮的抑制層之積層陶瓷元件的結構示意圖;The first figure (b) is a schematic structural view of a laminated ceramic element having a suppression layer that does not shrink;

第二圖為積層陶瓷元件中的不同材料在不同溫度下,其收縮率的關係圖;The second figure is a graph of the shrinkage of different materials in a laminated ceramic component at different temperatures;

第三圖(a)為在正常升溫速率下,具有抑制層的積層陶瓷元件經燒結後的外觀示意圖;The third figure (a) is a schematic view showing the appearance of the laminated ceramic component having the suppression layer after sintering at a normal heating rate;

第三圖(b)為在快速升溫速率下,具有抑制層的積層陶瓷元件經燒結後的外觀示意圖;The third figure (b) is a schematic view showing the appearance of the laminated ceramic component having the suppression layer after sintering at a rapid heating rate;

第四圖為積層陶瓷電容器常使用的BaTiO3 的晶粒尺寸與介電常數的關係圖;第五圖為本發明製作積層陶瓷元件的生坯示意圖;第六圖為本發明積層陶瓷元件的製作流程圖;第七圖為本發明積層陶瓷元件的示意圖;以及第八圖為本發明具有積層陶瓷元件的電腦產品的示意圖。The fourth figure is a graph showing the relationship between the grain size and the dielectric constant of BaTiO 3 which is commonly used in a multilayer ceramic capacitor; the fifth figure is a schematic view of the green body of the laminated ceramic component of the present invention; and the sixth figure is the fabrication of the laminated ceramic component of the present invention. 7 is a schematic view of a laminated ceramic component of the present invention; and FIG. 8 is a schematic view of a computer product having a laminated ceramic component of the present invention.

7...積層陶瓷元件7. . . Laminated ceramic component

71...抑制層71. . . Suppression layer

72...元件層72. . . Component layer

721...電極層721. . . Electrode layer

722...陶瓷層722. . . Ceramic layer

726...側表面726. . . Side surface

Claims (10)

一種電腦產品,其包含:由一生坯燒結所形成一積層陶瓷元件,且該積層陶瓷元件更包含:複數陶瓷層,其具有複數晶粒,且該等晶粒的一粒徑分布實質上趨近單一分布;複數電極層,其與該等陶瓷層交替堆疊,以形成一元件;以及一抑制層,形成於該積層陶瓷元件上,與該等陶瓷層平行。 A computer product comprising: a laminated ceramic component formed by sintering a green body, and the laminated ceramic component further comprises: a plurality of ceramic layers having a plurality of crystal grains, and a particle size distribution of the crystal grains substantially approaches a single distribution; a plurality of electrode layers alternately stacked with the ceramic layers to form an element; and a suppression layer formed on the laminated ceramic element in parallel with the ceramic layers. 如申請專利範圍第2項所述之電腦產品包括桌上型電腦、筆記型電腦、麥金塔電腦、平板電腦、準系統電腦、掌上型電腦或小筆電。 The computer products mentioned in the second application of the patent scope include a desktop computer, a notebook computer, a Macintosh computer, a tablet computer, a barebones computer, a palmtop computer or a small notebook. 如申請專利範圍第1項所述之電腦產品,其中該等陶瓷層的一第一開始燒結溫度低於該抑制層的一第二開始燒結溫度,且該生坯係以高於10℃的一升溫速率升溫至一燒結溫度,以進行燒結。 The computer product of claim 1, wherein a first initial sintering temperature of the ceramic layers is lower than a second initial sintering temperature of the suppression layer, and the green body is at a temperature higher than 10 ° C. The rate of temperature rise is raised to a sintering temperature for sintering. 如申請專利範圍第3項所述之電腦產品,其中該等陶瓷層以及該抑制層在該燒結溫度分別具有一第一收縮量以及一第二收縮量,且該第一收縮量大於該第二收縮量,以使該等陶瓷層以及該抑制層在該燒結溫度下,該抑制層抑制該等陶瓷層的收縮。 The computer product of claim 3, wherein the ceramic layer and the suppression layer respectively have a first shrinkage amount and a second shrinkage amount at the sintering temperature, and the first shrinkage amount is greater than the second The amount of shrinkage is such that the ceramic layer and the suppression layer inhibit the shrinkage of the ceramic layers at the sintering temperature. 如申請專利範圍第3項所述之電腦產品,其中該升溫速率可為每分鐘高於50℃。 The computer product of claim 3, wherein the heating rate is higher than 50 ° C per minute. 如申請專利範圍第3項所述之電腦產品,其中該生坯具有與該等陶瓷層垂直之一側表面,經該升溫速率升溫之該燒結溫度,致使該側表面經燒結後仍維持與該等陶瓷層垂直。The computer product according to claim 3, wherein the green body has a side surface perpendicular to the ceramic layers, and the sintering temperature is raised by the heating rate, so that the side surface is maintained after being sintered. Wait for the ceramic layer to be vertical. 一種電腦商品的之製作方法,其步驟包含:於一生坯上形成一抑制層;以及將該生坯及該抑制層一起以每分鐘高於10℃的一升溫速率升溫至一燒結溫度,以形成一積層陶瓷元件。A method for fabricating a computer product, the method comprising: forming a suppression layer on a green body; and heating the green body and the suppression layer together to a sintering temperature at a temperature increase rate higher than 10 ° C per minute to form A laminated ceramic component. 如申請專利範圍第7項所述之方法,其中該生坯以及該抑制層在該燒結溫度分別具有一第一收縮量以及一第二收縮量,且該第一收縮量大於該第二收縮量,以使該生坯以及該抑制層在該燒結溫度下,該抑制層抑制該生坯的收縮。The method of claim 7, wherein the green body and the suppression layer respectively have a first shrinkage amount and a second shrinkage amount at the sintering temperature, and the first shrinkage amount is greater than the second shrinkage amount The green layer and the suppression layer inhibit the shrinkage of the green body at the sintering temperature. 如申請專利範圍第7項所述之方法,其中該生坯係由複數陶瓷生坯以及複數電極生坯交替堆疊所形成,而該抑制層形成於該生坯的一第一表面以及一第二表面,且該第一表面以及該第二表面與該等陶瓷生坯以及該等電極生坯平行。The method of claim 7, wherein the green body is formed by alternately stacking a plurality of ceramic green bodies and a plurality of electrode green bodies, and the suppression layer is formed on a first surface of the green body and a second a surface, and the first surface and the second surface are parallel to the ceramic green bodies and the electrode green bodies. 如申請專利範圍第7項所述之方法,其步驟更包含:將該電子元件設置於該電腦產品中。The method of claim 7, wherein the step further comprises: disposing the electronic component in the computer product.
TW99124808A 2010-07-27 2010-07-27 Multilayer ceramic devices for computer products and sintering method thereof TWI441341B (en)

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