TWI439777B - Thin film transistor substrate of liquid crystal display panel - Google Patents

Description

Thin film transistor substrate of liquid crystal display panel

The present invention relates to a thin film transistor (TFT substrate) of a liquid crystal display panel (LCD panel), and more particularly to a fringe field switching (hereinafter referred to as FSS). A thin film transistor substrate of a liquid crystal display panel.

The liquid crystal display panel uses a backlight module to provide a uniformly distributed surface light source to display images. In general, the light emitted from the liquid crystal display panel is mostly directed forward, that is, perpendicular to the front direction of the display surface of the liquid crystal display panel. Therefore, when the user views from a side view angle, the picture with normal brightness cannot be viewed, or even the picture to be viewed cannot be viewed. In view of this, the prior art has developed a variety of wide viewing angle technologies, such as FFS type liquid crystal display panel technology.

Please refer to FIG. 1 , which is a schematic cross-sectional view of a conventional FFS liquid crystal display panel. The conventional FFS type liquid crystal display panel 100 includes an upper substrate 102, a lower substrate 104, and a liquid crystal layer 106 disposed between the upper substrate 102 and the lower substrate 104. The liquid crystal layer 106 includes a plurality of liquid crystal molecules 106a. In addition, the upper substrate 102 faces the surface of the liquid crystal layer 106, and the surface of the lower substrate 104 facing the liquid crystal layer 106 is respectively provided with an alignment layer (not shown). On the lower substrate 104, a common electrode 120, an insulating layer 122, and a pixel electrode 124 are disposed in this order from bottom to top. The conventional FFS type liquid crystal display panel 100 forms a dense fringe electric field by using the common electrode 120 and the pixel electrode 124 to drive the liquid crystal molecules 106a, adjust the transmittance of light, and make the liquid crystal molecules 106a have a faster response speed and a wider viewing angle.

Please refer to FIG. 2A and FIG. 2B , wherein FIG. 2A is a schematic diagram of a partial pixel area of a conventional FFS type liquid crystal display panel 100; and FIG. 2B is a cross-sectional view taken along line A-A′ of FIG. 2A. A schematic cross section. As shown in FIGS. 2A and 2B, the lower substrate 104 of the conventional FFS type liquid crystal display panel 100 further includes a plurality of data lines 130, a plurality of scan lines 132, and a plurality of storage electrode lines. A storage electrode line 134, and the data line 130 and the scan line 132 define a plurality of pixel regions 108. At least one thin film transistor 110 is disposed in each of the pixel regions 108. The gate (not shown) of the thin film transistor 110 is electrically connected to the scan line 132, and the source (not shown) and the data line 130 are connected. The electrical connection and the drain (not shown) are electrically connected to the pixel electrode 124.

Please continue to see Figures 2A and 2B. In order to increase the reflection of the ambient light, the conventional FFS type liquid crystal display panel 100 defines a plurality of reflective regions 140 on both sides of the scan line 132, and the patterning process of the semiconductor layer of the conventional thin film transistor is used in the reflective region 140. A plurality of reflective elements 142 composed of a semiconductor layer are formed therein. A reflective layer 144 covering the reflective element 142 is then formed in each of the reflective regions 140 by a patterning process that forms a source/drain. The reflective layer 144 covering the reflective element 142 obtains a rugged surface profile due to its lower raised reflective element 142, so the reflective layer 144 can provide a scattering interface of incident ambient light, which in turn increases the reflectivity of the ambient light. Of course, in order to prevent the reflective layer 144 from being electrically connected to the pixel electrode 124, an insulating layer 138 is disposed between the reflective layer 144 and the pixel electrode 124.

In order to increase the reflectance of the ambient light, even to the extent that it is still visible in sunlight, the conventional technique continuously increases the area of the reflective area 140, but at the expense of the aperture ratio of the FFS type liquid crystal display panel 100.

Accordingly, the present invention provides a thin film transistor substrate of an FFS type liquid crystal display panel which can improve effective reflectance without sacrificing aperture ratio.

According to the patent application scope of the present invention, a thin film transistor substrate of a liquid crystal display panel includes a substrate, a plurality of scan lines disposed on the substrate along a first direction, and a plurality of strips disposed along a second direction Data lines on the substrate, the data lines and the scan lines define a plurality of pixel regions. Each of the scan lines includes a plurality of first concavo-convex portions, and the first concavo-convex portions respectively include a plurality of first recess patterns having a closed shape. In addition, the thin film transistor substrate of the liquid crystal display panel further includes a plurality of switching elements respectively disposed in the pixel regions.

According to the patent application scope of the present invention, a thin film transistor substrate of a liquid crystal display panel includes a substrate, a plurality of scan lines disposed on the substrate along a first direction, and a plurality of strips disposed along a second direction. Data lines on the substrate, the data lines and the scan lines define a plurality of pixel regions. The data lines further include a plurality of first concave and convex portions and a plurality of first flat portions, and the first concave and convex portions respectively include a plurality of first concave patterns having a closed shape. In addition, the thin film transistor substrate of the liquid crystal display panel further includes a plurality of switching elements respectively disposed in the pixel regions.

According to the patent application scope of the present invention, a thin film transistor substrate of a liquid crystal display panel further includes a substrate, a plurality of scan lines disposed on the substrate along a first direction, and a plurality of strips disposed along a second direction The data line on the substrate and the plurality of storage electrode lines respectively disposed on the substrate along the first direction. The data lines and the scan lines define a plurality of pixel regions, and the storage electrode lines respectively comprise a first concave and convex portion, and the first concave and convex portions comprise a plurality of first concave patterns having a closed shape. In addition, the thin film transistor substrate of the liquid crystal display panel further includes a plurality of switching elements respectively disposed in the pixel regions.

In the thin film transistor substrate of the liquid crystal display panel of the present invention, a plurality of concave and convex portions are directly disposed on each of the scanning lines, the data lines, or the storage electrode lines, and each of the concave and convex portions includes a concave pattern having a closed shape. Therefore, the scanning lines, the data lines, or the storage electrode lines themselves can have the ability to reflect light without reducing the aperture ratio without additionally providing a reflection area, so that the reflectivity of the thin film transistor substrate can be greatly improved. .

Certain terms are used throughout the description and following claims to refer to particular elements. It should be understood by those of ordinary skill in the art that manufacturers may refer to the same elements by different nouns. The scope of this specification and the subsequent patent application do not use the difference of the names as the means for distinguishing the elements, but the differences in the functions of the elements as the basis for the distinction. The term "including" as used throughout the specification and subsequent claims is an open term and should be interpreted as "including but not limited to". In addition, the term "electrical connection" is used herein to include any direct and indirect electrical connection. Therefore, if a first device is electrically connected to a second device, it means that the first device can be directly connected to the second device or indirectly connected to the second device through other devices or connection means.

Please refer to FIG. 3A to FIG. 3C , wherein FIG. 3A is a partial schematic view of a thin film transistor substrate of a liquid crystal display panel of the present invention, and FIG. 3B is a cross-sectional view taken along line BB′ of FIG. 3A . FIG. 3C is a cross-sectional view taken along line C-C' in FIG. 3A, and FIG. 3D is a cross-sectional view taken along line D-D' in FIG. 3A. Please refer to Figure 3A first. In the preferred embodiment, the thin film transistor substrate of the liquid crystal display panel may be a thin film transistor substrate 200 of a fringe field switching (FFS) type liquid crystal display panel, but is not limited thereto. The thin film transistor substrate 200 includes a substrate 202, a plurality of scan lines 204 disposed on the substrate 202 along a first direction D1, and a plurality of data lines 206 disposed on the substrate 202 along a second direction D2, wherein the first direction D1 It is substantially perpendicular to the second direction D2. As shown in FIG. 3A, scan line 204 and data line 206 define a plurality of pixel regions 208. The thin film transistor substrate 200 of the preferred embodiment further includes a plurality of switching elements 210, such as thin film transistors, disposed in each of the pixel regions 208. In addition, the thin film transistor substrate 200 further includes a plurality of storage electrode lines 212 disposed on the substrate 202 in the first direction D1.

Please refer to Figures 3A and 3B. As described above, since the thin film transistor substrate 200 of the preferred embodiment is a thin film transistor substrate of a fringe field switching type liquid crystal display panel, the thin film transistor substrate 200 of the preferred embodiment further includes a plurality of The common electrodes 214 are respectively disposed in the respective pixel regions 208 of the substrate 202. The thin film transistor substrate 200 further includes a plurality of pixel electrodes 216 disposed in each of the pixel regions 208 of the substrate 202. As shown in FIG. 3A, each of the pixel electrodes 216 has a plurality of slits 218, and each of the pixel electrodes 216 partially overlaps with the corresponding common electrode 214. In the preferred embodiment, the common electrode 214 forms a dense fringe electric field with the pixel electrode 216, and drives the liquid crystal molecules (not shown) of the liquid crystal display panel 200 by the fringe electric field, adjusts the transmittance of the light, and makes the liquid crystal molecules Faster response and wider viewing angles.

Please continue to refer to Figures 3A and 3B. It should be noted that each scan line 204 on the thin film transistor substrate 200 provided in the preferred embodiment includes a plurality of first concave and convex portions 204a, and each of the storage electrode lines 212 includes a third concave and convex portion 212a. It should be understood by those skilled in the art that on the thin film transistor substrate 200, the switching element 210, the scanning line 204, the storage electrode line 212, the data line 206, and the pixel electrode 216 are mostly completed by a five-pass patterning process. Production. In the preferred embodiment, a half-tone mask (not shown) may be employed in the first patterning process for fabricating the gate of switching element 210 and scan line 204. The semi-transmissive reticle includes a half-tone mask region, a fully transparent region, and a fully blocked region. As is known to those of ordinary skill in the art, the fully permeable reticle region and the fully shielded reticle region have an all-or-nothing relationship with the reticle pattern transferred to the photoresist, with appropriate etching. After the process, the scan line 204 and the gate described above may be formed on the substrate 202. More importantly, since the preferred embodiment uses a semi-transmissive reticle, the semi-transmissive reticle region provides different transmittances, so the photoresist formed by the lithography process has a degree of exposure. Different thicknesses are formed, and after the etching process, a plurality of first recess patterns 250 having a closed shape are formed on each of the scan lines 204. For example, the first recess pattern 250 may be circular as shown in FIG. 3A, but the preferred embodiment is not limited to forming the first recess pattern 250 of other closed shapes such as a polygon. Due to the presence of the first recess pattern 250, the scan line 204 and the gate can be considered to include a plurality of first reliefs 204a having uneven surfaces.

According to the thin film transistor substrate 200 provided by the preferred embodiment, a plurality of first concave and convex portions 204a are directly formed on the scanning line 204 by a lithography technique of a semi-transmissive reticle. The other formed film materials, such as the insulating layers 220, 224, etc., obtain the concave-convex surface as shown in FIG. 3B along the first concave-convex portion 204a, and the concave-convex surface provides an incident ambient light-scattering interface. Improve the reflection effect. In other words, the thin film transistor substrate 200 of the FFS type liquid crystal display panel provided by the preferred embodiment provides a scan line 204 which itself has a high reflectivity.

It is also noted that, since the storage electrode line 212 and the scan line 204 are formed simultaneously in the first patterning process, the semi-transmissive mask can also be formed on the storage electrode line 212 as on the scan line 204. The first recess pattern 250, in other words, the storage electrode line 212, includes a third concavo-convex portion 212a. On the other hand, the other film material formed later obtains the uneven surface as shown in FIG. 3B along the third uneven portion 212a, and the uneven surface enhances the reflection effect as described above. Therefore, the thin film transistor substrate 200 provided by the preferred embodiment also provides a storage electrode line 212 which itself has a high reflectivity.

In addition, as described above, since the semi-transmissive reticle further includes a full-transmissive reticle region or a full-shielding reticle region, the preferred embodiment can form a plurality of the scanning lines 204 as shown in FIG. 3C. The first flat portion 204b having a flat surface, and each of the first flat portions 204b serves as a gate of a switching element 210, respectively. Since the gate has a flat surface, it does not affect the electrical performance of the thin film transistor.

Please refer to Figures 3A and 3D. As is known to those of ordinary skill in the art, after the fabrication of the gate/scan line 204 is completed, the gate insulating layer is formed, the semiconductor layer 222 is formed, and the source/drain and the data line 206 are formed. step. When the third patterning process for fabricating the source/drain and the data line 206 is performed, a plurality of second concave and convex portions 206a and a plurality of numbers may be formed on the data line 206 by using a semi-transmissive mask and a lithography technique. Two flat portions 206b. As described above, since the preferred embodiment uses a semi-transmissive reticle, the semi-transmissive reticle region provides different transmittances, so the photoresist formed by the lithography process has a degree of exposure. Different thicknesses, and after the etching process, a plurality of second recess patterns 260 having a closed shape are formed on each of the data lines 206. For example, the second recess pattern 260 may be circular as shown in FIG. 3A, but the preferred embodiment is not limited to forming the second recess pattern 260 of other closed shapes such as a polygon. Due to the presence of the second recess pattern 260, the data line 206 can be considered to include a plurality of second reliefs 206a having uneven surfaces. After the fabrication of the source drain and the data line 206 is completed, the steps of forming the insulating layer 224, forming the contact hole, and forming the pixel electrode 216 may be sequentially performed.

In addition, with the full-transmissive reticle region or the full-shielding reticle region of the semi-transmissive reticle, the preferred embodiment forms a plurality of second surfaces having a flat surface as shown in FIG. 3D on the data line 206. The flat portion 206b and each of the second flat portions 206b are respectively used as a source/drain of the switching element 210. Since the source/drain has a flat surface, it does not affect the electrical performance of the thin film transistor.

According to the thin film transistor substrate 200 provided by the preferred embodiment, a plurality of second concave and convex portions 206a are directly formed on the data line 206 by using a lithography technique of a semi-transmissive reticle, and other film materials subsequently formed, As the insulating layer 224 or the like, the uneven surface as shown in FIG. 3D is obtained along the second uneven portion 206a, and the uneven surface enhances the reflection effect. In other words, the thin film transistor substrate 200 of the FFS liquid crystal display panel provided by the preferred embodiment provides a data line 206 which itself has a high reflectivity.

In summary, the thin film transistor substrate of the FFS type liquid crystal display panel provided by the present invention is provided with a plurality of concave and convex portions formed by concave patterns directly on each scanning line or/and a data line, and the concave and convex portions are followed by The formed film layer forms a concave-convex surface for providing an incident ambient light-scattering interface. Therefore, the present invention can greatly increase the reflectance of the thin film transistor substrate without further requiring an additional reflective region to reduce the aperture ratio.

The above are only the preferred embodiments of the present invention, and all changes and modifications made to the scope of the present invention should be within the scope of the present invention.

100. . . FFS type liquid crystal display panel

102. . . Upper substrate

104. . . Lower substrate

106. . . Liquid crystal layer

106a. . . Liquid crystal molecule

108. . . Pixel region

110. . . Thin film transistor

120. . . Common electrode

122. . . Insulation

124. . . Pixel electrode

130. . . Data line

132. . . Scanning line

134. . . Storage electrode line

138. . . Insulation

140. . . Reflection zone

142. . . Reflective element

144. . . Reflective layer

200. . . Thin film transistor substrate

202. . . Substrate

204. . . Scanning line

204a. . . First concave and convex portion

204b. . . First flat

206. . . Data line

206a. . . Second concave and convex portion

206b. . . Second flat

208. . . Pixel region

210. . . Switching element

212. . . Storage electrode line

212a. . . Third concave and convex portion

214. . . Common electrode

216. . . Pixel electrode

218. . . Gap

220. . . Insulation

222. . . Semiconductor layer

224. . . Insulation

250. . . First concave pattern

260. . . Second concave pattern

D1. . . First direction

D2. . . Second direction

A-A’. . . Tangent

B-B’. . . Tangent

C-C’. . . Tangent

D-D’. . . Tangent

1 is a schematic cross-sectional view of a conventional FFS type liquid crystal display panel;

2A is a schematic view of a partial pixel area of a conventional FFS type liquid crystal display panel;

Figure 2B is a schematic cross-sectional view taken along line A-A' in Figure 2A;

3A is a partial schematic view of a thin film transistor substrate of a liquid crystal display panel according to a preferred embodiment;

Figure 3B is a schematic cross-sectional view taken along line B-B' in Figure 3A;

Figure 3C is a schematic cross-sectional view taken along line C-C' in Figure 3A;

Fig. 3D is a schematic cross-sectional view taken along line D-D' in Fig. 3A.

200. . . Thin film transistor substrate

202. . . Substrate

204. . . Scanning line

204a. . . First concave and convex portion

204b. . . First flat

206. . . Data line

206a. . . Second concave and convex portion

206b. . . Second flat

208. . . Pixel region

210. . . Switching element

212. . . Storage electrode line

212a. . . Third concave and convex portion

216. . . Pixel electrode

218. . . Gap

250. . . First concave pattern

260. . . Second concave pattern

D1. . . First direction

D2. . . Second direction

B-B’. . . Tangent

C-C’. . . Tangent

D-D’. . . Tangent

Claims (20)

A thin film transistor substrate of a liquid crystal display panel comprises: a substrate; a plurality of scanning lines disposed on the substrate along a first direction, the scan lines respectively comprising a plurality of first concave and convex portions and a plurality of first flat portions And the first concave and convex portions respectively comprise a plurality of first concave patterns having a closed shape; the plurality of data lines are disposed on the substrate along a second direction, and the data lines and the scanning lines are defined a plurality of pixel regions; and a plurality of switching elements respectively disposed in the pixel regions, wherein the first planar portions respectively serve as one of the gates of the switching elements. The thin film transistor substrate of the liquid crystal display panel of claim 1, wherein the data lines further comprise a plurality of second concave and convex portions and a plurality of second flat portions. The thin film transistor substrate of the liquid crystal display panel of claim 2, wherein the second concave and convex portions comprise a plurality of second concave patterns having a closed shape. The thin film transistor substrate of the liquid crystal display panel of claim 2, wherein the second flat portions are respectively used as the switching elements A source/bungee. The thin film transistor substrate of the liquid crystal display panel of claim 1, further comprising a plurality of storage electrode lines disposed on the substrate along the first direction. The thin film transistor substrate of the liquid crystal display panel of claim 5, wherein the storage electrode lines each comprise a third concavo-convex portion. The thin film transistor substrate of the liquid crystal display panel of claim 1, wherein the thin film transistor substrate of the liquid crystal display panel is a thin film transistor substrate of a fringe field switching type liquid crystal display panel. The thin film transistor substrate of the liquid crystal display panel of claim 7, further comprising a plurality of common electrodes respectively disposed in each of the pixel regions of the substrate, and a plurality of pixel electrodes respectively disposed on the substrate In each of the pixel regions, each of the pixel electrodes has a plurality of slits, and each of the pixel electrodes overlaps with the corresponding common electrode portion. A thin film transistor substrate of a liquid crystal display panel, comprising: a substrate; a plurality of scanning lines disposed on the substrate along a first direction; and a plurality of data lines disposed on the substrate along a second direction, Capital The material line and the scanning line system define a plurality of pixel regions, wherein the data lines further comprise a plurality of first concave and convex portions and a plurality of first flat portions, and the first concave and convex portions respectively comprise a plurality of closed portions a first recessed pattern of shapes; and a plurality of switching elements respectively disposed in the pixel regions, wherein the first flat portions respectively serve as source/drain of one of the switching elements. The thin film transistor substrate of the liquid crystal display panel of claim 9, wherein the scan lines further comprise a plurality of second flat portions and a plurality of second concave and convex portions, and the second concave and convex portions comprise A plurality of second recess patterns having a closed shape. The thin film transistor substrate of the liquid crystal display panel of claim 10, wherein the second flat portions are respectively used as one of the switching elements. The thin film transistor substrate of the liquid crystal display panel of claim 9, further comprising a plurality of storage electrode lines respectively disposed on the substrate along the first direction. The thin film transistor substrate of the liquid crystal display panel of claim 12, wherein the storage electrode lines each comprise a third bump unit. The thin film transistor substrate of the liquid crystal display panel of claim 9, wherein the thin film transistor substrate of the liquid crystal display panel is a thin film transistor substrate of a fringe field switching type liquid crystal display panel. The thin film transistor substrate of the liquid crystal display panel of claim 14, further comprising a plurality of common electrodes respectively disposed in each of the pixel regions of the substrate, and a plurality of pixel electrodes respectively disposed on the substrate In each of the pixel regions, each of the pixel electrodes has a plurality of slits, and each of the pixel electrodes overlaps with the corresponding common electrode portion. A thin film transistor substrate of a liquid crystal display panel comprises: a substrate; a plurality of scanning lines disposed on the substrate along a first direction, wherein the scan lines further comprise a plurality of first flat portions and a plurality of first portions And the first concave and convex portions respectively include a plurality of first concave patterns having a closed shape; a plurality of data lines are disposed on the substrate along a second direction, and the data lines are defined by the scanning lines a plurality of pixel regions; the plurality of storage electrode lines are respectively disposed on the substrate along the first direction, the storage electrode lines respectively comprise a second concave and convex portion, and the second concave and convex portion comprises a plurality of closed shapes Second depression map And a plurality of switching elements respectively disposed in the pixel regions, wherein the first flat portions are respectively used as one of the switching elements. The thin film transistor substrate of the liquid crystal display panel of claim 16, wherein the data lines further comprise a plurality of third concave and convex portions and a plurality of third flat portions, and the third concave and convex portions comprise A plurality of third recess patterns having a closed shape. The thin film transistor substrate of the liquid crystal display panel of claim 17, wherein the third flat portions are respectively a source/drain of the switching elements. The thin film transistor substrate of the liquid crystal display panel of claim 16, wherein the thin film transistor substrate of the liquid crystal display panel is a thin film transistor substrate of a fringe field switching type liquid crystal display panel. The thin film transistor substrate of the liquid crystal display panel of claim 19, further comprising a plurality of common electrodes respectively disposed in each of the pixel regions of the substrate, and a plurality of pixel electrodes respectively disposed on the substrate In each of the pixel regions, each of the pixel electrodes has a plurality of slits, and each of the pixel electrodes overlaps with the corresponding common electrode portion.