TWI435150B - Liquid display panel and manufacturing method thereof - Google Patents

Description

Liquid crystal display panel and method of manufacturing same

The present invention relates to a liquid crystal display panel and a method of fabricating the same, and more particularly to a liquid crystal display panel in which a data line and a gate are disposed in the same layer and a method of fabricating the same.

At present, there are several technologies capable of achieving wide viewing angles in the manufacturing technology of liquid crystal displays, such as twisted nematic liquid crystal (TN) plus Wide Viewing Film, and In-plane Switching (IPS). Liquid crystal display, Fringe Field Switching liquid crystal display and multi-domain vertical alignment liquid crystal display.

In order to connect the pixel array in the liquid crystal display panel to the driving circuit, the conventional design arranges a part of the line for transmitting signals to the periphery of the display area to further limit the display aperture ratio. However, when the products on the market continue to move toward the design of large and small borders, such designs will not meet market requirements.

In addition, the portion where the capacitance electrode of the liquid crystal display panel overlaps the pixel electrode forms a storage capacitor. In general, the capacitor electrode and the pixel electrode are often separated by two or more layers, for example, an insulating layer. As a result, the capacitance effect between the capacitor electrode and the pixel electrode is poor, and the value of the storage capacitor is lowered.

The present invention relates to a liquid crystal display panel and a method of fabricating the same. In an embodiment, a single layer of insulating layer is interposed between the capacitor electrode and the pixel electrode, which can improve the capacitance effect and increase the storage capacitor value.

According to an aspect of the invention, a liquid crystal display panel is proposed. The liquid crystal display panel includes a first substrate, a pixel array, a second substrate, and a liquid crystal layer. The pixel array is formed on the first substrate. The pixel array includes a plurality of data lines, a first insulating layer, a plurality of scanning lines, a plurality of active elements, a plurality of capacitor electrodes, a second insulating layer, and a plurality of pixel electrodes. The data line is formed on the first substrate. First insulating layer Covers the data line and has several gate openings and several source openings. A scan line is formed on the first insulating layer. Each active component includes a gate, a source, and a drain. The gate is formed on the first substrate, and the source, the drain and the capacitor electrode are formed on the first insulating layer. The second insulating layer covers the capacitor electrode, the source and the drain. The pixel electrode corresponding to the capacitor electrode is formed on the second insulating layer. The liquid crystal layer is disposed between the first substrate and the second substrate. The scan line is electrically connected to the corresponding gate through the corresponding gate opening, and the data line is electrically connected to the corresponding source through the corresponding source opening.

According to another aspect of the present invention, a method of fabricating a liquid crystal display panel is proposed. The manufacturing method includes the following steps. Providing a first substrate and a second substrate; forming a plurality of data lines and a plurality of gates on a first substrate; forming a first insulating layer covering the data lines and the gates, wherein the first insulating layer has a plurality of gates a pole opening and a plurality of source openings; forming a plurality of sources, a plurality of drain electrodes, a plurality of capacitor electrodes and a plurality of scan lines in the first insulating layer, wherein the scan lines pass through the corresponding gate opening electrical properties Connecting the corresponding gate, the data line is electrically connected to the corresponding source through the corresponding source opening; forming a second insulating layer covering the source, the drain and the capacitor electrode; forming a plurality of pixel electrodes on the second insulating layer The position of the pixel electrode corresponds to the capacitor electrode; the first substrate and the second substrate are paired; and a liquid crystal layer is formed between the first substrate and the second substrate.

In order to make the above-mentioned contents of the present invention more comprehensible, the preferred embodiments are described below, and the detailed description is as follows:

First embodiment

Please refer to FIG. 1 to FIG. 3 . FIG. 1 is a partial schematic view of a liquid crystal display panel according to a first embodiment of the present invention, and FIG. 2 is an enlarged schematic view of a portion 2 ′ of FIG. 1 , and FIG. A cross-sectional view in the direction 3-3' in Fig. 2 is shown. As shown in FIG. 1 , the liquid crystal display panel 100 includes a first substrate 102 , a pixel array 104 , a second substrate 106 (shown in FIG. 3 ), a liquid crystal layer 108 (shown in FIG. 3 ), and a driving circuit 140 . The liquid crystal layer 108 is disposed between the first substrate 102 and the second substrate 106.

Referring to FIG. 2 and FIG. 3 simultaneously, the pixel array 104 is formed on the first base. The board 102 includes a plurality of data lines 110, a plurality of scanning lines 114, a plurality of active elements 116, a plurality of capacitor electrodes 118, a plurality of pixel electrodes 122, and a plurality of gate lines 128. The adjacent capacitor electrodes 118 are connected to each other.

As shown in FIG. 2, the gate lines 128 are substantially parallel to the data lines 110 formed on the first substrate 102, and the gate lines 128 are located between the adjacent two data lines 110. The gate line 128 and the data line 110 can extend in substantially the same direction to be electrically connected to the driving circuit 140. This can save the side width of the liquid crystal display panel 100 and meet the design requirements of the narrow side width product.

The data line 110 intersects the scan line 114 and defines a plurality of pixel regions. The gate line 128 passes through the pixel area. Each pixel region includes an active component 116, a capacitor electrode 118, and a pixel electrode 122. The driving circuit 140 can provide a corresponding driving signal (not shown) to the data line 110 and the gate line 128 to drive the active component 116 in the pixel region.

As shown in FIG. 3, the active device 116 includes a gate 116g, a source 116s, a channel layer 116c, and a drain 116d. The pixel array 104 further includes a first insulating layer 112 and a second insulating layer 120. The gate 116g is formed on the first substrate 102, and the source 116s and the drain 116d are formed on the first insulating layer 112.

The data line 110 is formed on the first substrate 102. The first insulating layer 112 covers the gate 116g and the data line 110 and has a plurality of source openings 126. The positions of the source openings 126 correspond to the data lines 110. . The second insulating layer 120 has a plurality of drain openings 134, and the positions of the drain openings 134 correspond to the drains 116d. The source 116s on the first insulating layer 112 can be electrically connected to the data line 110 through the source opening 126.

Referring to FIG. 3, the pixel electrode 122 is formed on the second insulating layer 120, and is electrically connected to the drain 116d through the drain opening 134.

The second insulating layer 120 covers the source 116s, the drain 116d, and the capacitor electrode 118. The positions of the pixel electrodes 122 corresponding to the capacitor electrodes 118 are formed on the second insulating layer 120, so that a storage capacitor structure is formed between the pixel electrodes 122 and the capacitor electrodes 118, which helps maintain the display voltage in the pixel region. . In addition, since the pixel electrode 122 and the capacitor electrode 118 are separated by a single layer structure (ie, the second insulating layer 120), the capacitance effect is better, and the storage capacitor value can be increased.

As shown in FIG. 3, the material of the capacitor electrode 118 is, for example, metal or indium tin oxide (ITO) formed on the first insulating layer 112. At least a portion of the capacitor electrode 118 overlaps the gate line 128 via the first insulating layer 112 to shield the electric field from the gate line 128, thereby preventing the electric field of the gate line 128 from affecting the movement of the liquid crystal at the corresponding position. Preferably, but not limited to, the capacitor electrode 118 can be electrically connected to a common electrode (not shown), so that the storage capacitor structure described above is in the form of Cs on Common.

Referring to Fig. 4, a cross-sectional view of the direction 4-4' in Fig. 2 is shown. The gate line 128a is formed on the first substrate 102, and the scan line 114 is formed on the first insulating layer 112. The first insulating layer 112 further has a plurality of gate openings 124 and a plurality of scan line openings 130. Taking one of the scanning line openings 130a as an example, the position of the scanning line opening 130a corresponds to the scanning line 114a. The positions of the gate openings 124 correspond to the gates 116g, and the scan lines 114a are electrically connected to the gates 116g through the gate openings 124. Referring to FIG. 1 simultaneously, since the scanning line opening 130a and the gate line 128a overlap with the scanning line 114a, the driving signal passing through the gate line 128a can be transmitted to the entire scanning line 114a through the scanning line opening 130a. Then, the driving signal is transmitted to each of the active elements 116 connected to the scanning line 114a through the gate opening 124 (the gate opening 124 is shown in FIG. 2). Similarly, the other scan lines 114 can transmit the signals of the corresponding gate lines 128 through the corresponding scan line openings 130.

The liquid crystal display panel 100 of the present embodiment is exemplified by a transmissive liquid crystal display panel. However, the present invention is not limited to the present invention. In another embodiment, the liquid crystal display panel 100 may also be semi-pierced. A tranflective liquid display panel. Further, the pixel array 104 may further include a plurality of transparent organic films and a plurality of reflective structures. The locations of the transparent organic films corresponding to the pixel regions are set on the second insulating layer 120. The second insulating layer 120 is shown on FIG. 3) to define a reflective region. Preferably, but not limited to, the transparent organic film covers the non-penetrating region, for example, covering the active element 116. The reflective structures are correspondingly formed on the transparent organic films to reflect ambient light.

Hereinafter, the liquid crystal display panel 100 is taken as an example to illustrate the first embodiment of the present invention. A method of manufacturing a liquid crystal display panel. Referring to FIG. 5 and FIG. 6A-6C, FIG. 5 is a flow chart showing a method of manufacturing a liquid crystal display panel according to a first embodiment of the present invention, and FIG. 6A-6C is a diagram showing a pixel array of FIG. Manufacturing schematic. Figures 6A-6C only show a single pixel area.

In step S102, the first substrate 102 and the second substrate 106 as shown in FIG. 3 are provided.

Then, in step S104, as shown in FIG. 6A, the data line 110, the gate 116g, and the gate line 128 are formed on the first substrate 102 (not shown in FIG. 6A). Each gate line 128 is located between adjacent ones of the data lines 110.

Then, in step S106, a transparent first insulating layer 112 as shown in FIG. 6B is formed. The first insulating layer 112 covers the data line 110, the gate 116g, and the gate line 128. The first insulating layer 112 has a gate opening 124, a source opening 126 and a scan line opening 130. The position of the source opening 126 corresponds to the data line 110, and the position of the gate opening 124 corresponds to the gate 116g.

Then, in step S108, as shown in FIG. 6C, the source 116s, the drain 116d, the channel layer 116c, the capacitor electrode 118, and the scan line 114 are formed on the first insulating layer 112. Each of the scan lines 114 is electrically connected to the corresponding gate 116g through the corresponding gate opening 124. Each of the data lines 110 is electrically connected to the corresponding source 116s through the corresponding source opening 126, and at least a portion thereof. The capacitor electrode 118 overlaps the gate line 128.

Then, in step S110, a transparent second insulating layer 120 as shown in FIG. 3 is formed. The second insulating layer 120 covers the source 116s, the drain 116d, the channel layer 116c, and the capacitor electrode 118.

After step S112, a drain opening 134 as shown in FIG. 2 can be formed on the second insulating layer 120. The position of the drain opening 134 corresponds to the drain 116d.

Then, in step S112, the pixel electrode 122 as shown in FIG. 2 is formed on the second insulating layer 120, and the position of the pixel electrode 122 corresponds to the capacitor electrode 118. The pixel electrode 122 can be electrically connected to the drain 116d through the drain opening 134.

Then, in step S114, the group first substrate 102 and the second substrate 106 are paired.

Then, in step S116, the liquid crystal layer 108 is formed between the first substrate 102 and the second substrate 106. So far, the transmissive liquid crystal display of the embodiment is completed. Panel 100.

In addition, although not shown in the drawings, in another embodiment, the transparent organic film may be continuously formed on the pixel electrode 122 after the step S112. And forming a reflective layer on the transparent organic film to form a transflective liquid crystal display panel. The reflective layer is, for example, a metal reflective layer.

Second embodiment

Referring to FIG. 7, a partial schematic view of a liquid crystal display panel according to a second embodiment of the present invention is shown. The same reference numerals are used in the second embodiment in the same manner as the first embodiment, and details are not described herein again. The liquid crystal display panel 200 of the second embodiment is different from the liquid crystal display panel 100 of the first embodiment in that the liquid crystal display panel 200 does not include the gate line 128 and the scan line opening 130.

Please refer to Fig. 8, which shows a cross-sectional view of the direction 8-8' in Fig. 7. The liquid crystal display panel 200 includes a first substrate 102, a pixel array 204, a second substrate 106, and a liquid crystal layer 108.

The pixel array 204 includes a plurality of data lines 210, a first insulating layer 212, a plurality of scanning lines 214, a plurality of active elements 216, a plurality of capacitor electrodes 218, a second insulating layer 220, and a plurality of pixel electrodes 222. The data line 210, the active device 216, and the pixel electrode 222 are similar to the data line 110, the active device 116, and the pixel electrode 122 of the first embodiment, and details are not described herein again.

The data lines 210 intersect the scan lines 214 and define a plurality of pixel regions.

As shown in FIG. 8, the first insulating layer 212 covers the data lines 210 and has a plurality of gate openings 224 (the gate openings 224 are shown in FIG. 7) and a plurality of source openings 226. As shown in FIG. 7, the scan line 214 is formed on the first insulating layer 212. Each of the scan lines 214 is electrically connected to the corresponding gate 216g through the corresponding gate opening 224. Each of the data lines 210 can be electrically connected to the corresponding source 216s through the corresponding source opening 226.

As shown in FIG. 7, the capacitor electrode 218 can be electrically connected to a common electrode and includes a metal electrode 236 and a transparent electrode 238. Adjacent metal electrodes 236 are connected, and each metal electrode 236 is formed on the first insulating layer 212 and adjacent thereto The position of the data line is formed in a U shape, and a portion of the transparent electrode 238 is formed on the metal electrode 236 as shown in FIG. At least a portion of the capacitor electrode 218 overlaps at least a portion of the pixel electrode 222 via the second insulating layer 220, and the overlapped portion forms a storage capacitor.

Since the capacitor electrode 218 of the present embodiment includes the metal electrode 236, the capacitor electrode 218 has a low impedance characteristic. Further, since the transparent electrode 238 does not affect the aperture ratio of the pixel region, the capacitor electrode 218 has both low impedance and a feature of maximizing the aperture ratio of the pixel. Of course, it should be understood by those skilled in the art that in one embodiment, the capacitor electrode 218 can also omit one of the metal electrode 236 and the transparent electrode 238. Thus, the portion of the capacitor electrode 218 that overlaps the pixel electrode 222 The storage capacitor can still be formed.

The second insulating layer 220 covers the source 216s, the drain 216d and the capacitor electrode 218 of the active device 216. The second insulating layer 220 has a plurality of drain openings 234.

The position of the pixel electrode 222 corresponding to the capacitor electrode 218 is formed on the second insulating layer 220, and the portion where the pixel electrode 222 overlaps the capacitor electrode 218 forms a storage capacitor. Since the pixel electrode 222 and the capacitor electrode 218 are separated by a single layer structure (ie, the second insulating layer 220), the capacitance effect is better, and the storage capacitor value can be increased.

Hereinafter, a method of manufacturing the liquid crystal display panel 200 will be described with reference to the flow chart of FIG.

In step S102, the first substrate 102 and the second substrate 106 as shown in FIG. 8 are provided.

Then, in step S104, the data line 210 and the gate 216g as shown in FIG. 7 are formed on the first substrate 102.

Then, in step S106, the first insulating layer 212 as shown in Fig. 8 is formed. The first insulating layer 212 covers the data line 210 and the gate 216g. As shown in FIG. 7 and FIG. 8 , the first insulating layer 212 has a gate opening 224 and a source opening 226 . The position of the source opening 226 corresponds to the data line 210 and the gate opening 224 . The position corresponds to the gate 216g.

Then, in step S108, the source 216s, the drain 216d, the channel layer 216c, the capacitor electrode 218, and the scan line 214 (shown in FIG. 7) as shown in FIG. 8 are formed on the first insulating layer 212.

Then, in step S110, the second insulating layer 220 as shown in Fig. 8 is formed. The second insulating layer 220 covers the source 116s, the drain 116d, the channel layer 216c, and the capacitor electrode 218.

After step S112, a drain opening 234 as shown in FIG. 8 is formed on the second insulating layer 220. The position of the drain opening 234 corresponds to the drain 216d.

Then, in step S112, the pixel electrode 222 as shown in FIG. 7 is formed on the second insulating layer 220, and the position of the pixel electrode 222 corresponds to the capacitor electrode 218. The pixel electrode 222 can be electrically connected to the drain 216d through the drain opening 234.

The subsequent steps S114 and S116 are similar to the description of the first embodiment, and are not described herein again. After the step S116 is completed, the transmissive liquid crystal display panel 200 of the present embodiment is formed.

In addition, although not shown in the drawing, after the step S112, the transparent organic film can be continuously formed on the pixel electrode 222. And forming a reflective layer on the transparent organic film to form a transflective liquid crystal display panel. The reflective layer is, for example, a metal reflective layer.

In addition, in an embodiment, a pixel pattern (not shown) may be formed on the pixel electrode, and the edge electric field effect caused by the groove pattern may affect the tilting direction of the liquid crystal molecules, so that the liquid crystal molecules exhibit multi-domain alignment. (multi-domain).

In one embodiment, in addition to the groove pattern formed on the pixel electrode, the position of the corresponding pixel region on the second substrate of the liquid crystal display panel may be further provided with at least one protusion, which may also Liquid crystal molecules exhibit multi-domain alignment effects.

In addition, the liquid crystal display panels 100 and 200 described above may be a TN type liquid crystal, an IPS liquid crystal display, an FFS type liquid crystal display, and a multi-domain alignment type liquid crystal display.

In conclusion, the present invention has been disclosed in the above preferred embodiments, and is not intended to limit the present invention. A person skilled in the art can make various changes and modifications without departing from the spirit and scope of the invention. Therefore, the scope of the invention is defined by the scope of the appended claims.

100,200‧‧‧LCD panel

102‧‧‧First substrate

104, 204‧‧‧ pixel array

106‧‧‧second substrate

108‧‧‧Liquid layer

110, 210‧‧‧ data line

112, 212‧‧‧ first insulation

114, 114a, 214‧‧‧ scan lines

116, 216‧‧‧ active components

116c, 216c‧‧‧ channel layer

116g, 216g‧‧‧ gate

116s, 216s‧‧‧ source

116d, 216d‧‧‧汲

118, 218‧‧‧ capacitor electrode

120, 220‧‧‧Second insulation

122, 222‧‧‧ pixel electrodes

124, 224‧‧ ‧ gate opening

126, 226‧‧‧ source opening

128, 128a‧‧ ‧ gate line

130, 130a‧‧‧ scan line opening

134, 234‧‧ ‧ bungee opening

140‧‧‧Drive circuit

236‧‧‧Metal electrodes

238‧‧‧Transparent electrode

2’‧‧‧Local

Fig. 1 is a partial schematic view showing a liquid crystal display panel according to a first embodiment of the present invention.

Fig. 2 is an enlarged schematic view showing a portion 2' in Fig. 1.

Fig. 3 is a cross-sectional view showing the direction 3-3' in Fig. 2;

Fig. 4 is a cross-sectional view showing the direction 4-4' in Fig. 2;

FIG. 5 is a flow chart showing a method of manufacturing a liquid crystal display panel according to a first embodiment of the present invention.

6A-6C are schematic views showing the manufacture of the pixel array of Fig. 2.

FIG. 7 is a partial schematic view showing a liquid crystal display panel according to a second embodiment of the present invention.

Fig. 8 is a cross-sectional view showing the direction 8-8' in Fig. 7.

100‧‧‧LCD panel

102‧‧‧First substrate

104‧‧‧ pixel array

110‧‧‧Information line

112‧‧‧First insulation

114, 114a‧‧‧ scan line

116‧‧‧Active components

116c‧‧‧ channel layer

116g‧‧‧ gate

116s‧‧‧ source

116d‧‧‧Bungee

118‧‧‧Capacitance electrode

120‧‧‧Second insulation

122‧‧‧pixel electrodes

124‧‧‧ gate opening

126‧‧‧Source opening

128‧‧‧ gate line

130‧‧‧Scan line opening

134‧‧‧Bungee opening

Claims (9)

A liquid crystal display panel comprising: a first substrate; a pixel array formed on the first substrate, the pixel array comprising: a plurality of data lines formed on the first substrate; a first insulating layer covering the The data lines have a plurality of gate openings and a plurality of source openings; a plurality of scan lines are formed on the first insulating layer; a plurality of active components, each of the active devices including a gate and a source And a gate formed on the first substrate, the source and the drain of each of the active devices are formed on the first insulating layer; a plurality of capacitor electrodes are formed on the first insulating layer a second insulating layer covering the capacitor electrodes, the sources of the active components and the drain electrodes; and a plurality of pixel electrodes, corresponding to the capacitor electrodes formed on the second insulating layer; a plurality of gate lines substantially parallel to the data lines formed on the first substrate and one of the gate lines being located between adjacent ones of the data lines; a second substrate; and a liquid crystal layer Disposed between the first substrate and the second substrate The first insulating layer further has a plurality of scan line openings, the scan line openings, the gate lines and the positions of the scan lines, each of the gate lines transmitting the corresponding scan The line openings are electrically connected to the scan lines, and the scan lines are electrically connected to the corresponding gates through the corresponding gate openings, and the data lines are respectively transmitted through the corresponding source openings. Connected to the corresponding source, at least a portion of each of the capacitor electrodes overlaps with a position of the corresponding gate line. The liquid crystal display panel of claim 1, wherein each of the capacitor electrodes comprises: a metal electrode; and a transparent electrode connected to the metal electrode. The liquid crystal display panel of claim 1, further comprising: a plurality of organic thin films formed on the second insulating layer; and a plurality of reflective structures correspondingly formed on the organic thin films. The liquid crystal display panel of claim 1, wherein the second insulating layer has a plurality of gate openings, and the pixel electrodes are electrically connected to the drain electrodes through the drain openings. The liquid crystal display panel of claim 1, wherein each of the capacitor electrodes is made of metal or Indium Tin Oxide (ITO). A method for manufacturing a liquid crystal display panel, comprising: providing a first substrate and a second substrate; forming a plurality of data lines and a plurality of gates on the first substrate; forming a first insulating layer covering the data lines and The gate electrode, wherein the first insulating layer has a plurality of gate openings and a plurality of source openings; forming a plurality of sources, a plurality of drain electrodes, a plurality of capacitor electrodes, and a plurality of scan lines An insulating layer, wherein each of the scan lines is electrically connected to the corresponding gate through the corresponding gate opening, and each of the data lines is electrically connected to the corresponding source through the corresponding source opening Forming a second insulating layer covering the source, the drains and the capacitor electrodes; forming a plurality of pixel electrodes on the second insulating layer, the positions of the pixel electrodes corresponding to the capacitor electrodes; Forming a plurality of gate lines on the first substrate, the gate lines are substantially parallel to the data lines, and one of the gate lines is located between adjacent ones of the data lines; The first substrate and the second substrate; and forming a a layer of the first substrate and the second substrate; wherein the first insulating layer further has a plurality of scan line openings, the scan line openings, the positions of the gate lines and the scan lines Correspondingly, each of the gate lines is electrically connected to the corresponding scan line through the corresponding scan line opening, and at least a portion of each of the capacitor electrodes overlaps with a position of the corresponding gate line. The manufacturing method of claim 6, wherein the step of forming the capacitor electrodes further comprises: forming a metal electrode; and forming a transparent electrode connected to the metal electrode. The manufacturing method of claim 6, further comprising: forming a plurality of organic thin films on the second insulating layer; and forming a plurality of reflective layers on the organic thin films. The manufacturing method of claim 6, further comprising: forming a plurality of drain openings in the second insulating layer; and in the step of forming the pixel electrodes in the second insulating layer, The pixel electrodes are electrically connected to the drain electrodes through the drain openings.