TWI428973B - Substrate strip with multi fiducial marks and its cutting method during encapsulating - Google Patents

Description

Multi-alignment mark substrate strip structure and cutting method thereof

The present invention relates to a wafer carrier for a semiconductor device, and more particularly to a substrate strip structure for a multi-alignment mark and a method of cutting the same when packaged.

The semiconductor devices on the market today are all fabricated in a batch manner, and a plurality of substrate units arranged in a matrix are defined in advance on the surface of the substrate strip of the printed circuit board by using the retort of the grid, and then the die is bonded. Bond), wire bond, and encapsulation processes. After the package is completed, most of the cutting operations are required to separate the substrate units from the substrate strip, thereby forming individual semiconductor package structures, or stacking and integrating a plurality of semiconductor package structures into a package package. , POP), to supply the various needs of the market. Although the surface of the substrate strip defines a plurality of dicing streets, it is usually necessary to perform a cutting operation on the substrate strip in accordance with the alignment mark as a positioning point reference in the cutting process. The alignment mark is generally located at the periphery of the substrate strip, or at the intersection of the cutting path at the four corners of the substrate unit.

As shown in FIG. 1 , a conventional substrate strip structure 100 for a SMD pad, in particular, a substrate strip for a package (POP), mainly comprising a substrate strip body 110 and a solder mask layer. The substrate strip body 110 has a plurality of substrate units 113 arranged in a matrix, and a plurality of external pads 120 and a plurality of plating lines 130 are formed on the ball-forming surface of the substrate strip body 110. The external pads 120 are located in the substrate units 113. The plating lines 130 are staggered between the substrate units 113 and the periphery. The plurality of connection holes 141 of the solder mask layer partially expose the external pads 120, that is, the connection holes 141 are smaller than the outer pads 120 to cover the periphery of the external pads 120, so that the external connections Pad 120 is a solder mask defined (SMD) type. In addition, the plurality of openings 142 of the solder mask layer expose the plating lines 130 between the substrate units 113. The plating lines 130 are crossed at the corners of the substrate units 113. Under the exposure of the openings 142, a plurality of non-welding covers are defined to define the alignment marks 132 at the intersection of the cutting paths. As a benchmark when cutting. In this way, it is not necessary to design the alignment mark in the substrate unit 113, and the closest to the substrate unit 113, which meets the requirements of the precise alignment cutting channel of the high-density package.

As shown in FIG. 2A, in the prior art, the substrate strip structure 100 should have no offset when the solder mask layer and the substrate strip body 110 are ideal. The connection holes of the solder mask layer in the original substrate strip design. The 141 should be aligned at the central portion of the outer pads 120, and the openings 142 should completely reveal the non-welding caps defining the alignment marks 132. After the substrate strip body 110 is subjected to a cutting operation to separate the substrate units 113, the portions of the external pads 120 exposed to the connection holes 141 may be kept at a predetermined distance from the edges of the substrate units 113, such as solder balls. After the external terminals are set, they are not too close to the edge of the cut package structure. However, as shown in FIG. 2B, in fact, because of the precision of the machine and the process tolerance of the manufacturing of the solder mask layer, the solder mask layer and the substrate strip body 110 do not exhibit an offset as in the above ideal state. The standard tolerance of the offset of the cover layer is +/- 50 micrometers (μm). When the solder mask layer is offset, it indicates that all the connection holes 141 and the openings 142 of the solder mask layer are offset, that is, the positions of the connection holes 141 are changed and cannot be aligned with the holes. The central portion of the external pad 120 is even offset to the periphery of the external pads 120, thereby causing the offset of the external terminals. However, the center of the alignment mark 132 is defined by the non-welding caps as a reference during the cutting, and the distance between the portions of the external pads 120 exposed by the connecting holes 141 and the edges of the substrate units 113 is changed. Therefore, after the external terminals are disposed on the portions of the external pads 120 exposed by the connecting holes 141, the distance between the external terminals and the edge of the packaged package structure is too close, resulting in the distribution position of the external terminals and the original design feet. The position of the bit is different, which in turn causes various possible problems in subsequent surface bonding.

In view of this, the main object of the present invention is to provide a multi-paragraph substrate strip structure and a cutting method thereof, which can improve the precision of the package structure in cutting, so as to avoid the external terminal being too close to the cut after packaging. The edge of the package construction.

The object of the present invention and solving the technical problems thereof are achieved by the following technical solutions. The invention discloses a substrate strip structure of a multi-alignment mark, comprising a substrate strip body, a plurality of external pads, a plurality of plating lines and a solder mask layer. The substrate strip system has a die cover and a ball-forming surface, and the substrate strip body is a plurality of substrate units integrally formed and arranged in a matrix, and a plurality of cutting paths between the substrate units and the periphery, wherein the substrate strips The cutting channel comprises at least one X-axis cut and at least one Y-axis cut. The external pads are disposed on the ball placement surface and located in the substrate units. The plating lines are disposed on the ball-forming surface and located in the cutting lanes, and a metal pad is formed at the intersection of the X-axis cutting channel and the Y-axis cutting track, and a periphery is formed on the periphery of the substrate strip body. The first non-weld cover defines an alignment mark and a second non-weld cover define an alignment mark, respectively located in the X-axis cut track and the Y-axis cut track. The solder mask layer is formed on the ball-covering surface, the solder mask layer has a plurality of connecting holes for exposing the external pads, a matching hole for partially exposing the metal pads, and a plurality of exposed first first solder masks The alignment mark and the second non-welding cover define an opening of the alignment mark, wherein the connection holes are smaller than the external pads, so that the external pads are of a solder mask defining type, and the metal pad is exposed to the The portion of the alignment hole is formed as a solder mask defining an alignment mark, wherein the first non-weld cover defining the alignment mark and the second non-weld cover defining the alignment mark are adjacent to the metal pad as The weld cap defines a reference point for the offset value of the alignment mark. The present invention further discloses a cutting method suitable for use in the substrate strip structure package of the above multi-alignment mark.

The object of the present invention and solving the technical problems thereof can be further achieved by the following technical measures.

In the foregoing substrate strip configuration, the alignment hole and the non-welded cover defining the alignment mark may be in a cross shape.

In the foregoing substrate strip construction, the solder mask layer may cover the portions of the plating line outside the metal pad, the first non-weld cover defining the alignment mark and the second non-weld cover defining the alignment mark.

In the foregoing substrate strip construction, the external pads may be peripherally arranged.

In the foregoing substrate strip construction, the openings may be circular, and the aperture is not less than twice the value of the position deviation of the alignment mark defined by the solder mask.

It can be seen from the above technical solutions that the multi-paragraph substrate strip structure of the present invention and the cutting method thereof during packaging have the following advantages and effects: 1. The X-axis and Y-axis cutting channels can be formed by electroplating lines. The metal pad of the intersection and the first non-welding cover in the X-axis and Y-axis cutting lane define the alignment mark and the second non-welding cover define the alignment mark and the alignment hole of the welding cover layer partially exposes the metal pad The position is formed as a specific combination relationship of the welding cap defining the alignment mark as one of the technical means, even if the welding cap defines the alignment mark to change position due to the offset of the alignment hole of the welding cap layer, the first non-welding cover defines the pair The bit mark and the second non-weld cover define the alignment mark to not change its original position due to the opening offset of the solder mask layer, so it can be used as a reference point for calculating the deviation of the position mark of the welding cap defining the alignment mark, Conducive to the progress of the cutting action. Therefore, the accuracy of the package construction can be improved, so that the external terminals after packaging are too close to the edge of the cut package structure.

The embodiments of the present invention will be described in detail below with reference to the accompanying drawings in which FIG. The components and combinations related to this case, the components shown in the figure are not drawn in proportion to the actual number, shape and size of the actual implementation. Some size ratios are proportional to other related sizes or have been exaggerated or simplified to provide clearer description of. The actual number, shape and size ratio of the implementation is an optional design, and the detailed component layout may be more complicated.

According to an embodiment of the present invention, a substrate strip structure of a multi-alignment mark is illustrated in the top view of FIG. 3, a partially enlarged view of FIG. 4, and a fifth view of the long side parallel direction of the substrate strip body. A partial cross-sectional view of a substrate unit and a partial cross-sectional view taken along line X of the X-axis. The multi-alignment substrate strip structure 200 includes a substrate strip body 210, a plurality of external pads 220, a plurality of plating lines 230, and a solder mask layer 240.

Referring to FIG. 3, and in conjunction with FIG. 5, the substrate strip body 210 has a mold cover 211 and a ball-fitting surface 212. The substrate strip body 210 is a plurality of substrate units integrally formed and arranged in a matrix. 213 and a plurality of dicing streets 214 located between the substrate unit 213 and the periphery, wherein the dicing streets 214 comprise at least one X-axis dicing street 214A and at least one Y-axis dicing street 214B. Specifically, the material of the substrate strip body 210 may be a bismaleimide-triazine resin (BT), and the mold cover 211 and the spherical surface 212 are two. The opposite surface, such as the surface shown in Fig. 3, is the spherical surface 212, and the mold cover 211 is located on the back side of the spherical surface 212, so the mold cover 211 cannot be labeled in Fig. 3. More specifically, the die cover 211 is used as a surface for providing a sealant, and the ball face 212 is used as a surface for arranging the external pads 220 and the plating wires 230. The substrate unit 211 can be used as a wafer carrier of a semiconductor package structure after dicing and separating. The so-called "X-axis cutting lane" is a cutting lane parallel to the longer side of the substrate strip structure 200, and the so-called "Y-axis cutting lane" is parallel to the substrate strip structure 200. Short side cutting road.

Referring to FIG. 4 , and in conjunction with FIG. 6 , the external pads 220 are disposed on the ball-forming surface 212 and located in the substrate units 213 , wherein the external pads 220 are located in each of the substrate units 213 . The external terminals, such as solder balls, are provided for the external connection of the substrate units 213. In this embodiment, the external pads 220 may be arranged in a perimeter, for example, may be arranged in a single row or in a double row around the periphery of each substrate unit 213. Alternatively, the external pads 220 may be arranged in a matrix or disposed at a central portion or a single side of the substrate units 213 to accommodate the configuration of the pins of different products.

Referring to FIG. 4, and in conjunction with FIG. 6, the plating lines 230 are disposed on the ball-forming surface 212 and located in the cutting channels 214, and are cut on the X-axis cutting path 214A and the Y-axis. A metal pad 231 is formed at the intersection of the track 214B, and a first non-solder mask defined (NSMD) alignment mark 232 and a second non-welded cover are defined around the substrate strip body 210 ( Non-solder mask defined, NSMD) alignment mark 233, the first non-weld cover defining alignment mark 232 is located in the X-axis cutting lane 214A, and the second non-welding cover defining alignment mark 233 is located on the Y-axis Inside the cutting lane 214B. In detail, the plating lines 230 are metal wires for plating the external pads 220. Generally, the plating lines 230 may be made of copper. In this embodiment, after the solder mask layer 240 is formed on the substrate strip body 210, a plating layer 250 may be formed on the external pads 220, the metal pads 231, and the first plating layer 230. A non-weld cover defines the alignment mark 232 and the second non-weld cover defines the exposed top surface of the alignment mark 233, and the plating layer 250 is made of nickel gold or gold to have better oxidation resistance. Specifically, the plating layer 250 is coated on the external pads 220 to increase the bonding force between the external pads 220 and the external terminals, and the plating layer 250 is coated on the metal pads 231 and the alignment marks 232. 233, the metal pad 231, the non-welding cover defining the exposed portions of the alignment marks 232, 233 can be presented as a bright surface, and has better recognition. The metal pad 231 is formed in a cross shape just at the intersection of the two electroplating lines 230. Alternatively, in a variant, the shape of the metal pad 231 may also be changed to a circle, a square, a diamond or the like. In a preferred embodiment, the first non-weld cover defining alignment mark 232 and the second non-weld cover defining the alignment mark 233 may be in a cross shape to help identify the first non-weld cover defining pair. The position mark 232 and the second non-welding cover define the center of the alignment mark 233, but are disposed at different positions of the substrate strip body 210, and can be respectively used to measure the welding mask to define the alignment mark on the Y-axis and the X-axis. Bit deviation value.

Referring to FIG. 4, and in conjunction with FIG. 6, the solder mask layer 240 is formed on the ball-covering surface 212. The solder mask layer 240 has a plurality of connecting holes 241 for exposing the external pads 220. The alignment holes 242 of the metal pad 231 are partially exposed, and the plurality of openings 243 defining the alignment mark 232 and the second non-welding cover defining the alignment mark 233 are exposed. In this embodiment, the solder mask layer 240 can cover the plating lines 230 outside the metal pad 231, the first non-weld cover defining alignment mark 232 and the second non-welding cover defining the alignment mark 233. Other parts. Generally, the ball-forming surface 212 is in a exposed state except for the connecting holes 241 of the solder mask layer 240, the alignment holes 242 and the openings 243, and the remaining line portions of the ball-forming surface 212 should be Covered by the solder mask layer 240. The connection holes 241 are smaller than the external pads 220, so that the external pads 220 are in a solder mask defined (SMD) type, and the metal pads 231 are exposed at the position of the alignment holes 242. Formed as a solder mask defining (SMD) alignment mark, that is, covering the periphery of the metal pad 231, so the center of the solder mask defining the alignment mark is determined by the shape size of the alignment hole 242, and The positional deviation direction and the offset amount of the alignment hole 242 are in synchronization with the positional deviation direction and the offset amount of the connection holes 241 of the solder mask layer 240. In a preferred embodiment, the alignment hole 242 can be a cross shape, and the metal pad 231 is exposed to the alignment hole 242 to exhibit a gold-plated cross shape, which is more advantageous for identifying the center position. In addition, the openings 243 may be circular, and the aperture is not less than twice the offset value of the alignment mark defined by the solder mask, such as a standard tolerance of a common solder mask offset of +/- 50 micrometers ( Μm), the apertures of the openings 243 can be designed to be no less than 100 micrometers (μm) to ensure that the openings 243 can still reveal the first non-weld mask after the solder mask layer 240 is offset. The alignment mark 232 and the second non-welding cover define a center point of the alignment mark 233. In particular, the first non-weld cover defining alignment mark 232 and the second non-welding cover defining the alignment mark 233 are adjacent to the metal pad 231 as a positional deviation value for calculating the alignment mark of the welding cap. The reference point and can define the original position of the X-axis cutting lane 214A and the Y-axis cutting lane 214B. The term "adjacent" as used herein means that the distance between the first non-welding cover defining the alignment mark 232 and the metal pad 231 and the distance between the second non-welding cover defining the alignment mark 233 and the metal pad 231 are not greater than The substrate units 213 are one-half the length of the same side. In general, the non-welding caps define the alignment marks 232, 233 to the metal pad 231 by a distance of about one-third or one-quarter of the same side length of the substrate units 213.

In summary, the present invention can form the metal pad 231 at the intersection of the X-axis dicing street 214A and the Y-axis dicing street 214B by the plating lines 230, and cut the X-axis tangential track 214A and the Y-axis. The first non-welding cover defining alignment mark 232 and the second non-welding cover defining the alignment mark 233 in the track 214B and the alignment hole 242 of the soldering cover layer 240 partially revealing a portion of the metal pad 231 Forming a specific combination relationship of the alignment marks for the solder mask as one of the technical means, even if the solder mask defines the alignment mark to change position due to the offset of the alignment hole 242 of the solder mask layer 240, the first The non-weld cover defining alignment mark 232 and the second non-weld cover defining the alignment mark 233 do not change their original position due to the offset of the openings 243 of the solder mask layer 240. Therefore, the first non-welding cover defining the alignment mark 232 and the second non-welding cover defining the alignment mark 233 can calculate the position deviation of the welding cover defining the alignment mark, thereby adjusting the cutting center to correct the setting The outer pads 220 externally connect the terminals to the edges of the package construction. Therefore, the accuracy of the package construction can be improved, so that the external terminals after packaging are too close to the edge of the cut package structure.

The present invention also discloses a dicing method for packaging the above-described multi-paragraph substrate strip structure 200 as illustrated in FIGS. 7A to 7C to demonstrate the effects of the present invention.

Referring to Figure 7A, a substrate strip construction 200 is provided as described above for the multi-alignment mark. The multi-paragraph substrate strip structure 200 includes the substrate strip body 210, the external pads 220, the plating lines 230 and the solder mask layer 240, since the substrate strip body 210 is shown in FIG. 7A. The die cover 211, so the external pads 220 located on the ball-facing surface 212, the plating lines 230 and the solder mask layer 240 cannot be marked in FIG. 7A, so please refer to the figures 3, 5 and 6 .

Referring to FIG. 7B, the die strip cover 211 of the substrate strip body 210 faces upward, and the substrate strip structure 200 is packaged. The plurality of wafers 30 are disposed on the substrate units 213, and the electrical The wafers 30 are connected to the substrate units 213. For example, the solder wires or the flip-chip bumps formed by wire bonding can electrically connect the wafers 30 and the substrate units 213. Then, a mold 40 is formed on the mold cover 211 of the substrate strip body 210. The sealant 40 does not need to completely cover the mold cover 211, but at least all of the substrate units 213 must be completely covered to ensure After being separated into a plurality of semiconductor package structures, the encapsulant 40 can surely cover the substrate units 213, thereby providing perfect protection. After the encapsulant 40 is formed, external terminals such as solder balls may be disposed on the external pads 220 to serve as solder terminals for external connection of the substrate units 213.

Referring to FIG. 7C, after the above steps are completed, a cutting path correction step is performed before the cutting, the substrate strip structure 200 is first fixed, and the welding mask defines the alignment mark, the first non-welding cover. The alignment mark 232 and the second non-weld cover define the alignment mark 233 toward the position detecting device in the cutting machine. Grasping the value of the Y-axis deviation between the alignment mark and the plating line 230 having the first non-welding cover defining the alignment mark 232, and taking a position between the two as the X-axis cutting path Amendment to 214A. The term "Y-axis deviation value" refers to the offset of the center of the welding mask defining the alignment mark (ie, the alignment hole 242) in the Y-axis direction, and the alignment mark can be defined by the welding mask (ie, the pair The center of the bit hole 242) is calculated by having the shortest distance of the plating line 230 of the first non-welding cover defining the alignment mark 232 in the same X-axis scribe line. And a suitable position may be taken between the center of the solder mask defining the alignment mark to the shortest distance of the plating line 230 having the first non-welding cover defining the alignment mark 232, for example: one-half or one-third At the same time, as the cutting reference corrected by the X-axis cutting path 214A. As shown in FIG. 7C, when the center of the solder mask defining the alignment mark (ie, the alignment hole 242) is shifted along the Y-axis, the cutting center line of the X-axis cutting path 214A should be along the Y-axis. Correct one-half or two-thirds of the Y-axis deviation value upwards. At the same time, the X-axis deviation value between the alignment mark and the plating line 230 having the second non-welding cover defining the alignment mark 233 is grasped, and one position between the two is taken as the Y-axis. Correction of the cutting track 214B. The term "X-axis deviation value" refers to the offset of the center of the alignment mark in the X-axis direction, and the center of the alignment mark (ie, the alignment hole 242) can be defined by the welding cap to The shortest distance of the plating line 230 defining the alignment mark 233 in the same Y-axis scribe line is calculated by the second non-welding cover. And a suitable position may be taken between the center of the solder mask defining the alignment mark to the shortest distance of the plating line 230 having the second non-welding cover defining the alignment mark 233, for example: one-half or one-third At the same time, the cutting reference is corrected as the Y-axis cutting path 214B. As shown in FIG. 7C, when the center of the solder mask defining the alignment mark (ie, the alignment hole 242) is shifted leftward along the X axis, the cutting center line of the Y-axis cutting path 214B should be along X. The axial left is corrected by one-half or two-thirds of the X-axis deviation value. Preferably, after the above-mentioned correcting action, the offset of the position of the post-cut package structure (ie, the distribution position of the external terminal) can be reduced to +/- 30 micrometers (μm), which is significantly smaller than the deviation of the solder mask layer 240. Move the tolerance.

Finally, the substrate strip body 210 is cut according to the modified X-axis scribe line 214A and the Y-axis dicing street 214B, so that each substrate unit 213 is separated into separate package configurations. In addition, since the modified X-axis scribe line 214A and the Y-axis dicing street 214B are closer to the original position design without the offset, after the substrate units 213 are cut to be separated into a plurality of semiconductor package structures, the arrangement is prevented. The external terminals of the external pads 220 are too close to the edge of the semiconductor package structure after cutting, thereby avoiding the uneven distribution of the terminals.

Referring to FIGS. 8A and 8B, a schematic cross-sectional view of the external terminal and the package structure edge is shown after the semiconductor package structure is formed by using the conventional substrate strip structure and the multi-alignment mark substrate strip structure of the present invention. As shown in FIG. 8A, when a solder mask layer 140 is disposed on the substrate unit 113, the connection holes 141 of the solder mask layer 140 cannot be aligned with the external pads 120 to form a Bit deviation value D1. Moreover, the positions of the external terminals 20 are determined by the connection holes 141. Therefore, the position deviation value D1 is also formed between the external terminals 20 and the centers of the external pads 120. Therefore, after the encapsulant 10 is formed and cut into separate package configurations, the external terminals 20 are too close to the edge 11 of the package structure, thereby causing various adverse effects when the surface is bonded. However, in the present invention, as shown in FIG. 8B, although the same process capability is utilized, the solder mask layer 240 may also be subjected to the above-mentioned offset, that is, the connection holes 241 and the external pads 220. A deviation value D2 is formed between D2 (D2 is equal to D1), and the connection holes 241 of the solder mask layer 240 are offset to change the distribution position of the external terminals 50, but the present invention is The welding cover defining alignment mark 232 and the second non-welding cover defining the alignment mark 233 calculate the position deviation value (ie, D2) of the welding cover defining the alignment mark, and then correct the actual cutting path, so the adjustment can be adjusted after cutting The distance between the external terminals 50 and the edge 41 of the package structure is such that the external terminals 50 are not too close to the edge 41 of the cut package structure due to the offset of the connection holes 241 of the solder mask layer 240. There will be no serious foot offsets. In a preferred embodiment, the trajectory correction distance D3 may be one-half of the position deviation value D2, or may be corrected to other suitable distances, for example, two-thirds, and the like.

The above is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention. Although the present invention has been disclosed in the above preferred embodiments, it is not intended to limit the present invention. Any simple modifications, equivalent changes and modifications made without departing from the technical scope of the present invention are still within the technical scope of the present invention.

10. . . Sealant

11. . . Package construction edge

20. . . External terminal

30. . . Wafer

40. . . Sealant

41. . . Package construction edge

50. . . External terminal

100. . . Substrate strip construction

110. . . Substrate strip body

113. . . Substrate unit

120. . . External pad

130. . . Plating line

132. . . Non-weld cover defines alignment mark

141. . . Connection hole

142. . . Opening

200. . . Multi-alignment mark substrate strip construction

210. . . Substrate strip body

211. . . Mold cover

212. . . Globular surface

213. . . Substrate unit

214. . . cutting line

214A. . . X-axis cutting

214B. . . Y-axis cutting

220. . . External pad

230. . . Plating line

231. . . Metal pad

232. . . First non-weld cover defines alignment mark

233. . . Second non-weld cover defines alignment mark

240. . . Welding mask

241. . . Connection hole

242. . . Alignment hole

243. . . Opening

250. . . Plating

D1, D2. . . Bit deviation value

D3. . . Cutting path correction distance

Figure 1 is a partial top plan view of a conventional substrate strip construction.

2A-2B: A schematic view of the outer surface of the conventional substrate strip structure when the solder mask layer is exposed without offset and offset.

Figure 3 is a top plan view of a multi-paragraph substrate strip construction in accordance with an embodiment of the present invention.

Figure 4 is a partially enlarged schematic view showing the construction of a plurality of alignment mark substrate strips in accordance with an embodiment of the present invention.

Fig. 5 is a partial cross-sectional view showing the substrate unit of the multi-alignment mark according to an embodiment of the present invention, which is cut in parallel with the long side of the substrate strip body.

Figure 6 is a partial cross-sectional view, taken along the X-axis scribe line, of a multi-paragraph substrate strip structure in accordance with an embodiment of the present invention.

7A to 7C are diagrams showing the components of the cutting method in the case of a multi-paragraph-marked substrate strip according to an embodiment of the present invention.

8A and 8B are schematic cross-sectional views showing the outer terminal and the package structure edge after the semiconductor package structure is formed by using the conventional substrate strip structure and the multi-alignment mark substrate strip structure of the present invention.

200. . . Multi-alignment mark substrate strip construction

210. . . Substrate strip body

213. . . Substrate unit

214. . . cutting line

214A. . . X-axis cutting

214B. . . Y-axis cutting

220. . . External pad

230. . . Plating line

231. . . Metal pad

232. . . First non-weld cover defines alignment mark

233. . . Second non-weld cover defines alignment mark

241. . . Connection hole

242. . . Alignment hole

243. . . Opening

Claims (10)

A substrate strip structure comprising a plurality of alignment marks, comprising: a substrate strip body having a die cover and a ball-planting surface, wherein the substrate strip body is a plurality of substrate units integrally formed and arranged in a matrix, and the plurality of substrates are located a scribe line between the substrate unit and the periphery, wherein the scribe lines comprise at least one X-axis scribe line and at least one Y-axis dicing track; a plurality of external pads are disposed on the ball-forming surface and located in the substrate units a plurality of electroplating lines are disposed on the ball-facing surface and located in the cutting lanes, and a metal pad is formed at an intersection of the X-axis cutting lane and the Y-axis cutting lane, and around the substrate strip body Forming a first non-welding cover defining alignment mark and a second non-welding cover defining alignment marks respectively located in the X-axis cutting lane and the Y-axis cutting lane; and a solder mask layer formed on the spherical surface The solder mask layer has a plurality of connection holes exposing the external pads, a registration hole partially exposing the metal pads, and a plurality of first non-welding cover defining alignment marks and the second non-welding cover Defining the alignment mark An opening, wherein the connecting holes are smaller than the external pads, so that the external pads are defined as a solder mask, and the portion of the metal pad exposed in the alignment hole is formed as a solder mask defining an alignment mark The first non-weld cover defining alignment mark and the second non-weld cover defining an alignment mark are adjacent to the metal pad as a reference point for calculating a position deviation value of the welding cap defining the registration mark. The substrate strip construction according to the multi-paragraph mark of the first aspect of the patent application, wherein the alignment hole and the non-welding cover define the alignment mark as a cross. The substrate strip structure of the multi-alignment mark according to claim 1 or 2, wherein the solder mask layer covers the plating lines at the metal pad, the first non-weld cover defines an alignment mark and the second non- The weld cap defines a portion other than the alignment mark. The substrate strip structure of the plurality of alignment marks according to the first or second aspect of the patent application, wherein the external pads are arranged in a periphery. The substrate strip construction according to the multi-paragraph mark of the first or second aspect of the patent application, wherein the openings are circular, and the aperture diameter is not less than twice the value of the position deviation of the alignment mark defined by the solder mask. A method for cutting a multi-paragraph substrate strip package comprises: providing a substrate strip structure as in the multi-position mark of claim 1; and encapsulating the substrate strip structure, which is provided in plurality Was on the substrate unit, and electrically connecting the wafers to the substrate units, and then forming a gel on the mold cover of the substrate strip body; grasping the solder mask to define the alignment mark and having the first The non-welding cover defines a Y-axis deviation value between the plating lines of the alignment mark, and takes a position between the two as a correction of the X-axis cutting track; grasping the welding cover defines the alignment mark and the above-mentioned The second non-welding cover defines the X-axis deviation value between the plating lines of the alignment mark, and takes a position between the two as a correction of the Y-axis cutting path; and according to the corrected X-axis cutting path and the Y-axis Cutting the track to cut the substrate strip body. The method for cutting a package according to the multi-position mark substrate strip of claim 6 of the patent application scope, wherein the alignment hole and the non-welding cover define the alignment mark as a cross shape. The method for cutting a package according to the multi-position mark substrate strip of claim 6 or 7, wherein the solder mask layer covers the electroplated lines, and the first non-weld cover defines an alignment mark And the second non-welding cover defines a portion other than the alignment mark. The method for cutting a package according to a plurality of alignment mark substrate strips according to the sixth or seventh aspect of the patent application, wherein the external pads are arranged in a periphery. The method for cutting a package according to the multi-position mark substrate strip of claim 6 or 7, wherein the openings are circular, and the aperture diameter is not less than a deviation value of the alignment mark defined by the solder mask Twice.