TWI427699B - Group iii-nitride semiconductor layer, group iii-nitride semiconductor device and manufacturing method thereof - Google Patents

Description

Group III nitride semiconductor layer, group III nitride semiconductor device, and method of manufacturing the same

The present invention relates to a group III nitride semiconductor layer, a group III nitride semiconductor device, and a method of fabricating the same.

With the development of the optoelectronic industry, various optoelectronics devices and microelectronics device devices developed on the basis of semiconductor components have been invented, for example, group III-nitride semiconductor. The gallium nitride (GaN) layer has been widely used in ultraviolet to blue-green light-emitting diodes, short-wavelength laser diodes, and high electron current-rate components.

For example, in order to fabricate a gallium nitride layer, a long crystal substrate, such as a sapphire substrate, is used, followed by vapor-phase synthesis to form a gallium nitride layer on the long crystal substrate. For use in subsequent manufacturing components.

However, since the lattice constant of the gallium nitride layer and the long crystal substrate do not match, the gallium nitride layer formed on the sapphire substrate has many defects, wherein the defect density can be as high as 10 ^8-9 cm ^-2 . In addition, the long crystal substrate itself may have some undesirable characteristics such as low heat transfer coefficient, non-conductivity, and improper splitting lattice surface. Therefore, in the manufacturing method of the conventional gallium nitride layer, when the gallium nitride layer has been formed on the long crystal substrate, the long crystal substrate is removed to use the gallium nitride layer for subsequent use.

At present, there are several methods for removing a long crystal substrate, for example, grinding a long crystal substrate by mechanical grinding to remove a long crystal substrate, but this method is not only time consuming but also requires precise operation to achieve Large area of polishing flatness. For another example, the long crystal substrate is etched by dry etching or wet etching to separate the long crystal substrate. However, the stability of the long crystal substrate is extremely high, resulting in a slow etching speed. For example, in a laser ablating manner, the laser light is focused on the interface between the gallium nitride layer and the long crystal substrate, and This interface performs laser melt loss to remove the long crystal substrate. However, the laser melting device is expensive, and the area where the melt is damaged is small, resulting in a large amount of process time.

Therefore, how to provide a group III nitride semiconductor layer and a group III nitride semiconductor device which can reduce manufacturing time is one of the important issues in the current industry.

In view of the above problems, an object of the present invention is to provide a group III nitride semiconductor layer, a group III nitride semiconductor device, and a method for fabricating the same, which can reduce the processing time.

In order to achieve the above object, a method of fabricating a group III nitride semiconductor device according to the present invention comprises at least the steps of: forming a group III nitride semiconductor layer on a substrate, wherein the group III nitride semiconductor layer has a surface connected to the substrate And etching the group III nitride semiconductor layer from the surface connected to the substrate.

To achieve the above object, a method for fabricating a group III nitride semiconductor layer according to the present invention comprises at least the steps of: forming a group III nitride semiconductor layer on a substrate, wherein the group III nitride semiconductor layer has a surface connected to the substrate And etching the group III nitride semiconductor layer from the surface connected to the substrate.

To achieve the above object, a group III nitride semiconductor device according to the present invention comprises a group III nitride semiconductor layer and a further group III nitride semiconductor layer. The group III nitride semiconductor layer has at least one via or at least one trench, and another group III nitride semiconductor layer is disposed on the group III nitride semiconductor layer and filled with vias or trenches, wherein the group III nitride semiconductor layer and Another group III nitride semiconductor layer has a connection face therebetween, wherein the connection face comprises at least a perforated inner wall or a groove inner wall.

As described above, the group III nitride semiconductor layer and the group III nitride semiconductor device of the present invention and the method of manufacturing the same are the surface of the group III nitride semiconductor layer which is bonded to the substrate. In other words, the present invention etches the surface of the group III nitride semiconductor and the substrate to separate the group III nitride semiconductor layer from the substrate. Unlike the prior art, the substrate is directly subjected to mechanical polishing, dry-wet etching or laser irradiation. The melt loss, therefore, the manufacturing method of the present invention can reduce the process time.

Hereinafter, a group III nitride semiconductor layer, a group III nitride semiconductor device, and a method of manufacturing the same according to a preferred embodiment of the present invention will be described with reference to the related drawings. Among them, the group III nitride semiconductor layer and the group III nitride semiconductor device can be applied to various optoelectronic components and microelectronic components, for example, a light emitting diode, a short-wavelength laser diode, and a high electron mobility element.

Referring to FIG. 1, a method for fabricating a group III nitride semiconductor device according to a preferred embodiment of the present invention includes at least steps S11 to S12.

Step S11 is to form a group III nitride semiconductor layer on a substrate, and the group III nitride semiconductor layer has a surface connected to the substrate. The substrate may be a sapphire substrate, a tantalum carbide substrate, a germanium substrate, a gallium arsenide substrate, or a zinc oxide substrate, etc., and the above is only an example, and any substrate suitable for the growth of the crystal should belong to the substrate. In addition, the method of forming the group III nitride semiconductor layer on the substrate may be, for example, Vapor Phase Epitaxy (VPE), Liquid Phase Epitaxy (LPE), or molecular beam epitaxial growth. (Molecular Beam Epitaxy, MBE), wherein the vapor phase epitaxial growth is, for example, Metal-Organic Chemical Vapor Deposition (MOCVD), or Hydride Vapor Phase Epitxy (HVPE), or The growth of the organometallic chloride, etc., is merely exemplified above, and any manner of forming the group III nitride semiconductor layer on the substrate should belong to it. Furthermore, the Group III nitride semiconductor material may comprise aluminum nitride, or indium nitride, or gallium nitride aluminum, or indium gallium nitride, or indium aluminum nitride, or indium gallium aluminum nitride, or a combination thereof. Further, the thickness of the group III nitride semiconductor layer can be changed depending on actual manufacturing needs, for example, several μm.

It is specifically noted that the surface to which the group III nitride semiconductor layer is bonded to the substrate may have different aspects depending on the actual process, and may be, for example, a continuous surface or a discontinuous surface. For example, referring to FIG. 1A, it is shown that the group III nitride semiconductor layer 11 is connected to the substrate 12 by a discontinuous surface 111. The discontinuous surface 111 is formed by first disposing a discontinuous barrier layer 13 on the substrate 12, and then forming a group III nitride semiconductor layer 11 on the barrier layer 13 to make the group III. Only a part of the surface of the nitride semiconductor layer 11 is in contact with the substrate 12, that is, the substrate 12 is connected by the discontinuous surface 111. The material of the barrier layer 13 may vary according to actual needs. Here, cerium oxide (SiO ₂ ) is taken as an example. The manner in which the discontinuous barrier layer 13 is formed may also differ depending on actual needs. Here, the lithography process and the etching process are exemplified. Furthermore, please refer to FIG. 1B, which shows another aspect in which the group III nitride semiconductor layer 11 is connected to the substrate 12 by a discontinuous surface 112. The method for forming the discontinuous surface 112 is to first roughen the surface 121 of the substrate 12, for example, by using an etching solution to roughen, and etching or partially etching to form a completely rough surface 121, or only The partially region roughened surface 121 is then further formed on the substrate 12 such that the III-nitride semiconductor layer 11 is in contact with the substrate 12 as a discontinuous surface 112.

If the manufactured semiconductor element is a light-emitting diode, the discontinuous surfaces 111, 112 formed by the above manner can contribute to the extraction of light from the light-emitting diode. Furthermore, referring to FIG. 1C, which shows that the group III nitride semiconductor layer 11 is connected to the substrate 12 by a continuous surface 113, the continuous surface 113 is manufactured by directly applying the entire surface group III nitride. The semiconductor layer 11 is formed on the substrate 12 such that the group III nitride semiconductor layer 11 is in contact with the substrate 12 with the continuous surface 113.

Step S12 is etching the group III nitride semiconductor layer from the surface connected to the substrate. In this embodiment, the group III nitride semiconductor layer is etched from the surface by at least one etching solution, wherein the etching solution may be potassium hydroxide (KOH), sulfuric acid (H ₂ SO ₄ ), phosphoric acid (H). Chemical liquids such as ₃ PO ₄ ) and hydrochloric acid (HCl), which may be in the form of an aqueous or liquid phase depending on actual manufacturing requirements. For example, the substrate and the group III nitride semiconductor layer can be placed in an environment of more than 200 ° C, and a high concentration aqueous KOH solution or liquid phase KOH can be used. Solution) etching the surface of the group III nitride semiconductor layer and the substrate, as exemplified above, any etching of the group III nitride semiconductor layer and the substrate connecting surface portion with respect to the long crystal substrate is preferably selectively etched The liquid should belong to it. It is particularly noted here that the appropriate process parameters can be adjusted according to actual needs during operation, after etching the surface (step S12), at least partially separating the group III nitride semiconductor layer from the substrate, or the group III nitride semiconductor The layer is completely separated from the substrate for subsequent fabrication of the group III nitride semiconductor device.

Since the method of manufacturing the group III nitride semiconductor device of the present invention is to etch the surface of the group III nitride semiconductor layer connected to the substrate, in other words, the present invention etches the surface of the group III nitride semiconductor layer and the substrate, but is different from It is known that the substrate is subjected to mechanical polishing, dry-wet etching or laser melting loss, and therefore, the manufacturing method of the present invention can reduce the processing time.

In order to clarify the manufacturing method of the group III nitride semiconductor device of the present invention, a plurality of examples will be exemplified below to explain the above-described manufacturing method in detail. Further, for convenience of explanation, the following description will be made by taking, for example, a case where the surface to which the group III nitride semiconductor layer and the substrate are connected is a continuous surface.

First embodiment

Referring to FIG. 2 and FIG. 3A to FIG. 3C simultaneously, the method of manufacturing the group III nitride semiconductor device includes steps S21 to S22.

As shown in FIG. 2 and FIG. 3A, step S21 is to form a group III nitride semiconductor layer 21 on a substrate 22, and the group III nitride semiconductor layer 21 has a surface 211 connected to the substrate 22. The manufacturing method of step S21 has been described in detail in the foregoing step S11, and details are not described herein. The group III nitride semiconductor layer 21 of the present embodiment is exemplified by a gallium nitride semiconductor layer, and the surface 211 is a continuous surface, and the substrate 22 of the present embodiment is exemplified by a sapphire substrate.

Referring to FIG. 2 and FIG. 3B, step S22 is to infiltrate the surface 211 of the group III nitride semiconductor layer 21 and the substrate 22 from the edge S1 of the substrate 22 and the group III nitride semiconductor layer 21 by using at least one etching liquid 23, The etching is performed by the group III nitride semiconductor layer 21, wherein the selection of the etching liquid 23 has been described in detail in step S12. When the etching is performed, the group III nitride semiconductor layer 21 and the substrate 22 may be immersed together in the etching liquid so that the height of the etching liquid exceeds the surface 211. In addition, in the present embodiment, the step of etching the group III nitride semiconductor layer 21 (step 22) is performed until a portion of the surface 211 of the group III nitride semiconductor layer 21 is separated from the substrate 22 (as shown in FIG. 3C). That is to say, the group III nitride semiconductor layer 21 and the substrate 22 can still have partial connections. Since the thickness of the group III nitride semiconductor layer 21 is too thin to be easily handled, there is an operational advantage in keeping the group III nitride semiconductor layer 21 and the substrate 22 still connected to facilitate the subsequent process. Of course, the manufacturer can also completely separate the group III nitride semiconductor layer from the substrate (not shown) when performing step S22 according to actual needs.

Second embodiment

Referring to FIG. 4 and FIG. 5A to FIG. 5K simultaneously, the method of manufacturing the group III nitride semiconductor device includes steps S31 to S36.

As shown in FIG. 4 and FIG. 5A, step S31 is to form a group III nitride semiconductor layer 31 on a substrate 32, and the group III nitride semiconductor layer 31 has a surface 311 connected to the substrate 32. The manufacturing method of step S31 has been described in detail in the foregoing step S11, and details are not described herein. The group III nitride semiconductor layer 31 of the present embodiment is exemplified by a gallium nitride semiconductor layer, and the substrate 32 of the present embodiment is exemplified by a sapphire substrate.

As shown in FIG. 4 and FIG. 5B to FIG. 5E, in step S32, at least one via 312 is formed on the group III nitride semiconductor layer 31 by a Lithography process and an etching process, so that the substrate 32 corresponding to the through hole 312 is formed. The area is exposed. When the via 312 is formed, first, a protective layer 33 may be formed on the group III nitride semiconductor layer 31 (as shown in FIG. 5B), and then a hole 331 is formed in the protective layer 33 by a lithography process such as exposure and development. 5C), to define the position of the via 312 of the group III nitride semiconductor layer 31, and then forming a via 312 on the group III nitride semiconductor layer 31 by an etching process using dry etching or wet etching (as shown in FIG. 5D). Show). The dry etching includes reactive ion etching (RIE) or inductively coupled plasma (ICP), and the wet etching comprises using a chemical liquid such as potassium hydroxide, sulfuric acid, phosphoric acid, hydrochloric acid or the like to perform the group III nitride semiconductor layer. Etching. For example, the substrate 32 and the group III nitride semiconductor layer 31 can be placed at more than 200 ° C, and the group III nitride semiconductor layer 32 can be etched using a high concentration aqueous potassium hydroxide solution or liquid potassium hydroxide. A perforation 312 is formed. The above is merely an example, and any manner in which the through holes 312 can be formed on the group III nitride semiconductor layer should belong to it.

Finally, the protective layer 33 is removed (as shown in Fig. 5E). The material of the protective layer 33 can be set according to actual needs, for example, it can be a commonly used photoresist material, and of course, it can also be a silicon nitride (Si ₃ N ₄ ) or a nickel (Ni). Tris(Si ₃ N ₄ ) can be etched by Buffered Oxide Etching (BOE), and nickel (Ni) can be etched by nitric acid (HNO ₃ ). In addition, the lithography process is an existing technology and will not be described in detail herein. It should be noted that, in the present embodiment, the removal of the protective layer 33 is the step performed at the end of step S32. However, the step of removing the protective layer 33 may also be performed after step S33 and before step S34, and thus, the above changes The aspects should all fall within the scope of the present invention.

As shown in FIG. 4 and FIG. 5F to FIG. 5G, step S33 is performed by infiltrating the surface 311 of the group III nitride semiconductor layer 31 via the via hole 312 of the group III nitride semiconductor layer 31 with at least one etching liquid 34 to be surface 311. The group III nitride semiconductor layer 31 is subjected to surface etching, wherein the etching liquid 34 is selected in the same manner as the etching in step S12, and will not be described in detail herein. In addition, in the present embodiment, the step of etching the group III nitride semiconductor layer 31 (step S33) until a portion of the surface 311 of the group III nitride semiconductor layer 31 is separated from the substrate (as shown in FIG. 5G) for subsequent group III Fabrication of nitride semiconductor components. Specifically, the size, the number, the pitch, and the shape of the through holes 312 formed in step S32 (as shown in FIG. 5H, which is a schematic plan view of the group III nitride semiconductor layer 31, the perforations 312 are exemplified by an array), etc. The parameters may be changed according to actual manufacturing requirements. For example, if the etching rate of the etching liquid 34 used in step S33 is faster on the surface 311, the spacing between the through holes 312 may be wider than the design. This limitation is in the scope of the invention. In addition, the perforation of step S32 can also be replaced by a groove, wherein the parameters such as the size, the number, the spacing, the shape and the arrangement of the grooves can be changed according to actual manufacturing requirements, for example, as shown in FIG. 5I, which are arranged to be spaced apart from each other. 313, which is shown, for example, in FIG. 5J, shows trenches 314 and trenches 315 that are interdigitated. The manner in which the trenches are disposed may also be planned according to the size of the semiconductor component. For example, in FIG. 5J, each region R formed by the trenches 314 and the trenches 315 may be a basic unit of each semiconductor element, so that the manufacturer can The design of the trenches defines the size of the semiconductor components.

As shown in FIG. 4 and FIG. 5K, step S34 is to form a further group III nitride semiconductor layer 35 on the group III nitride semiconductor layer 31, and the thickness of the other group III nitride semiconductor layer 35 may be according to actual manufacturing needs. Alternatively, in the present embodiment, for example, the thickness of at least the through-hole 312 may be filled, or the upper surface of the group III nitride semiconductor layer 31 may be thickened to make the upper surface flat. In addition, the method of forming another group III nitride semiconductor layer 35 on the group III nitride semiconductor layer 31 is similar to step S11, for example, vapor phase epitaxial growth, liquid phase epitaxial growth, or molecular beam epitaxial growth. Other methods are not described here. Furthermore, in the present embodiment, the material of the other group III nitride semiconductor layer 35 and the group III nitride semiconductor layer 31 may be the same, in other words, step S34 forms another group III nitride semiconductor layer 35 for the group III nitrogen. The step of forming the semiconductor layer 31 is to fill the vias 312 to thicken and planarize the upper surface of the group III nitride semiconductor layer. It is particularly noted here that FIG. 5K shows another example in which the other group III nitride semiconductor layer 35 is completely filled with the vias 312, but is not limited thereto, for example, another group III nitride semiconductor layer 35. It is also possible to fill only a portion of the perforations 312 (as shown in FIG. 5L) in a manner that the lateral growth of the other group III nitride semiconductor layer 35 can be controlled to be lower than the longitudinal growth rate, so that the inner wall of the perforations 312 The rate at which another group III nitride semiconductor layer 35 is grown is smaller than the rate at which another group III nitride semiconductor layer 35 is grown on the group III nitride semiconductor layer 31. Therefore, the through hole portion 312 of the filling portion can be designed such that the through hole 312 is not filled by another group III nitride semiconductor layer 35, and there are still voids, which can be used as a cutting line for each semiconductor element cutting process, or It is a break at the time when the force of the semiconductor element is broken.

As shown in FIGS. 4 and 5M, the substrate 32 and the group III nitride semiconductor layer 31 are separated in step S35 so that the surface 311 is exposed. In this embodiment, the step of separating the substrate 32 from the group III nitride semiconductor layer 31 may be heating, cooling, etching, excimer laser or mechanical force on the group III nitride semiconductor layer to separate the substrate. 32 and a group III nitride semiconductor layer 31. In detail, since the coefficient of thermal expansion between the group III nitride semiconductor layer 31 and the substrate 32 is different, and the surface 311 of the group III nitride semiconductor layer 31 is largely separated from the substrate (after step S33 is performed), the transmission is heated. The cooling of the group III nitride semiconductor layer 31 and the substrate 32 can be completely separated. For example, the substrate 32 and the group III nitride semiconductor layer 31 may be immersed in the etching solution, and the etching liquid is selected as described in step S12, and is not described herein. At this time, since the surface 311 of the group III nitride semiconductor layer 31 has largely been separated from the substrate (after step S33 is performed), the etching liquid penetrates into the surface 311 via the edge between the substrate 32 and the group III nitride semiconductor layer 31. The separation between the group III nitride semiconductor layer 31 and the substrate 32 is completely separated, wherein the etching solution has been described in detail in step S12, and is not described here, for example. The substrate and the group III nitride semiconductor layer can be placed in an environment of 150 ° C, and the surface of the group III nitride semiconductor layer is etched using liquid potassium hydroxide, and it takes about several minutes to complete the etching of the surface. In addition, in the case of using a pseudo-molecular laser, since the surface 311 of the group III nitride semiconductor layer 31 has largely been separated from the substrate (after step S33 is performed), the required processing time is greatly reduced as compared with the prior art. .

As shown in FIGS. 4 and 5N, step S36 is to planarize the surface 311 of the group III nitride semiconductor layer 31 to subsequently fabricate a group III nitride semiconductor device. In the present embodiment, the step of planarizing the surface 311 may be determined according to actual needs, and may be performed by using a conventional planarization technique, for example, by chemical, mechanical, or chemical mechanical polishing. For the sake of example only, any embodiment that can be planarized is within the scope of the invention.

In addition, please refer to FIG. 6 , which is different from FIG. 4 , and the method for manufacturing the group III nitride semiconductor device of FIG. 6 further includes step S37, wherein please refer to FIG. 6 , FIG. 7A and FIG. 7B simultaneously. In the step S37, a carrier plate 36 is disposed on the group III nitride semiconductor layer 31. This embodiment is exemplified by the carrier plate 36 being disposed on the other group III nitride semiconductor layer 35. In other words, the carrier plate 36 is disposed indirectly over the group III nitride semiconductor layer 31. In addition, in the present embodiment, the carrier plate 36 is disposed on the upper surface of the other group III nitride semiconductor layer 35 in an adhesive manner. Therefore, by applying an external force to the carrier plate 36, the group III nitride semiconductor layer 31 can be made. Completely separated from the substrate 32. The material selection of the carrier plate 36 can be determined according to the actual needs of the operator, for example, a metal or a ruthenium substrate, etc., in particular, a substrate having a high thermal conductivity, high electrical conductivity, and no improper splitting lattice surface problem can be selected. In order to improve the element characteristics of the group III nitride semiconductor device, the above method is merely an example, and any method capable of completely separating the group III nitride semiconductor layer and the substrate should fall within the scope of the present invention.

Furthermore, the step of setting the carrier board (S37) described in FIG. 6 is performed after step S34 and before step S35. However, step S37 may also be performed after the separating step (S35) and before the flattening step (S36), and of course, may be performed after step S36, the operator may change the processing sequence according to actual needs, or omit the process of step S37, etc. The above changes are all within the scope of the present invention.

Third embodiment

Referring to FIG. 8, the method of manufacturing the group III nitride semiconductor device includes steps S41 to S46. Steps S41 and S43 to S46 are the same as steps S31 and S33 to S36, respectively, and are not described here. The difference is that, as shown in FIG. 8 and FIG. 9, step S42 is directly at least for the group III nitride semiconductor layer 41. A lattice defect is etched to form a via 412, wherein a broken line portion in FIG. 9 indicates a portion of the III-nitride semiconductor layer 41 and a partially enlarged perspective view of the substrate, which shows that the shape of the via 412 may be in the shape of a hexagonal crystal. . In the present embodiment, a pair of lattice defects can be selectively etched to etch the group III nitride semiconductor layer to form the vias 412. For example, the substrate 42 and the group III nitride semiconductor layer 41 can be placed in an environment of more than 200 ° C, and a high concentration potassium hydroxide aqueous solution or liquid potassium hydroxide is used on the upper surface of the group III nitride semiconductor layer. The lattice defects are etched to form the vias 412. Of course, other etching solutions selective to the defects, such as sulfuric acid or phosphoric acid, may be used. The above is only an example, and any etching solution selective for the defects should be used. It belongs to the scope of the invention. In addition, the perforations of step S42 can also be replaced by grooves, and the parameters such as the size, number, spacing, shape and arrangement of the grooves can be varied according to actual manufacturing requirements.

In addition, please refer to FIG. 10, which shows an image image taken by a scanning electron microscope (SEM) after performing step S44, wherein the group III nitride semiconductor layer (GaN) can be clearly seen from FIG. After the surface to which the substrate (Sapphire) 42 is bonded is etched, only a small portion is connected to the substrate 42 and the upper surface of the group III nitride semiconductor layer which is filled with the via 412 and thickened and planarized.

Further, it is specifically described here that, in the present embodiment, since both the step S42 and the step S43 use the etching liquid, the step S42 and the step S43 can be integrated into the same step to accelerate the overall manufacturing process. For example, the substrate and the group III nitride semiconductor layer are placed in an environment of 200 ° C, and the liquid potassium hydroxide etches the defects of the group III nitride semiconductor layer, and after about 25 minutes, the perforation is formed, and after a few minutes, The liquid potassium hydroxide will continue to etch the surface through the perforations in the group III nitride semiconductor layer. The above is merely an example, and any process parameters may be changed according to actual needs, and the scope of the present invention may not be limited.

In addition, the first embodiment, the second embodiment, and the third embodiment are merely exemplary. After the above steps are completed, other processes for manufacturing the semiconductor device can be continued. Taking the fabrication of the light-emitting diode as an example, after completing step S21 and step S22, a layer of N-type doped gallium nitride may be further formed, and then a further layer is composed of gallium indium nitride and gallium nitride. Quantum wells, and finally a layer of P-doped GaN to complete the fabrication of light-emitting diodes. However, since the above is a prior art, it will not be described here, but it must be noted that the above steps of manufacturing the LED may be performed after steps S22, S36, and S46, or may be performed at S21 to S22. S31~S36 and S41~S46 are executed. The above is only an example, and any aspect belonging to the spirit of the above invention should belong to the scope of the present invention.

Furthermore, the steps (S36 and S46) of planarizing the surface of the group III nitride semiconductor layer may be performed or omitted depending on actual needs, for example, in manufacturing a light-emitting diode element, the uneven surface 311, 411 The extraction rate of the light emitted from the light emitting diode will be facilitated, and therefore, in this example, the flattening steps (S36 and S46) may not be performed.

In addition, the present invention further covers the combination of the steps in the above three embodiments. For example, steps S34 to S36 or steps S35 to S36 may be performed after steps S21 to S22. Of course, the manufacturer may decide to complete the manufacturing in one step according to commercial considerations. For example, the manufacturer may sell the product to the manufacturer after performing step S22, so that the manufacturer can make subsequent use or utilization. In other words, the method for fabricating the group III nitride semiconductor device according to the present invention may also cover a method of manufacturing a semi-finished group III nitride semiconductor device (including a substrate and a group III nitride semiconductor layer) or a group III nitrogen of the finished product. A semiconductor device (a light-emitting diode element as described above).

Referring to FIG. 11, a group III nitride semiconductor device 5 according to a preferred embodiment of the present invention comprises a group III nitride semiconductor layer 51 and a further group III nitride semiconductor layer 52. The group III nitride semiconductor layer 51 has at least one via 511, and another group III nitride semiconductor layer 52 is provided on the group III nitride semiconductor layer 51 to fill the via 511, wherein the group III nitride semiconductor layer 51 and another group III The nitride semiconductor layer 52 has a connection surface F1 therebetween, wherein the connection surface F1 includes at least the inner wall F11 of the through hole 511. In the present embodiment, the connection surface F1 further includes a surface F12 between the group III nitride semiconductor layer 51 and the other group III nitride semiconductor layer 52. In addition, the group III nitride semiconductor layer 51 has a lower surface 512 which may be non-planar (as shown in FIG. 11) and flat (as shown in FIG. 12). In addition, the group III nitride semiconductor device 5 may further include a substrate (not shown) disposed on the lower surface 512 of the group III nitride semiconductor layer 51 according to actual needs, or further include another group III nitride semiconductor. Another substrate (not shown) on the upper surface of layer 52.

In addition, the group III nitride semiconductor device 5 can be manufactured according to the method for fabricating the group III nitride semiconductor device according to the preferred embodiment of the present invention, and can be specifically manufactured by the second embodiment or the third embodiment described above. The hole 511 may be replaced by a groove. The details are described in the method for manufacturing the group III nitride semiconductor device in the second embodiment, and are not described herein. In addition, FIG. 11 shows an example in which the other group III nitride semiconductor layer 52 is completely filled with the via 511, but is not limited thereto. For example, another group III nitride semiconductor layer may be filled only partially. The perforation is taken as an example, and the details thereof have been described in detail in the manufacturing method of the group III nitride semiconductor device in the second embodiment and in FIG. 5L, and are not described herein.

According to the invention, the method for fabricating the group III nitride semiconductor device of the present invention is to etch the surface of the group III nitride semiconductor layer connected to the substrate. In other words, the present invention etches the surface of the group III nitride semiconductor layer and the substrate. Different from the conventional technique, the substrate is subjected to mechanical polishing, dry etching, wet etching or laser melting loss, and therefore, the manufacturing method of the present invention can reduce the processing time.

A method for fabricating a group III nitride semiconductor layer according to a preferred embodiment of the present invention comprises at least the steps of: first forming a group III nitride semiconductor layer on a substrate, wherein the group III nitride semiconductor layer has a continuous or discontinuous The surface is connected to the substrate, and then the group III nitride semiconductor layer is etched from the surface connected to the substrate. The above steps have been described in detail in the method for fabricating the group III nitride semiconductor device according to the preferred embodiment of the present invention, and will not be described again.

As described above, the III-nitride semiconductor layer and the III-nitride semiconductor device of the present invention and the method of manufacturing the same are the surface of the group III nitride semiconductor layer which is bonded to the substrate. In other words, the present invention etches the surface of the group III nitride semiconductor layer and the substrate to separate the group III nitride semiconductor layer from the substrate. Unlike the prior art, the substrate is directly subjected to mechanical polishing, dry-wet etching or lightning. The melt loss is caused, and therefore, the manufacturing method of the present invention can reduce the process time.

The above is intended to be illustrative only and not limiting. Any equivalent modifications or alterations to the spirit and scope of the invention are intended to be included in the scope of the appended claims.

11, 21, 31, 41, 51. . . Group III nitride semiconductor layer

111, 112, 113, 211, 311, 411. . . surface

12, 22, 32, 42. . . Substrate

121. . . surface

13. . . Barrier layer

23, 34. . . Etching solution

312, 412, 511. . . perforation

313, 314, 315. . . Trench

33. . . The protective layer

331. . . Hole

35, 52. . . Another group III nitride semiconductor layer

36. . . Carrier board

5. . . Group III nitride semiconductor device

512. . . lower surface

F1. . . Connection surface

F11. . . Inner wall

F12. . . surface

R. . . region

S1. . . edge

S11~S12, S21~S22, S31~S37, S41~S46. . . step

1 is a schematic flow chart showing a method of fabricating a group III nitride semiconductor device according to a preferred embodiment of the present invention;

1A is a schematic view showing a state in which a group III nitride semiconductor layer is connected to a substrate by a discontinuous surface;

1B is a schematic view showing another aspect in which a group III nitride semiconductor layer is connected to a substrate by a discontinuous surface;

1C is a schematic view showing a state in which a group III nitride semiconductor layer is connected to a substrate by a continuous surface;

2 is a flow chart showing a first embodiment of a method of manufacturing the group III nitride semiconductor device of FIG. 1;

3A-3C are a schematic cross-sectional view showing a method of fabricating the III-nitride semiconductor device of FIG. 2;

4 is a schematic flow chart showing a second embodiment of the method for fabricating the group III nitride semiconductor device of FIG. 1;

5A to 5G, FIG. 5K, and FIG. 5M to FIG. 5N are schematic cross-sectional views showing a method of manufacturing the group III nitride semiconductor device of FIG. 4;

Figure 5H is a top view of Figure 5F showing the pattern of perforations;

5I and 5J are a set of top views showing the aspect of the trench;

5L is a schematic cross-sectional view showing a state in which a filling portion of another III-nitride semiconductor layer is partially perforated;

6 is another schematic flow chart showing a second embodiment of the method for fabricating the III-nitride semiconductor device of FIG. 1;

Figure 7A to Figure 7B is a schematic cross-sectional view showing step S37 in Figure 6;

Figure 8 is a flow chart showing a third embodiment of the method of fabricating the III-nitride semiconductor device of Figure 1;

Figure 9 is a schematic cross-sectional view showing the manufacturing method of step S42 in Figure 8;

Figure 10 is a cross-sectional view showing an image taken by an electron microscope after performing step S44;

Figure 11 is a cross-sectional view showing a group III nitride semiconductor device of a preferred embodiment of the present invention;

Figure 12 is another cross-sectional view showing a group III nitride semiconductor device in accordance with a preferred embodiment of the present invention.

S11~S12. . . Method for manufacturing group III nitride semiconductor device

Claims (33)

A method of fabricating a group III nitride semiconductor device, comprising: forming a group III nitride semiconductor layer on a substrate, wherein the group III nitride semiconductor layer has a surface connected to the substrate; forming at least one via or at least one trench Slotting the group III nitride semiconductor layer; and etching the group III nitride semiconductor layer from the surface connected to the substrate. The method for fabricating a group III nitride semiconductor device according to claim 1, wherein the material of the group III nitride semiconductor layer comprises aluminum nitride, or indium nitride, or aluminum gallium nitride, or indium nitride. Gallium, or indium aluminum nitride, or indium gallium nitride, or a combination thereof. The method for fabricating a group III nitride semiconductor device according to claim 1, wherein the substrate is a sapphire substrate, or a tantalum carbide substrate, a germanium substrate, or a gallium arsenide substrate, or a zinc oxide substrate. . The method for fabricating a group III nitride semiconductor device according to claim 1, wherein the step of forming the group III nitride semiconductor layer on the substrate is by using a vapor phase epitaxial growth or a molecular beam epitaxial growth. Or a liquid phase epitaxial growth. The method of manufacturing a group III nitride semiconductor device according to claim 1, wherein the step of etching the group III nitride semiconductor layer is performed until at least a portion of the surface of the group III nitride semiconductor layer is separated from the substrate. The method of manufacturing a group III nitride semiconductor device according to claim 1, wherein the step of etching the group III nitride semiconductor layer The group III nitride semiconductor layer is etched from the surface by at least one etching solution. The method of fabricating a group III nitride semiconductor device according to claim 1, wherein the via or the trench is substantially a lithography process and an etching process. The method for fabricating a group III nitride semiconductor device according to claim 1, wherein the step of forming the via hole in the group III nitride semiconductor layer is substantially directly at least one of the group III nitride semiconductor layer. The lattice defects are etched to form the vias. The method for fabricating a group III nitride semiconductor device according to claim 1, wherein after the step of etching the group III nitride semiconductor layer, further comprising: forming a further group III nitride semiconductor layer on the III The nitride semiconductor layer is filled to fill the via or the trench. The method of manufacturing a group III nitride semiconductor device according to claim 9, wherein the other group III nitride semiconductor layer is made of the same material as the group III nitride semiconductor layer. The method for producing a group III nitride semiconductor device according to claim 1, further comprising: separating the substrate from the group III nitride semiconductor layer. The method for producing a group III nitride semiconductor device according to claim 11, wherein the step of separating is substantially heating, cooling, or etching, or mechanically applying force to the group III nitride semiconductor layer. The method for fabricating a group III nitride semiconductor device according to claim 11, wherein after the step of separating the substrate, the method further comprises: planarizing the surface of the group III nitride semiconductor layer. The method for fabricating a group III nitride semiconductor device according to claim 1, further comprising: providing a carrier plate on the group III nitride semiconductor layer. A method for fabricating a group III nitride semiconductor layer, comprising: forming a group III nitride semiconductor layer on a substrate, wherein the group III nitride semiconductor layer has a surface connected to the substrate; forming at least one via or at least one trench Slotting the group III nitride semiconductor layer; and etching the group III nitride semiconductor layer from the surface connected to the substrate. The method for fabricating a group III nitride semiconductor layer according to claim 15, wherein the material of the group III nitride semiconductor layer comprises aluminum nitride, or indium nitride, or gallium nitride aluminum, or indium nitride. Gallium, or indium aluminum nitride, or indium gallium nitride, or a combination thereof. The method for manufacturing a group III nitride semiconductor layer according to claim 15, wherein the substrate is a sapphire substrate, or a tantalum carbide substrate, a germanium substrate, or a gallium arsenide substrate, or a zinc oxide substrate. . The method for fabricating a group III nitride semiconductor layer according to claim 15, wherein the step of forming the group III nitride semiconductor layer on the substrate is by using a vapor phase epitaxial growth or a molecular beam epitaxy Growth, or a liquid phase epitaxial growth. The method of producing a group III nitride semiconductor layer according to claim 15, wherein the step of etching the group III nitride semiconductor layer is performed until at least a portion of the surface of the group III nitride semiconductor layer is separated from the substrate. The method for fabricating a group III nitride semiconductor layer according to claim 15, wherein the step of etching the group III nitride semiconductor layer is substantially at least one etching liquid from the surface of the group III nitride semiconductor The layer is etched. The method for fabricating a group III nitride semiconductor layer according to claim 15, wherein the via or the trench is substantially a lithography process and an etching process. The method for fabricating a group III nitride semiconductor layer according to claim 15, wherein the step of forming the via hole in the group III nitride semiconductor layer is substantially directly at least one of the group III nitride semiconductor layer The lattice defects are etched to form the vias. The method for fabricating a group III nitride semiconductor layer according to claim 15, wherein after the step of etching the group III nitride semiconductor layer, the method further comprises: thickening the group III nitride semiconductor layer. The method of fabricating a group III nitride semiconductor layer according to claim 23, wherein the step of thickening the group III nitride semiconductor layer fills at least the via or the trench. A group III nitride semiconductor layer as described in claim 15 The manufacturing method further includes: separating the substrate and the group III nitride semiconductor layer. The method for producing a group III nitride semiconductor layer according to claim 25, wherein the step of separating is substantially heating, cooling, etching, excimer laser or mechanical force on the group III nitride semiconductor layer. . The method for fabricating a group III nitride semiconductor layer according to claim 25, wherein after the step of separating the substrate, the method further comprises: planarizing the surface of the group III nitride semiconductor layer. The method for fabricating a group III nitride semiconductor layer according to claim 15, further comprising: providing a carrier plate to the group III nitride semiconductor layer. A group III nitride semiconductor device comprising: a group III nitride semiconductor layer having at least one via or at least one trench; and a further group III nitride semiconductor layer disposed on the group III nitride semiconductor layer, And filling the via or the trench, wherein the III-nitride semiconductor layer and the another III-nitride semiconductor layer have a connection surface, wherein the connection surface comprises at least the perforated inner wall or the inner wall of the trench The method for fabricating the group III nitride semiconductor device includes forming the group III nitride semiconductor layer on a substrate, wherein the group III nitride semiconductor layer has a surface connected to the substrate to form the through hole or the trench Group III nitride semiconductor layer, and the substrate Etching the group III nitride semiconductor layer on the surface of the connection, and forming the another group III nitride semiconductor layer on the group III nitride semiconductor layer to fill the via or the trench, separating the substrate from the group III nitride Semiconductor layer. The group III nitride semiconductor device according to claim 29, wherein the material of the group III nitride semiconductor layer comprises aluminum nitride, or indium nitride, or gallium nitride aluminum, or indium gallium nitride, or Indium aluminum nitride, or indium gallium nitride, or a combination thereof. The group III nitride semiconductor device according to claim 29, wherein the material of the other group III nitride semiconductor layer comprises aluminum nitride, or indium nitride, or aluminum gallium nitride, or indium gallium nitride. Or indium aluminum nitride, or indium gallium nitride, or a combination thereof. The group III nitride semiconductor device according to claim 29, wherein the other group III nitride semiconductor layer is made of the same material as the group III nitride semiconductor layer. The group III nitride semiconductor device according to claim 29, wherein the substrate is a sapphire substrate, a tantalum carbide substrate, a germanium substrate, or a gallium arsenide substrate, or a zinc oxide substrate.