TWI426675B - Fan systems, fan control circuits and fan control methods - Google Patents
Fan systems, fan control circuits and fan control methods Download PDFInfo
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本發明係有關於風扇系統,特別係有關於一種具有自動除塵和抑制突波電流之風扇控制電路。 The present invention relates to a fan system, and more particularly to a fan control circuit having automatic dust removal and suppression of surge current.
一般風扇之正反轉係應用於吸氣及排氣,以達到自動除塵之效果,例如排風扇、電源供應器風扇等等。然而,三相驅動晶片雖可以驅動風扇正轉或反轉,但無法在運轉中切換正反轉。習知技術係以軟體程式寫入積體電路,例如微控制器單元(MCU,又稱為微處理器),來控制風扇之正反轉,但成本較高。 Generally, the positive and negative reversal of the fan is applied to the inhalation and exhaust to achieve the effect of automatic dust removal, such as exhaust fans, power supply fans, and the like. However, although the three-phase driving chip can drive the fan to rotate forward or reverse, it cannot switch between forward and reverse during operation. Conventional techniques use a software program to write integrated circuits, such as a microcontroller unit (MCU, also known as a microprocessor), to control the forward and reverse rotation of the fan, but at a higher cost.
第1圖係以習知技術來達到風扇正反轉之風扇電流對時間的關係圖。如圖所示,當扇葉切換正反轉時,因扇葉全轉的慣性會產生突波電流Ip,此突波電流Ip約為正常啟動電流的1.5倍,因此可能會燒毀控制電路及系統電源,而突波電流Ip也會消耗系統電源,造成能量的浪費。因此需要一種風扇系統和風扇控制方法,用以達到自動除塵之效果,亦可達到抑制突波電流之目的。 Figure 1 is a diagram showing the relationship between fan current versus time for fan forward and reverse using conventional techniques. As shown in the figure, when the blade is switched forward and backward, the surge current Ip is generated due to the inertia of the full rotation of the blade. The surge current Ip is about 1.5 times the normal starting current, so the control circuit and system may be burnt. The power supply, and the surge current Ip also consumes system power, resulting in wasted energy. Therefore, a fan system and a fan control method are needed to achieve the effect of automatic dust removal, and also to suppress the surge current.
有鑑於此,本發明提供一種風扇控制電路,包括一正反轉控制電路,輸出一正反轉輸出信號,使得一風扇在電源啟動後,先以一第一方向旋轉一第一時間再於一第二時間後以一第二方向旋轉,其中第二時間緊接於第一時間之 後;以及一突波電流抑制電路,根據正反轉輸出信號,產生一控制信號,使得一驅動晶片在第二時間停止驅動風扇,並在第二時間後,再驅動風扇以第二方向全速旋轉,以進行抑制突波電流。 In view of this, the present invention provides a fan control circuit including a forward and reverse control circuit that outputs a forward and reverse output signal such that a fan rotates in a first direction for a first time and then after a power source is turned on. Rotating in a second direction after the second time, wherein the second time is immediately after the first time And a surge current suppression circuit generates a control signal according to the forward and reverse output signals, so that a driving chip stops driving the fan at a second time, and after a second time, drives the fan to rotate at a full speed in the second direction. To suppress the surge current.
本發明亦提供另外一種風扇系統,包括一風扇;一驅動晶片,接收一正反轉輸出信號和一控制信號,驅動風扇;一正反轉控制電路,輸出正反轉輸出信號,使得風扇在電源啟動後,先以一第一方向旋轉一第一時間再於一第二時間後以一第二方向旋轉,其中第二時間緊接於第一時間之後;以及一突波電流抑制電路,根據正反轉輸出信號,產生控制信號,使得驅動晶片在第二時間停止驅動風扇,並在第二時間後,再驅動風扇以第二方向全速旋轉,以進行抑制突波電流。 The invention also provides another fan system, comprising a fan; a driving chip, receiving a forward and reverse output signal and a control signal to drive the fan; a forward and reverse control circuit, outputting a forward and reverse output signal, so that the fan is at the power source After starting, first rotating in a first direction for a first time and then after a second time in a second direction, wherein the second time is immediately after the first time; and a surge current suppression circuit, according to the positive The output signal is inverted to generate a control signal such that the drive wafer stops driving the fan at a second time, and after a second time, the fan is driven to rotate at full speed in the second direction to suppress the surge current.
本發明亦提供一種風扇控制方法,包括輸出一正反轉輸出信號至一驅動晶片和一突波電流抑制電路,使得一風扇在電源啟動後,先以一第一方向旋轉一第一時間再於一第二時間後以一第二方向旋轉,其中第二時間緊接於第一時間之後;以及根據正反轉輸出信號,產生一控制信號,使得驅動晶片在第二時間停止驅動風扇,並在第二時間後,再驅動風扇以第二方向全速旋轉,以進行抑制突波電流。 The invention also provides a fan control method, comprising: outputting a forward and reverse output signal to a driving chip and a surge current suppressing circuit, so that a fan rotates in a first direction for a first time after the power is turned on. Rotating in a second direction after a second time, wherein the second time is immediately after the first time; and generating a control signal according to the forward and reverse output signals, so that the driving chip stops driving the fan at the second time, and After the second time, the fan is driven to rotate at full speed in the second direction to suppress the surge current.
為了讓本發明之上述和其他目的、特徵、和優點能更明顯易懂,下文特舉一較佳實施例,並配合所附圖示,作詳細說明如下: The above and other objects, features, and advantages of the present invention will become more apparent and understood.
本發明係提供一種具有抑制突波電流之風扇系統。在本發明實施例中,使用簡單電路即可達到在風扇系統自啟動後經一反轉時間內全速反轉,以便自動吸氣及自動排氣達到除塵之效果,並且不需要以軟體程式寫入積體電路中。除此之外,本發明實施例亦在風扇尚未全速反轉時,停止驅動風扇,並經一段時間後再全速驅動風扇,以達到抑制突波電流之目的。 The present invention provides a fan system having a surge current suppression. In the embodiment of the present invention, a simple circuit can be used to achieve full-speed reversal after a self-starting of the fan system through a reversal time, so that the automatic inhalation and automatic exhausting can achieve the effect of dust removal, and the software program does not need to be written. In the integrated circuit. In addition, the embodiment of the present invention stops driving the fan when the fan has not been fully reversed, and drives the fan at full speed after a period of time to achieve the purpose of suppressing the surge current.
第2圖係本發明之風扇系統之一實施例。如圖所示,風扇系統21包括一風扇22、一驅動晶片23和一風扇控制電路24。驅動晶片23接收一正反轉輸出信號FR和一控制信號CS,用以驅動風扇22。風扇控制電路24包括一正反轉控制電路25用以輸出正反轉輸出信號FR,以及一突波電流抑制電路26用以根據正反轉輸出信號FR,產生控制信號CS。 Figure 2 is an embodiment of a fan system of the present invention. As shown, the fan system 21 includes a fan 22, a drive die 23, and a fan control circuit 24. The drive wafer 23 receives a forward and reverse output signal FR and a control signal CS for driving the fan 22. The fan control circuit 24 includes a forward and reverse control circuit 25 for outputting the forward and reverse output signals FR, and a surge current suppressing circuit 26 for generating the control signal CS according to the forward and reverse output signals FR.
舉例來說,當驅動晶片23接收具有一第一準位之正反轉輸出信號FR和一第一準位之控制信號CS時,驅動風扇22以一第一方向全速旋轉。當驅動晶片23接收一第二準位之正反轉輸出信號FR和一第二準位之控制信號CS,或接收第二準位之正反轉輸出信號FR和第一準位之控制信號CS,驅動晶片23停止驅動風扇22。在某些實施例中,第一準位可以是高電壓準位,第二準位可以是低電壓準位,但不限於此。當驅動晶片23接收第二準位之正反轉輸出信號FR和第一準位之控制信號CS,使得風扇22以一第二方向全速旋轉。在某些實施例中,第一方向可以是第二 方向的相反方向,例如第一方向可為正轉/順時針旋轉,第二方向可為反轉/逆時針旋轉,但不限於此。 For example, when the driving chip 23 receives the positive and negative output signal FR having a first level and a control signal CS of a first level, the driving fan 22 is rotated at a full speed in a first direction. When the driving chip 23 receives a second level of the positive and negative output signal FR and a second level of the control signal CS, or receives the second level of the positive and negative output signal FR and the first level of the control signal CS The drive wafer 23 stops driving the fan 22. In some embodiments, the first level may be a high voltage level, and the second level may be a low voltage level, but is not limited thereto. When the driving chip 23 receives the second level positive and negative output signal FR and the first level control signal CS, the fan 22 rotates at a full speed in a second direction. In some embodiments, the first direction can be the second The opposite direction of the direction, for example, the first direction may be forward/clockwise rotation, and the second direction may be reverse/counterclock rotation, but is not limited thereto.
第3圖係本發明之風扇控制電路之一實施例。如圖所示,風扇控制電路24包括正反轉控制電路25和突波電流抑制電路26。舉例而言,正反轉控制電路25用以輸出正反轉輸出信號FR,使得風扇22在電源啟動後,先以第一方向旋轉第一時間,再於第二時間後以第二方向旋轉,其中第二時間緊接於第一時間之後。突波電流抑制電路26用以根據正反轉輸出信號FR,產生控制信號CS,使得驅動晶片23在第二時間停止驅動風扇22,並在第二時間後,再驅動風扇22以第二方向全速旋轉,以進行抑制突波電流。 Figure 3 is an embodiment of a fan control circuit of the present invention. As shown, the fan control circuit 24 includes a forward and reverse control circuit 25 and a surge current suppression circuit 26. For example, the forward/reverse control circuit 25 is configured to output the forward/reverse output signal FR, so that the fan 22 rotates in the first direction for the first time after the power is turned on, and then rotates in the second direction after the second time. The second time is immediately after the first time. The surge current suppression circuit 26 is configured to generate a control signal CS according to the forward and reverse output signals FR, so that the driving chip 23 stops driving the fan 22 at the second time, and after the second time, drives the fan 22 to drive at a full speed in the second direction. Rotate to suppress the surge current.
在此實施例中,正反轉控制電路25包括一第一比較器31、一第一電容C1、一第一電阻R1、一第二電阻R2和一第三電阻R3。舉例來說,第一比較器31具有一第一輸入端用以接收一第一儲存電壓V2、一第二輸入端用以接收一參考電壓V1和一輸出端用以輸出正反轉輸出信號FR。第一電阻R1具有一第一端耦接至一電壓源Vref,以及一第二端耦接至第一比較器31之第二輸入端。第一電容C1具有一第一端耦接至一接地端,以及一第二端耦接至第一比較器31之第二輸入端。第二電阻R2具有一第一端耦接至電壓源Vref,以及一第二端耦接至第一比較器31之第一輸入端。第三電阻R3具有一第二端耦接至接地端,以及一第二端耦接至第一比較器31之第一輸入端。 In this embodiment, the forward and reverse control circuit 25 includes a first comparator 31, a first capacitor C1, a first resistor R1, a second resistor R2, and a third resistor R3. For example, the first comparator 31 has a first input terminal for receiving a first storage voltage V2, a second input terminal for receiving a reference voltage V1, and an output terminal for outputting a forward and reverse output signal FR. . The first resistor R1 has a first end coupled to a voltage source Vref and a second end coupled to the second input of the first comparator 31. The first capacitor C1 has a first end coupled to a ground end, and a second end coupled to the second input end of the first comparator 31. The second resistor R2 has a first end coupled to the voltage source Vref and a second end coupled to the first input end of the first comparator 31. The third resistor R3 has a second end coupled to the ground end, and a second end coupled to the first input end of the first comparator 31.
進一步來說,參考電壓V1係電壓源Vref藉由第二電 阻R2和第三電阻R3分壓所產生。同樣地,第一儲存電壓V2係由電壓源Vref藉由第一電阻R1和第一電容C1分壓所產生。當第一儲存電壓V2小於參考電壓V1時,第一比較器31輸出具有第一準位之正反轉輸出信號FR,使得驅動晶片23控制風扇22以第一方向旋轉。當第一儲存電壓V2大於參考電壓V1時,第一比較器31輸出具有第二準位之正反轉輸出信號FR,以便驅動晶片23經第二時間後使風扇22以第二方向旋轉。 Further, the reference voltage V1 is a voltage source Vref by the second power The resistor R2 and the third resistor R3 are divided by pressure. Similarly, the first storage voltage V2 is generated by the voltage source Vref being divided by the first resistor R1 and the first capacitor C1. When the first storage voltage V2 is less than the reference voltage V1, the first comparator 31 outputs a forward and reverse output signal FR having a first level such that the drive wafer 23 controls the fan 22 to rotate in the first direction. When the first storage voltage V2 is greater than the reference voltage V1, the first comparator 31 outputs a forward and reverse output signal FR having a second level to drive the wafer 23 to rotate the fan 22 in the second direction after a second time.
在此實施例中,突波電流抑制電路26亦包括一第二比較器32、一第二電容C2、一第四電阻R4、一第五電阻R5和一第六電阻R6。舉例來說,第二比較器32具有一第一輸入端用以接收一第二儲存電壓V3、一第二輸入端用以接收參考電壓V1,以及一輸出端用以輸出控制信號CS。第二電容C2耦接於第一比較器31之輸出端與第二比較器32之第一輸入端之間。第四電阻R4具有一第一端耦接至電壓源Vref,以及一第二端耦接至第一比較器之輸出端。第五電阻R5具有一第一端耦接至電壓源Vref,以及一第二端耦接至第二比較器32之第一輸入端,用以對第二電容C2進行充電。第六電阻R6具有一第一端耦接至電壓源Vref,以及一第二端耦接至第二比較器32之輸出端。 In this embodiment, the surge current suppression circuit 26 also includes a second comparator 32, a second capacitor C2, a fourth resistor R4, a fifth resistor R5, and a sixth resistor R6. For example, the second comparator 32 has a first input terminal for receiving a second storage voltage V3, a second input terminal for receiving the reference voltage V1, and an output terminal for outputting the control signal CS. The second capacitor C2 is coupled between the output end of the first comparator 31 and the first input end of the second comparator 32. The fourth resistor R4 has a first end coupled to the voltage source Vref and a second end coupled to the output end of the first comparator. The fifth resistor R5 has a first end coupled to the voltage source Vref, and a second end coupled to the first input of the second comparator 32 for charging the second capacitor C2. The sixth resistor R6 has a first end coupled to the voltage source Vref and a second end coupled to the output end of the second comparator 32.
進一步來說,第二儲存電壓V3係由電壓源Vref和正反轉輸出信號FR之間的電壓差,再藉由第一電阻R1和第一電容C1分壓所產生。舉例來說,當第一比較器31輸出第二準位之正反轉輸出信號FR時,第二電容C2會被放電至低於參考電壓V1,接著在第二時間內被電壓源Vref充 電至高於參考電壓V1。因此,當第二儲存電壓V3大於參考電壓V1時,第二比較器32輸出具有第一準位之控制信號CS,使得驅動晶片23控制風扇22全速旋轉,並且當第二儲存電壓V3小於參考電壓V1時,第二比較器32輸出具有第二準位之控制信號CS,使得驅動晶片23停止驅動風扇22旋轉。 Further, the second storage voltage V3 is generated by a voltage difference between the voltage source Vref and the forward and reverse output signals FR, and is further divided by the first resistor R1 and the first capacitor C1. For example, when the first comparator 31 outputs the positive and negative output signals FR of the second level, the second capacitor C2 is discharged to be lower than the reference voltage V1, and then charged by the voltage source Vref in the second time. The electricity is higher than the reference voltage V1. Therefore, when the second storage voltage V3 is greater than the reference voltage V1, the second comparator 32 outputs the control signal CS having the first level, so that the driving wafer 23 controls the fan 22 to rotate at full speed, and when the second storage voltage V3 is smaller than the reference voltage At V1, the second comparator 32 outputs a control signal CS having a second level such that the drive wafer 23 stops driving the fan 22 to rotate.
本發明亦提供一種風扇控制方法,用以達到自動除塵之效果,亦可達到抑制突波電流之目的。第4圖係本發明之風扇控制方法之一流程圖,如圖所示,風扇控制方法包括下列步驟。 The invention also provides a fan control method, which is used for achieving the effect of automatic dust removal, and can also achieve the purpose of suppressing the surge current. Figure 4 is a flow chart of a fan control method of the present invention. As shown, the fan control method includes the following steps.
於步驟S41,正反轉控制電路25輸出正反轉輸出信號FR至驅動晶片23與突波電流抑制電路26,使得風扇22在電源啟動後,先以第一方向旋轉第一時間再於第二時間後以第二方向旋轉,其中第二時間緊接於第一時間之後。舉例而言,電源啟動後,由於第一儲存電壓V2小於參考電壓V1,因此輸出具有第一準位之上述正反轉輸出信號FR,使得驅動晶片23控制風扇22以第一方向旋轉。在第一時間後,由於第一儲存電壓V2大於參考電壓V1,因此輸出具有第二準位之正反轉輸出信號FR,以便在驅動晶片23經第二時間後使風扇22以第二方向旋轉。 In step S41, the forward/reverse control circuit 25 outputs the forward/reverse output signal FR to the driving chip 23 and the surge current suppressing circuit 26, so that the fan 22 rotates in the first direction for the first time and then the second after the power is turned on. After the time, the second direction is rotated, wherein the second time is immediately after the first time. For example, after the power is turned on, since the first storage voltage V2 is smaller than the reference voltage V1, the above-described forward and reverse output signals FR having the first level are output, so that the driving wafer 23 controls the fan 22 to rotate in the first direction. After the first time, since the first storage voltage V2 is greater than the reference voltage V1, the positive and negative output signal FR having the second level is output to rotate the fan 22 in the second direction after the second time is driven by the driving wafer 23. .
於步驟S42,突波電流抑制電路26根據正反轉輸出信號FR,產生控制信號CS,使得驅動晶片23在第二時間停止驅動風扇22,並在第二時間後,再驅動風扇22以第二方向全速旋轉,以進行抑制突波電流。舉例而言,由於在第一時間後正反轉輸出信號FR為第二準位,導致第二儲 存電壓V3小於參考電壓V1時,突波電流抑制電路26會輸出具有第二準位之控制信號CS,使得驅動晶片23停止驅動風扇22旋轉。在第二時間後,由於第二儲存電壓V3大於參考電壓V1,突波電流抑制電路26會輸出具有第一準位之控制信號CS,使得驅動晶片23以第二方向全速旋轉。 In step S42, the surge current suppression circuit 26 generates a control signal CS according to the forward and reverse output signals FR, so that the drive wafer 23 stops driving the fan 22 at the second time, and after the second time, drives the fan 22 to the second. The direction is rotated at full speed to suppress the surge current. For example, since the output signal FR is inverted to the second level after the first time, the second storage is caused. When the storage voltage V3 is smaller than the reference voltage V1, the surge current suppression circuit 26 outputs a control signal CS having the second level so that the drive wafer 23 stops driving the fan 22 to rotate. After the second time, since the second storage voltage V3 is greater than the reference voltage V1, the surge current suppression circuit 26 outputs a control signal CS having a first level such that the drive wafer 23 is rotated at full speed in the second direction.
第5圖係本發明之風扇控制方法之另一流程圖,第6圖係本發明之風扇控制方法之時序圖。第6圖係對應於第4圖和第5圖。 Fig. 5 is another flow chart of the fan control method of the present invention, and Fig. 6 is a timing chart of the fan control method of the present invention. Fig. 6 corresponds to Figs. 4 and 5.
於步驟S510中,在時間t0(即電源啟動時)時,第一比較器31比較第一儲存電壓V2是否大於參考電壓V1。當第一儲存電壓V2小於參考電壓V1時,則進行步驟S521。相反地,當第一儲存電壓V2大於參考電壓V1時,則進行步驟S522。根據第6圖所示,在第一時間(即時間t0至時間t1)時,由於第一儲存電壓V2小於參考電壓V1,使得流程來到步驟S521。於步驟S521中,第一比較器31會輸出第一準位之正反轉輸出信號FR至驅動晶片23和突波電流抑制電路26。接著,第二比較器32比較第二儲存電壓V3是否大於參考電壓V1。由於在時間t0至時間t1時,第二儲存電壓V3大於參考電壓V1,因此來到步驟S541。於步驟S541中,第二比較器32輸出第一準位之控制信號CS至驅動晶片23,用以驅動風扇22以第一方向全速旋轉(步驟551)。 In step S510, at time t0 (ie, when the power is turned on), the first comparator 31 compares whether the first storage voltage V2 is greater than the reference voltage V1. When the first storage voltage V2 is less than the reference voltage V1, step S521 is performed. Conversely, when the first storage voltage V2 is greater than the reference voltage V1, step S522 is performed. According to FIG. 6, at the first time (ie, time t0 to time t1), since the first storage voltage V2 is smaller than the reference voltage V1, the flow proceeds to step S521. In step S521, the first comparator 31 outputs the positive and negative output signals FR of the first level to the drive wafer 23 and the surge current suppression circuit 26. Next, the second comparator 32 compares whether the second storage voltage V3 is greater than the reference voltage V1. Since the second storage voltage V3 is greater than the reference voltage V1 from time t0 to time t1, the process proceeds to step S541. In step S541, the second comparator 32 outputs the first level control signal CS to the drive wafer 23 for driving the fan 22 to rotate at full speed in the first direction (step 551).
如第6圖所示,由於在第二時間(即時間t1至時間t2)時,第一儲存電壓V2大於參考電壓V1,使得流程來到步 驟S522。於步驟S522中,第一比較器31會輸出第二準位之正反轉輸出信號FR至驅動晶片23和突波電流抑制電路26。接著,於步驟S530,第二比較器32比較第二儲存電壓V3是否大於參考電壓V1。當第二儲存電壓V3小於參考電壓V1時,則進行步驟S542,而當第二儲存電壓V3大於參考電壓V1時,則進行步驟S543。由於在時間t1至時間t2時,第二儲存電壓V3小於參考電壓V1,因此來到步驟S542。於步驟S542中,第二比較器32會輸出第二準位之控制信號CS至驅動晶片23,以便停止驅動風扇22(步驟S552)。 As shown in FIG. 6, since the first storage voltage V2 is greater than the reference voltage V1 at the second time (ie, time t1 to time t2), the flow comes to the step. Step S522. In step S522, the first comparator 31 outputs a positive and negative output signal FR of the second level to the drive wafer 23 and the surge current suppression circuit 26. Next, in step S530, the second comparator 32 compares whether the second storage voltage V3 is greater than the reference voltage V1. When the second storage voltage V3 is less than the reference voltage V1, step S542 is performed, and when the second storage voltage V3 is greater than the reference voltage V1, step S543 is performed. Since the second storage voltage V3 is smaller than the reference voltage V1 from time t1 to time t2, the flow proceeds to step S542. In step S542, the second comparator 32 outputs a second level control signal CS to the drive wafer 23 to stop driving the fan 22 (step S552).
在時間t2之後,由於第一儲存電壓V2大於參考電壓V1以及第二儲存電壓V3大於參考電壓V1,因此來到步驟S543。於步驟S543中,第二比較器32會輸出第一準位之控制信號CS至驅動晶片23,以便驅動風扇22以第二方向全速旋轉(步驟S553)。 After the time t2, since the first storage voltage V2 is greater than the reference voltage V1 and the second storage voltage V3 is greater than the reference voltage V1, the process proceeds to step S543. In step S543, the second comparator 32 outputs a first level control signal CS to the drive wafer 23 to drive the fan 22 to rotate at full speed in the second direction (step S553).
根據第6圖之風扇電流,明顯地在時間t2(即風扇反轉後)後無突波電流發生。由此可知,先以第一方向旋轉第一時間,在第一時間終了停止驅動風扇22,經過第二時間後,再驅動風扇22以第二方向全速旋轉,具有達到自動除塵之效果,亦可達到抑制突波電流之目的。 According to the fan current of Fig. 6, it is apparent that no surge current occurs after time t2 (i.e., after the fan is reversed). Therefore, it can be known that the first time is rotated in the first direction, and the driving of the fan 22 is stopped at the end of the first time. After the second time, the fan 22 is driven to rotate at the full speed in the second direction, which has the effect of achieving automatic dust removal. The purpose of suppressing the surge current is achieved.
雖然本發明以較佳實施例揭露如上,但並非用以限制本發明。此外,習知技藝者應能知悉本發明申請專利範圍應被寬廣地認定以涵括本發明所有實施例及其變型。 While the invention has been described above in the preferred embodiments, it is not intended to limit the invention. In addition, those skilled in the art will recognize that the scope of the present invention should be broadly construed to cover all embodiments and variations thereof.
Ifan‧‧‧風扇電流 Ifan‧‧‧Fan current
Ip‧‧‧突波電流 Ip‧‧‧ surge current
21‧‧‧風扇系統 21‧‧‧Fan system
22‧‧‧風扇 22‧‧‧Fan
23‧‧‧驅動晶片 23‧‧‧Drive chip
24‧‧‧風扇控制電路 24‧‧‧Fan control circuit
25‧‧‧正反轉控制電路 25‧‧‧ Forward and reverse control circuit
26‧‧‧突波電流抑制電路 26‧‧‧ Surge current suppression circuit
31‧‧‧第一比較器 31‧‧‧First comparator
32‧‧‧第二比較器 32‧‧‧Second comparator
R1‧‧‧第一電阻 R1‧‧‧first resistance
R2‧‧‧第二電阻 R2‧‧‧second resistance
R3‧‧‧第三電阻 R3‧‧‧ third resistor
R4‧‧‧第四電阻 R4‧‧‧fourth resistor
R5‧‧‧第五電阻 R5‧‧‧ fifth resistor
R6‧‧‧第六電阻 R6‧‧‧ sixth resistor
C1‧‧‧第一電容 C1‧‧‧first capacitor
C2‧‧‧第二電容 C2‧‧‧second capacitor
Vref‧‧‧電壓源 Vref‧‧‧voltage source
V1‧‧‧參考電壓 V1‧‧‧ reference voltage
V2‧‧‧第一儲存電壓 V2‧‧‧First storage voltage
V3‧‧‧第二儲存電壓 V3‧‧‧Second storage voltage
FR‧‧‧正反轉輸出信號 FR‧‧‧ reverse output signal
CS‧‧‧控制信號 CS‧‧‧Control signal
S41、S42、S510、S521、S522、S530、S541、S542、S543、S551、S552、S553‧‧‧步驟 Steps S41, S42, S510, S521, S522, S530, S541, S542, S543, S551, S552, S553‧‧
第1圖係以習知技術來達到風扇正反轉之風扇電流對時間的關係圖。 Figure 1 is a diagram showing the relationship between fan current versus time for fan forward and reverse using conventional techniques.
第2圖係本發明之風扇系統之一實施例。 Figure 2 is an embodiment of a fan system of the present invention.
第3圖係本發明之風扇控制電路之一實施例。 Figure 3 is an embodiment of a fan control circuit of the present invention.
第4圖係本發明之風扇控制方法之一流程圖。 Figure 4 is a flow chart showing one of the fan control methods of the present invention.
第5圖係本發明之風扇控制方法之另一流程圖。 Fig. 5 is another flow chart of the fan control method of the present invention.
第6圖係本發明之風扇控制方法之時序圖。 Fig. 6 is a timing chart of the fan control method of the present invention.
25‧‧‧正反轉控制電路 25‧‧‧ Forward and reverse control circuit
26‧‧‧突波電流抑制電路 26‧‧‧ Surge current suppression circuit
31‧‧‧第一比較器 31‧‧‧First comparator
32‧‧‧第二比較器 32‧‧‧Second comparator
R1‧‧‧第一電阻 R1‧‧‧first resistance
R2‧‧‧第二電阻 R2‧‧‧second resistance
R3‧‧‧第三電阻 R3‧‧‧ third resistor
R4‧‧‧第四電阻 R4‧‧‧fourth resistor
R5‧‧‧第五電阻 R5‧‧‧ fifth resistor
R6‧‧‧第六電阻 R6‧‧‧ sixth resistor
C1‧‧‧第一電容 C1‧‧‧first capacitor
C2‧‧‧第二電容 C2‧‧‧second capacitor
Vref‧‧‧電壓源 Vref‧‧‧voltage source
V1‧‧‧參考電壓 V1‧‧‧ reference voltage
V2‧‧‧第一儲存電壓 V2‧‧‧First storage voltage
V3‧‧‧第二儲存電壓 V3‧‧‧Second storage voltage
FR‧‧‧正反轉輸出信號 FR‧‧‧ reverse output signal
CS‧‧‧控制信號 CS‧‧‧Control signal
24‧‧‧風扇控制電路 24‧‧‧Fan control circuit
Claims (21)
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WO2006089605A1 (en) * | 2005-02-24 | 2006-08-31 | Ebm-Papst St. Georgen Gmbh & Co. Kg | Method for operation of a two-phase electronically-commuted motor and motor for carrying out said method |
TW200701623A (en) * | 2005-06-30 | 2007-01-01 | Delta Electronics Inc | Bi-directional single-phase fan and motor thereof |
CN201656887U (en) * | 2010-03-22 | 2010-11-24 | 元山科技工业股份有限公司 | Positive, negative rotation control circuit device of a direct current fan |
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WO2006089605A1 (en) * | 2005-02-24 | 2006-08-31 | Ebm-Papst St. Georgen Gmbh & Co. Kg | Method for operation of a two-phase electronically-commuted motor and motor for carrying out said method |
TW200701623A (en) * | 2005-06-30 | 2007-01-01 | Delta Electronics Inc | Bi-directional single-phase fan and motor thereof |
CN201656887U (en) * | 2010-03-22 | 2010-11-24 | 元山科技工业股份有限公司 | Positive, negative rotation control circuit device of a direct current fan |
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