TWI422140B - Lock protection and standby control circuit of motor driving apparatus - Google Patents

Description

Locking protection and standby control circuit for motor drive

The present invention relates to a motor driving device, and more particularly to a motor driving device for controlling a motor speed using a pulse width modulation signal.

The technique of controlling the motor speed using the pulse width modulation signal is widely applied to a DC motor drive circuit. This technology utilizes the pulse width modulation signal whose frequency is much higher than the motor commutation speed. By adjusting the duty cycle of the pulse width modulation signal, the charging current can be adjusted for the charging time of the motor coil, and then the coil is controlled. The magnitude of the current and the motor speed.

For DC motor drive circuits, there are two important motor operating conditions to consider. First of all, in the case that the motor does not need to operate for a long time, the drive circuit must be able to enter the standby mode in time to save energy, and at the same time prepare for the sudden start of the motor. In addition, in the case where the motor is blocked by external force and cannot be smoothly rotated, the drive circuit must be able to correctly judge the phenomenon of the motor lock and change the charging behavior of the charging current to the motor coil to prevent overheating damage.

In the former case, the typical method is to determine whether the DC motor drive circuit needs to enter the standby mode by calculating the duration of the pulse width modulation signal to a low potential. When the pulse width modulation signal is low for more than a predetermined length of time, the DC motor drive circuit enters the standby mode to save power.

In the latter case, the typical method is to apply special drive control when the motor stops rotating due to external force. For example, after the motor lock is detected (ie, the motor stops rotating for more than a predetermined time), the original pulse width modulation signal is stopped, and the pulse wave signal of a fixed period is replaced to be rotated in the motor. After the obstacle is removed, the normal rotation of the motor can be resumed.

As described above, the lock protection function determines the rotation state of the motor to determine whether or not to perform lock protection by detecting a hall signal from the motor. In the standby mode, it is determined whether the standby mode is entered by detecting the duration of the pulse width modulation signal being low. In the lock protection state, the pulse signal generated by the drive circuit is different from the pulse width modulation signal in the standby mode and the normal rotation. Therefore, how to properly coordinate the operation of the motor lock protection and standby mode is an important issue in the art.

In view of this, the main object of the present invention is to provide a motor driving device and a lock protection and standby control circuit for the motor driving device to coordinate the operation of the motor lock protection and standby mode, and automatically enter or leave when appropriate. Standby mode.

To achieve the above object, the present invention provides a motor driving device. The motor driving device includes a lock protection unit, a standby mode determining unit and a motor control circuit. The lock protection unit receives a Hall signal and generates a lock signal accordingly. The standby mode determining unit receives a pulse width modulation signal and a lock signal from the lock protection unit, and generates a standby mode control signal according to the pulse width modulation signal and the lock signal. The lock protection unit determines whether to stop generating the lock signal according to the standby mode control signal. The motor control circuit receives the pulse width modulation signal to control the rotation of the motor, and determines the operation mode according to the standby mode control signal and the lock signal.

The present invention also provides a lock protection and standby control circuit for a motor drive device. The lock protection and standby control circuit includes a lock protection unit and a standby mode determination unit. The lock protection unit generates a lock signal based on a motor rotation signal. The standby mode determining unit receives the pulse width modulation signal for controlling the rotation of the motor and the lock signal, and generates a standby mode control signal according to the pulse width modulation signal and the lock signal. Further, the lock protection unit determines whether to stop the lock signal in accordance with the standby mode control signal from the standby mode determination unit.

The advantages and spirit of the present invention will be further understood from the following detailed description of the invention.

BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic view showing a preferred embodiment of a DC motor driving device of the present invention. As shown in the figure, the DC motor driving device has a lock protection and standby control circuit 120, a motor rotation detecting circuit 140 and a motor control circuit 160.

The motor rotation detecting circuit 140 detects the rotation state of the motor to generate a square wave signal FG (that is, a motor rotation signal). The motor rotation detecting circuit 140 of this embodiment has a Hall detector 142 for detecting the rotation state of the motor. When the motor rotates, the Hall detector 142 outputs a pair of Hall signals H+, H- having the same frequency as the motor speed. After the Hall signal H+, H- is converted by the hysteresis comparator 144, a square wave signal FG whose frequency is dependent on the motor speed is generated. The lock protection and standby control circuit 120 can determine whether there is an obstacle to motor rotation based on the square wave signal FG.

The lock protection and standby control circuit 120 has a lock protection unit 121 and a standby mode determination unit 123. The lock protection unit 121 receives the square wave signal FG from the motor rotation detecting circuit 140 to generate a lock signal LOCK. In order to prevent misjudgment, the lock protection unit 121 has a counter (not shown) for calculating the length of time during which the motor stops rotating. After the lock protection unit 121 detects that the motor stops rotating for more than a first predetermined length of time, a lock signal LOCK is generated to notify the motor control circuit 160 to activate a lock protection function. For example, after receiving the lock signal LOCK, the motor control circuit 160 can use a fixed-cycle pulse wave signal instead of the original pulse width modulation signal PWM to drive the motor to rotate to prevent charging for a long time and burn the circuit. Reduce power consumption. In addition, after the rotation of the motor is removed, the pulse signal of the fixed period can automatically return the motor to normal rotation.

The standby mode determining unit 123 receives a pulse width modulation signal PWM and a lock signal LOCK from the lock protection unit, and generates a standby mode control signal STB according to the pulse width modulation signal PWM and the lock signal LOCK to notify the motor control circuit. 160 enters standby mode. Further, the lock protection unit 121 also determines whether or not to stop generating the lock signal LOCK in accordance with the standby mode control signal STB from the standby mode determination unit 123. For example, when the standby mode control signal STB is displayed in the standby mode, the lock protection unit 121 then stops generating the lock signal LOCK, and after the standby mode control signal STB indicates that the system returns from the standby mode to the normal mode, the lock protection unit 121 is locked. The first predetermined length of time is again calculated.

1A is a circuit diagram of a preferred embodiment of the lock protection and standby control circuit 120 of the present invention. As shown in the figure, the lock protection unit 121 has a lock protection circuit 122, an oscillator 127 and an inverter 128. The lock protection circuit 122 receives the square wave signal FG from the motor rotation detecting circuit 140, and has a counter inside. The oscillator 127 is used to generate one of the oscillation signals OSC required for the counter calculation time. After the lock protection circuit 122 detects that the motor stops rotating for more than a first predetermined length of time, a lock signal LOCK is generated.

The standby mode determining unit 123 has a delay circuit (De-glitch) 125, an inverter 126, and a logic circuit 124. The delay circuit 125 is used to prevent the influence of noise on the pulse width modulation signal PWM. The inverter 126 is configured to PWM convert the pulse width modulation signal outputted by the delay circuit 125 into a reverse pulse width modulation signal PWMB. The logic circuit 124 (e.g., a flip-flop) receives the reverse pulse width modulation signal PWMB and the lock signal LOCK from the lock protection unit 121 to generate a standby mode control signal STB.

The lock protection circuit 122 in the lock protection unit 121 receives the standby mode control signal STB through an inverter 128, and determines whether to stop generating the lock signal LOCK and re-lock the guard time according to the standby mode control signal STB (ie, the foregoing The calculation of a predetermined length of time). For example, when the standby mode control signal STB is displayed in the standby mode, the lock protection unit 121 then stops generating the lock signal LOCK, and after the standby mode control signal STB indicates that the system returns from the standby mode to the normal mode, the lock protection unit 121 is locked. The first predetermined length of time is again calculated.

Figures 1B and 1C show two different embodiments of the logic circuit of the present invention. As shown in FIG. 1B, in the first embodiment, the standby mode determining unit 223 has a logic circuit 224 and a delay circuit 225. This logic circuit 224 is comprised of three inverse OR gates (NOR) 2242, 2244, 2246 and an inverter 2248. The lock signal LOCK from the lock protection unit 221 is input to the inverse gate 2242 through the inverter 2248, and the reverse gate 2242 receives the pulse width modulation signal PWM from the delay circuit 225 at the same time, and is modulated in the pulse width modulation signal. When the reverse signal of the PWM and the lock signal LOCK are both low, a high potential signal is output.

The anti-gates 2244 and 2246 form a reverse or yoke lock circuit (RS latch). The reset terminal receives the pulse width modulation signal PWM from the delay circuit 225, and the set terminal receives the output signal from the inverse OR gate 2242. When the pulse width modulation signal PWM is low and the signal of the set terminal is high to indicate that the lock signal LOCK is high, the output of the reverse latch lock circuit outputs a high potential standby mode control signal STB. , the notification system enters the standby state.

The lock protection circuit 222 in the lock protection unit 221 receives the standby mode control signal STB through the inverter 228, and determines whether to stop generating the lock signal LOCK and recalculate the lock guard time based on the standby mode control signal STB.

As shown in FIG. 1C, in the second embodiment, the standby mode determining unit 323 has a logic circuit 324 and a delay circuit 325. This logic circuit 324 is composed of three NAND gates 3242, 3244, 3246 and an inverter 3248. The pulse width modulation signal PWM from the delay circuit 325 is converted to a reverse pulse width modulation signal PWMB via the inverter 3248. The lock signal LOCK from the lock protection unit 321 is input to the inverse gate 3242. The inverse gate 3242 receives the reverse pulse width modulation signal PWMB from the inverter 3248 at the same time, and outputs a low potential signal when the reverse pulse width modulation signal PWMB and the lock signal LOCK are both high.

The anti-gates 3244 and 3246 form a reverse latch lock circuit (RS latch). The reset terminal receives the reverse pulse width modulation signal PWMB from the inverter 3248, and the set terminal receives the output signal from the inverse gate 3242. When the pulse width modulation signal PWM is low and the signal at the set end is low to indicate that the lock signal LOCK is high, the output of the gate lock circuit outputs a low potential standby mode control signal STB. , the notification system enters the standby state.

Different from the embodiment of FIG. 1A and FIG. 1B , in the embodiment, the lock protection circuit 322 in the lock protection unit 321 directly receives the standby mode control signal STB without passing through the inverter, and controls the signal according to the standby mode. The STB decides whether to stop generating the lock signal LOCK and recalculate the lock protection time.

Figure 2 is a timing diagram of a preferred embodiment of the lock protection and standby control circuit 120 of Figure 1A. As shown in the figure, when the motor is not driven for a long time, the pulse width modulation signal PWM input from the outside is low (corresponding to the stop driving state), and the reverse pulse width modulation signal PWMB is high. At the same time, since the motor control circuit 160 does not receive the high-frequency pulse width modulation signal PWM, the rotation of the motor also stops.

After receiving the high potential reverse pulse width modulation signal PWMB, the logic circuit 124 does not immediately output the standby mode control signal STB. As shown in the figure, until the square wave signal FG indicates that the motor stops rotating for the first predetermined time length T1, the lock protection unit 121 generates the lock signal LOCK, and the logic circuit 124 generates the high-potential standby mode control signal STB according to the lock signal LOCK ( Corresponding to the standby mode), the motor control circuit 160 is brought into the standby mode.

The high-potential standby mode control signal STB outputted by the logic circuit 124 is used to control the operation of the lock protection unit 121 in addition to controlling the motor control circuit 160 to enter the standby mode. The high potential standby mode control signal STB is converted to a low potential control signal EN via an inverter 128. After receiving the low-level control signal EN, the lock protection circuit 122 stops generating the lock signal LOCK and clears the internal count data. Therefore, in the standby mode, the logic circuit 124 continues to output the high-potential standby mode control signal STB, and the lock protection unit 121 does not generate the lock signal LOCK.

When the pulse width modulation signal PWM transitions to a high level to restart the motor (ie, returns to the normal driving state), the logic circuit 124 stops the output of the high potential standby mode according to the reverse pulse width modulation signal PWMB that is converted to the low potential. The control signal STB causes the motor control circuit 160 to resume normal operation. At the same time, the control signal EN is also switched to a high potential, causing the lock protection circuit 122 to resume normal operation.

As shown in the figure, the pulse width modulation signal PWM input to the outside is high, but the square wave signal FG indicates that the motor has not rotated, indicating that the motor is blocked. After the lock protection unit 121 detects that the motor stops rotating for the first predetermined time length T1, a high potential lock signal LOCK is generated. At this time, since the outside world continuously inputs the high-frequency pulse width modulation signal PWM, the logic circuit 124 does not generate the high-potential standby mode control signal STB, but outputs the low-potential standby mode control signal STB to indicate that the system is in the system. Normal mode. The motor control circuit 160 receives this lock signal LOCK and then changes its motor drive mode. For example, a fixed-cycle pulse wave signal can be used instead of the original pulse width modulation signal PWM to prevent charging for a long time to burn the circuit and reduce power consumption.

3 is a schematic diagram of a preferred embodiment of the lock protection circuit 122 of the present invention. As shown in the figure, the lock protection circuit 122 has a first counter 1222, a second counter 1224 and a third counter 1226. As shown in the figure, when the square wave signal FG is at a high potential, the first counter 1222 is reset, and after the counting is completed, a high potential output signal C1 is generated. When the square wave signal FG is at a low potential, the second counter 1224 is reset, and after the counting is completed, a high potential output signal C2 is generated. Therefore, regardless of whether the square wave signal FG stays at a high potential or a low potential, at least one of the counters generates a high-potential output signal C1, C2 after the counting is completed to generate a high-potential lock signal LOCK.

When the lock signal LOCK transitions to a high level, the third counter 1226 starts counting, and after completing the counting, generates a high potential output signal C3, resetting the first counter 1222 and the second counter 1224 to force the lock signal LOCK to transition to a low potential. . After the lock signal LOCK transitions to a low potential, the third counter 1226 is reset again, causing the output signal C3 to transition to a low potential.

4 is a timing diagram of a preferred embodiment of the lock protection circuit 122 of the present invention. When the square wave signal FG is switched to the high potential, the first counter 1222 is reset; when the square wave signal FG is switched to the low potential, the second counter 1224 is reset. It is assumed that the counting interval of the first counter 1222 and the second counter 1224 is both Ton, and the first counter 1222 and the second counter 1224 are reset after they are reset, and the high-potential output signal is not generated until the counting is completed. In the figure, the square wave signal FG is stopped at a low potential. Therefore, the first counter 1222 will preferentially complete the counting, and output a high-potential output signal C1, and at the same time generate a high-potential lock signal LOCK, informing the motor control circuit 160 to stop the motor. The coil 170 is powered.

It is assumed that the time interval of the third counter 1226 is Toff. When the lock signal LOCK transitions to a high level, the third counter 1226 starts counting. After the third counter 1226 completes counting, the third counter 1226 then generates a high potential output signal C3, resetting the first counter 1222 and the second counter 1224. When the first counter 1222 and the second counter 1224 receive the high potential output signal C3, the output signals C1, C2 of the high potential are stopped, and the calculation of the time interval Ton is restarted. Since the output signals C1 and C2 are both low, the lock signal LOCK will transition to a low potential. This low potential lock signal LOCK is in turn used to reset the third counter 1226 to cause the output signal C3 to transition to a low potential.

In the time interval Ton, neither the first counter 1222 nor the second counter 1224 outputs the high-potential output signals C1, C2, and the lock signal LOCK is maintained at a low potential. After the first counter 1222 and the second counter 1224 have finished counting, if the motor is still in the locked state, the high-potential output signal C1 is regenerated, and the lock signal LOCK is turned to the high potential, and the calculation of the aforementioned time interval Toff is repeated. On the other hand, if the motor rotation obstacle has been eliminated, the first counter 1222 and the second counter 1224 are constantly reset by the square wave signal FG without generating the high-potential output signals C1, C2. At this time, the motor control circuit 160 controls the motor rotation in accordance with the pulse width modulation signal PWM.

Accordingly, in the case where the motor is locked, the lock protection circuit 122 of the present invention outputs a lock signal LOCK of a fixed period. The motor control circuit 160 uses the lock signal to change the original motor drive mode. When the lock signal LOCK is at a high potential, the motor control circuit 160 stops charging the motor coil 170. When the lock signal LOCK is at a low potential, the motor control circuit is 160 to maintain its normal operation. By alternately operating, the possibility that the motor coil 170 is overcharged and burned out can be avoided.

As shown in Fig. 1, the motor control circuit 160 controls the rotation of the motor through a single-phase motor drive circuit 180. This single-phase motor drive circuit 180 has four switching elements M1, M2, M3, M4, which constitute a bridge circuit (H-bridge) to drive the motor. The operation can be divided into two different conduction phases, the first conduction phase (phase I) when the switching elements M1 and M4 are turned on, and the second conduction phase (phase II) when the switching elements M2 and M3 are turned on.

However, when the first conduction phase is switched to the second conduction phase, the current of the switching element M2, M3 is kept at the saturation current value due to the inductivity of the motor coil 170, and flows to the right in the figure, thereby generating The reverse current is recharged to the power supply terminal Vm, and the Vm voltage of the power supply terminal may rise above the withstand voltage to cause the circuit to burn out. In order to solve this problem, the DC motor driving device of the present invention has a reverse current preventing circuit 190. The reverse current preventing circuit 190 detects the voltage values Va, Vb across the motor coil 170, and determines the conduction time of the switching elements M1, M2, M3, M4 based on the difference between the two voltage values Va and Vb.

Fig. 5 is a timing waveform diagram of respective signals of the reverse current prevention circuit 190 and the motor drive circuit 180 of the present invention. In the figure, the voltage signals A, B, C, and D represent the gate control signals of the respective switching elements M1, M2, M3, and M4, respectively. The current i (motor) represents the coil current of the motor, and the current i(M1), i(M2) i(M3), i(M4) denote currents flowing through the respective switching elements M1, M2, M3, M4, respectively. Va represents the voltage of the contact VA of the switching elements M1 and M3, Vb represents the voltage of the contact VB of the switching elements M2 and M4, and Va and Vb also represent the voltage across the motor.

The sixth diagram is a flow chart through which the reverse current preventing circuit 190 controls the on-time of the switching elements M1, M2, M3, and M4 to perform commutation. At the same time, as shown in FIG. 5, in the first conduction phase, the gate control signal A is at a low potential, and D is at a high potential, and the switching elements M1 and M4 are respectively controlled to be turned on. At this time, the coil current i (motor) flows from the left to the right in the figure (this current direction is defined as positive).

At the end of the first on-phase period, the gate control signal A is switched to the high-potential off switching element M1, and the gate control signal C is switched to the high-potential on-off switching element M3 to enter the discharge period. At this time, the power supply terminal Vm stops supplying power to the coil. However, due to the inductive characteristic of the motor coil 170, the coil current i (motor) continues to flow to the switching element M4, and the voltage Va of the left end point VA of the motor coil 170 is negative. The voltage Vb of the right end point VB is positive. Therefore, the voltage difference (Va-Vb) across the motor coil 170 is negative, and the voltage difference (Va-Vb) across the motor coil 170 approaches zero as the motor coil 170 discharges.

When the absolute value of the voltage difference (Va-Vb) is less than a first predetermined reference voltage, the reverse current preventing circuit 190 generates a discharge control signal Discharge. After receiving the discharge control signal Discharge, the motor control circuit 160 switches the gate control signal B to a low potential to turn on the switching element M2, and switches the gate control signal D to a low potential to turn off the switching element M4 to switch to the Two conduction phases.

At the end of the second on-phase period, the gate control signal B is switched to the high-potential off switching element M2, and the gate control signal D is switched to the high-potential on-off switching element M4 to enter the discharge period. At this time, the power supply terminal Vm stops supplying power to the coil. However, due to the inductive characteristic of the motor coil 170, the coil current i (motor) continues to flow to the switching element M3, and the voltage Va of the left end point VA of the motor coil 170 is positive. The voltage Vb of the right end point VB is negative. Therefore, the motor line The voltage difference (Va-Vb) across the coil 170 is positive, and the voltage difference (Va-Vb) across the motor coil 170 approaches zero as the motor coil 170 discharges.

When the absolute value of the voltage difference (Va-Vb) is less than a second predetermined reference voltage, the reverse current prevention circuit 190 generates a discharge control signal Discharge. After receiving the discharge control signal Discharge, the motor control circuit 160 switches the gate control signal A to a low potential to turn on the switching element M1, and switches the gate control signal C to a low potential to turn off the switching element M3 to switch to the first A conduction phase.

In the foregoing embodiment, during the switching from the first on-phase period to the discharge period, the switching element M1 is turned off simultaneously with the conduction line of the switching element M3. However, in order to prevent the short-circuiting of the switching element M1 and the switching element M3 at the same time, as shown in FIG. 6, in a preferred embodiment, a dead zone period can be inserted between the first conducting phase period and the discharging period ( Dead time). That is, the switching element M1 is turned off before the switching element M3 is turned on. Similarly, in order to avoid a short circuit caused by the switching element M4 and the switching element M2 being simultaneously turned on, a dead time can be inserted between the discharging period and the second conducting phase period. That is, the switching element M4 is turned off before the switching element M2 is turned on.

Next, in a preferred embodiment, the reverse current prevention circuit 190 of the present invention can be a comparator having two predetermined reference voltages. The comparator detects the voltages Va, Vb of the points VA and VB at the ends of the motor coil 170, and is less than a first preset when the absolute value of the voltage difference (Va-Vb) (the voltage difference (Va-Vb) is negative) When the reference voltage or the voltage difference (Va-Vb) (the voltage difference (Va-Vb) is positive) is less than a second predetermined reference voltage, the discharge control signal Discharge is generated to notify the motor control circuit 160 to perform the commutation operation. However, the present invention is not limited thereto, and the comparator may have only a predetermined reference voltage. The discharge control signal is generated when the absolute value of the voltage difference (Va-Vb) (whether the voltage difference (Va-Vb) is positive or negative) is less than a predetermined reference voltage.

The above is only the preferred embodiment of the present invention, and the scope of the invention is not limited thereto, that is, the simple equivalent changes and modifications made by the scope of the invention and the description of the invention are All remain within the scope of the invention patent. In addition, any of the objects or advantages or features of the present invention are not required to be achieved by any embodiment or application of the invention. In addition, the abstract sections and headings are only used to assist in the search of patent documents and are not intended to limit the scope of the invention.

120. . . Lock protection and standby control circuit

140. . . Motor rotation detection circuit

160. . . Motor control circuit

FG. . . Square wave signal

142. . . Hall detector

H+, H-. . . Hall signal

144. . . Hysteresis comparator

121. . . Lock protection unit

123. . . Standby mode judgment unit

LOCK. . . Lock signal

PWM. . . Pulse width modulation signal

STB. . . Standby mode control signal

122. . . Lock protection circuit

127. . . Oscillator

128. . . Inverter

OSC. . . Oscillating signal

125. . . Delay circuit

126. . . Inverter

124. . . Logic circuit

PWMB. . . Reverse pulse width modulation signal

EN. . . control signal

1222. . . First counter

1224. . . Second counter

1226. . . Third counter

C1, C2, C3. . . output signal

170. . . Motor coil

180. . . Single-phase motor drive circuit

M1, M2, M3, M4. . . Switching element

190. . . Reverse current prevention circuit

VA, VB. . . contact

A, B, C, D. . . Gate control signal

Vm. . . Power terminal

Discharge. . . Discharge control signal

223. . . Standby mode judgment unit

224. . . Logic circuit

225. . . Delay circuit

2242, 2244, 2246. . . Reverse or gate

2248. . . Inverter

221. . . Lock protection unit

222. . . Lock protection circuit

228. . . Inverter

323. . . Standby mode judgment unit

324. . . Logic circuit

325. . . Delay circuit

3242, 3244, 3246. . . Reverse gate

3248. . . Inverter

321. . . Lock protection unit

322. . . Lock protection circuit

BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a schematic view of a preferred embodiment of a motor drive unit of the present invention.

Figure 1A is a schematic diagram of a preferred embodiment of the lock protection and standby control circuit of the present invention.

1B is a schematic diagram of a first embodiment of a logic circuit for a lock protection and standby control circuit of the present invention.

1C is a schematic diagram of a second embodiment of a logic circuit for a lock protection and standby control circuit of the present invention.

Figure 2 is a timing diagram of a preferred embodiment of the lock protection and standby control circuit of Figure 1A.

Figure 3 is a schematic view of a preferred embodiment of the lock protection unit of the present invention.

Figure 4 is a timing diagram of a preferred embodiment of the lock protection unit of Figure 3.

Fig. 5 is a timing chart showing a preferred embodiment of the reverse current preventing circuit and the motor driving device of the present invention.

Figure 6 shows the commutation process of the present invention for commutating the motor control circuit by detecting the end voltage of the motor coil.

FG. . . Square wave signal

121. . . Lock protection unit

123. . . Standby mode judgment unit

LOCK. . . Lock signal

PWM. . . Pulse width modulation signal

STB. . . Standby mode control signal

122. . . Lock protection circuit

127. . . Oscillator

128. . . Inverter

OSC. . . Oscillating signal

125. . . Delay circuit

126. . . Inverter

124. . . Logic circuit

PWMB. . . Reverse pulse width modulation signal

EN. . . control signal

Claims (17)

A motor driving device comprises: a locking protection unit, according to a motor rotation signal, to generate a locking signal; a standby mode determining unit, receiving a pulse width modulation signal and the locking signal, and adjusting according to the pulse width The variable signal and the lock signal generate a standby mode control signal, the lock protection unit determines whether to stop the lock signal according to the standby mode control signal; and a motor control circuit controls the rotation of the motor according to the pulse width modulation signal . The motor drive device of claim 1, wherein the lock protection unit generates the lock signal after detecting that the motor stops rotating for more than a first predetermined length of time. The motor driving device of claim 1, wherein the motor control circuit determines whether to switch to a standby mode according to the standby mode control signal. The motor driving device of claim 1, wherein the lock protection unit stops generating the lock signal when the standby mode control signal corresponds to a standby mode. The motor driving device of claim 4, wherein when the pulse width modulation signal corresponds to a stop driving state, the standby mode determining unit receives the locking signal, and generates the standby corresponding to the standby mode. Mode control signal. The motor driving device of claim 5, wherein the lock signal output by the lock protection unit is a pulse wave signal when the pulse width modulation signal corresponds to the stop drive state. The motor driving device of claim 5, wherein when the pulse width modulation signal is returned from the stop driving state to a normal driving state, the standby mode determining unit generates a corresponding signal according to the pulse width modulation signal. The standby mode control signal in a normal mode causes the lock protection unit to resume normal operation. The motor drive device of claim 2, wherein the lock protection unit has a lock protection circuit and an oscillator, the lock protection circuit having at least one counter, and calculating the oscillation signal according to the oscillation signal generated by the oscillator The first preset time length. The motor drive device of claim 1, wherein the standby mode determining unit has a logic circuit for generating the standby mode control signal according to the pulse width modulation signal and the lock signal, the logic circuit comprising a latch Circuit or a flip-flop. A lock protection and standby control circuit for a motor drive device, wherein the motor drive device controls a motor rotation according to a pulse width modulation signal, the lock protection and standby control circuit includes: a lock protection unit, according to a motor Rotating a signal to generate a lock signal; and a standby mode determining unit receiving the pulse width modulation signal and the lock signal, and generating a standby mode control signal according to the pulse width modulation signal and the lock signal, The lock protection unit determines whether to stop the lock signal according to the standby mode control signal. The lock protection and standby control circuit of claim 10, wherein the lock protection unit generates the lock signal after detecting that the motor stops rotating for more than a first predetermined length of time. The lock protection and standby control circuit of claim 10, wherein the lock protection unit stops generating the lock signal when the standby mode control signal corresponds to a standby mode. The lock protection and standby control circuit of claim 12, wherein when the pulse width modulation signal corresponds to a stop driving state, the standby mode determining unit receives the lock signal and generates a corresponding standby mode. The standby mode control signal. The lock protection and standby control circuit of claim 13, wherein the lock signal outputted by the lock protection unit is a pulse signal when the pulse width modulation signal corresponds to the stop drive state. The lock protection and standby control circuit according to claim 13 , wherein when the pulse width modulation signal is returned from the stop driving state to a normal driving state, the standby mode determining unit is modulated according to the pulse width The signal generation of the standby mode control signal corresponding to a normal mode causes the lock protection unit to resume normal operation. The lock protection and standby control circuit of claim 11, wherein the lock protection unit has a lock protection circuit and an oscillator, the lock protection circuit having at least one counter and oscillating according to one of the oscillators The signal calculates the first preset time length. The lock protection and standby control circuit of claim 10, wherein the standby mode determining unit has a logic circuit, and the standby mode control signal is generated according to the pulse width modulation signal and the lock signal, the logic circuit includes A latch circuit or a flip-flop.