TWI419347B - Pin photodiode structure and method for making the same - Google Patents

Pin photodiode structure and method for making the same Download PDF

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TWI419347B
TWI419347B TW97126625A TW97126625A TWI419347B TW I419347 B TWI419347 B TW I419347B TW 97126625 A TW97126625 A TW 97126625A TW 97126625 A TW97126625 A TW 97126625A TW I419347 B TWI419347 B TW I419347B
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doped region
type doped
semiconductor material
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TW201003953A (en
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Hung Lin Shih
Tsan Chi Chu
Wen Shiang Liao
Wen Ching Tsai
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United Microelectronics Corp
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Description

一種PIN光二極體結構及其製法PIN light diode structure and preparation method thereof

本發明係關於一種光二極體結構及其製造方法。特別是關於一種光敏感之PIN光二極體結構及其製造方法。The present invention relates to a photodiode structure and a method of fabricating the same. In particular, it relates to a light-sensitive PIN light diode structure and a method of manufacturing the same.

隨著訊息傳送的資訊量越來越大,所需要的傳送距離也越來越遠,由於電阻與訊號遲滯的先天的物理性限制,傳統的銅纜線已經不能勝任此等負荷。由於單條光纖中允許波長不同的多量光束各自攜帶不同的資訊,以光速傳送訊息而不會相互干擾,而且經過極長的距離訊號也不會過度衰減,符合滿足龐大資訊量的遠距離的傳送需求,光纖自然取而代之成為當前最主要的遠距離資訊傳送媒介。As the amount of information transmitted by the message increases, the required transmission distance is also farther and farther. Due to the inherent physical limitations of resistance and signal lag, the traditional copper cable is no longer suitable for such load. Since a plurality of beams of different wavelengths in a single fiber respectively carry different information, the signals are transmitted at the speed of light without mutual interference, and the signals are not excessively attenuated by the extremely long distance signals, and meet the long-distance transmission requirements for satisfying a large amount of information. Fiber optics has naturally become the most important long-distance information transmission medium.

然而,不同波長的光再搭配脈衝訊號,構成了光纖通訊的基礎原則,然而此等基礎傳輸原則與現今電子裝置中以電子流攜帶與傳送訊號的傳輸原則並不相容。為了使得光纖通訊與電流通訊間形成轉換媒介,光偵測器(Photo-detector)成為一個便利的有用工具。However, different wavelengths of light combined with pulse signals constitute the basic principle of optical fiber communication. However, these basic transmission principles are incompatible with the transmission principle of electronic flow carrying and transmitting signals in today's electronic devices. In order to form a conversion medium between fiber communication and current communication, a photo-detector becomes a convenient and useful tool.

光偵測器是一種重要的光-電子轉換元件。光偵測器可 以將光脈衝信號轉換成電信號(電壓或電流),所以可以將光纖中的光脈衝訊號轉換為一般電子元件可以攜帶、傳輸與利用的電子信號。其中,具有容易製作、可靠度高、低雜音、可與低電壓放大器電路相匹配、並且有極高頻寬等特性之PIN光二極體(p-intrinsic-n photodiode)便是目前常用的光偵測器。A photodetector is an important photo-electronic conversion component. Light detector In order to convert the optical pulse signal into an electrical signal (voltage or current), the optical pulse signal in the optical fiber can be converted into an electronic signal that can be carried, transmitted and utilized by general electronic components. Among them, a PIN photodiode (p-intrinsic-n photodiode) which is easy to manufacture, has high reliability, low noise, can be matched with a low voltage amplifier circuit, and has extremely high frequency and wide characteristics is a commonly used photodetector. .

PIN光二極體的基本工作原理是,當入射光子照射在半導體之p-n接面(junction)時,若光子能量足夠大,則可以使得半導體材料中價電帶之電子會吸收光子之能量,從價電帶越過禁帶到達導電帶,也就是是入射光子會在半導體之導電帶中產生電子,稱為光電子,同時還會在價電帶中就留下一電洞,也就是產生一電子電洞對(electron-hole pair),亦可稱為光生載流子(photocarriers),此即為半導體之光電效應(photoelectric effect)。此後,光電子、電洞在內建電場和一外加負偏壓之作用下迅速分離,分別為正、負電極收集而在外電路中出現了光電流。The basic working principle of the PIN photodiode is that when the incident photon is irradiated on the p-n junction of the semiconductor, if the photon energy is sufficiently large, the electrons of the valence band in the semiconductor material can absorb the energy of the photon. The valence band passes over the forbidden band to reach the conductive strip, that is, the incident photon will generate electrons in the conductive strip of the semiconductor, called photoelectron, and also leave a hole in the valence band, that is, generate an electron. An electron-hole pair, also known as photocarriers, is the photoelectric effect of a semiconductor. Thereafter, the photoelectrons and the holes are quickly separated by the built-in electric field and an externally applied negative bias, and the positive and negative electrodes are collected separately, and the photocurrent appears in the external circuit.

為了增強PIN檢光二極體的操作效能,現行技術係將鍺半導體材料整合至矽基材中以達成寬廣波長的光通訊,這被認為是由於鍺的載子遷移率遠高於矽,所以將鍺半導體材料整合至矽基材中的重要性在於快速、有效與低雜訊的重要特質。鍺的光偵測器具有能夠在光通訊所利用的波長 範圍內有效地偵測光訊號的性質。此外,鍺的光偵測器如果還可以與矽基材的傳統製程整合,應該能進一步有效降低PIN光二極體的成本。In order to enhance the operational efficiency of the PIN photodiode, the current technology integrates germanium semiconductor materials into germanium substrates to achieve wide-wavelength optical communication, which is believed to be due to the carrier mobility of germanium being much higher than that of germanium. The importance of the integration of germanium semiconductor materials into germanium substrates lies in the important characteristics of fast, efficient and low noise.锗Photodetector has a wavelength that can be utilized in optical communication Effectively detect the nature of optical signals within the range. In addition, if the 光 photodetector can be integrated with the traditional process of the ruthenium substrate, it should be able to further reduce the cost of the PIN photodiode.

已知一種將鍺半導體材料整合至矽基材中的PIN檢光二極體第1圖例示此等已知之含鍺半導材料的PIN檢光二極體PIN檢光二極體101中包含有矽基材110、氧化層120、P-摻雜矽130、本質鍺(intrinsic Ge) 140、N-摻雜鍺150、電極區,其包含第一電極區161與第二電極區162。P-摻雜矽130、本質鍺(intrinsic Ge) 140、N-摻雜鍺150三者一起構成了PIN檢光二極體核心元件由於以上PIN檢光二極體101之結構是將電極摻雜區中之第一電極區161設置於N-摻雜鍺150的上方,因此會降低正面受光的範圍,而且光在通過P-摻雜矽時會被吸收而降低量子效率,再者此等PIN檢光二極體101的製作過程並不能與傳統的金氧半導體的製程完全整合。因此需要一種新穎的PIN檢光二極體結構以及製作方法,可以更有效的將其製程與傳統發展成熟的金氧半導體的製程完全整合,來達到降低製造成本的目標。A PIN light-detecting diode for integrating a germanium semiconductor material into a germanium substrate is known. FIG. 1 illustrates that the known PIN-detecting diode PIN light-detecting diode 101 containing a germanium-containing semiconductor material includes a germanium substrate. 110, an oxide layer 120, a P-doped germanium 130, an intrinsic Ge 140, an N-doped germanium 150, an electrode region including a first electrode region 161 and a second electrode region 162. P-doped germanium 130, intrinsic germanium 140, and N-doped germanium 150 together constitute a core component of the PIN light-detecting diode. Since the structure of the above PIN light-detecting diode 101 is in the electrode doping region The first electrode region 161 is disposed above the N-doped germanium 150, thereby reducing the range of front side light receiving, and the light is absorbed when passing through the P-doped germanium to reduce the quantum efficiency, and the PIN light detecting second The fabrication process of the polar body 101 is not fully integrated with the conventional MOS process. Therefore, a novel PIN light-detecting diode structure and a manufacturing method are needed, which can more effectively integrate the process with the traditionally developed metal-oxygen semiconductor process to achieve the goal of reducing manufacturing cost.

因此,本發明提出一種新穎的PIN光二極體結構及其 製造方法。可以更有效的將其製造方法與傳統發展成熟的的金氧半導體的製程完全整合,來達到降低製造成本的目標,以解決上述問題。Therefore, the present invention proposes a novel PIN optical diode structure and Production method. The manufacturing process can be more effectively integrated with the traditionally developed MOS process to achieve the goal of reducing manufacturing costs to solve the above problems.

本發明首先關於一種PIN光二極體結構。本發明之PIN光二極體結構,包含含有矽之半導體基材、位於半導體基材中之P型摻雜區、位於半導體基材中之N型摻雜區和位於半導體基材中以及位於P型摻雜區與N型摻雜區間之第一半導體材料。較佳者,此等第一半導體材料包含鍺,或是,具有鍺濃度梯度。The invention first relates to a PIN light diode structure. The PIN photodiode structure of the present invention comprises a semiconductor substrate containing germanium, a P-type doped region in the semiconductor substrate, an N-type doped region in the semiconductor substrate, and in the semiconductor substrate and in the P-type a doped region and a first semiconductor material of an N-type doping region. Preferably, the first semiconductor material comprises germanium or has a germanium concentration gradient.

本發明又提供一種形成PIN光二極體結構之方法。本發明形成PIN光二極體結構之方法,首先提供半導體基材,其包含N型摻雜區與P型摻雜區。其次,在半導體基材中形成溝渠,而位於P型摻雜區與N型摻雜區之間。之後,使用第一半導體材料填滿此溝渠,使得第一半導體材料還可以自溝渠凸起。較佳者,此等第一半導體材料包含鍺,或是,具有鍺濃度梯度。The invention further provides a method of forming a PIN photodiode structure. The method of the present invention for forming a PIN photodiode structure first provides a semiconductor substrate comprising an N-type doped region and a P-type doped region. Secondly, a trench is formed in the semiconductor substrate between the P-type doped region and the N-type doped region. Thereafter, the trench is filled with the first semiconductor material such that the first semiconductor material can also be raised from the trench. Preferably, the first semiconductor material comprises germanium or has a germanium concentration gradient.

由於本發明之PIN光二極體結構,作為導電電極用之P型摻雜區與N型摻雜區均位於半導體之基材中,所以製作本發明新穎的PIN檢光二極體結構的方法,可以增加受光的範圍並更有效的將其製程與傳統上已經發展到十分成 熟的金氧半導體的製程完全整合,來達到降低製造成本的目標。Due to the PIN photodiode structure of the present invention, both the P-type doped region and the N-type doped region used as the conductive electrode are located in the substrate of the semiconductor, so the method for fabricating the novel PIN light-detecting diode structure of the present invention can be Increasing the range of light received and more effectively making its process and traditionally developed The process of cooked MOS is fully integrated to achieve the goal of reducing manufacturing costs.

本發明關於一種新穎的PIN光二極體結構及其製造方法。由於本發明之PIN光二極體結構,作為導電電極用之P型摻雜區與N型摻雜區均位於鍺半導體材料兩側之基材中,所以製作本發明新穎的PIN光二極體結構的方法,不但能大幅增加受光的範圍,並可以更有效的將其製程與傳統上已經發展到十分成熟的金氧半導體的製程完全整合,來達到降低製造成本的目標。The present invention relates to a novel PIN photodiode structure and a method of fabricating the same. Due to the PIN photodiode structure of the present invention, both the P-type doped region and the N-type doped region used as the conductive electrode are located in the substrate on both sides of the germanium semiconductor material, so that the novel PIN optical diode structure of the present invention is fabricated. The method not only can greatly increase the range of light receiving, but also can more effectively integrate its process with the process of the traditionally mature metal oxide semiconductor to achieve the goal of reducing manufacturing costs.

本發明首先提供一種光二極體結構。第2圖例示本發明光二極體結構之一較佳實施例。本發明之光二極體結構200,包含半導體基材201、淺溝渠隔離(shallow trench isolation,STI)210、P型摻雜區221、N型摻雜區222、溝渠230、層間介電層240、P型摻雜區插塞插塞251與N型摻雜區插塞252。The present invention first provides a photodiode structure. Fig. 2 illustrates a preferred embodiment of the photodiode structure of the present invention. The photodiode structure 200 of the present invention comprises a semiconductor substrate 201, a shallow trench isolation (STI) 210, a P-doped region 221, an N-type doped region 222, a trench 230, and an interlayer dielectric layer 240. P-type doped region plug plug 251 and N-type doped region plug 252.

半導體基材201可以為一般之半導體材料,例如矽或矽覆絕緣(SOI)等基底。而淺溝渠隔離210等之絕緣材料即位於半導體基材201中以區隔不同之元件區域。如第2圖 所示,本發明之光二極體結構200之外圍即設置有淺溝渠隔離210。The semiconductor substrate 201 can be a general semiconductor material such as a substrate such as tantalum or silicon-on-insulator (SOI). The insulating material of the shallow trench isolation 210 or the like is located in the semiconductor substrate 201 to distinguish different component regions. As shown in Figure 2 As shown, the periphery of the photodiode structure 200 of the present invention is provided with a shallow trench isolation 210.

溝渠230亦位於淺溝渠隔離210環繞之半導體基材201中。另外,溝渠230之相對兩側,分別設置有也位於半導體基材201中之P型摻雜區221與N型摻雜區222。可以使用習知之摻質,再配合傳統之離子植入法在半導體基材201中形成P型摻雜區221與N型摻雜區222。此外,還可以再加上熱擴散或是退火步驟以活化P型摻雜區221與N型摻雜區222。The trench 230 is also located in the semiconductor substrate 201 surrounded by the shallow trench isolation 210. In addition, opposite sides of the trench 230 are respectively provided with a P-type doping region 221 and an N-type doping region 222 which are also located in the semiconductor substrate 201. The P-doped region 221 and the N-type doped region 222 may be formed in the semiconductor substrate 201 using conventional dopants in combination with conventional ion implantation. In addition, a thermal diffusion or annealing step may be added to activate the P-type doping region 221 and the N-type doping region 222.

第一半導體材料231,即位於溝渠230中並填滿溝渠230。由於溝渠230的位置是在半導體基材201中,同時介於P型摻雜區221與N型摻雜區222之間,所以第一半導體材料231亦位於半導體基材201中,並同時介於P型摻雜區221與N型摻雜區222之間。第一半導體材料231可以為一般之半導體材料,例如矽、鍺、或其組合。較佳者,此等第一半導體材料231具有鍺濃度梯度。The first semiconductor material 231 is located in the trench 230 and fills the trench 230. Since the position of the trench 230 is in the semiconductor substrate 201 and is between the P-type doping region 221 and the N-type doping region 222, the first semiconductor material 231 is also located in the semiconductor substrate 201, and at the same time The P-type doped region 221 is between the N-type doped region 222. The first semiconductor material 231 can be a general semiconductor material such as tantalum, niobium, or combinations thereof. Preferably, the first semiconductor material 231 has a germanium concentration gradient.

此外,第一半導體材料231之上另外可以設有與第一半導體材料231相連並突出第一半導體材料231表面之一第二半導體材料232。第二半導體材料232可以為一般之半導體材料,例如矽、鍺、或其組合。較佳者,此等第二 半導體材料232具有繼承自第一半導體材料231鍺濃度梯度之鍺濃度梯度。In addition, a second semiconductor material 232 connected to the first semiconductor material 231 and protruding from one of the surfaces of the first semiconductor material 231 may be additionally disposed on the first semiconductor material 231. The second semiconductor material 232 can be a general semiconductor material such as tantalum, niobium, or combinations thereof. Preferably, these second The semiconductor material 232 has a germanium concentration gradient that is inherited from the first semiconductor material 231 concentration gradient.

層間介電層240覆蓋半導體基材201、P型摻雜區221、N型摻雜區222、溝渠230、第一半導體材料231與第二半導體材料232。還有,層間介電層240中另具有P型摻雜區插塞251,即位於P型摻雜區221上以建立P型摻雜區221與其他疊層後續的電連接之用。類似的,N型摻雜區插塞252,位於N型摻雜區222上之層間介電層240中,以建立N型摻雜區222與其他疊層後續的電連接之用。P型摻雜區插塞251與N型摻雜區插塞252分別可以使用習知之導電材料,例如鋁或鎢等。視情況需要,P型摻雜區221與N型摻雜區222的表面,另外還可以進一步包含一金屬矽化物,例如矽化鈷或是矽化鎳,以減低P型摻雜區插塞251與N型摻雜區插塞252對於P型摻雜區221與N型摻雜區222的表面電阻。The interlayer dielectric layer 240 covers the semiconductor substrate 201, the P-doped region 221, the N-type doped region 222, the trench 230, the first semiconductor material 231, and the second semiconductor material 232. Also, the interlayer dielectric layer 240 has a P-type doped region plug 251, that is, located on the P-type doped region 221 to establish a subsequent electrical connection between the P-type doped region 221 and other stacks. Similarly, an N-type doped region plug 252 is located in the interlayer dielectric layer 240 on the N-type doped region 222 to establish a subsequent electrical connection between the N-type doped region 222 and other stacks. The P-type doping region plug 251 and the N-type doping region plug 252 may each use a conventional conductive material such as aluminum or tungsten. Optionally, the surface of the P-doped region 221 and the N-type doped region 222 may further comprise a metal telluride such as cobalt telluride or nickel telluride to reduce the P-type doped region plugs 251 and N. The surface resistance of the doped region plug 252 for the P-type doped region 221 and the N-type doped region 222.

若有需要,本發明之半導體基材201可以進一步包含至少一金氧半導體(MOS)。換句話說,光二極體結構200的鄰近區域可以設置有互補之金氧半導體260(CMOS)。第3圖例示本發明光二極體結構旁設置有互補之金氧半導體之較佳實施例。如圖3所示,本發明之光二極體結構200的鄰近區域設置有互補之P型金氧半導體261與N型金氧 半導體262,其間各以淺溝渠隔離210作絕緣性的分隔。The semiconductor substrate 201 of the present invention may further comprise at least one metal oxide semiconductor (MOS), if desired. In other words, the adjacent region of the photodiode structure 200 may be provided with a complementary metal oxide semiconductor 260 (CMOS). Fig. 3 illustrates a preferred embodiment in which a complementary metal oxide semiconductor is disposed next to the photodiode structure of the present invention. As shown in FIG. 3, adjacent regions of the photodiode structure 200 of the present invention are provided with complementary P-type MOS 261 and N-type gold oxide. The semiconductors 262 are each insulated by a shallow trench isolation 210.

此外,為了可以與金氧半導體的製程充分相容,本發明之光二極體結構200中之元件可以與互補金氧半導體260中之元件共享部分製程特性。例如,本發明光二極體結構200之P型摻雜區221與N型摻雜區222至少一者之摻雜濃度可與互補金氧半導體260之源極/汲極等各式摻雜區之摻雜濃度相同。Moreover, in order to be sufficiently compatible with the MOS process, the components of the photodiode structure 200 of the present invention can share some of the process characteristics with the components of the complementary MOS 260. For example, at least one of the P-doped region 221 and the N-type doped region 222 of the photodiode structure 200 of the present invention may have a doping concentration of a plurality of doped regions such as a source/drain of the complementary MOS 260. The doping concentration is the same.

值得注意的是,本發明光二極體結構200可以有不同的受光方向。例如,若為第2圖所例示之結構時,本發明光二極體結構200可用於接受一上方光源(top incident light)。另一方面,本發明光二極體結構200也能應用於接受一側邊光源(side incident light)。第4圖例示用於接受側邊光源之本發明光二極體結構之一較佳實施例。本發明光二極體結構200另包含一光導(waveguide)270用於接受側邊而來之光源,使得本發明之光二極體結構,同樣適用於接受上方光源或是接受側邊光源或是同時接受。It should be noted that the photodiode structure 200 of the present invention may have different light receiving directions. For example, in the case of the structure illustrated in Fig. 2, the photodiode structure 200 of the present invention can be used to receive a top incident light. On the other hand, the photodiode structure 200 of the present invention can also be applied to receive a side incident light. Fig. 4 illustrates a preferred embodiment of the photodiode structure of the present invention for receiving a side light source. The light diode structure 200 of the present invention further comprises a light guide 270 for receiving the light source from the side, so that the light diode structure of the present invention is equally suitable for accepting the upper light source or receiving the side light source or accepting simultaneously. .

本發明又提供一種形成光二極體結構之方法。第5-9圖例示本發明形成光二極體結構方法之一較佳實施例。首先,如第5圖所示,提供一半導體基材501,其包含P型摻雜區521與N型摻雜區522。半導體基材501可以為一 般之半導體材料,例如矽。氧化物層502則覆蓋半導體基材501的表面。半導體基材501上可以另包含金氧半導體。例如,半導體基材501上又設置有互補金氧半導體560,包含互補之P型金氧半導體561與N型金氧半導體562,其間各以淺溝渠隔離510作絕緣性的分隔。The invention further provides a method of forming a photodiode structure. Figures 5-9 illustrate a preferred embodiment of the method of forming a photodiode of the present invention. First, as shown in FIG. 5, a semiconductor substrate 501 including a P-type doping region 521 and an N-type doping region 522 is provided. The semiconductor substrate 501 can be a General semiconductor materials, such as germanium. The oxide layer 502 covers the surface of the semiconductor substrate 501. A metal oxide semiconductor may be further included on the semiconductor substrate 501. For example, the semiconductor substrate 501 is further provided with a complementary MOS semiconductor 560 including a complementary P-type MOS 561 and an N-type MOS 562, each of which is insulated by a shallow trench isolation 510.

為了可以與金氧半導體的製程充分相容,本發明之光二極體結構中之元件可以與互補金氧半導體560中之元件共享部分製程特性。例如,可以使用習知之摻質,再配合傳統之離子植入法在形成互補金氧半導體560時同時形成本發明之光二極體結構中之P型摻雜區521與N型摻雜區522。此外,還可以再加上熱擴散或是退火步驟以活化P型摻雜區521與N型摻雜區522。當P型摻雜區521與N型摻雜區522與互補金氧半導體560同時形成時,P型摻雜區521與N型摻雜區522至少一者之摻雜濃度會與互補金氧半導體560之源極/汲極等各式摻雜區之摻雜濃度相同。In order to be sufficiently compatible with the MOS process, the components of the photodiode structure of the present invention can share some of the process characteristics with the components of the complementary MOS 560. For example, a conventional dopant may be used in combination with a conventional ion implantation method to simultaneously form a P-doped region 521 and an N-type doped region 522 in the photodiode structure of the present invention in forming a complementary MOS semiconductor 560. In addition, a thermal diffusion or annealing step may be added to activate the P-doped region 521 and the N-type doped region 522. When the P-type doping region 521 and the N-type doping region 522 are simultaneously formed with the complementary gold-oxygen semiconductor 560, at least one of the doping concentration of the P-type doping region 521 and the N-type doping region 522 may be complementary to the complementary MOS semiconductor. The doping concentrations of the various doping regions such as the source/drain of 560 are the same.

其次,如第6圖所示,形成位於半導體基材501中以及介於P型摻雜區521與N型摻雜區522間之溝渠530。例如,使用傳統光阻定義出溝渠530的位置後,再配合蝕刻的方式移除部分的半導體基材501形成溝渠530。Next, as shown in FIG. 6, a trench 530 is formed in the semiconductor substrate 501 and between the P-doped region 521 and the N-type doped region 522. For example, after the position of the trench 530 is defined using a conventional photoresist, a portion of the semiconductor substrate 501 is removed by etching to form a trench 530.

接下來,如第7圖所示,使用第一半導體材料531填 滿溝渠530。第一半導體材料531為一般之半導體材料,例如矽、鍺、或其組合。例如,使用習知之磊晶製程將第一半導體材料531填滿溝渠530。較佳者,此等第一半導體材料531是矽與鍺之混合物並具有鍺濃度梯度。如此一來,可有效避免與含矽之半導體基材501的晶格產生插排(mismatch)的問題。Next, as shown in FIG. 7, using the first semiconductor material 531 Full ditch 530. The first semiconductor material 531 is a general semiconductor material such as germanium, germanium, or a combination thereof. For example, the first semiconductor material 531 is filled with the trench 530 using a conventional epitaxial process. Preferably, the first semiconductor material 531 is a mixture of cerium and lanthanum and has a cerium concentration gradient. As a result, the problem of mismatching with the lattice of the germanium-containing semiconductor substrate 501 can be effectively avoided.

在一較佳實施例中,可於第一半導體材料531之磊晶製程中,繼續磊晶形成位於第一半導體材料上531並突出半導體基材501表面之第二半導體材料532,來接受上方光源或側邊光源。第二半導體材料532可以為一般之半導體材料,例如矽、鍺、或其組合。較佳者,此等第二半導體材料532具有繼承自第一半導體材料531鍺濃度梯度之鍺濃度梯度。In a preferred embodiment, the second semiconductor material 532 on the first semiconductor material 531 and protruding from the surface of the semiconductor substrate 501 can be continuously epitaxially formed in the epitaxial process of the first semiconductor material 531 to receive the upper light source. Or side light source. The second semiconductor material 532 can be a general semiconductor material such as germanium, germanium, or combinations thereof. Preferably, the second semiconductor material 532 has a germanium concentration gradient that is inherited from the first semiconductor material 531 concentration gradient.

在完成如第7圖之步驟後,如第8圖,繼續形成層間介電層540覆蓋半導體基材501、P型摻雜區521、N型摻雜區522、第一半導體材料531與第二半導體材料532。另外,為了形成電連接,還會製作接觸洞(contact hole)以容納P型摻雜區插塞551與N型摻雜區插塞552。視情況需要,P型摻雜區521與N型摻雜區522的表面,另外還可以進一步預先形成一金屬矽化物,例如矽化鈷或是矽化鎳,以減低P型摻雜區插塞551與N型摻雜區插塞552對於P型 摻雜區521與N型摻雜區522的表面電阻。After the step of FIG. 7 is completed, as shown in FIG. 8, the interlayer dielectric layer 540 is further formed to cover the semiconductor substrate 501, the P-type doped region 521, the N-type doped region 522, the first semiconductor material 531 and the second Semiconductor material 532. In addition, in order to form an electrical connection, a contact hole is also formed to accommodate the P-type doped region plug 551 and the N-type doped region plug 552. Optionally, a surface of the P-doped region 521 and the N-type doped region 522 may be further formed with a metal halide such as cobalt telluride or nickel telluride to reduce the P-type doped region plug 551 and N-type doped region plug 552 for P type The surface resistance of the doped region 521 and the N-type doped region 522.

如前所述,本發明方法所製作之光二極體可以有不同的受光方向。例如,若為第8圖所例示之結構時本發明光二極體結構適用於接受一上方光源另一方面本發明光二極體結構也能用於接受側邊光源第9圖例示本發明方法所製作之可用於形成接受側邊光源之光二極體結構之一較佳實施方式。在本發明光二極體結構中,第一半導體材料上531與第二半導體材料532之側邊更形成光導570,用於引導使得本發明光二極體結構接受側邊而來之光源,使得經由本發明方法所製得之光二極體結構,同樣適用於接受上方光源或是接受側邊光源或是同時接受。As described above, the photodiode fabricated by the method of the present invention can have different light receiving directions. For example, in the case of the structure illustrated in Fig. 8, the photodiode structure of the present invention is suitable for receiving an upper light source. On the other hand, the photodiode structure of the present invention can also be used for receiving a side light source, which is illustrated by the method of the present invention. A preferred embodiment of a photodiode structure that can be used to form a side light source. In the photodiode structure of the present invention, the first semiconductor material 531 and the side of the second semiconductor material 532 further form a light guide 570 for guiding the light source of the present invention to receive the light source from the side, so that The photodiode structure produced by the method of the invention is equally suitable for accepting an upper source or accepting a side source or simultaneously.

以上所述僅為本發明之較佳實施例,凡依本發明申請專利範圍所做之均等變化與修飾,皆應屬本發明之涵蓋範圍。The above are only the preferred embodiments of the present invention, and all changes and modifications made to the scope of the present invention should be within the scope of the present invention.

101‧‧‧PIN檢光二極體101‧‧‧PIN Detector Diode

110‧‧‧矽基材110‧‧‧矽 substrate

120‧‧‧氧化層120‧‧‧Oxide layer

130‧‧‧P-摻雜矽130‧‧‧P-doped 矽

140‧‧‧固有緒140‧‧‧ inherent

150‧‧‧N-摻雜緒150‧‧‧N-doping

161‧‧‧第一電極區161‧‧‧First electrode zone

162‧‧‧第二電極區162‧‧‧second electrode zone

200‧‧‧光二極體結構200‧‧‧Light diode structure

201‧‧‧半導體基材201‧‧‧Semiconductor substrate

210‧‧‧淺溝渠隔離210‧‧‧Shallow trench isolation

221‧‧‧P型摻雜區221‧‧‧P-doped area

222‧‧‧N型摻雜區222‧‧‧N-doped area

230‧‧‧溝渠230‧‧‧ Ditch

231‧‧‧第一半導體材料231‧‧‧First semiconductor material

232‧‧‧第二半導體材料232‧‧‧Second semiconductor material

240‧‧‧層間介電層240‧‧‧Interlayer dielectric layer

251‧‧‧P型摻雜區插塞251‧‧‧P-type doped area plug

252‧‧‧N型摻雜區插塞252‧‧‧N type doped area plug

260‧‧‧互補金氧半導體260‧‧‧Complementary MOS

261‧‧‧P型金氧半導體261‧‧‧P type MOS

262‧‧‧N型金氧半導體262‧‧‧N type MOS

270‧‧‧光導270‧‧‧Light Guide

501‧‧‧半導體基材501‧‧‧Semiconductor substrate

510‧‧‧淺溝渠隔離510‧‧‧Shallow trench isolation

521‧‧‧P型摻雜區521‧‧‧P-doped area

522‧‧‧N型摻雜區522‧‧‧N-doped area

530‧‧‧溝渠530‧‧‧ Ditch

531‧‧‧第一半導體材料531‧‧‧First semiconductor material

532‧‧‧第二半導體材料532‧‧‧Second semiconductor material

540‧‧‧層間介電層540‧‧‧Interlayer dielectric layer

551‧‧‧P型摻雜區插塞551‧‧‧P-type doped area plug

552‧‧‧N型摻雜區插塞552‧‧‧N type doped area plug

560‧‧‧互補金氧半導體560‧‧Complementary MOS

561‧‧‧P型金氧半導體561‧‧‧P type MOS

562‧‧‧N型金氧半導體562‧‧‧N type MOS

570‧‧‧光導570‧‧‧Light Guide

第1圖例示習知含鍺材料的檢光二極體。Fig. 1 illustrates a conventional light-detecting diode of a germanium-containing material.

第2圖例示本發明光二極體結構之一較佳實施例。Fig. 2 illustrates a preferred embodiment of the photodiode structure of the present invention.

第3圖例示本發明光二極體結構旁設置有互補之金氧半導體之較佳實施例。Fig. 3 illustrates a preferred embodiment in which a complementary metal oxide semiconductor is disposed next to the photodiode structure of the present invention.

第4圖例示用於接受側邊光源之本發明光二極體結構之一 較佳實施例。Figure 4 illustrates one of the photodiode structures of the present invention for receiving a side light source Preferred embodiment.

第5-9圖例示本發明形成光二極體結構方法之一較佳實施例。Figures 5-9 illustrate a preferred embodiment of the method of forming a photodiode of the present invention.

200‧‧‧光二極體結構200‧‧‧Light diode structure

201‧‧‧半導體基材201‧‧‧Semiconductor substrate

210‧‧‧淺溝渠隔離210‧‧‧Shallow trench isolation

221‧‧‧P型摻雜區221‧‧‧P-doped area

222‧‧‧N型摻雜區222‧‧‧N-doped area

230‧‧‧溝渠230‧‧‧ Ditch

231‧‧‧第一半導體材料231‧‧‧First semiconductor material

232‧‧‧第二半導體材料232‧‧‧Second semiconductor material

240‧‧‧層間介電層240‧‧‧Interlayer dielectric layer

251‧‧‧P型摻雜區插塞251‧‧‧P-type doped area plug

252‧‧‧N型摻雜區插塞252‧‧‧N type doped area plug

Claims (21)

一種PIN光二極體結構,包含:一半導體基材,其包含矽;一P型摻雜區,其位於該半導體基材中;一N型摻雜區,其位於該半導體基材中;一第一半導體材料,其位於該半導體基材中以及位於該P型摻雜區與該N型摻雜區之間;以及一第二半導體材料,與該第一半導體材料接觸且相連並突出該半導體基材表面,該第二半導體材料為半導體。 A PIN photodiode structure comprising: a semiconductor substrate comprising germanium; a P-type doped region located in the semiconductor substrate; an N-type doped region located in the semiconductor substrate; a semiconductor material disposed in the semiconductor substrate and between the P-type doped region and the N-type doped region; and a second semiconductor material in contact with and connected to the first semiconductor material The surface of the material, the second semiconductor material is a semiconductor. 如請求項1之PIN光二極體結構,其中該第二半導體材料包含鍺。 The PIN photodiode structure of claim 1, wherein the second semiconductor material comprises germanium. 如請求項1之PIN光二極體結構,進一步包含:一層間介電層,覆蓋該半導體基材、該P型摻雜區、該N型摻雜區與該第一半導體材料;一P型摻雜區插塞,位於該P型摻雜區上之該層間介電層中並與該P型摻雜區電連接;以及一N型摻雜區插塞,位於該N型摻雜區上之該層間介電層中並與該N型摻雜區電連接。 The PIN photodiode structure of claim 1, further comprising: an interlayer dielectric layer covering the semiconductor substrate, the P-type doped region, the N-type doped region and the first semiconductor material; a dummy pad pluged in the interlayer dielectric layer on the P-type doped region and electrically connected to the P-type doped region; and an N-type doped region plug on the N-type doped region The interlayer dielectric layer is electrically connected to the N-type doped region. 如請求項1之PIN光二極體結構,其中該第一半導體材料包含矽與鍺。 The PIN photodiode structure of claim 1, wherein the first semiconductor material comprises ruthenium and iridium. 如請求項1之PIN光二極體結構,其中該第一半導體材料具有一鍺之濃度梯度。 The PIN photodiode structure of claim 1, wherein the first semiconductor material has a concentration gradient of one 。. 如請求項1之PIN光二極體結構,其中該半導體基材包含至少一金氧半導體(MOS)。 The PIN photodiode structure of claim 1, wherein the semiconductor substrate comprises at least one metal oxide semiconductor (MOS). 如請求項6之PIN光二極體結構,其中該P型摻雜區與該N型摻雜區之摻雜濃度之至少一者與該金氧半導體之源極/汲極之摻雜濃度相同。 The PIN photodiode structure of claim 6, wherein at least one of a doping concentration of the P-type doping region and the N-type doping region is the same as a doping concentration of a source/drain of the MOS semiconductor. 如請求項3之PIN光二極體結構,進一步包含二組金屬矽化物,分別位於該P型摻雜區插塞與該P型摻雜區之間,以及位於該N型摻雜區插塞與該N型摻雜區之間。 The PIN photodiode structure of claim 3, further comprising two sets of metal germanides, respectively located between the P-type doped region plug and the P-type doped region, and the plug in the N-type doped region Between the N-type doped regions. 如請求項1之PIN光二極體結構,用於接受一上方光源(top incident light)。 The PIN light diode structure of claim 1 is for receiving a top incident light. 如請求項9之PIN光二極體結構,進一步包含一光導(waveguide),用於引導一側邊光源(side incident light)。 The PIN light diode structure of claim 9 further comprising a light guide for directing a side incident light. 一種形成PIN光二極體結構之方法,包含:提供一半導體基材,其包含一N型摻雜區與一P型摻雜區;形成一溝渠,位於該半導體基材中以及該P型摻雜區與該N 型摻雜區之間;以及使用一第一半導體材料填滿該溝渠。 A method of forming a PIN photodiode structure, comprising: providing a semiconductor substrate comprising an N-type doped region and a P-type doped region; forming a trench in the semiconductor substrate and the P-type doping Zone with the N Between the doped regions; and filling the trench with a first semiconductor material. 如請求項11之方法,更包含:形成一第二半導體材料,其位於該第一半導體材料上並突出該半導體基材表面,其中該第二半導體材料包含鍺。 The method of claim 11, further comprising: forming a second semiconductor material on the first semiconductor material and protruding the surface of the semiconductor substrate, wherein the second semiconductor material comprises germanium. 如請求項12之方法,其中該第二半導體材料用於接受一上方光源(top incident light)。 The method of claim 12, wherein the second semiconductor material is for receiving a top incident light. 如請求項11之方法,更包含:形成一層間介電層,覆蓋該半導體基材、該P型摻雜區、該N型摻雜區、該第一半導體材料與該溝渠;以及於該層間介電層中形成一P型摻雜區插塞與一N型摻雜區插塞,其各別位於該P型摻雜區上並與該P型摻雜區電連接以及位於該N型摻雜區上並與該N型摻雜區電連接。 The method of claim 11, further comprising: forming an interlevel dielectric layer covering the semiconductor substrate, the P-type doped region, the N-type doped region, the first semiconductor material and the trench; and between the layers Forming a P-type doped region plug and an N-type doped region plug in the dielectric layer, respectively located on the P-type doped region and electrically connected to the P-type doped region and located in the N-type doping The impurity region is electrically connected to the N-type doping region. 如請求項11之方法,其中該第一半導體材料包含矽與鍺。 The method of claim 11, wherein the first semiconductor material comprises ruthenium and osmium. 如請求項11之方法,其中該第一半導體材料具有一鍺之濃度梯度。 The method of claim 11, wherein the first semiconductor material has a concentration gradient of one turn. 如請求項11之方法,其中該半導體基材包含至少一互補金氧半導體(CMOS)。 The method of claim 11, wherein the semiconductor substrate comprises at least one complementary metal oxide semiconductor (CMOS). 如請求項17之方法,其中該P型摻雜區之摻雜濃度和該N型摻雜區之摻雜濃度與該互補金氧半導體者相同。 The method of claim 17, wherein the doping concentration of the P-type doping region and the doping concentration of the N-type doping region are the same as those of the complementary oxy-semiconductor. 如請求項11之方法,更包含:於該P型摻雜區以及該N型摻雜區上分別形成一金屬矽化物。 The method of claim 11, further comprising: forming a metal halide on the P-type doping region and the N-type doping region, respectively. 如請求項11之方法,其中該第一半導體材料用於接受一側邊光源(side incident light)。 The method of claim 11, wherein the first semiconductor material is for receiving a side incident light. 如請求項20之方法,更包含:形成一光導(waveguide),用於引導該側邊光源。The method of claim 20, further comprising: forming a light guide for guiding the side light source.
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US6707126B2 (en) * 2000-11-15 2004-03-16 Seiko Epson Corporation Semiconductor device including a PIN photodiode integrated with a MOS transistor
US6737718B2 (en) * 2000-10-30 2004-05-18 Nec Corporation Semiconductor photodetector
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US6737718B2 (en) * 2000-10-30 2004-05-18 Nec Corporation Semiconductor photodetector
US6707126B2 (en) * 2000-11-15 2004-03-16 Seiko Epson Corporation Semiconductor device including a PIN photodiode integrated with a MOS transistor
US20060091490A1 (en) * 2004-11-03 2006-05-04 Hung-Wei Chen Self-aligned gated p-i-n diode for ultra-fast switching
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