TWI418046B - A manufacturing method for the multi-junction solar cell - Google Patents

Description

Method for manufacturing multi-junction solar cell

The present invention relates to a method for fabricating a solar cell, and more particularly to a method for fabricating a multi-junction solar cell, which can provide mechanical joint strength and uniformity required for serial connection of the cells of the multi-junction solar cell. Current density.

Nowadays, the global environmental pollution caused by the use of fossil fuels has intensified global warming. Coupled with the gradual depletion of fossil fuels such as oil and tight supply, and the fact that energy prices have hit record highs, countries are actively seeking alternatives. Performance sources, in which solar cells play a very important role in emerging alternative energy sources.

Among various solar cells, concentrating solar cells have attracted attention because they can generate extremely high power output at extremely high concentration ratios. Much of the work has focused on the development of high-intensity concentrating solar cells. However, when it is tried to overcome the series resistance problem of the concentrating solar cell, it is extremely difficult, that is, the high series resistance in the concentrating solar cell causes a great voltage loss. Therefore, conventional multi-junction solar cell technology has been proposed to solve the above problems. However, the concentrating solar cell disclosed above can only use no more than 250 solar concentrating designs with acceptable series resistance. This design complexity and associated costs hinder the substantial development of concentrating solar cell technology and promote the development of alternative technologies such as thin film solar cell technology.

Multi-junction solar cell technology is broadly different from conventional single-junction solar cells. Multi-junction solar cell technology provides at least two advantages over other technologies: (1) lower manufacturing costs are a matter of course; and (2) the possibility of operating at high concentrations of light. For example, because of the 2500 solar concentrating, the current density of a multi-junction solar cell is typically close to 70 A/cm ² , which is a level that is generally detrimental to most solar cells based on other technologies. However, with 2,500 solar concentrating operations, series resistance is not a problem in multi-junction battery design, and even when the concentrating intensity is higher than the conventional knowledge, it is not economically feasible.

Referring to U.S. Patent Nos. 4,516,314, 4,409,422, and 4,332,973, the disclosure of which is incorporated herein incorporated by reference in its entirety in its entirety in its entirety in its entirety in its entirety in its entirety in its entirety. However, it is disclosed in the above disclosure that the bonding of the semiconductor substrate is performed by aluminum foil bonding, and the use of the adhesive during bonding is reduced, and the mechanical bonding strength after bonding of the semiconductor substrate and the uniform current density between the bonding surfaces are reduced.

The job is the reason, the applicant is carefully experimenting and research, and a perseverance spirit, finally developed a multi-junction solar cell production method. In order to solve the above problems, the multi-junction solar cell fabrication method of the present invention can provide the mechanical joint strength and uniform current density required for the multi-junction solar cell.

The main object of the present invention is to provide a method for manufacturing a multi-junction solar cell, which provides a mechanical bonding strength and a uniform current density required for the multi-junction solar cell by using a vacuum deposition method for stacking a semiconductor substrate. Increase the output current of the solar cell to achieve high power output per unit area.

To achieve the above object, the present invention provides a method for fabricating a multi-junction solar cell, the method comprising: forming a semiconductor having a PN junction Substrate; doped with a second electrical doped layer and a first electrically conductive doped layer in a relatively parallel position; stacked a plurality of semiconductor substrates having PN junctions, with a thin film layer interposed in a plurality of PN connections Between the semiconductor substrates, the plurality of semiconductor substrates having PN junctions are bonded to form a semiconductor substrate array at a first heat treatment temperature, wherein the film layers are formed by vacuum coating. When the semiconductor substrate having the PN junction is formed, the semiconductor substrate is composed of the high-resistivity substrate having the first electrical property; and the first doping layer and the opposite parallel position are doped by doping the second electrical layer. An electrically doped layer, wherein a doping concentration of the first electrically doped layer is greater than a doping concentration of the semiconductor substrate; stacking a plurality of semiconductor substrates having PN junctions, wherein the thin film layer is interspersed in the plurality of Between the semiconductor substrates having a PN junction, wherein the thin film layer is formed by using the vacuum plating method, and a plurality of the semiconductor substrates are stacked in the same lattice direction; and the plurality of the plurality of semiconductor substrates are bonded at the first heat treatment temperature a semiconductor substrate having a PN junction to form the semiconductor substrate array; and dicing the semiconductor substrate array to form the multi-junction solar cell.

According to a feature of the present invention, the step of cutting the semiconductor substrate array further comprises the steps of: forming a back metal layer on the bottom of the semiconductor substrate array; and cutting the semiconductor substrate array into a plane along a plane perpendicular to the semiconductor substrate Multi-junction solar cell, and then trimming the multi-junction solar cell to a desired length; etching to remove damage to the surface of the multi-junction solar cell during etching; coating an anti-reflection layer to passivate the multi-junction solar cell Illuminate the surface.

According to another feature of the present invention, the vacuum coating method may be selected from one of a sputtering method, a thermal evaporation method, an electron beam evaporation method, a plasma plating method, and a chemical vapor deposition method.

According to still another feature of the invention, the first heat treatment temperature is between 400 and 800 degrees.

A multi-junction solar cell of the present invention has the following effects:

1. depositing the thin film layer by vacuum coating, and interposing a plurality of junction solar cells formed between the plurality of semiconductor substrates having PN junctions to provide a connection between the junctions of the multi-junction solar cells The mechanical joint strength and the uniform current density increase the output current of the solar cell to achieve high power output per unit area.

2. depositing the thin film layer by vacuum coating, and interposing a plurality of junction solar cells formed between the plurality of semiconductor substrates having PN junctions, thereby preventing diffusion of the metal material of the thin film layer to the junction, thereby affecting the Electrical output of multi-junction solar cells.

3. The multi-junction solar cell is formed by vertically connecting the P-N junctions of the plurality of tantalum substrates, and the current of each junction is conducted by the through holes. Since the conventional open-circuit voltage of a single-junction P-N-based solar cell is about 0.7-0.8 V, the multi-junction cell can provide an extremely high voltage in a very small thickness and area.

The above and other objects, features, and advantages of the present invention will become more apparent and understood.

While the invention may be embodied in various forms, the embodiments illustrated in the drawings It is not intended to limit the invention to the particular embodiments illustrated and/or described.

Referring to FIG. 1 , a multi-junction solar cell 100 fabricated by using the process method of the present invention is mainly composed of a plurality of semiconductor substrates 200 which are vertically connected in series, and the plurality of semiconductor substrates 200 The junctions are connected by a thin film layer 210. The film layer 210 provides low resistance ohmic contact, high strength bonding, and good heat transfer at high current densities. In addition, the current and voltage of the multi-junction solar cell 100 are guided and output by the electrode 220 and the electrode 222 at both end edges of the battery.

The material of the film layer 210 is a conductive material with low resistance value, and may include bismuth (Si), titanium metal (Ti), cobalt metal (Co), tungsten metal (W), platinum metal (Pt), and bismuth metal (Hf). ), base metal (Ta), molybdenum metal (Mo), chromium metal (Cr), palladium metal (Pd), gold metal (Au), silver metal (Ag), copper metal (Cu), aluminum metal (Al) and One of its alloys.

Referring now to Figure 2, there is shown a cross-sectional view of a multi-junction solar cell 100 fabricated using the process of the present invention. Each of the semiconductor substrates 200 is connected by the thin film layer 210, which provides low resistance ohmic contact, high strength bonding, and good heat conduction at high current density. The semiconductor substrate 200 has a thickness of between 100 um and 450 um. For example, a P-type material may be diffused on one side of an N-type material to form a PN junction having a diffusion depth of 0.2 um to 40 um and diffusing to form N+ on the other side of the N-type material. It should be noted that the NPP+ can also be fabricated into the multi-junction solar cell 100 in the same manner. The thin film layer 210 region also provides an effective heat conduction path between the semiconductor substrates to conduct heat out, thereby enabling the multi-junction solar cell to provide a high voltage output at a high current density.

Referring to FIG. 3, it is a flowchart 600 of a method for manufacturing a multi-junction solar cell 100, the steps of which include: (a) forming a semiconductor substrate having a PN junction, the semiconductor substrate being a high-resistivity substrate having a first electrical property, doped with a second electrical doped layer and one of a relatively parallel position An electrically doped layer, wherein a doping concentration of the first electrically doped layer is greater than a doping concentration of the semiconductor substrate; (b) stacking a plurality of semiconductor substrates having PN junctions, with a thin film layer Interspersed between the plurality of semiconductor substrates having PN junctions, wherein the plurality of semiconductor substrates are stacked in the same lattice direction; (c) bonding the plurality of semiconductors having PN junctions at a first heat treatment temperature Forming a semiconductor substrate array; wherein the film layer is formed by vacuum coating; (d) cutting the semiconductor substrate array into a multi-junction solar cell; and (e) forming an electrode connected to the multi-junction solar cell Contact the end.

In the step (a), the high-resistivity substrate is one of a square, a circle and a rectangle, and the thickness thereof is preferably between 100 μm and 450 μm, more preferably 200 μm. In order to increase the minority carrier lifetime of the semiconductor substrate and increase the diffusion length, the high resistivity substrate has a bulk resistance of between 50 ohm-cm to 1000 ohm-cm. The P-type doped layer is doped on one side of the high-resistivity substrate, and has a diffusion length of between 5 μm and 50 μm, more preferably 25 μm, and the N-type doped layer is doped with P-doping. The other side of the hybrid layer.

The doping method may be diffusion or ion implantation, however, in terms of cost saving, doping is preferably performed using a diffusion process. Among them, the thermal oxidation reaction caused by heating during the diffusion process causes an oxidation reaction on the semiconductive substrate, so an oxide removal step must be performed. The method of removing oxide can be performed using a plasma or chemical etching process. In one embodiment, a PN junction is formed on the P-type substrate by a phosphorus diffusion reaction, and cerium oxide is generated on the surface, and the phosphorus glass can be removed by pickling using hydrofluoric acid. Further, in the case of plasma etching treatment, the semiconductor substrates are usually stacked, and an etching gas is formed using CF ₄ plus O _{2 to} remove cerium oxide.

Please refer to FIG. 4 for a schematic diagram of a semiconductor substrate according to the description herein. The semiconductor substrate 200 can be produced by using two types of substrates: (1) the semiconductor substrate 510 formed by the doping process of the N-type substrate, and (2) the semiconductor substrate 520 formed by the doping process of the P-type substrate. The substrate is a semiconducting material such as Si, Ge, GaAs, InAs or other III-V semiconducting compounds; II-VI semiconducting compound, CuGaSe, CuInSe, CuInGaSe. When doped, the N-type substrate doped semiconductor substrate 510 includes an N+ type diffusion doped region and a P-type doped region. In addition, the doping of the semiconductor substrate 510 formed by the doping process of the N-type substrate can form the N+-N-P+ semiconductor substrate 511 and the N+-NP semiconductor substrate 513, wherein the layer or the region is N-type and P-type diffusion doped. . The semiconductor substrate 520 formed by the doping process of the P-type substrate can realize the formation of the N+-P-P+ semiconductor substrate 521 and the NP-P+ semiconductor substrate 523, wherein the N+ and P+ diffusion doped layers are in the semiconductor substrate 200, And N+ diffusion doping and P-type doping in the semiconductor substrate 200. Although the different doped regions introduced in the various substrates 510 and 520 are illustrated as extension regions, they may be spatially limited or nearly limited to such regions, as described herein.

In a preferred embodiment, the same PNN+ (or NPP+) junction can be initially formed into a P-type germanium substrate having a resistivity greater than 100 ohm-cm, the substrate having a thickness of about 250 microns. The PN junction of the semiconductor substrate 200 comprises a moderately doped P-type substrate (P) by diffusion, the doping concentration is between 10 ¹⁵ cm ^-3 and 10 ¹⁶ cm ^-3 , and a relative The heavily doped N-type region (N+) at the P-type site has a doping concentration between 10 ¹⁹ cm ^-3 and 10 ²⁰ cm ^-3 and a depth of diffusion of about 0.3 μm to 0.5 μm. These PNN+ wafers are then stacked together, with the PNN+ junction and crystal orientation of each wafer oriented in the same direction.

In the step (b), the film layer is formed by a vacuum coating method, and the vacuum coating method may be selected from the group consisting of a sputtering method, a thermal evaporation method, an electron beam evaporation method, a plasma plating method, and a chemical vapor phase. Any one of the processes consisting of the deposition method is fabricated on the semiconductor substrate. The film layer produced by the vacuum coating method can provide the mechanical joint strength and uniform current density required for the multi-junction solar cell. The thin film layer is formed of a low resistance conductive material, which may include bismuth (Si), titanium metal (Ti), cobalt metal (Co), tungsten metal (W), platinum metal (Pt), base metal (Hf), Base metal (Ta), molybdenum metal (Mo), chromium metal (Cr) or palladium metal (Pd), gold metal (Au), silver metal (Ag), copper metal (Cu), aluminum metal (Al) and alloys thereof One of the first; wherein the difference between the thermal expansion coefficient of the film layer and the thermal expansion coefficient of the semiconductor substrate is less than 5%. That is, if the film layer has a thermal expansion coefficient of X and the thermal expansion coefficient Y of the semiconductor substrate, the absolute value of (X-Y) is divided by Y by less than 5%. In the embodiment, aluminum metal is used as the material of the film layer. The thickness of the film layer is between 20 nm and 5000 nm. Preferably, the thickness of the film layer is between 500 nm and 2000 nm. The thin film layer may also be a combination of alloys, preferably an alloy of metal and bismuth, deposited on the ruthenium substrate by an alloy, preferably by evaporation, using aluminum and ruthenium as evaporation sources at different plating rates. The metal layer is formed, and the optimum content of aluminum is between 20% and 40% of the aluminum-bismuth alloy.

In addition, the film layer 210 is substantially matched to the thermal expansion characteristics of the semiconductor substrates 200, thereby reducing performance degradation (eg, stress/tension relief caused by soldering or soldering leads during fabrication). For example, a highly doped low-resistivity germanium layer matching the thermal expansion coefficients (3 × 10 ^-6 / ° C) of all of the semiconductor substrates may be employed. Accordingly, ohmic contacts can be provided to the semiconductor substrates that additionally mitigate stress problems caused by solder/soft soldering and/or from mismatched thermal expansion coefficients in the contact material. Other examples include the introduction of a metal thin film layer such as tungsten (4.5 x 10 ^-6 / ° C) or molybdenum (5.3 x 10 ^-6 / ° C), which is substantially similar to the semiconductor substrates (3 x 10 _-6 / ° C) ( Such as: P + NN +) The thermal expansion coefficient of the unit cell is selected. Welding or soldering may be applied to the outer layer of the low-resistivity germanium layer of the buffer strip or to the electrode fused to the semiconductor substrate without introducing harmful stress to the high-intensity solar cell or the photovoltaic cell, wherein The outer layer is used as an ohmic contact; it is not a unit cell segment in series with other unit cells.

In step (c), the thin film layer 210 is deposited on the various semiconductor substrates 200 illustrated herein, and the semiconductor substrate 200 and the thin film layer 210 are bonded at a first temperature as described herein. The multi-junction solar cell 100 of the present invention is stacked in a stack. The number of junctions of the semiconductor substrate array 100 is 30 to 80 layers, forming a multilayer stack of 0.8 cm to 2 cm. In order to achieve the goal of the low temperature stacking process, the first heat treatment temperature of the film layer and the semiconductor substrate having the PN junction is preferably between 400 and 800 degrees, and the optimum is between 400 and 600 degrees. . It should be noted that after the first heat treatment temperature of the film layer 210, the alloy structure of the film layer 210 forms a eutectic structure, which will strengthen the adhesion between the interfaces.

Further, the film layer 210 described above may be an aluminum-bismuth eutectic alloy or a metal having a thermal coefficient substantially matching the thermal coefficient of ruthenium. The semiconductor substrate having the PN junction is fused with the aluminum interface to bond the semiconductor substrates having the PN junctions together. It should be noted that an inactive layer may also be stacked above and/or below the end layer of the multi-junction solar cell 100 as a buffer strip having a substantially low resistivity and may protect the active layers from harmful forms. A barrier to stress and/or tension. For example, during the fabrication and/or operation of the multi-junction solar cell 100, the thermal/mechanical pressure, torsion, moment, shear, and the like induced in the multi-junction solar cell 100. Wherein, the number of junctions of the plurality of solar cells is between 30 and 50 layers, and the average output power density is between 10 W/cm ² and 50 W/cm ² .

In the step (d), the semiconductor substrate array is cut, and thus the semiconductor substrate array is formed to form the multi-junction solar cell 100. The step (d) further comprises: (d1) cutting the semiconductor substrate array by cutting into a multi-junction solar cell along a plane perpendicular to the semiconductor substrate; (d2) trimming the multi-junction solar cell into a desired Length (d3) etching to remove damage to the surface of the multi-junction solar cell during cutting; and (d4) coating the anti-reflective layer to passivate the multi-junction solar cell illumination surface; see Figure 5, which is Schematic diagram of a step of cutting a stacked semiconductor substrate array (dotted line represents a cutting direction), and FIG. 5(a) shows a stacked semiconductor substrate array having a height of about 0.8 cm to 2 cm, which defines a plane of the semiconductor substrate array in the x and y directions, and is stacked. The height is in the z direction, and Figure 5(b) is half The first step of the array cutting of the conductor substrate is the x-y plane, and the thickness of the cut is d, which ranges between 100 micrometers and 250 micrometers. Fig. 5(c) is a second step of cutting, the plane being a y-z plane having a thickness a of between 0.8 cm and 2 cm. The multi-junction solar cell 100 having a length of 0.8 cm to 2 cm cm, a width of 0.8 cm to 2 cm, and a height of between 100 μm and 250 μm is formed by the cutting step.

In the step (d4), the anti-reflection layer is coated to passivate the illuminating surface of the multi-junction solar cell, and finally, the multi-junction solar cell 100 is formed, and an anti-reflection layer (or dielectric layer) may be disposed on the surface of the light-receiving surface. On the multi-junction solar cell 100, the anti-reflection layer (or dielectric layer) may be made of, for example, a nitride, an oxide, or a multilayer film of other materials (TiO ₂ /Al _{2 ).} O ₃ ) is stacked and formed on the multi-junction solar cell 100 by a plating method. The multi-junction solar cell 100 has a current output value of a single junction that is equivalent.

The light-receiving surface of the multi-junction solar cell 100 can be mitigated by a textured form of a groove (eg, a V-groove). The multi-junction solar cell 100 is capable of better carrier current collection for both short and long wavelengths, wherein the short wavelength response is due to the elimination of a highly doped horizontal junction at the top surface and the long wavelength response Enhanced collection efficiency due to vertical junctions. In one example, the texturing process of the present invention, for example, in the form of random, pyramidal, dome-shaped, and the like, is implemented as part of a multi-junction solar cell 100.

In step (e), electrodes 220 and 222 are connected across the multi-junction solar cell. The material of the electrodes 220 and 222 may be a low resistance metal such as a silver wire, a silver aluminum wire, a tin wire or a lead tin wire, and an alloy electrode thereof.

<Example 1>

The germanium wafer used in this embodiment is a P-type (100) single-turn wafer, the P-type (100) wafer is doped with boron (B), the resistance is 120Ω-cm, and the thickness is 250±10 μm. . For wafer cleaning, P-type germanium wafers are cleaned with acetone (Acetone), isopropanol (Isopropanol), deionized water (Deionized water), ultrasonic waves are used for cleaning, and ultrasonic waves are used to remove wafers. The surface of the particles is fine or dirty, and then the surface of the wafer is blown dry with nitrogen to be immersed in diluted hydrofluoric acid (HF: H2O = 1:5).

After the cleaning is completed, it is placed in a high-temperature furnace using POCl ₃ plus oxygen and nitrogen for diffusion reaction at a temperature of about 900 ° C, diffusion for about 30 minutes, diffusion concentration of 5 x ^{10 19} cm ^-3 and diffusion depth of 0.4 μm. A semiconductor substrate having a PN junction is formed, and then phosphoric acid is removed by pickling using hydrofluoric acid.

The film layer is produced by placing a semiconductor substrate having a PN junction into an electron gun evaporation system, model number ULVACEVA-E500, operating a vacuum of 4×10 ^-6 Pa, and plating 2 μm of gold as the film layer 210. .

The gold-plated semiconductor substrate is stacked and bonded together via a 40-layer P+PN semiconductor substrate to form a vertically stacked multilayer stack, which is heated to about 425 ° C to form a tight bond by diffusion between gold and germanium. The eutectic bonding is carried out in a hot nitrogen atmosphere to prevent high temperature oxidation of the ruthenium and to reduce the wettability of the eutectic reaction liquid surface and the resulting voids. The presence of holes increases the carrier recombination rate or the wafer rupture due to stress concentration effects. A low-cost or small-area tantalum wafer is bonded, and an alternating rubbing action is usually applied before the reaction to remove the surface oxide layer, thereby increasing the wettability of the reaction liquid surface, thereby strengthening the bonding strength of the special region and changing the strength. Surface energy, internal stress and atomic arrangement between substrates The effect of temperature accelerates the atomic diffusion of the gold and tantalum interfaces to form a gold-eutectic eutectic phase, further enhancing the adhesion between the interfaces.

Next, the stacked tantalum wafers were appropriately cut to have a size of 1 cm in length, 1 cm in width, and 0.05 cm in thickness, and coated with an antireflection layer to passivate the illuminated surface. Finally, the multi-junction solar cell 100 of the present invention is formed by attaching a lead connection to the contact end to form an upper electrode and a lower electrode.

<Example 2>

The second embodiment is substantially the same as the step of the first embodiment. The main difference is that the gold material used in the film layer 210 is changed to an aluminum material, and the surface of the wafer can be plated with aluminum having a thickness of 1 um by using an electron beam evaporation machine. The layer is heat treated at a temperature of 600 ° C in a high-temperature furnace, and a close bond is formed by diffusion between the aluminum and the tantalum. After annealing at a high temperature, the tantalum and the aluminum will produce a eutectic phenomenon, and the wafers are closely adhered to each other.

<Example 3>

Embodiment 3 is substantially the same as the step of Embodiment 1, the main difference is that the gold material used for the film layer 210 is changed to an aluminum-bismuth alloy, and the operating degree of vacuum is 5.0×10 ^-3 Pa using an RF magnetron sputtering system. First, the target is placed in a vacuum chamber together with the aluminum target, and the aluminum and tantalum sputtering power of the system is adjusted to form an aluminum-bismuth alloy layer. The aluminum-bismuth alloy layer has a thickness of 2.5 micrometers, and the aluminum accounts for 25% by weight of the aluminum-bismuth alloy, thereby causing eutectic phenomenon between the bismuth and the aluminum, so that the wafers are closely adhered to each other. Depositing the film layer by vacuum coating, and inserting a plurality of junction solar cells formed between the plurality of semiconductor substrates having PN junctions, thereby improving the mechanical bonding strength between the joints required for the multi-junction solar cells 2 times, and because the mechanical bonding strength is enhanced, the resistance between the semiconductor substrates can be stably controlled, so that the current density between the semiconductor substrates can be stably and uniformly output, thereby increasing the output current of the multi-junction solar cell, thereby making it The effect of high power output per unit area.

In summary, the multi-junction solar cell 100 process method according to the present invention has the following effects:

1. depositing the thin film layer by vacuum coating, and interposing a plurality of junction solar cells formed between the plurality of semiconductor substrates having PN junctions to provide a connection between the junctions of the multi-junction solar cells The mechanical joint strength and the uniform current density increase the output current of the solar cell to achieve high power output per unit area.

2. depositing the thin film layer by vacuum coating, and interposing a plurality of junction solar cells formed between the plurality of semiconductor substrates having PN junctions, thereby preventing diffusion of the metal material of the thin film layer to the junction, thereby affecting the Electrical output of multi-junction solar cells.

3. The multi-junction solar cell is formed by vertically connecting the P-N junctions of the plurality of tantalum substrates, and the current of each junction is conducted by the through holes. Since the conventional open-circuit voltage of a single-junction P-N-based solar cell is about 0.7-0.8 V, the multi-junction cell can provide an extremely high voltage in a very small thickness and area.

While the present invention has been described in its preferred embodiments, it is not intended to limit the scope of the invention, and various modifications and changes can be made without departing from the spirit and scope of the invention. As explained above, all types of corrections and changes can be made without destroying the spirit of this creation. Therefore, the scope of the invention is defined by the scope of the appended claims.

100‧‧‧Multiple junction solar cells

200‧‧‧Semiconductor substrate

210‧‧‧film layer

220, 222‧‧‧ electrodes

510‧‧‧N type doped substrate

511‧‧‧N+-N-P+ semiconductor substrate

513‧‧‧N+-N-P semiconductor substrate

520‧‧‧P type doped substrate

521‧‧‧N+-P-P+ semiconductor substrate

523‧‧‧N-P-P+ semiconductor substrate

600‧‧‧ A method for manufacturing a multi-junction solar cell

Figure 1 shows a multi-joint made by using the process method of the present invention. a solar cell; FIG. 2 is a cross-sectional view showing a multi-junction solar cell fabricated by using the process method of the present invention; and FIG. 3 is a flow chart showing a process of the multi-junction solar cell of the present invention; A schematic diagram of the various semiconductor substrates described; and FIG. 5, which is a schematic diagram of a step of cutting a stacked wafer.

100‧‧‧Multiple junction solar cells

200‧‧‧Semiconductor substrate

210‧‧‧film layer

220, 222‧‧‧ electrodes

Claims (8)

A method for manufacturing a multi-junction solar cell, the method comprising: (a) forming a semiconductor substrate having a PN junction, wherein the semiconductor substrate is made of a high-resistivity substrate having a first electrical property, by doping a doped layer of a second electrical doping layer and a first electrically conductive doped layer, wherein a doping concentration of the first electrically doped layer is greater than a doping concentration of the semiconductor substrate; (b) stacking a plurality of semiconductor substrates having PN junctions interposed between the plurality of semiconductor substrates having PN junctions, wherein a plurality of the semiconductor substrates are stacked in the same lattice direction; (c) first Bonding the plurality of semiconductor substrates having PN junctions to form a semiconductor substrate array at a heat treatment temperature; and (d) cutting the semiconductor substrate array to form the multi-junction solar cell; wherein the film layer is a vacuum sputtering The film is made by a coating method, and the material of the film layer is an alloy of metal and tantalum. The thickness of the film layer is between 20 nm and 5000 nm, and the first heat treatment temperature is between 400 and 800 degrees. The process according to claim 1, wherein the first electrical system of the semiconductor substrate is N-type (P-type), and the second electrical system is P-type (N-type). According to the process method of claim 1, wherein the step (d) further comprises the steps of: (d1) cutting into a multi-junction solar cell along a plane perpendicular to the semiconductor substrate; (d2) multiplying the multi-connection The solar cell is trimmed to the required length; (d3) etching to remove damage to the surface of the multi-junction solar cell during cutting; and (d4) coating an anti-reflection layer to passivate the multi-junction solar cell illumination surface. The process according to claim 1, wherein the semiconductor substrate is selected from the group consisting of bismuth based materials. The process according to claim 1, wherein the difference between the thermal expansion coefficient of the film layer and the thermal expansion coefficient of the semiconductor substrate is less than 5%. The process according to any one of claims 1 to 5, wherein the metal layer of the film layer material is selected from the group consisting of titanium metal (Ti), cobalt metal (Co), tungsten metal (W), and platinum metal (Pt). Base metal (Hf), base metal (Ta), molybdenum metal (Mo), chromium metal (Cr), palladium metal (Pd), gold metal (Au), silver metal (Ag), copper metal (Cu), aluminum metal (Al) and one of its alloys. The process according to claim 1, wherein the alloy structure of the film layer is a eutectic structure. According to the process method of claim 1, wherein the number of junctions of the multi-junction solar cell is 30 to 80 layers.