TWI417620B - Display panel - Google Patents

Description

Display panel

The present invention relates to a display panel, and more particularly to the design of a display panel spacer.

The liquid crystal display device has the advantages of high image quality, small size, light weight, low voltage driving, low power consumption, and wide application range, and thus has become the mainstream of the new generation display device. A conventional liquid crystal display panel is composed of a color filter substrate, a pixel array substrate, and a liquid crystal layer disposed between the two substrates.

Specifically, a liquid crystal display panel is formed by arranging a pixel array substrate and a color filter substrate, and filling liquid crystal molecules between the substrates. In order to maintain the gap between the two substrates, a photo spacer is formed on the color filter substrate. Thereafter, the pixel array substrate and the color filter substrate are assembled.

However, if the two substrates are misaligned due to the alignment error, it may cause difficulty in the mechanical processing of the panel assembly. In particular, the area in which the spacers are in contact with the pixel array substrate may be reduced or offset to cause poor support of the spacers. For example, Japanese Patent No. JP-2003-156750 proposes to arrange a spacer above a data line of a pixel array substrate. However, the area of the data line is limited. If there is a misalignment between the two substrates, the spacer will only contact one side of the data line and the support force will be uneven.

In order to solve the negative effects caused by the alignment error, many improved designs have been proposed. For example, Chinese patent CN100485502 discloses a design in which four padding patterns and four spacers are simultaneously arranged. In addition, Chinese Patent No. CN1982966 discloses a design in which a ring shape or a plurality of pad pattern is arranged around the spacer. However, to achieve these designs, it is necessary to additionally form a plurality of pad pattern on the pixel array substrate, which is disadvantageous for the simplification of the process.

The present invention provides a display panel in which a spacer can provide good support.

The invention provides a display panel comprising a first substrate, an array matrix, a second substrate, a plurality of spacer groups and a display medium. The array matrix is disposed on the first substrate. The display medium is located between the first substrate and the second substrate. The array matrix includes a plurality of scan line groups, a plurality of data lines, and a plurality of pixel groups. Each scan line group includes a first scan line and a second scan line disposed adjacent to each other. The data lines are staggered across the scan line group. Each pixel group is electrically connected to one of the scan line groups and one of the data lines, wherein the array matrix defines a first platform area and a second platform area, and the first platform area and the second platform area are coplanar and symmetrical to each other . The first platform region and the second platform region are located between the adjacent first scan line and the second scan line. The spacer group is disposed on the second substrate, and the spacer group includes a first spacer and a second spacer, which are partially in contact with the first platform region and the second platform region, respectively.

In an embodiment of the invention, the first scan line of one of the scan line groups overlaps with the corresponding data line to define a first platform area, and the second scan line overlaps with the corresponding data line to define a second Platform area.

In an embodiment of the invention, the array matrix further includes a plurality of longitudinal wires. each The longitudinal wire is disposed between the two data lines and intersects the scan line group. Additionally, a first scan line of one of the scan line groups overlaps with a corresponding one of the longitudinal wires to define a first land area, and a second scan line overlaps the corresponding one of the longitudinal wires to define a second land area.

In an embodiment of the present invention, the first spacer is not in contact with a first protruding region of the first platform region, and a first blank region of the first platform region not contacting the first spacer surrounds the first spacer. The second spacer region of the second spacer region not contacting the second spacer region and a second blank region of the second platform region not contacting the second spacer region surround the second spacer.

In an embodiment of the present invention, the first scan line of one of the scan line groups is not defined by the data line and the pixel group, and the corresponding second scan line is not the data line. And the shaded portion of the pixel group defines the second platform area.

In an embodiment of the present invention, the array matrix further includes a plurality of platform patterns respectively disposed on a portion of the scan line group where the first scan line is not blocked by the data line and the pixel group, and the second scan line The portion of the first platform area and the second platform area are defined by the portion of the data line and the pixel group. The platform pattern is, for example, a plurality of semiconductor patterns. The platform pattern and the data line can be the same film layer. In addition, each of the pattern patterns includes, for example, a semiconductor pattern and a conductor pattern stacked on the semiconductor pattern, and the conductor pattern and the data line are the same film layer. Specifically, the width of the first platform region is greater than the width of the first spacer such that the first blank region includes two first sub-space regions, and the two first sub-space regions are respectively located on opposite sides of the first spacer. . The width of the second platform region is greater than the width of the second spacer such that the second blank region includes two second sub-space regions, and the two second sub-space regions are respectively located on opposite sides of the second spacer .

In an embodiment of the present invention, each of the data lines has a plurality of branch groups, and each of the branch groups is located between one of the scan line groups and includes a plurality of first branches and a plurality of second branches. In an embodiment, each of the first branches of each branch group includes a first lateral portion and a first longitudinal portion. The first lateral portion is parallel to the corresponding first scan line and is connected to the first longitudinal portion, and the first longitudinal portion extends toward the corresponding first scan line. Each of the second branches includes a second lateral portion and a second longitudinal portion. The second lateral portion is parallel to the corresponding second scan line and is connected to the second longitudinal portion, and the second longitudinal portion extends toward the corresponding second scan line. The first platform zone is defined, for example, by one of the first longitudinal sections, and the second platform zone is defined by one of the second longitudinal sections. In addition, each pixel group includes a first pixel structure and a second pixel structure. The first pixel structure includes a first active component and a first pixel electrode electrically connected to the first active component, and the first active component is connected to the corresponding first branch. Similarly, the second pixel structure includes a second active component and a second pixel electrode electrically connected to the second active component, and the second active component is connected to the corresponding second branch.

In an embodiment of the invention, the first spacer and the second spacer of each of the spacer groups are each a column spacer.

In an embodiment of the invention, the display panel further includes a common electrode layer disposed between the second substrate and the spacer group.

Based on the above, the present invention defines a symmetrical platform region by using a design of two gat lines shares one data line (2G1D), and partially arranges the pair of spacers on the symmetrical platform region. . At the first base If a registration error occurs during the assembly of the board and the second substrate, the contact of the two spacers with the total area remains constant. Therefore, the spacer of the present invention can provide ideal support.

The above described features and advantages of the present invention will be more apparent from the following description.

10‧‧‧ scan line group

12‧‧‧First scan line

14‧‧‧Second scan line

20‧‧‧Information line

22‧‧‧ first branch

22a‧‧‧ first lateral section

22b‧‧‧ first longitudinal section

24‧‧‧Second branch

24a‧‧‧Second lateral section

24b‧‧‧Second longitudinal section

30‧‧‧ pixel group

32‧‧‧ first pixel structure

32a‧‧‧First active component

32b‧‧‧first pixel electrode

32c‧‧‧汲polar

34‧‧‧second pixel structure

34a‧‧‧Second active components

34b‧‧‧second pixel electrode

40‧‧‧Longitudinal wire

100, 200, 300, 400, 500‧‧‧ display panels

102‧‧‧First substrate

104‧‧‧second substrate

106‧‧‧Display media

110‧‧‧Array matrix

112, 114‧‧‧ insulation

120, 320, 420, 520‧‧ ‧ spacer group

122, 322, 422, 522‧‧‧ first spacer

122a, 322a, 422a, 522a‧‧‧ first end

124, 324, 424, 524‧‧‧ second spacer

124a, 324a, 424a, 524a‧‧‧ second end

132‧‧‧Common electrode layer

134‧‧‧Alignment layer

A1‧‧‧First Platform Area

A2‧‧‧Second Platform Area

B1‧‧‧ first blank area

B1a, B1b‧‧‧ first sub-space

B2‧‧‧Second space

B2a, B2b‧‧‧ second sub-space

C1‧‧‧First contact area

C2‧‧‧Second Contact Area

D1‧‧‧ first direction

D2‧‧‧ second direction

S1‧‧‧ third direction

S2‧‧‧ fourth direction

W1‧‧‧First protruding area

W1a‧‧‧First inner convex area

W1b‧‧‧First Convex Area

W2‧‧‧second protruding area

W2a‧‧‧Second inner convex area

W2b‧‧‧Second convex area

Z1~Z5‧‧‧ area

I-I', II-II', III-III', IV-IV', V-V', VI-VI', VII-VII'‧‧‧

FIG. 1A is a partial top plan view of a display panel according to a first embodiment of the present invention.

Fig. 1B is a cross-sectional view taken along line I-I' of Fig. 1A.

1C is an enlarged schematic view of a region Z1 of FIG. 1A.

2A is a partial top plan view of a display panel according to a second embodiment of the present invention.

2B is an enlarged schematic view of a region Z2 of FIG. 2A.

3A is a partial top plan view of a display panel according to a third embodiment of the present invention.

Fig. 3B is a cross-sectional view taken along line II-II' and III-III' of Fig. 3A.

Fig. 3C is an enlarged schematic view of a region Z3 in Fig. 3A.

4A is a partial top plan view of a display panel according to a fourth embodiment of the present invention.

Fig. 4B is a cross-sectional view taken along line IV-IV', V-V' in Fig. 4A.

4C is an enlarged schematic view of a region Z4 of FIG. 4A.

FIG. 5A is a partial top view of a display panel according to a fifth embodiment of the present invention.

Fig. 5B is a cross-sectional view taken along line VI-VI' and VII-VII' in Fig. 5A.

Fig. 5C is an enlarged schematic view of a region Z5 of Fig. 5A.

1A is a partial top plan view of a display panel according to a first embodiment of the present invention, FIG. 1B is a cross-sectional view taken along line II' of FIG. 1A, and FIG. 1C is a region of FIG. An enlarged view of Z1. Referring to FIG. 1A and FIG. 1B , the display panel 100 is mainly composed of a first substrate 102 , a second substrate 104 , a display medium 106 , an array matrix 110 , at least one spacer group 120 , and a common electrode layer 132 . . The display medium 106 is sandwiched between the first substrate 102 and the second substrate 104. The array matrix 110 is disposed on the first substrate 102, and the common electrode layer 132 is disposed on the second substrate 104. The spacer group 120 is disposed on the second substrate 104 to maintain a spacing between the first substrate 102 and the second substrate 104.

The display panel 100 changes the state of the display medium 106 by the voltage difference between the common electrode layer 132 and the array matrix 110 for display. Specifically, the display medium 106 can be a liquid crystal layer, a plasma layer, or an electrophoretic display medium layer. In addition, the display panel 100 further includes an alignment layer 134 covering the common electrode layer 132. Of course, a color filter layer may be disposed on the second substrate 104, or a color filter layer may be disposed in the array matrix 110 to achieve a colorful display effect.

In this embodiment, the array matrix 110 includes a plurality of scan line groups 10 and a plurality of data lines. 20. A plurality of pixel groups 30 and a plurality of longitudinal wires 40. Each scan line group 10 includes a first scan line 12 and a second scan line 14 disposed adjacent to each other. The data lines 20 are staggered across the scan line group 10. The longitudinal wires 40 are, for example, arranged in parallel data lines 20 to intersect the scan line group 10. Each pixel group 30 is electrically connected to one of the scan line groups 10 and one of the data lines 20, and each pixel group 30 includes a first pixel structure 32 and a second pixel structure 34. The array matrix 110 is, for example, a design in which two scanning lines (12, 14) share a single data line (20). The first pixel structure 32 and the second pixel structure 34 connected to the same data line 20 are respectively located on opposite sides of the data line 20. Therefore, a data line 20 can transmit the data signals required by the two column pixels to help reduce the number of used driving chips. In addition, as can be seen from FIG. 1B, the array matrix 110 further includes at least two insulating layers 112, 114 to maintain electrical independent characteristics between the conductive elements.

In addition, the layout of the array matrix 110 illustrated in FIG. 1A shows that in the present embodiment, the data line 20 has, for example, a branch group composed of a plurality of first branches 22 and a plurality of second branches 24 ( Not marked). Each of the first branches 22 includes a first lateral portion 22a and a first longitudinal portion 22b. The first lateral portion 22b is parallel to the corresponding first scan line 12 and is connected to the first longitudinal portion 22a, and the first longitudinal portion 22a extends toward the corresponding first scan line 12. Each of the second branches 24 includes a second lateral portion 24a and a second longitudinal portion 24b. The second lateral portion 24a is parallel to the corresponding second scan line 14 and is connected to the second longitudinal portion 24b, and the second longitudinal portion 24b extends toward the corresponding second scan line 14. In the actual layout design, the first branch 22 and the second branch 24 are, for example, L-shaped patterns extending from the data line 20 to both sides.

In addition, the first pixel structure 32 includes a first active component 32a and an electrical connection. A first pixel electrode 32b of the active component 32a, and the first active component 32a is coupled to the corresponding first branch 24. Similarly, the second pixel structure 34 includes a second active element 34a and a second pixel electrode 34b electrically connected to the second active element 34a, and the second active element 34a is connected to the corresponding second branch 24.

This layout allows the array matrix 110 to be repairable. For example, if the contamination or defect in the process causes one of the first branches 22 to be connected to the drain 32c of the corresponding active component 32a (or is shorted together), the first branch 24 can be broken. open. At this time, the active element 32a may still have the characteristics of the switch to help maintain the display function of the display panel 100. Further, if the second branch 24 is short-circuited with other metal components due to a process defect, the function of the display panel 100 can be maintained by disconnecting the second branch 24.

In addition, referring to FIG. 1A , FIG. 1B and FIG. 1C , the spacer group 120 is disposed on the second substrate 104 and used to maintain the spacing between the first substrate 102 and the second substrate 104 . The spacer group 120 includes a first spacer 122 and a second spacer 124, and the first spacer 122 and the second spacer 124 are each a column spacer. In the present embodiment, the first scan line 12 overlaps the data line 20 to define a first land area A1, and the second scan line 14 overlaps the data line 20 to define a second land area A2, wherein the first platform area A1 The relationship with the second platform area A2 is symmetric and coplanar with each other. Moreover, the first end portion 122a of the first spacer 122 partially contacts the first land area A1 to define a first contact area C1 and a first blank area B1. The second end portion 124a of the second spacer 124 also partially contacts the second land area A1 to define a second contact area C2 and a second blank area B2.

In addition, the first end portion 122a does not contact a first protruding portion W1 of the first land area A1 and The first blank area B1 surrounds the first contact area C1, and the second end portion 124a does not contact a second raised area W2 of the second land area A2 and the second blank area B2 surrounds the second contact area C2. In addition, the first protruding portion W1 is protruded from the first contact region C1 toward a first direction D1, and the second protruding portion W2 is protruded from the second contact region C2 toward a second direction D2. As a result, the first spacers 122 and the second spacers 124 do not reduce the supportability due to the alignment error occurring during the assembly process of the first substrate 102 and the second substrate 104.

In detail, in the predetermined layout design, the first contact area C1 and the second contact area C2 are respectively preset to be half of the first platform area A1 and the second platform area A2. In fact, if the alignment error in the process causes the first spacer 122 and the second spacer 124 to be translated from the preset position along the first direction D, the first protruding region W1 moves toward the first platform region A1 to increase. The area of the first contact zone C1. At the same time, the second convex region W2 moves away from the second contact region C2 to reduce the area of the second contact region A2. Since the first spacer 122 and the second spacer 124 are simultaneously disposed on the second substrate 104, the translation distances of the first spacer 122 and the second spacer 124 due to the alignment error are equal. Therefore, the area increase amount of the first contact region C1 is equal to the area decrease amount of the second contact region C2. That is to say, when the registration error occurs, the total area of the first contact region C1 and the second contact region C2 is still equal to the preset value.

Similarly, when the first spacer 122 and the second spacer 124 are translated by the preset position in the second direction D2 due to the alignment error, the area of the first contact area C1 is reduced, and the area of the second contact area A2 is increase. Also, the area reduction amount of the first contact region C1 is equal to the area increase amount of the second contact region C2. Therefore, in the alignment process, no matter the alignment error occurs between the first substrate 102 and the second substrate 104 along the first direction D1 or the second direction D2, the total area of the first contact region C1 and the second contact region C2 does not change. In this implementation In the example, the first direction D1 and the second direction D2 are parallel to the extending direction of the data line 20. Therefore, the display panel 100 has a higher tolerance for the alignment error in the extending direction of the data line 20 than the conventional design.

Further, in the present embodiment, the first convex region W1 and the second convex region W2 are both "concave"-shaped regions. When the alignment process of the first substrate 102 and the second substrate 104 occurs in a third direction S1, the areas of the first contact region C1 and the second contact region C2 do not change. Similarly, when the alignment process of the first substrate 102 and the second substrate 104 occurs in a fourth direction S2, the areas of the first contact region C1 and the second contact region C2 do not change. As can be seen from FIG. 1C, the third direction S1 and the fourth direction S2 are substantially parallel to the extending direction of the scanning line group 10. Therefore, the display panel 100 also has a high tolerance for the alignment error in the extending direction of the scanning line group 10.

In general, the relative positions of the coplanar first platform area A1 and the second platform area A2 are in a symmetrical relationship, and the first spacers 122 and the second spacers 124 are respectively associated with the first platform area A1 and the second platform. Part A2 is partially in contact. Further, the convex directions of the first convex regions W1 and the second convex regions W2 are opposite. In this way, the alignment error occurs in the extending direction of the scanning line group 10 or the extending direction of the data line 20 during the assembly process, and the total area of the first contact area C1 and the second contact area C2 is still not changes happened. Therefore, the supportability of the spacer group 120 is not deteriorated by the process error to maintain the quality of the display panel 100.

2A is a partial top view of a display panel according to a second embodiment of the present invention, and FIG. 2B is an enlarged schematic view of a region Z2 of FIG. 2A. Referring to FIG. 2A and FIG. 2B simultaneously, the display panel 200 is substantially the same as the first display panel 100, so the same elements will be denoted by the same reference numerals. In this embodiment, these same components can Reference is made to the description of the first embodiment without further elaboration. It is worth mentioning that in the display panel 200, the first platform area A1 is defined by the vertical wire 40 overlapping with the first scanning line 12, and the second platform area A2 is composed of the longitudinal wire 40 and the second scanning line. 14 overlap and defined.

In this embodiment, the first spacer 122 and the second spacer 124 also partially contact the first platform area A1 and the second platform area A2, respectively. Further, the relationship between the first contact area A1 and the second contact area A2 is the same as that described in the foregoing embodiment. Therefore, even if a registration error occurs in the process, the spacer group 120 can provide a good supporting effect to help maintain the quality of the display panel 200. Of course, it can be seen from the layout of the array matrix 110 of the display panel 200 that the display panel 200 has the characteristics of requiring a small number of driving wafers and has repairable characteristics.

3A is a partial top view of a display panel according to a third embodiment of the present invention, and FIG. 3B is a cross-sectional view taken along line II-II' and III-III' of FIG. 3A, and FIG. 3C It is an enlarged schematic view of the region Z3 in Fig. 3A. Referring to FIG. 3A, FIG. 3B, and FIG. 3C, the display panel 300 is substantially the same as the display panel 100 of the first embodiment, and the same components are denoted by the same reference numerals. The difference between the present embodiment and the first embodiment will be described below.

In this embodiment, the portion of the scan line group 10 in which the first scan line 12 is not obscured by the data line 20 and the pixel group 30 defines the first land area A1, and the corresponding second scan line 14 is not. The data line 20 and the portion shaded by the pixel group 30 define a second platform area A2. That is, in the spacer group 320, the first spacer 322 is located on the area where the first scan line 12 is not blocked by the data line 20 and the pixel group 30, and the second spacer 324 is located at the end of the second scan line 14. The data line 20 and the area covered by the pixel group 30 . In addition, the first protruding portion W1 and the second protruding portion W2 of the embodiment are both square, for example.

In detail, the first protruding portion W1 defined by the first end portion 322a is protruded from the first contact region C1 in a first direction D1, and the second protruding portion W2 defined by the second end portion 324a is defined. The second contact region C2 protrudes in a second direction D2. Further, the first blank area B1 surrounds other edges of the first contact area C1 that are not adjacent to the first convex area W1, and the second blank area B2 surrounds other edges of the second contact area C2 that are not adjacent to the second convex area W2. . Therefore, during the assembly process of the first substrate 102 and the second substrate 104, the spacer group 320 can provide good support regardless of the alignment error in the extending direction of the scanning line group 10 or the extending direction of the data line 20. The display panel 300 can be made to have a fairly good quality and yield.

It can be seen from the foregoing embodiments that the present invention can provide good support for the spacer group without any additional components. However, with different needs and designs, an additional platform pattern can be placed in the array matrix to contact the spacer group. 4A is a partial top view of a display panel according to a fourth embodiment of the present invention, and FIG. 4B is a cross-sectional view taken along line IV-IV' and V-V' of FIG. 4A, and FIG. 4C It is an enlarged schematic view of the region Z4 in Fig. 4A. Referring to FIGS. 4A, 4B, and 4C, the display panel 400 is substantially the same as the display panel 300 of the third embodiment, and the same components are denoted by the same reference numerals. Differences between the present embodiment and the third embodiment will be described below.

In the present embodiment, the array matrix 110 further includes a plurality of platform patterns 432 and 434. The platform pattern 432 is disposed on a portion of the scan line group 10 where the first scan line 12 is not covered by the data line 20 and the pixel group 30 to define the first platform area A1, and is flat. The stage pattern 434 is disposed on a portion of the second scan line 14 that is not blocked by the data line 20 and the pixel group 30 to define the second land area A2. The platform patterns 432 and 434 are, for example, a plurality of semiconductor patterns, or the land patterns 432 and 434 may be the same film layer as the data lines 20. In addition, each of the land patterns 432 and 434 includes, for example, a semiconductor pattern and a conductor pattern superposed on the semiconductor pattern, and the conductor pattern and the data line 20 are the same film layer. That is to say, in this embodiment, the original film layers 432 and 434 are formed by using the original material film layer of the array matrix 100. Further, the land pattern 432 and the land pattern 434 are, for example, elongated patterns parallel to the extending direction of the scanning line group 10.

A portion of the area of the first spacer 422 of the spacer group 420 contacts a portion of the area of the first land area A1 to define a first contact area C1. Further, in the extending direction of the scanning line group 10, the width of the land pattern 432 is larger than the width of the first spacer 422. At the same time, the first contact area C1 is located at the center of the land pattern 432, so the first land area A1 is divided into two first sub-space areas B1a and B1b. The first sub-space area B1a and the first sub-space area B1b are respectively located on opposite sides of the first contact area C1. Similarly, the width of the land pattern 434 is greater than the width of the second spacer 424 in the direction in which the scan line group 10 extends. Therefore, the manner in which the second spacer 424 contacts the platform pattern 434 may divide the second land area A2 into the second contact area C2, the second sub-space area B2a, and the second sub-space area B2b, and the second sub-space area B2a and The second sub-space areas B2b are respectively located on opposite sides of the second contact area C2.

Under such a layout design, if the alignment error occurs along the extending direction of the scan line group 10 during the assembly process of the first substrate 102 and the second substrate 104, the area of the first contact region C1 does not change, and the second contact The area of the area C2 will not change. Therefore, if the alignment error occurring along the extending direction of the scanning line group 10 does not affect the spacer group 420 Supportive.

In addition, the portion of the first end portion 422a of the first spacer 422 that is not in contact with the first land area A1 in the embodiment defines, for example, a first inner convex portion W1a and a first outer convex portion W1b. The first inner convex region W1a is protruded from the first contact region C1 toward the first direction D1, and the first outer convex region W1b is protruded from the first contact region C1 toward the second direction D2. Therefore, regardless of whether the position of the first spacer 422 is translated relative to the first land area A1 in the first direction D1 or in the second direction D2, the first contact area C1 maintains a constant area.

Similarly, the portion of the second spacer 424 of the second spacer 424 that is not in contact with the second platform defines a second inner land W2a and a second outer land W2b. The second inner convex region W2a is protruded from the second contact region C2 toward the second direction D2, and the second outer convex region W2b is protruded from the second contact region C2 toward the first direction D1. That is, the convex directions of the first inner convex regions W1a and the second inner convex regions W2a are opposite, and the convex directions of the first outer convex regions W1b and the second outer convex regions W2b are opposite. With such a design, the second contact zone C2 maintains a constant area regardless of whether the position of the second spacer 424 is translated relative to the second land area A2 in the first direction D1 or in the second direction D2.

It is worth mentioning that the first platform area A1 and the second platform area A2 exhibit a symmetric and coplanar relationship in this embodiment. Also, the portions where the first end portion 422a and the first land area A1 are not overlapped are surrounded by other portions, and the portions where the second end portion 424a and the second land portion A2 are not overlapped are surrounded by other portions. Therefore, the sum of the areas of the first contact region C1 and the second contact region C2 does not change due to the alignment error in any direction. Overall, the spacer group 420 has ideal support regardless of whether or not a registration error occurs in the process, so that the display panel 400 has good quality.

5A is a partial top view of a display panel according to a fifth embodiment of the present invention, and FIG. 5B is a cross-sectional view taken along line VI-VI' and VII-VII' of FIG. 5A, and FIG. 5C It is an enlarged schematic view of the region Z5 in Fig. 5A. Referring to FIG. 5A, FIG. 5B, and FIG. 5C, the display panel 500 is substantially the same as the display panel 100 of the first embodiment, and the same components are denoted by the same reference numerals. The difference between the present embodiment and the first embodiment will be described below.

In the present embodiment, the first spacer 522 and the second spacer 524 of the spacer group 520 are respectively located on the first branch 22 and the second branch 24 of the data line 20. That is, the first platform area A1 is defined, for example, by the first longitudinal portion 22b of the first branch 22, while the second platform area A2 is defined by the second longitudinal portion 24b of the second branch 24. The first spacer 522 partially contacts the first land area A1 to divide the first land area A1 into the first contact area C1 and the first blank area B1. Likewise, the second spacer 524 partially contacts the second land area A2 to define the second contact area C2 and the second blank area B2. In addition, a portion of the first end portion 522 of the first spacer 522 that does not contact the first land area A1 defines a first convex portion W1, and a second end portion 524b of the second spacer 524 does not contact the second platform portion A2. The portion defines the second convex region W2.

In this embodiment, the convex direction of the first convex portion W1 is opposite to the convex direction of the second convex portion W2. Also, the first contact region C1 is surrounded by the first convex region W1 and the first blank region B1, and the second contact region C2 is surrounded by the second convex region W2 and the second blank region B2. Therefore, if a registration error occurs when the first substrate 102 and the second substrate 104 are assembled, the total area of the first contact region C1 and the second contact region C2 remains unchanged. In other words, the alignment error in the assembly process does not affect the support of the spacer group 520, and contributes to maintaining the quality of the display panel 500.

In summary, the present invention defines two symmetrical and coplanar platform regions in an array matrix in which two scan lines share a data line. Also, the two spacers in the group partially contact a portion of the area of the two platform regions and partially protrude from the two platform regions. Therefore, when the alignment error causes the first substrate and the second substrate to be relatively offset, the total area of the two spacers in contact with the two platform regions does not change. In particular, the alignment error does not change regardless of the direction in which the parallel scan lines (generally referred to as the X direction) or the direction of the parallel data lines (generally referred to as the Y direction), the total area of contact between the two spacers and the two platform regions. . That is to say, in the process, the alignment errors in the X direction and the Y direction do not adversely affect the yield of the display panel of the present invention. Therefore, the support provided by the spacer group is not affected by the alignment error and helps to maintain the quality of the display panel.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make some modifications and refinements without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims.

10‧‧‧ scan line group

12‧‧‧First scan line

14‧‧‧Second scan line

20‧‧‧Information line

30‧‧‧ pixel group

32‧‧‧ first pixel structure

32a‧‧‧First active component

32b‧‧‧first pixel electrode

34‧‧‧second pixel structure

34a‧‧‧Second active components

34b‧‧‧second pixel electrode

40‧‧‧Longitudinal wire

200‧‧‧ display panel

110‧‧‧Array matrix

120‧‧‧Interstitial group

122‧‧‧First gap

124‧‧‧Second spacer

Z2‧‧‧ area

Claims (16)

A display panel includes: a first substrate-array array disposed on the first substrate, the array matrix includes: a plurality of scan line groups, each of the scan line groups including a first scan line and an adjacent one a second scan line; a plurality of data lines interleaved in the scan line groups; and a plurality of pixel groups, each of the pixel groups electrically connected to one of the scan line groups and one of the data lines, wherein the array matrix defines one The first platform area and the second platform area are located between the first scan line and the second scan line disposed adjacent to each other, and the first platform area and the second platform area are coplanar and symmetrical with each other; a substrate; at least one spacer group disposed on the second substrate, and the spacer group includes a first spacer and a second spacer, respectively partially contacting the first platform region and the second platform region And a display medium between the first substrate and the second substrate. The display panel of claim 1, wherein the first scan line of one of the scan line groups overlaps with a corresponding one of the data lines to define the first platform area, and the second scan line And overlapping the corresponding data line to define the second platform area. The display panel of claim 1, wherein the array matrix further comprises a plurality of longitudinal wires, each of the longitudinal wires being disposed between the two data lines and intersecting the scan line groups, wherein the scan lines are The first scan line of one overlaps with a corresponding one of the longitudinal wires to define the first land area, and the second scan line overlaps with the corresponding one of the longitudinal wires to define the second land area. The display panel of claim 1, wherein the first spacer is not connected Touching a first protruding area of the first platform area and a first blank area of the first platform area not contacting the first spacer to surround a portion of the first spacer contacting the first platform area, and the first a second protruding region of the second spacer region not contacting the second spacer region and a second blank region of the second platform region not contacting the second spacer region surrounding the portion of the second spacer region contacting the second platform region . The display panel of claim 1, wherein the first scan line of one of the scan line groups is not defined by the data lines and the portion of the pixel group. And the corresponding second scan line is not defined by the data lines and the portions of the pixel groups to define the second platform area. The display panel of claim 1, wherein the array matrix further comprises a plurality of platform patterns, and the first scan lines respectively disposed on one of the scan line groups are not the data lines and the The portion of the pixel group and the corresponding portion of the second scan line that are not covered by the data lines and the pixel groups define the first platform region and the second platform region. The display panel of claim 6, wherein the platform patterns are a plurality of semiconductor patterns. The display panel of claim 6, wherein the platform patterns are the same film layer as the data lines. The display panel of claim 6, wherein each of the platform patterns comprises a semiconductor pattern and a conductor pattern superposed on the semiconductor pattern, and the conductor pattern is the same film layer as the data lines. The display panel of claim 6, wherein a width of the first platform region is greater than a width of the first spacer, such that the first blank region includes two first sub-spaces, and the first Sub-blank areas are respectively located on opposite sides of the first spacer, The width of the second platform region is greater than the width of the second spacer, such that the second blank region includes two second sub-space regions, and the two second sub-space regions are respectively located at opposite sides of the second spacer. side. The display panel of claim 1, wherein each of the data lines has a plurality of branch groups, each of the branch groups being located between one of the scan line groups and comprising a plurality of first branches and a plurality of second branches. The display panel of claim 11, wherein each of the first branches of each of the branch groups includes a first lateral portion and a first longitudinal portion, the first lateral portion paralleling the first scan line And being connected to the first longitudinal portion, and the first longitudinal portion extends toward the corresponding first scan line, and each of the second branches includes a second lateral portion and a second longitudinal portion, the second lateral portion being parallel Corresponding the second scan line is connected to the second longitudinal portion, and the second longitudinal portion extends toward the corresponding second scan line. The display panel of claim 12, wherein the first platform region is defined by one of the first longitudinal portions, and the second platform region is defined by one of the second longitudinal portions. The display panel of claim 11, wherein each of the pixel groups includes a first pixel structure and a second pixel structure, the first pixel structure including a first active component and an electrical connection a first pixel electrode of the first active component, and the first active component is connected to the corresponding first branch, and the second pixel structure includes a second active component and electrically connected to the second active component a second pixel electrode, and the second active component is connected to the corresponding second branches. The display panel of claim 1, wherein the first spacer and the second spacer of each of the spacer groups are each a column spacer. The display panel of claim 1, further comprising a common electrode layer disposed between the second substrate and the plurality of spacer groups.