TWI416695B - Apparatus and method for a fast recovery rectifier structure - Google Patents

Description

Apparatus and method for quickly returning a rectifier structure

Embodiments of the invention relate to the field of rectifiers. More particularly, embodiments of the invention relate to a fast return rectifier structure.

An important factor in the efficiency of a switching power supply is the performance of the diodes used in such circuits. More specifically, the reverse recovery of such a diode reduces the turn-on loss of the transistor switch in such a power supply. For example, during the turn-on of the switch, a reverse recovery current transient appears as an additional current component, so the turn-on loss of the switch is significantly higher than in the absence of such a reverse recovery component. Therefore, reducing the reverse charge recovery (Qrr) of the diode is important for improving the efficiency of the switching power supply.

However, unfortunately, if the reverse recovery is too sudden, the voltage will experience improper oscillations. Such oscillations can result, for example, in low efficiency power operation, poor noise output (such as power ripple and/or electromagnetic interference), and/or extremely high and potentially damaging voltage spikes.

Therefore, there is a great need for a fast return rectifier structure that maintains a soft recovery characteristic with reduced reverse recovery charge. It is further desirable to meet the previously noted needs with a fast return rectifier structure formed using trenches of smaller geometry. There is also a need to meet the previously identified needs in a manner that is compatible and complementary to conventional semiconductor fabrication processes and equipment.

Accordingly, various embodiments of the present invention disclose an apparatus and method for a fast return rectifier structure. Embodiments of the present invention are capable of reducing reverse responses The charge maintains a soft recovery feature at the same time. Likewise, embodiments of the present invention disclose a germanium-based fast recovery rectifier structure that involves generating a Schottky diode in series with a JFET channel region, or a combined PiN Schottky (MPS) diode structure. For example, in one embodiment, the MPS diode structure enables a higher ratio of Schottky to PiN due to the smaller geometry and reduces N-doping between well regions implanted during hole conduction during forward conduction. And it can reduce the channel resistance.

In particular, the rectifier structure includes a substrate having a dopant of a first type. A first epitaxial layer that is lightly doped with the dopant of the first type is coupled to the substrate. A first metal layer is disposed adjacent to the first epitaxial layer. A plurality of trenches are recessed into the first epitaxial layer, each of which is coupled to the metal layer. The apparatus also includes a plurality of wells each doped with a second type of dopant, each of the plurality of wells being spaced apart from one another, and wherein each of the plurality of wells is formed in the plurality of trenches Below and adjacent to a corresponding groove. A plurality of oxide layers are formed on a wall and a bottom of a corresponding trench such that a corresponding well is electrically insulated from the corresponding trench. A plurality of channel regions doped with the dopant of the first type are formed within the first epitaxial layer between two corresponding wells from the plurality of wells, and wherein each of the plurality of channel regions is The first type dopant is more heavily doped than the first epitaxial layer.

Embodiments of the invention also describe a method of forming a fast return rectifier structure. The method includes depositing a second epitaxial layer doped with a dopant of a first type on a substrate. The substrate is heavily doped with the dopant of the first type. That is, the substrate is more heavily doped than the second epitaxial layer. This method is also A first epitaxial layer lightly doped with the first type dopant is deposited on the second epitaxial layer. The second epitaxial layer is more heavily doped than the first epitaxial layer. A plurality of trenches are etched into the first epitaxial layer. A plurality of oxide gate defining spacers are formed on the walls and the bottom of each of the plurality of trenches. A plurality of wells are implanted to access a bottom of each of the plurality of grooves. Each of the plurality of wells is doped with a second type of dopant and spaced apart from each other. That is, each of the plurality of wells is electrically insulated from a corresponding trench. A first metal layer is deposited on the epitaxial layer.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Reference will now be made in detail to the preferred embodiments embodiments of the invention While the invention has been described in connection with the preferred embodiments, the preferred embodiments Rather, the invention is intended to cover alternatives, modifications, and equivalents of the invention.

In addition, certain specific details are set forth in the following detailed description of the invention. However, it will be understood by those skilled in the art that the present invention may be practiced without the specific details. In other instances, well-known methods, procedures, components, and circuits are not described in detail to avoid unnecessarily obscuring aspects of the invention.

For purposes of clarity and understanding, embodiments of the invention are described as a rectifier having a p-type well in an n-type substrate. However, it is to be understood that other embodiments of the present invention are well suited for use with configurations that utilize materials of opposite polarity to those depicted herein, such as rectifiers having n-type wells in a p-type substrate. this Alternative embodiments are considered to be within the scope of the invention.

1 is a side cross-sectional view of a quick return rectifier device 100 in accordance with an embodiment of the present invention. As shown in FIG. 1, rectifier device 100 can be repeated in a semiconductor substrate to complete one or more rectifier devices 100. The rectifier includes a first metal layer 190 and a second metal layer 110. For example, the first metal layer 190 functions as an anode and the second metal layer 110 functions as a cathode. The rectifier structure as depicted in Figure 1 is capable of producing devices having a rated breakdown voltage in the range of 150 volts to 1200 volts.

Rectifier device 100 includes a heavily doped substrate 120 doped with a first type of dopant. In one embodiment, as shown in FIG. 1, the first type dopant is an n-type dopant. As such, the substrate 120 is doped to a concentration of n ⁺ .

In an embodiment, the second metal layer is disposed adjacent to the substrate 120. That is, as shown in FIG. 1, the cathode metal of the rectifier 100 is coupled to the n ⁺ substrate.

Disposed on the n ⁺ substrate 120 is a first epitaxial layer 140 deposited in an epitaxial manner and lightly doped with a first type (such as an n-type) dopant. That is, the dopant concentration of the n ^- first epitaxial layer or the n ^- drift region is less than the dopant concentration of the n ⁺ substrate 120. In addition, in an embodiment, the first epitaxial layer 140 is coupled to the substrate.

In an embodiment, the first metal layer 190 is disposed adjacent to the first epitaxial layer 140. In certain embodiments, the first metal layer 190 typically comprises aluminum and may further comprise about one percent germanium. That is, in one embodiment, the first metal layer 190 comprises a single aluminum layer doped with antimony. In another embodiment, the first metal layer 190 comprises a composite aluminum layer doped with antimony.

Disposed between the n ⁺ substrate 120 and the first epitaxial layer 140 is a second epitaxial layer 130 doped with a first type (such as an n-type) dopant. The dopant concentration of the n-type second epitaxial layer 130 is less than the dopant concentration of the n ⁺ substrate 120. Moreover, the dopant concentration of the n-type second epitaxial layer 130 is higher than the dopant concentration of the n ^- first epitaxial layer 140.

In the dual epitaxial layer structure of the rectifier 100, the second epitaxial layer 130 functions as a depletion stop layer. That is, in the second epitaxial layer 130, the electric field can be reduced to zero before reaching the n ⁺ substrate 120. Therefore, in the case where the second epitaxial layer 130 is added, the first epitaxial layer 140 can be made thinner.

The rectifier structure 100 includes a plurality of trenches 175, each of which is recessed into the first epitaxial layer 140. Additionally, each of the plurality of trenches 175 is electrically coupled to a first metal layer 190 (not shown). In one embodiment, each of the plurality of trenches is filled with undoped germanium or undoped polysilicon.

In an embodiment, the trench 175 has an exemplary depth dimension of between about 300 nanometers and 700 nanometers. Additionally, trench 175 has an exemplary width dimension of between about 0.4 [mu]m and 0.5 [mu]m. It should be understood that embodiments in accordance with the present invention are well suited for other sizes.

At the bottom of the plurality of trenches 175 are a plurality of wells 160. That is, at the bottom of each of the plurality of trenches 175 is a shallow well 160. Thus, each of the plurality of shallow wells 160 is formed below and adjacent to a corresponding one of the plurality of trenches 175. Each of the plurality of wells is doped with a second type (such as a p-type) dopant. As shown in FIG. 1, each of the plurality of p-wells 160 are spaced apart from one another.

In an embodiment, the p-well 160 is doped with boron atoms. For example, the concentration of boron in this region is about 1 x 10 ¹⁸ atoms per cubic centimeter. Additionally, in another embodiment, the junction depth of the p-type well is between about 0.2 [mu]m and 0.3 [mu]m. Also, the size of the p-type well window is about 150 nm to 200 nm.

In one embodiment of the invention, a minority carrier lifetime compression technique is implemented to reduce the time during which the carrier undergoes recombination during reverse recovery of the rectifier structure 100.

As also shown in FIG. 1, rectifier 100 includes a plurality of oxide layers 170. Each of the plurality of oxide layers 170 is formed on a wall and a bottom of a corresponding trench. For example, in one embodiment, each of the trenches 175 is covered by a hafnium oxide insulating film 170. In one embodiment, the remaining portion of trench 175 is filled with undoped polysilicon.

Thus, each of the wells 160 is insulated from the corresponding trench 175 by the oxide layer 170. That is, the first metal layer 190 is electrically coupled to the undoped trenches 175 filled with polysilicon. However, the first metal layer 190 is not electrically coupled to the p-well 160 via the trench region 175. That is, the insulating ceria oxide layer 170 on the bottom and vertical sides of the trenches 175 acts to electrically insulate the p-well 160 from the first metal layer 190 via the trenches 175. However, as will be seen below with reference to Figures 2 and 3, well 160 is electrically coupled to first metal layer 190 via a remotely located contact region (not shown).

As shown in FIG. 1, a plurality of channel regions 150 are formed between each of the wells 160. That is, the regions between the wells 160 are doped with a first type of dopant (eg, an n-type dopant) and are formed inside the first epitaxial layer 140. That is, each channel region 150 is positioned between two corresponding wells 160. The dopant concentration of the channel region 150 is higher than the dopant concentration of the first epitaxial layer 140.

In accordance with an embodiment of the invention, region 150 between p-type wells 160 includes an n-type doping and is referred to as an "n-type channel enhancement" layer 150. The n-type channel enhancement 150 comprises an exemplary doping of about 1.0 x 10 ¹⁵ to 2.0 x 10 ¹⁶ atoms per cubic centimeter. In an embodiment, the channel region 150 is doped with phosphorus. It should be understood that this degree of doping is generally higher than the degree of doping of the n ^- first epitaxial layer 140.

Rectifier structure 100 also includes a conductive titanium silicide (TiSi ₂₎ layer 165, which is disposed on each surface of the plurality of wells 160. For example, titanium telluride layer 165 is produced on the surface of p-well 160 to reduce the lateral resistance of p-well 160.

A Schottky barrier metal 180 is shown in the rectifier 100 to be disposed below the first metal layer 190. The Schottky barrier metal 180 is spaced apart from the first metal layer 190 and the first epitaxial layer 140 and the trenches 175. The Schottky barrier metal 180 includes a barrier metal, such as molybdenum, tungsten or platinum, in intimate contact with the polycrystalline germanium regions of the first epitaxial layer 140, the oxide layer 170, and the trenches 175.

A Schottky barrier formed in the anode metal 185 and 190 n ^- 140 n-epitaxial layer between ^- a first epitaxial layer of the projection 140 of the land area. The land region of the n ^- first epitaxial layer 140 is formed between the trenches 175. In an embodiment, the land region has a size of between about 0.45 [mu]m and 0.65 [mu]m. Further, Schottky barrier rib 185 may be (e.g.) adjacent the n ^- epitaxial layer and disposed of aluminum inherent characteristics (e.g., comprising adjacent the n ^- 140 and disposed in the epitaxial layer of the aluminum anode metal 190) is formed.

It should be understood that in the case of reverse bias, Schottky diodes are generally susceptible to leakage. However, in accordance with an embodiment of the present invention, in the case of reverse bias, the p-well 160 is pinched off (e.g., a depletion region is formed between the p-wells 160) in such a manner as to ensure that the rectifier 100 is to be broken down. Voltage and low leakage. Advantageously, the n-type channel features of the rectifier structure 100 will result in improved reverse recovery. One mechanism for such improved reverse recovery is due to inhibition from p-well 160 A few carriers are injected.

In accordance with an embodiment of the invention, rectifier 100 is understood to include one or more Schottky diodes (each in series with a junction field effect transistor (JFET) channel), and a Pitrinsic N (PiN) The base region of the diode. That is, a p-well 160, an n ^- first epitaxial layer 140, and an n ⁺ substrate form a PiN diode, and each PiN diode is a Schottky diode. The PiN diode is modulated in a conductive manner by injection of a minority carrier from the gate of the JFET.

The rectifier structure 100 is constructed using relatively fine process geometries. In the present invention, the rectifier structure 100 exhibits a ratio of the size of the Schottky barrier 185 to the PiN region that is greater than or equal to one. In particular, the geometry of the rectifier structure 100 described above includes an n ^- land region of about 0.45 μm to 0.65 μm, a trench width region of about 0.4 μm to 0.5 μm, a trench depth of about 300 nm to 700 nm, A p-type well window size of about 150 nm to 200 nm and a p-type well depth of about 0.2 [mu]m to 0.3 [mu]m. These geometries yield a Schottky to PiN ratio greater than one.

Due to the high ratio of Schottky to PiN of the rectifier 100 and the n-type channel region 150, the rectifier 100 exhibits an improved reverse recovery characteristic. In one embodiment, the Schottky ratio is the ratio of the size of the Schottky barrier 185 to the width of the p-well 160.

Additionally, in one embodiment, the fine process geometry configuration provides a significantly easier p-type well placed below the trench compared to the doping of the p-type well below the larger trench corresponding to the larger process geometry. Doping of 160.

The rectifier structure 100 will now be described functionally. A JFET channel is formed between the plurality of p-wells 160. In the case of forward bias, the p-well is injected into the JFET channel. These additional holes reduce the resistance of the JFET channel, thereby enhancing the forward conduction of the Schottky region of the rectifier structure 100. The Schottky diode between the Schottky barrier 185 and the n ^- epitaxial 140 is characterized by a lower forward voltage drop of about 0.3 volts compared to the corresponding PiN diode. When the voltage across the JFET drops to near 0.6 volts, the p-well begins to fill the hole.

Schottky diodes with metal/semiconductor junctions exhibit rectifying properties (eg, currents tend to be the other polarity when passing through a structure with one polarity). The Schottky diode of this embodiment can be used in high frequency and fast switching applications. The Schottky diode operates on most carriers. The metal region is heavily occupied by the conduction band electrons, and the n-type semiconductor region is lightly doped.

The n-type channel enhancement region 150 reduces the resistance of the JFET channel, thereby delaying the initiation of the forward biasing of the p-well 160. In this case, most of the current flows through the JFET channel. A smaller number of carriers will result in a decrease in the density of minority carriers that can beneficially improve the performance of the retro-recovery device.

In the case of reverse bias, a depletion region is formed around the p-well 160. Eventually, these depletion regions overlap each other, resulting in a "pinch-off" of the JFET channel.

Advantageously, a significant portion of the features in accordance with embodiments of the present invention are controlled by device geometry rather than doping processes. In general, the doping process produces different distributions of dopant densities, while the geometry process is generally more accurate.

It will be appreciated that embodiments in accordance with the present invention are well suited for performance adjustment via a variety of well known techniques including, for example, shortening minority carrier lifetimes (eg, including electron radiation, argon, helium or hydrogen implantation), or separately or Heavy metals (such as platinum or gold) are diffused in a variety of combinations.

In accordance with another embodiment of the present invention, an ultrafast diode will be described herein. The ultrafast diode includes a substrate. The substrate is doped with a dopant of a first type, such as an n-type dopant. The ultrafast diode 100 includes a first epitaxial layer coupled to the substrate doped with a dopant of a first type. The first metal layer is disposed adjacent to the first epitaxial layer. The first trench is recessed into the first epitaxial layer and coupled to the metal layer. The first well is formed below and adjacent to the first trench. The first well is doped with a dopant of a second type, such as a p-type dopant.

In addition, a second trench is recessed into the first epitaxial layer and coupled to the metal layer. A second well is formed below and adjacent to the second trench. The second well is doped with a second type of dopant, such as a p-type dopant.

A channel region is formed inside the first epitaxial layer and positioned between the first p-well and the second p-well. The channel region is more heavily doped with the first type of dopant than the first epitaxial layer.

Additionally, a first oxide layer is formed on the walls and the bottom of the first trench to electrically insulate the first well from the first trench. Similarly, a second oxide layer is formed on the walls and bottom of the second trench to electrically insulate the second well from the second trench.

2 is a cross-sectional view of an ultrafast return rectifier structure 200 along a plane in which a p-well 160 passes through a trench plug region, in accordance with an embodiment of the present invention. In another embodiment, rectifier structure 200 represents rectifier 100 of FIG. For example, Figure 2 shows a cross-sectional view of the rectifier structure 100 taken along line A-- of Figure 1.

As shown in FIG. 2, the ultrafast rectifier structure 200 includes an n ⁺ substrate 220 disposed on a metal layer (e.g., a cathode contact). The ultrafast rectifier structure 200 includes a first epitaxial layer 230 doped with an n-type dopant. The first epitaxial layer 230 functions as a depletion stop layer and is adjacent to the substrate 220. The rectifier 200 also includes a second epitaxial layer 240 disposed on top of the first epitaxial layer 230.

As shown in Figure 2, it shows a cross section of the trench plug region. The trench plug region corresponds to the trench region 175 of FIG. For example, the trench plug region includes a titanium telluride layer 265. An oxide layer 270 is disposed on the bottom and walls of the trench. The trench is filled with undoped polysilicon 275. Likewise, the trench plug region includes a barrier metal 280 disposed between the trench fill 275 and the anode metal layer 215.

As also shown in FIG. 2, a p-type well 260 is disposed at the bottom of the trench plug region. As shown, the p-well 260 is electrically insulated from the trench region 275 to be electrically insulated from the anode metal layer 215 via the trench plug region.

The p-well region 260 is electrically coupled to the anode metal 215 via the contact 310. That is, instead of forming a contact between the p-type well 260 and the anode metal 215 through the trench plug region, an embodiment of the present invention provides a contact region 310 positioned farther from the trench plug region to facilitate Electrical coupling between p-well 260 and anode metal layer 215. As shown in Figure 3, contact 310 is generated in a particular production zone of the device.

3 is a top plan view of a quick return rectifier structure 300 in accordance with an embodiment of the present invention. In one embodiment, FIG. 3 illustrates a top plan view of the rectifier structure 100 of FIG. 1 exposing components below a metal layer (not shown). Also, in another embodiment, FIG. 3 illustrates the rectifier structure 200 of FIG.

As shown in FIG. 3, rectifier structure 300 includes a plurality of trenches 375. A plurality of Schottky diodes 395 are disposed between the plurality of trenches 375. A plurality of p-type wells are disposed below the plurality of trenches 375.

As shown in FIG. 3, it shows a plurality of contact areas 310 that are remotely located. Contact region 310 is located further from the trench plug region of rectifier structure 300. also That is, the p-type well is electrically insulated from the anode metal layer (not shown) via the trench plug region.

Each of the plurality of contact regions 310 is electrically coupled to a plurality of p-type wells and an anode metal layer (not shown). Thus, the p-type well is electrically coupled to the anode metal layer via the contact region 310.

4 is a flow chart illustrating the steps of a method of fabricating an ultrafast recovery rectifier structure having a Schottky and PiN ratio equal to or greater than one, in accordance with an embodiment of the present invention. As depicted in FIG. 4, the fabrication process can begin with various initial processes on the semiconductor substrate, such as cleaning, doping, etching, and/or the like. The semiconductor substrate can contain a first concentration of dopant of a first concentration. For example, in embodiments of the invention, the substrate may comprise germanium heavily doped with phosphorus or arsenic or germanium heavily doped with boron.

At 410, the embodiment deposits an optional epitaxial layer and a second epitaxial layer on the substrate. The second epitaxial layer is doped with a dopant of a first type. The second epitaxial layer acts as a depletion stop layer. Therefore, the substrate is more heavily doped with the first dopant than the second epitaxial layer.

At 420, the present embodiment deposits another epitaxial layer on the optional second epitaxial layer: a first epitaxial layer. The first epitaxial layer is lightly doped with a dopant of the first type. The second epitaxial layer is more heavily doped than the first epitaxial layer.

In one embodiment, the first epitaxial layer is doped by introducing a dopant into an epitaxial chamber during deposition. For example, the first deposited epitaxial layer can be a germanium doped with phosphorus or arsenic moderately. The first epitaxial layer may also be doped by an optional high energy implantation and thermal annealing process after deposition. In this case, the epitaxially deposited semiconductor layer may be a doped with boron moderately doped.

At 430, the present embodiment etches a plurality of trenches into the first epitaxial layer. The The grooves are substantially parallel and linear. The spacing between the trenches and the width of the trenches are selected such that the ratio of Schottky barrier to PiN is greater than or equal to 1, thereby increasing the return characteristics of the rectifier in the reverse bias condition.

At 440, the present embodiment forms a plurality of oxide layers disposed on the walls and bottom of the plurality of trenches. Therefore, the trench fill is insulated from the region under the bottom of the trench due to the oxide layer.

At 450, the present embodiment implants a plurality of wells each doped with a dopant of a second type at a location near the bottom of each of the plurality of trenches. In one embodiment, each of the plurality of wells are spaced apart from each other, and wherein each of the plurality of wells is electrically insulated from the corresponding trench by the previously described oxide layer. For example, the plurality of wells form a grid of control gate regions. The wells can be implanted by well known high energy implant processes. In an embodiment, the dopant can be driven to a desired depth during thermal cycling (eg, rapid thermal annealing).

In addition, the present embodiment forms a plurality of contact regions that are remotely positioned, and the plurality of contact regions are electrically coupled to the plurality of wells and the first metal layer.

In one embodiment, a plurality of channel regions between the wells are implanted with a first type of dopant to form an enhanced channel region. That is, a region of the first semiconductor layer defined in a plurality of channel regions defined between the plurality of wells is implanted with the first dopant. Therefore, the plurality of channel regions are more heavily doped than the first epitaxial layer.

At 460, the embodiment deposits a first metal layer on the first epitaxial layer. For example, the first metal layer is an anode metal layer.

Also, in another embodiment, a Schottky barrier metal is disposed under the first metal layer such that the Schottky barrier is spaced apart from the first metal layer and the first Epitaxial layer. In particular, a Schottky barrier dipole is formed between the Schottky barrier metal and the first epitaxial layer over the aforementioned channel region.

FIG. 5 illustrates an exemplary recovery feature 500 of current versus time in accordance with an embodiment of the present invention. Recovery feature 510 represents the reverse recovery feature of an exemplary 600 volt ultrafast diode as is known in the art. It should be understood that the recovery feature comprises a maximum reverse current of about three amps and a duration of about 3 x 10 seconds.

Recovery feature 520 represents the reverse recovery feature of an exemplary 600 volt diode in accordance with an embodiment of the present invention. It should be understood that the return characteristics of this diode include a significantly smaller current than the conventional diode of feature 510. The recovery feature 520 exhibits a maximum reverse current of about 1.3 amps. Beneficially, the duration of the reply is slightly longer than the duration of the signature of feature 510, for example, about 4.5 x 108 seconds.

Recovery feature 530 represents the reverse recovery feature of a second exemplary 600 volt diode in accordance with an embodiment of the present invention. It should be understood that the return characteristics of this diode include a significantly smaller current than the conventional diode of feature 510. The recovery feature 530 exhibits a maximum reverse current of about 0.8 amps. Beneficially, the duration of the reply is slightly longer than the duration of the signature of feature 510, for example, about 4.5 x 108 seconds.

Accordingly, various embodiments of the present invention disclose an apparatus and method for a fast return rectifier structure. Embodiments of the present invention are capable of reducing reverse recovery charge while maintaining a soft recovery feature. Likewise, embodiments of the present invention disclose a germanium-based fast recovery diode that involves generating a Schottky diode in series with a JFET channel region, or a combined PiN Schottky (MPS) diode structure. For example, in one embodiment, the MPS diode structure enables a higher ratio of Schottky to PiN due to smaller geometry and reduces N between well regions injected during hole conduction during forward conduction. Type doping And it can reduce the channel resistance.

Although the method embodiments illustrated in flowchart 400 illustrate specific sequences and numbers of steps, the invention is applicable to alternative embodiments. For example, the present invention does not require all of the steps provided in the above methods. Additionally, additional steps can be added to the steps presented in this embodiment. Similarly, the sequence of steps is modified depending on the application.

Accordingly, embodiments of the present invention are described, that is, a fast recovery rectifier structure having a Schottky to PiN ratio greater than or equal to one and a method of fabricating the same. Although the present invention has been described in terms of specific embodiments, it is understood that the invention is not construed as being limited to the embodiments.

100‧‧‧Rectifier structure

110‧‧‧Second metal layer

120‧‧‧Substrate

130‧‧‧Second epilayer

140‧‧‧First epitaxial layer

150‧‧‧Channel area

160‧‧‧ Well

165‧‧‧Titanium telluride layer

170‧‧‧Oxide layer

175‧‧‧ trench

180‧‧‧Schottky barrier metal

185‧‧‧ Schottky barrier

190‧‧‧First metal layer

200‧‧‧Ultra-fast return rectifier structure

215‧‧‧Anode metal layer

220‧‧‧Substrate

230‧‧‧First epitaxial layer

240‧‧‧Second epilayer

260‧‧‧p well

265‧‧‧Titanium telluride layer

270‧‧‧Oxide layer

275‧‧‧groove area

280‧‧‧Baffle metal

310‧‧‧Contact

375‧‧‧ trench

395‧‧‧Schottky diode

400‧‧‧ Flowchart

500‧‧‧Response characteristics

510‧‧‧Response characteristics

520‧‧‧Response characteristics

530‧‧‧Response characteristics

1 illustrates a side cross-sectional view of an ultrafast recovery diode in accordance with an embodiment of the present invention.

2 is a cross-sectional view of the ultrafast recovery diode of FIG. 1 taken along a plane in a p-type well, in accordance with an embodiment of the present invention.

3 is a top plan view of a quick return diode in accordance with an embodiment of the present invention.

4 is a flow chart illustrating the steps of a method of fabricating an ultrafast recovery diode having a Schottky to PiN ratio greater than one, in accordance with an embodiment of the present invention.

5 is a diagram illustrating exemplary recovery characteristics of current versus time in accordance with an embodiment of the present invention.

100‧‧‧Rectifier structure

110‧‧‧Second metal layer

120‧‧‧Substrate

130‧‧‧Second epilayer

140‧‧‧First epitaxial layer

150‧‧‧Channel area

160‧‧‧ Well

165‧‧‧Titanium telluride layer

170‧‧‧Oxide layer

175‧‧‧ trench

180‧‧‧Schottky barrier metal

185‧‧‧ Schottky barrier

190‧‧‧First metal layer

Claims (20)

A rectifier device comprising: a substrate, wherein the substrate is doped with a dopant of a first type; a first epitaxial layer doped with the dopant of the first type, coupled to the substrate; a first metal layer adjacent to the first epitaxial layer; a plurality of trenches recessed into the first epitaxial layer, wherein each of the plurality of trenches is coupled to the metal layer; Each well doped with a second type of dopant, wherein each of the plurality of wells is spaced apart from each other, and wherein each of the plurality of wells is formed in a corresponding one of the plurality of trenches Bottom and adjacent thereto; a plurality of oxide layers each formed on a wall and a bottom of a corresponding trench to electrically insulate a corresponding well from the corresponding trench; and the dopant of the first type a plurality of doped channel regions formed within the first epitaxial layer, wherein each of the plurality of channel regions is positioned between two corresponding wells from the plurality of wells, and wherein the plurality of channels are Each of the regions is more heavily doped with the first type of dopant than the first epitaxial layer . The rectifier device of claim 1, further comprising: a second epitaxial layer necessarily located between the substrate and the first epitaxial layer, wherein the second epitaxial layer is more lightly doped than the substrate, and It is more heavily doped than the first epitaxial layer. The rectifier device of claim 1, further comprising: a Schottky barrier disposed below the first metal layer such that The Schottky barrier separates the first metal layer from the first epitaxial layer. The rectifier device of claim 3, further comprising: a plurality of PiN regions, wherein an area ratio of the Schottky barrier to each of the plurality of PiN regions is greater than or equal to one. The rectifier device of claim 1, wherein each of the plurality of trenches comprises an undoped germanium. The rectifier device of claim 1, wherein the first type dopant comprises an n-type dopant. The rectifier device of claim 1, further comprising: a plurality of contact regions remotely positioned coupled to the plurality of wells and the first metal layer. An ultrafast diode comprising: a substrate, wherein the substrate is doped with a dopant of a first type; a first epitaxial layer lightly doped with the dopant of the first type, coupled a first metal layer adjacent to the first epitaxial layer; a first trench recessed into the first epitaxial layer and coupled to the metal layer; a first dopant doped with a type dopant, formed under the first trench and adjacent thereto; a second trench recessed into the first epitaxial layer and coupled to the metal layer; a second well doped with the dopant of the second type, formed under and adjacent to the second trench; and a channel region formed inside the first epitaxial layer and positioned between the first well and the second well, wherein the channel region is heavier than the first epitaxial layer Earth doping. The ultrafast diode of claim 8, further comprising: a first oxide layer formed on the wall and a bottom of the first trench to electrically insulate the first well from the first trench; And a second oxide layer formed on the wall of the second trench and a bottom portion to electrically insulate the second well from the second trench. The ultrafast diode of claim 8, further comprising: a second metal layer adjacent to the substrate. The ultrafast diode of claim 8, wherein the dopant of the first type comprises an n-type dopant. The ultrafast diode of claim 8, further comprising: a second epitaxial layer having the dopant of the first type, positioned between the substrate and the first epitaxial layer, wherein the substrate is The second epitaxial layer is more heavily doped, and wherein the second epitaxial layer is more heavily doped than the first epitaxial layer, and wherein the substrate is doped with the first type dopant. The ultrafast diode of claim 8, further comprising: a second metal layer adjacent to the substrate. The ultrafast diode of claim 8, further comprising: at least one remotely located contact region coupled to the first well, the second well, and the first metal layer. The ultrafast diode of claim 8, further comprising: a Schottky barrier positioned between the first metal layer and the first semiconductor Between the body layers. The ultrafast diode of claim 15, further comprising: a PiN region, wherein an area ratio of the Schottky barrier to the PiN region is greater than or equal to one. A method of fabricating a rectifier structure, comprising: depositing a second epitaxial layer doped with the first type dopant on a substrate doped with a dopant of a first type, wherein the substrate is Depositing a second epitaxial layer more heavily; depositing a first epitaxial layer lightly doped with the first type dopant on the second epitaxial layer, wherein the second epitaxial layer is An epitaxial layer is more heavily doped; etching a plurality of trenches into the first epitaxial layer; forming a plurality of oxide layers on walls and bottoms of each of the plurality of trenches; approaching the plurality of a portion of each of the trenches is implanted at a plurality of wells each doped with a second type of dopant, wherein each of the plurality of wells is spaced apart from each other, and wherein each of the plurality of wells One is electrically insulated from a corresponding trench; and a first metal layer is deposited on the first epitaxial layer. The method of claim 17, further comprising: implanting the first type of dopant into the first epitaxial layer in a plurality of channel regions defined between the plurality of wells, wherein the plurality of channel regions It is more heavily doped than the first epitaxial layer. The method of claim 17, further comprising: A Schottky barrier is deposited under the first metal layer such that the Schottky barrier separates the first metal layer from the first epitaxial layer. The method of claim 17, further comprising: forming a plurality of contact regions that are remotely located, the plurality of contact regions being coupled to the plurality of wells and the first metal layer.