TWI416390B - Photo detector and display panel having the same - Google Patents
Photo detector and display panel having the same Download PDFInfo
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- TWI416390B TWI416390B TW98145274A TW98145274A TWI416390B TW I416390 B TWI416390 B TW I416390B TW 98145274 A TW98145274 A TW 98145274A TW 98145274 A TW98145274 A TW 98145274A TW I416390 B TWI416390 B TW I416390B
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本發明有關一種光感測裝置,特別是相關於一種可提高顯示器開口率之光感測裝置;本發明另有關一種具有上述光感測裝置之顯示器。The present invention relates to a light sensing device, and more particularly to a light sensing device capable of increasing the aperture ratio of a display; the present invention further relates to a display having the above light sensing device.
隨著科技、網路、以及通訊的蓬勃發展,電子產品除須具有科技的新穎性條件外,更尋求與使用者的直接互動,以滿足使用者在方便性以及互動性上的需求。因此,許多觸控式產品與介面因應推出,例如ATM提款機、個人數位助理(Personal Digital Assistant, PDA),行動電話或筆記型電腦。觸控式產品藉著使用者接近或按壓觸控式面板(touch panel),進行使用者與電子產品之間的直接互動,以完成資料的傳輸、存取以及更新,因此增加輸入上的效率。With the rapid development of technology, internet, and communication, electronic products must seek direct interaction with users in addition to the novelty of technology to meet the needs of users in terms of convenience and interactivity. Therefore, many touch-sensitive products and interfaces have been introduced, such as ATMs, Personal Digital Assistants (PDAs), mobile phones or notebook computers. The touch-type product allows the direct interaction between the user and the electronic product by the user to approach or press the touch panel to complete the transmission, access and update of the data, thereby increasing the efficiency of the input.
於習知技藝中,觸控面板係整合於液晶顯示器(liquid crystal display, LCD)內,並於液晶顯示器的薄膜電晶體(thin-film transistor, TFT)陣列架構下內嵌光感測裝置。當使用者以手指、觸控筆或其他物體接近或者按壓顯示器面板時,會遮蔽面板內光感測裝置的部分或全部光源,因此光感測裝置可藉由感測光的變化,而擷取手指、觸控筆或其他物體於觸控面板的影像以及其座標位置。In the prior art, the touch panel is integrated in a liquid crystal display (LCD), and a light sensing device is embedded in a thin-film transistor (TFT) array structure of the liquid crystal display. When the user approaches or presses the display panel with a finger, a stylus or other object, some or all of the light sources of the light sensing device in the panel are shielded, so the light sensing device can capture the finger by sensing the change of the light. , the image of the stylus or other object on the touch panel and its coordinate position.
習知技藝並揭露一種光學感測裝置,該光學感測裝置包括複數個感測畫素電路;每一該感測畫素電路包括一個光電薄膜電晶體以及複數個讀取薄膜電晶體;其中一讀取薄膜電晶體係作為重置(reset)之用,因此其閘極須與一重置信號電性相連,以讀取一第一重置電壓。此外,為反應感測畫素電路於不同遮光程度的電氣訊號結果,須另設置一第二重置電壓,並使該第二重置電壓與該第一重置電壓之間形成一電壓準位差。因該等習知技藝須在畫素(pixel)單元的既有電路外,另增額外的控制訊號,因此電路架構較為複雜。然而,過於複雜的電路架構將增加薄膜電晶體的佈線難度,並增添成本。The prior art discloses an optical sensing device that includes a plurality of sensing pixel circuits; each of the sensing pixel circuits includes a phototransistor transistor and a plurality of read film transistors; The thin film electro-crystal system is read as a reset, so that its gate must be electrically connected to a reset signal to read a first reset voltage. In addition, in order to reflect the electrical signal result of the pixel circuit at different shading levels, a second reset voltage is required, and a voltage level is formed between the second reset voltage and the first reset voltage. difference. Since these conventional techniques require additional control signals in addition to the existing circuits of the pixel unit, the circuit architecture is complicated. However, an overly complex circuit architecture will increase the wiring difficulty of the thin film transistor and increase the cost.
再者,由於光感測的訊號通常相當微弱,若於畫素單元的原電路架構下,額外增設複雜的控制電路以獲取較強的訊號,將降低顯示器的開口率(aperture ratio)。因此,習知內嵌於顯示器之光學感測器在設計時,難以兼顧光訊號強度與感測裝置的複雜度。Moreover, since the light sensing signal is usually quite weak, if a complicated control circuit is additionally added to obtain a strong signal under the original circuit structure of the pixel unit, the aperture ratio of the display will be lowered. Therefore, it is conventionally difficult to balance the optical signal strength and the complexity of the sensing device when designing the optical sensor embedded in the display.
有鑑於此,本發明之一目的在於提供一種光感測裝置,其使用畫素單元之原電路架構,無須額外增加其他控制訊號,因此電路架構簡化、佈局簡單。In view of this, an object of the present invention is to provide a light sensing device that uses the original circuit structure of the pixel unit without additional control signals, thereby simplifying the circuit structure and simplifying the layout.
本發明之另一目的在於提供一種顯示器,其包括複數個上述光感測裝置,因該等光感測裝置之電路架構簡單,因此不致降低該顯示器之開口率。Another object of the present invention is to provide a display comprising a plurality of the above-mentioned light sensing devices. Since the circuit structures of the light sensing devices are simple, the aperture ratio of the display is not reduced.
於本發明之一實施例中,提供一種光感測裝置,其包括一光感測元件、一儲存電容、一第一薄膜電晶體以及一第二薄膜電晶體。該光感測元件可將一節點的電壓重置為一第一電壓準位,而該儲存電容與該節點電性相連,並依據該光感測元件之一光照度於一畫面時間內,將該節點放電至一第二電壓準位。該第二電壓準位控制該第一薄膜電晶體之一導通電壓,而該第二薄膜電晶體係依據該導通電壓,輸出一讀取電壓。In an embodiment of the invention, a light sensing device is provided, comprising a light sensing component, a storage capacitor, a first thin film transistor, and a second thin film transistor. The light sensing component can reset the voltage of a node to a first voltage level, and the storage capacitor is electrically connected to the node, and according to the illuminance of the light sensing component, the image is The node is discharged to a second voltage level. The second voltage level controls a turn-on voltage of the first thin film transistor, and the second thin film transistor system outputs a read voltage according to the turn-on voltage.
於本發明之另一實施例中,提供一種顯示器,其包括一第一基板、一第二基板、一設置於該第一基板與第二基板之間的液晶層、一包括複數個光感測區之有效顯示區;該有效顯示區設置於第二基板,於每一該光感測區可設置一光感測裝置,該光感測裝置包括複數個上述之光感測裝置。In another embodiment of the present invention, a display includes a first substrate, a second substrate, a liquid crystal layer disposed between the first substrate and the second substrate, and a plurality of light sensing The effective display area is disposed on the second substrate. Each of the light sensing areas may be provided with a light sensing device, and the light sensing device includes a plurality of the above-mentioned light sensing devices.
以下的說明以及範例用以解釋本發明的細節。惟,熟習此項技藝之人士應可輕易瞭解,在本發明之實施例所涵蓋下,所述及之該些實施例應有相當的變化以及改良。因此,以下所述的實施例並不用以限制本發明的範圍。The following description and examples are presented to explain the details of the invention. However, those skilled in the art should readily appreciate that the embodiments described herein are susceptible to variations and modifications. Therefore, the embodiments described below are not intended to limit the scope of the invention.
請參閱第一圖,其為根據本發明一實施例之顯示器的系統方塊圖,該顯示器包括一有效顯示區1,一閘極線驅動器2、一輸出控制器3,以及一資料線驅動器4。於該有效顯示區1,複數個閘極線(gate lines)以及複數個輸出線(output lines)彼此絕緣相交,以定義出複數個光感測區10。於第一圖中,該些閘極線係以G(i)標示,而輸出線則以out(j)標示,其中i與j表示索引號(index),且i與j的總數不必然相等。於每一該光感測區10內,一光感測裝置11與相鄰之兩閘極線與一輸出線電性相連,並輸出一讀取電壓。Please refer to the first figure, which is a system block diagram of a display according to an embodiment of the invention. The display comprises an effective display area 1, a gate line driver 2, an output controller 3, and a data line driver 4. In the effective display area 1, a plurality of gate lines and a plurality of output lines are insulated from each other to define a plurality of light sensing regions 10. In the first figure, the gate lines are indicated by G(i), and the output lines are indicated by out(j), where i and j represent index numbers, and the total number of i and j is not necessarily equal. . In each of the light sensing regions 10, a light sensing device 11 is electrically connected to an adjacent two gate lines and an output line, and outputs a read voltage.
其中,該閘極線驅動器2將複數個閘極脈衝(pulses)依序施加於該些閘極線G(i),除了用於開啟每一畫素(pixel)中的電晶體,同時也用以觸發每一該光感測區內之光感測裝置11,對於畫素容後敘述;而輸出控制器3用以擷取每一該光感測裝置11之讀取電壓,並進行所需之訊號處理或轉換。該資料線驅動器4則控制複數個資料線data,用於寫入影像資料到複數個畫素單元(顯示於第二A圖以及第二B圖)。Wherein, the gate line driver 2 sequentially applies a plurality of gate pulses to the gate lines G(i), except for turning on the transistors in each pixel, and also using To trigger the light sensing device 11 in each of the light sensing regions, for the pixel to be described later; and the output controller 3 is configured to capture the read voltage of each of the light sensing devices 11 and perform the required Signal processing or conversion. The data line driver 4 controls a plurality of data lines data for writing image data to a plurality of pixel units (displayed in the second A picture and the second B picture).
請參閱第二A圖,其顯示本發明之光感測裝置的第一實施例示意圖。本發明之每一該光感測裝置11與相鄰之一第一閘極線G(n)、一第二閘極線G(n+1)以及一輸出線out電性相連;該光感測裝置11包括:一光感測元件P、一儲存電容Cst、一第一薄膜電晶體T1以及一第二薄膜電晶體T2。其中,該光感測元件P之一端與該第二閘極線G(n+1)電性相連,另一端則定義一節點X;該光感測元件P可為任一將光訊號轉換為電性訊號之元件,例如光感應二極體(photodiodes)或光電薄膜電晶體(photo thin film transistors)。如第二A圖所顯示之第一實施例,該光感測元件P可為一光電薄膜電晶體,其閘極與源/汲極之其一與該第二掃描線G(n+1)電性相連,而另一源/汲極用以定義該節點X。以下說明以及申請專利範圍有多處使用「源/汲極」,其與「源極或者汲極」係為同義。Please refer to FIG. 2A, which shows a schematic view of a first embodiment of the light sensing device of the present invention. Each of the light sensing devices 11 of the present invention is electrically connected to an adjacent first gate line G(n), a second gate line G(n+1), and an output line out; The measuring device 11 includes a photo sensing element P, a storage capacitor Cst, a first thin film transistor T1 and a second thin film transistor T2. Wherein, one end of the photo sensing element P is electrically connected to the second gate line G(n+1), and the other end defines a node X; the photo sensing element P can convert any optical signal into A component of an electrical signal, such as a photodiodes or photo thin film transistors. As shown in the first embodiment shown in FIG. 2A, the photo sensing element P can be a phototransistor transistor, one of its gate and source/drain and the second scan line G(n+1). Electrically connected, and another source/drain is used to define the node X. The following descriptions and the scope of application for patents use "source/bungee" in many places, which is synonymous with "source or bungee".
該儲存電容Cst的一端與上述節點X電性相連,彼端則電性連接於一共同(common)電壓Vcom。該第一薄膜電晶體T1的閘極與該節點X電性相連,其源/汲極之一與該第一閘極線G(n)電性相連;該節點X之電壓準位用以控制該第一薄膜電晶體T1之開關(on or off),於開啟第一薄膜電晶體T1的情況下,並決定一導通電壓之大小;該第二薄膜電晶體T2的閘極與該第一閘極線G(n)電性相連,其源/汲極之一則與該輸出線out電性相連,該第二薄膜電晶體T2之另一源/汲極則與第一薄膜電晶體T1的另一源/汲極電性相連。One end of the storage capacitor Cst is electrically connected to the node X, and the other end is electrically connected to a common voltage Vcom. The gate of the first thin film transistor T1 is electrically connected to the node X, and one of the source/drain electrodes is electrically connected to the first gate line G(n); the voltage level of the node X is used for controlling The on or off of the first thin film transistor T1 determines the magnitude of a turn-on voltage when the first thin film transistor T1 is turned on; the gate of the second thin film transistor T2 and the first gate The pole line G(n) is electrically connected, one of the source/drain electrodes is electrically connected to the output line out, and the other source/drain of the second thin film transistor T2 is different from the first thin film transistor T1. A source/drain is electrically connected.
第二A圖亦同時顯示一個子畫素(sub-pixel)單元12,該子畫素單元12包含於一個畫素單元內,每一該畫素單元包括紅、綠以及藍三個子畫素單元,第二A圖僅例示其中的一個子畫素單元12,且本發明並不為所顯示之子畫素單元12電路所限。繪製子畫素單元12於圖式中之目的,僅顯示本發明之光感測裝置11之電路訊號可與畫素單元共同使用,因此無須增設其它額外電路訊號,俾使本發明之電路架構較為簡單。The second A picture also shows a sub-pixel unit 12, the sub-pixel unit 12 is contained in a pixel unit, and each of the pixel units includes three sub-pixel units of red, green and blue. The second A diagram illustrates only one of the sub-pixel units 12, and the present invention is not limited to the sub-pixel unit 12 circuit shown. For the purpose of drawing the sub-pixel unit 12, only the circuit signal of the light sensing device 11 of the present invention can be used together with the pixel unit, so that no additional circuit signals need to be added, so that the circuit structure of the present invention is relatively simple.
請參見第二B圖,其顯示本發明之光感測裝置的第二實施例,其中資料線data與輸出線out係為共用,致使光感測裝置與畫素單元加以整合,電路架構更為簡化。Please refer to FIG. 2B, which shows a second embodiment of the light sensing device of the present invention, wherein the data line data and the output line out are shared, so that the light sensing device and the pixel unit are integrated, and the circuit structure is more simplify.
第三圖顯示本發明之顯示器一實施例之層疊結構圖,為簡化說明,該結構圖僅作部分顯示並簡化其結構,且未依照比例繪製。如第三圖,本發明之顯示器包括一第一基板41、一第二基板42、以及設置於第一基板41以及第二基板42之間的一液晶層43。該第一基板41相對第二基板42之一側形成一遮光層44,該遮光層44覆蓋處可定義一非透光區。於一實施例中,該遮光層44可為黑矩陣(black matrix)。第三圖顯示本發明之有效顯示區1係設置於該第二基板42,且於該有效顯示區1定義該些光感測區10,每一該光感測區10可設置一該光感測裝置11。為方便顯示,第三圖僅顯示其中一光感測裝置11形成於第二基板42。The third drawing shows a laminated structure of an embodiment of the display of the present invention. For the sake of simplicity, the structural drawing is only partially shown and simplified, and is not drawn to scale. As shown in the third figure, the display of the present invention includes a first substrate 41, a second substrate 42, and a liquid crystal layer 43 disposed between the first substrate 41 and the second substrate 42. The first substrate 41 forms a light shielding layer 44 on one side of the second substrate 42. The light shielding layer 44 defines a non-light transmitting region. In an embodiment, the light shielding layer 44 can be a black matrix. The third display shows that the effective display area 1 of the present invention is disposed on the second substrate 42 and defines the light sensing areas 10 in the effective display area 1. Each of the light sensing areas 10 can set the light perception. Measuring device 11. For convenience of display, the third figure only shows that one of the light sensing devices 11 is formed on the second substrate 42.
該遮光層44對應光感測元件P處,設置有一開口45;當外界物體46遮蔽該開口45,將改變該光感測元件P的一光照度(illuminance),該光感測元件P根據該光照度,將光訊號轉換為一漏電流之電氣訊號,而該光照度係與該漏電流大小呈正相關。The light shielding layer 44 corresponds to the light sensing element P, and is provided with an opening 45. When the external object 46 shields the opening 45, an illuminance of the light sensing element P is changed, and the light sensing element P is based on the illuminance. The electrical signal is converted into an electrical signal of leakage current, and the illuminance is positively correlated with the magnitude of the leakage current.
第四圖為本發明之電壓訊號時序圖(voltage timing diagram),其顯示複數個預設週期30。每一該預設週期30包括一重置期間(reset period)31、一積分期間(integration period)32、以及一讀取期間(read out period)33。該預設週期30可為一畫面(frame)時間,例如1/60 s。The fourth figure is a voltage timing diagram of the present invention, which displays a plurality of preset periods 30. Each of the preset periods 30 includes a reset period 31, an integration period 32, and a read out period 33. The preset period 30 can be a frame time, for example 1/60 s.
請配合參閱第二A圖或第二B圖,於第四圖所顯示之該重置期間31,該閘極線驅動器2(請見第一圖)施加一脈衝(pulse)於該第二閘極線G(n+1),使第二閘極線G(n+1)成為致能(enable ),藉以導通與該第二閘極線G(n+1)電性相連之光感測元件P,並將該光感測元件P彼端之節點X電壓重置為一第一電壓準位。Please refer to the second A diagram or the second B diagram. In the reset period 31 shown in the fourth figure, the gate line driver 2 (see the first figure) applies a pulse to the second gate. The pole line G(n+1) enables the second gate line G(n+1) to be enabled, thereby conducting light sensing electrically connected to the second gate line G(n+1) The component P resets the node X voltage of the photo sensing element P to a first voltage level.
接著,於該積分期間,與該光感測元件P相鄰之第一閘極線G(n)以及第二閘極線G(n+1)皆為非致能(disable),儲存於該儲存電容Cst之電荷經由光感測元件P持續釋出,自該儲存電容Cst釋出之電荷量與該光感測元件P之光照度相關,如該光感測元件P為外界物體46所遮蔽,將降低光照度,因此造成光感測元件P的漏電流減小,儲存電容Cst將節點X放電幅度亦隨之減少。請參見第五A圖,其顯示節點X於高光照度與低光照度之兩光照度下的放電幅度差異。Then, during the integration period, the first gate line G(n) and the second gate line G(n+1) adjacent to the photo sensing element P are all disabled, and are stored in the The charge of the storage capacitor Cst is continuously released via the photo-sensing element P, and the amount of charge released from the storage capacitor Cst is related to the illuminance of the photo-sensing element P, such as the photo-sensing element P being shielded by the external object 46. The illuminance will be lowered, thus causing the leakage current of the photo sensing element P to decrease, and the storage capacitance Cst will also reduce the discharge amplitude of the node X. Please refer to Figure 5A, which shows the difference in discharge amplitude of node X at two illuminances of high light and low light.
請再度回到第四圖,接著於該讀取期間33,該閘極線驅動器2施加另一脈衝(pulse)於該第一閘極線G(n),使第一閘極線G(n)成為致能,而開啟第二薄膜電晶體T2。因第一薄膜電晶體T1的源/汲極之一與第一閘極線G(n)電性相連,而其閘極與節點X電性相連,故該第一薄膜電晶體T1亦被開啟。Please return to the fourth figure again. Then during the read period 33, the gate line driver 2 applies another pulse to the first gate line G(n) to make the first gate line G(n). ) becomes enabled, and the second thin film transistor T2 is turned on. Since one of the source/drain of the first thin film transistor T1 is electrically connected to the first gate line G(n), and the gate is electrically connected to the node X, the first thin film transistor T1 is also turned on. .
於整個預設週期30內,根據光感測元件P之光照度,該節點X持續放電,至該預設週期30的最末(亦即讀取期間33的最末),經由光感測元件P,將節點X放電至一第二電壓準位。該第二電壓準位控制第一薄膜電晶體T1的導通程度,使第一薄膜電晶體T1與第二薄膜電晶體電性相連端具有一導通電壓。進一步而言,第二電壓準位與導通電壓呈現一函數相關,如第二電壓準位較大,第一薄膜電晶體T1的導通程度亦將增加,因此存在一較大之導通電壓。經由開啟之第二薄膜電晶體T2,該導通電壓將決定第二薄膜電晶體T2之一讀取電壓,並輸出該讀取電壓至該輸出線。During the entire preset period 30, the node X continues to discharge according to the illuminance of the light sensing element P, to the end of the preset period 30 (ie, the last of the reading period 33) via the light sensing element P. , the node X is discharged to a second voltage level. The second voltage level controls the conduction degree of the first thin film transistor T1 such that the first thin film transistor T1 and the second thin film transistor have an on-voltage. Further, the second voltage level is related to the on-voltage. If the second voltage level is larger, the conduction degree of the first thin film transistor T1 is also increased, so that a large on-voltage is present. The turn-on voltage determines a read voltage of one of the second thin film transistors T2 via the turned-on second thin film transistor T2, and outputs the read voltage to the output line.
在一個預設週期30內(或是一個畫面時間內),所有的該些閘極線G(i)依序被掃描,得到光感測區10內光感測裝置11的所有讀取電壓。因讀取電壓和導通電壓相關,而導通電壓決定於節點X之第二電壓準位。更進一步,第二電壓準位相關於光感測元件P的光照度,光照度則由外界物體46遮蔽光感測元件P的程度所決定。第五B圖顯示讀取電壓於高光照度與低光照度之電壓幅度差異。於此,擷取所有光感測區10的讀取電壓,可分析出外界物體46之瞬時影像以及其座標位置,如再配合顯示器之畫素單元或是其他裝置與元件,可產生彩度或是其他功能,於此不贅述。During a preset period 30 (or a picture time), all of the gate lines G(i) are sequentially scanned to obtain all of the read voltages of the light sensing device 11 in the light sensing region 10. Because the read voltage is related to the turn-on voltage, the turn-on voltage is determined by the second voltage level of the node X. Further, the second voltage level is related to the illuminance of the light sensing element P, and the illuminance is determined by the extent to which the external object 46 shields the light sensing element P. Figure 5B shows the difference in voltage amplitude between the high and low illumination levels of the read voltage. In this case, the reading voltage of all the light sensing regions 10 can be extracted, and the instantaneous image of the external object 46 and its coordinate position can be analyzed. If the pixel unit of the display or other devices and components are used together, the chroma can be generated or It is another function and will not be described here.
本發明之光感測裝置,使用畫素單元之原電路架構,無須額外增加其他控制訊號,因此電路架構簡化、佈局簡單。且藉由該預設週期30之調整,可使節點X的放電幅度增加,俾使輸出的讀取電壓差異增大,因此有利於光照度之分析比較。The light sensing device of the present invention uses the original circuit structure of the pixel unit, and does not need to add other control signals, so the circuit structure is simplified and the layout is simple. Moreover, by adjusting the preset period 30, the discharge amplitude of the node X can be increased, and the difference in the read voltage of the output is increased, thereby facilitating analysis and comparison of the illuminance.
本發明以一實施例揭露如上文,然其並非用以限定者。任何熟習此項技藝者,在不脫離本發明之精神以及範圍內,當可進行各種實質上相等的變動以及潤飾,因此本發明之保護範圍當以後附之申請專利範圍所界定者為準。The present invention has been disclosed in an embodiment as described above, but it is not intended to be limiting. Any and all such modifications and variations can be made without departing from the spirit and scope of the invention, and the scope of the invention is defined by the scope of the appended claims.
1‧‧‧有效顯示區
2‧‧‧閘極線驅動器
3‧‧‧輸出控制器
4‧‧‧資料線驅動器
10‧‧‧光感測區
11‧‧‧光感測裝置
T1‧‧‧第一薄膜電晶體
T2‧‧‧第二薄膜電晶體
P‧‧‧光感測元件
Cst‧‧‧儲存電容
X‧‧‧節點
12‧‧‧子畫素單元
data‧‧‧資料線
G(n)‧‧‧第一閘極線
G(n+1)‧‧‧第二閘極線
out‧‧‧輸出線
Vcom‧‧‧共同電壓
30‧‧‧預設週期
31‧‧‧重置期間
32‧‧‧積分期間
33‧‧‧讀取期間
41‧‧‧第一基板
42‧‧‧第二基板
43‧‧‧液晶層
44‧‧‧遮光層
45‧‧‧開口
46‧‧‧外界物體
1‧‧‧effective display area
2‧‧ ‧ gate line driver
3‧‧‧Output controller
4‧‧‧Data line driver
10‧‧‧Light Sensing Area
11‧‧‧Light sensing device
T1‧‧‧ first film transistor
T2‧‧‧second film transistor
P‧‧‧Light sensing components
Cst‧‧‧ storage capacitor
X‧‧‧ node
12‧‧‧Subpixel Element
Data‧‧‧ data line
G(n)‧‧‧first gate line
G(n+1)‧‧‧second gate line
Out‧‧‧output line
Vcom‧‧‧Common voltage
30‧‧‧Preset period
31‧‧‧Reset period
32‧‧ During the period
33‧‧‧Reading period
41‧‧‧First substrate
42‧‧‧second substrate
43‧‧‧Liquid layer
44‧‧‧Lighting layer
45‧‧‧ openings
46‧‧‧ Foreign objects
為使本發明之上述和其他目的、特徵、優點與實施例可容易了解,所附圖式之詳細說明如下:The above and other objects, features, advantages and embodiments of the present invention will become more readily understood.
第一圖為根據本發明一實施例之顯示器的系統方塊圖;The first figure is a system block diagram of a display according to an embodiment of the invention;
第二A圖顯示本發明之光感測裝置的第一實施例示意圖;2A is a schematic view showing a first embodiment of the light sensing device of the present invention;
第二B圖顯示本發明之光感測裝置的第二實施例示意圖;2B is a schematic view showing a second embodiment of the light sensing device of the present invention;
第三圖為本發明之顯示器一實施例之剖面層疊結構簡化圖;3 is a simplified diagram of a cross-sectional laminated structure of an embodiment of the display of the present invention;
第四圖顯示本發明之電壓訊號時序圖;The fourth figure shows the timing diagram of the voltage signal of the present invention;
第五A圖顯示節點X於高光照度與低光照度之兩光照度下的放電幅度差異;以及Figure 5A shows the difference in discharge amplitude of node X at two illuminances of high light and low light;
第五B圖顯示讀取電壓於高光照度與低光照度之電壓幅度差異。Figure 5B shows the difference in voltage amplitude between the high and low illumination levels of the read voltage.
11‧‧‧光感測裝置 11‧‧‧Light sensing device
T1‧‧‧第一薄膜電晶體 T1‧‧‧ first film transistor
T2‧‧‧第二薄膜電晶體 T2‧‧‧second film transistor
P‧‧‧光感測元件 P‧‧‧Light sensing components
Cst‧‧‧儲存電容 Cst‧‧‧ storage capacitor
X‧‧‧節點 X‧‧‧ node
12‧‧‧子畫素單元 12‧‧‧Subpixel Element
data‧‧‧資料線 Data‧‧‧ data line
G(n)‧‧‧第一閘極線 G(n)‧‧‧first gate line
G(n+1)‧‧‧第二閘極線 G(n+1)‧‧‧second gate line
out‧‧‧輸出線 Out‧‧‧output line
Vcom‧‧‧共同電壓 Vcom‧‧‧Common voltage
Claims (7)
一光感測元件,可將一節點電壓重置為一第一電壓準位;
一儲存電容,與該節點電性相連;該儲存電容並根據該光感測元件之一光照度於一預設週期內,經由該光感測元件將該節點放電至一第二電壓準位;
一第一薄膜電晶體,該第二電壓準位控制該第一薄膜電晶體的一導通電壓;
一第二薄膜電晶體,與該第一薄膜電晶體電性相連;
其中,該第二薄膜電晶體於一讀取期間內開啟,並根據第一薄膜電晶體之該導通電壓,輸出一讀取電壓。A light sensing device comprising:
a light sensing component capable of resetting a node voltage to a first voltage level;
a storage capacitor electrically connected to the node; the storage capacitor discharges the node to a second voltage level via the light sensing element according to an illuminance of the light sensing element in a predetermined period;
a first thin film transistor, the second voltage level controlling a turn-on voltage of the first thin film transistor;
a second thin film transistor electrically connected to the first thin film transistor;
The second thin film transistor is turned on during a reading period, and outputs a read voltage according to the turn-on voltage of the first thin film transistor.
一光電薄膜電晶體,該光電薄膜電晶體的一閘極與一源/汲極之其一與一第二閘極線電性相連,另一源/汲極則與一節點電性相連;
一儲存電容,該儲存電容一端與該節點電性相連,另一端則電性連接一共同電壓;
一第一薄膜電晶體,該第一薄膜電晶體的閘極與該節點電性相連,且其源/汲極之一則與一第一閘極線電性相連;
一第二薄膜電晶體,該第二薄膜電晶體的閘極與該第一閘極線電性相連,其源/汲極之其一與一輸出線電性相連,且該第二薄膜電晶體的另一源/汲極則與該第一薄膜電晶體的另一源/汲極電性相連;
其中,該光電薄膜電晶體於一重置期間,使該第二閘極線為致能,並將該節點的電壓重置為一第一電壓準位;該儲存電容係根據該光電薄膜電晶體之一光照度於一畫面(frame)時間內,經由該光電薄膜電晶體將該節點放電至一第二電壓準位;並於一讀取期間使該第一閘極線為致能,以開啟該第二薄膜電晶體,俾使該第二薄膜電晶體可根據該第一薄膜電晶體閘極之第二電壓準位,輸出一讀取電壓。A light sensing device comprising:
a photoelectric thin film transistor, a gate of the photoelectric thin film transistor is electrically connected to one of the source/drain electrodes and a second gate line, and the other source/drain is electrically connected to a node;
a storage capacitor, one end of the storage capacitor is electrically connected to the node, and the other end is electrically connected to a common voltage;
a first thin film transistor, the gate of the first thin film transistor is electrically connected to the node, and one of the source/drain electrodes is electrically connected to a first gate line;
a second thin film transistor, the gate of the second thin film transistor is electrically connected to the first gate line, and one of the source/drain electrodes is electrically connected to an output line, and the second thin film transistor is electrically connected Another source/drain is electrically connected to another source/drain of the first thin film transistor;
Wherein, the photo-transistor transistor enables the second gate line to be enabled during a reset period, and resets the voltage of the node to a first voltage level; the storage capacitor is based on the photo-transistor transistor Illuminating the node to a second voltage level via the photo-transistor transistor during one frame time; and enabling the first gate line during a read period to turn on the The second thin film transistor is configured to output a read voltage according to the second voltage level of the first thin film transistor gate.
一第一基板以及一第二基板,該第一基板與該第二基板對應而設置;
一液晶層,設置於第一基板與第二基板之間;
一有效顯示區,設置於該第二基板;於該有效顯示區定義複數個光感測區,每一該光感測區可設置一光感測裝置;該光感測裝置包括:
一光感測元件,可將一節點電壓重置為一第一電壓準位;
一儲存電容,與該節點電性相連;該儲存電容並根據該光感測元件之一光照度於一預設週期內,經由該光感測元件將該節點放電至一第二電壓準位;
一第一薄膜電晶體,該第二電壓準位控制該第一薄膜電晶體的一導通電壓;
一第二薄膜電晶體,與該第一薄膜電晶體電性相連;
其中,該第二薄膜電晶體於一讀取期間內開啟,並根據第一薄膜電晶體之該導通電壓,輸出一讀取電壓。A display comprising:
a first substrate and a second substrate, the first substrate being disposed corresponding to the second substrate;
a liquid crystal layer disposed between the first substrate and the second substrate;
An effective display area is disposed on the second substrate; a plurality of light sensing areas are defined in the effective display area, and each of the light sensing areas can be provided with a light sensing device; the light sensing device includes:
a light sensing component capable of resetting a node voltage to a first voltage level;
a storage capacitor electrically connected to the node; the storage capacitor discharges the node to a second voltage level via the light sensing element according to an illuminance of the light sensing element in a predetermined period;
a first thin film transistor, the second voltage level controlling a turn-on voltage of the first thin film transistor;
a second thin film transistor electrically connected to the first thin film transistor;
The second thin film transistor is turned on during a reading period, and outputs a read voltage according to the turn-on voltage of the first thin film transistor.
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TWI571618B (en) * | 2016-05-17 | 2017-02-21 | 國立交通大學 | Uv light sensing element and method thereof |
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