TWI415375B - Modulation method and device of reduce duty cycle for a resonant converter - Google Patents

Abstract

A modulation method and device of reduce duty cycle for a resonant converter is disclosed. The device includes a frequency range and modulation determine unit, a duty cycle determine unit, a phase width modulation unit and a dead time generation unit. The dead time generation unit sets a fix dead time between a first driving signal and a second driving signal. A node of the first driving signal and the second driving signal is fixed on the dead time closely and to adjust other node of the first driving signal and the second driving signal. The present invention could be regulating the light load output voltage and having zero voltage switched of single switch for reducing switch loss.

Description

Method and device for reducing duty cycle modulation of resonant converter

The invention is a method and a device for reducing the duty cycle modulation, in particular to a method and a device for reducing the duty cycle of a resonant converter.

The series resonant converter (SRC) is a kind of switching voltage modulation to achieve output voltage regulation. When the load becomes light load or even no load, the switching frequency will increase at this time, that is, the switching frequency must be very high to stabilize the output voltage, so that the controller needs to provide a very wide range of switching frequency and powerful drive. Capability, the most important power components such as switch and magnetic components are a major test, so it is necessary to develop a matching control strategy to solve the problem of light load switching frequency is too high.

Therefore, in order to solve the problem of light load switching frequency being too high, some manufacturers have proposed a control method that can solve the light load switching frequency too high, and the controller limits the switching frequency range of the switching switch. When the load is light enough to exceed the set maximum frequency upper limit to stabilize the output voltage, the controller adjusts the control from the original variable-frequency duty cycle, and enters the modulation control of the fixed-frequency reduction duty cycle, that is, the switching frequency is locked at the set The highest frequency, using the reduced duty cycle to stabilize the output voltage. The first A picture shows the variable frequency duty cycle modulation control. The heavier the load, the lower the switching frequency, the lighter the load, the higher the switching frequency. Once the set maximum frequency is exceeded, the first B picture is cut into the duty cycle. Modulation control, the switching frequency is no longer improved, the upper bridge switch drive signal 10 and the positive and negative edges of the lower bridge switch drive signal 12 are reduced inwardly, and the modulation mechanism of the duty cycle reduction is achieved, so that the output voltage is not fixed by the switching frequency. The load changes.

The above control strategy can achieve light load output voltage regulation within the allowable switching frequency range, but it is harmful to the efficiency of the light load overall converter and does not have the advantage of zero voltage. It is obvious from the second figure that when the duty cycle is reduced, the dead time of the upper and lower bridge switch drive signals will increase, and the smaller the duty cycle, the larger the increase. Once it increases to more than a quarter of the resonance period, the original energy The parasitic capacitance of the switch that is drawn away by the resonant inductor is reversely charged by the release of the resonant inductor, thus losing the advantage of zero voltage switching, and increasing the switching loss, so that the overall converter efficiency degradation is predictable.

It is an object of the present invention to provide a method and apparatus for reducing duty cycle modulation of a resonant converter for achieving output voltage regulation of a light load, and having single-switch zero voltage switching to reduce switching loss of the switch.

In order to achieve the above object, the present invention provides a device for reducing the duty cycle of a resonant converter, comprising a frequency range and modulation determining unit, a duty cycle determining unit, a pulse width modulation unit and a dead time generating unit. .

The frequency range and modulation decision unit receives a switching frequency signal to determine whether the apparatus of the present invention operates in a variable frequency duty cycle modulation or a fixed frequency reduction duty cycle modulation. The responsibility cycle determining unit receives the frequency control command and a compensation frequency signal, and generates a frequency conversion reference voltage value and a frequency conversion voltage difference value according to the frequency control command, and generates a reduced reference voltage value by using the compensation frequency signal and Reduce the voltage difference value. The pulse width modulation unit has a first comparison amplifier and a second comparison amplifier. The first comparison amplifier compares a sawtooth wave with the variable reference voltage value or the reduced reference voltage value to generate a first driving signal, and the second comparison The amplifier compares the sawtooth wave with the variable voltage difference value or the reduced voltage difference value to generate a second driving signal. The dead time generating unit is configured to set a fixed dead time and is disposed between the first driving signal and the second driving signal. When the dead time is fixed, the pulse width modulation unit operates at a certain frequency reduction responsibility. During the period, the first driving signal and the second driving signal are fixed at one end of the fixed dead time, and the other driving signal and the other end of the second driving signal are adjusted.

In order to achieve the above object, the present invention provides a method for reducing duty cycle modulation of a resonant converter, comprising: receiving a switching frequency signal and a compensation frequency signal; generating a reduced reference voltage value and the switching frequency according to the compensation frequency signal; The signal obtains a maximum voltage value of a sawtooth wave; operates between the maximum voltage value of the sawtooth wave and the reduced reference voltage value to generate a reduced voltage difference value; sets a fixed dead time; compares the reduced reference voltage value And the sawtooth wave to obtain a first driving signal; comparing the sawtooth wave and the reduced voltage difference value to obtain a second driving signal; and respectively adjusting the first driving signal and the second driving signal relative to the fixed dead field The width of one end of time.

For a better understanding of the features and technical aspects of the present invention, reference should be made to the accompanying drawings.

Please refer to FIG. 2A, which is a block diagram of the apparatus for reducing the duty cycle of the resonant converter of the present invention. The device of the present invention comprises a variable frequency feedback compensation unit 22, a duty cycle feedback compensation unit 24, a frequency range and modulation decision unit 26, a duty cycle decision unit 28, a pulse width modulation unit 30, and a dead time. The generating unit 32 and a driving circuit unit 34 are provided.

The variable frequency feedback compensation unit 22 receives an output voltage sampling signal 20 generated by the resonant converter, and then outputs a switching frequency signal via the variable frequency feedback compensation unit 22.

The duty cycle feedback compensation unit 24 receives the switching frequency signal to output a compensation frequency signal.

The frequency range and modulation decision unit 26 receives the switching frequency signal output by the variable frequency feedback compensation unit 22 to determine whether the apparatus of the present invention operates in a variable frequency duty cycle modulation or a fixed frequency reduction duty cycle modulation.

The duty cycle determining unit 28 receives the frequency control command and the compensation frequency signal output by the duty cycle feedback compensation unit 24, and generates a frequency conversion reference voltage value and a frequency conversion voltage difference value according to the frequency control command, and adjusts the reference by compensating the frequency signal. The voltage value and the voltage difference value generate a reduced reference voltage value and a reduced voltage difference value.

The pulse width modulation unit 30 has a first comparison amplifier and a second comparison amplifier. The first comparison amplifier compares the sawtooth wave and the frequency conversion reference voltage value or the reduced reference voltage value to generate a first driving signal, and the second comparison amplifier compares the sawing teeth. The variable voltage difference value or the reduced voltage difference value is affected to generate a second driving signal.

The dead time generating unit 32 is configured to set a fixed dead time and is disposed between the first driving signal and the second driving signal. When the pulse width modulation unit operates in a certain frequency reduction duty cycle during the fixed dead time The first driving signal and the second driving signal are fixed at one end of the fixed dead time, and the other ends of the first driving signal and the second driving signal are adjusted.

The driving circuit unit 34 respectively receives the first driving signal and the second driving signal with a fixed dead time to respectively drive a first switch and a second switch.

In order to more clearly understand the internal circuit of each unit and its operation described in the above FIG. 2A, the internal circuit of each unit and the operation thereof described in the second A diagram will be described in detail below with reference to the second B diagram and the second C diagram. .

Please refer to the second A figure to the second C picture at the same time. The second B picture and the second C picture are circuit diagrams of the device for reducing the duty cycle of the resonant converter of the present invention.

As shown in the second B diagram, the inside of the variable frequency feedback compensation unit 22 is composed of a comparison amplifier 220 and a plurality of resistors R1, R2, Rref1 and Rref2. The variable frequency feedback compensation unit 22 receives an output voltage Vo generated by the resonant converter, and the output voltage Vo is divided by the resistor Rvo1 and the resistor Rvo2 to obtain a first divided voltage value at a point between the resistor Rvo1 and the resistor Rvo2. After the obtained first divided voltage value is further calculated by dividing the resistor R1 and the resistor R2, a second divided voltage value is obtained, and the second divided voltage value is transmitted to a first end of the comparison amplifier 220. The resistor Rvo1 may be a variable resistor.

The comparison amplifier 220 compares the second divided voltage value of the first end with a reference voltage value obtained by a second end, where the reference voltage value is obtained by dividing the resistor Rref1 and the resistor Rref2, and the resistor Rref1 And the resistor Rref2 is a resistor having the same characteristics (for example, the same resistance value). Assuming that the resistor Rref1 and the resistor Rref2 are connected to a voltage of 5Vref, the reference voltage value is a voltage of 2.5V, and then the comparison amplifier 220 outputs a result according to the comparison result. Switch the frequency signal Aout.

The switching frequency signal Aout outputted by the variable frequency feedback compensation unit 22 is simultaneously transmitted to the duty cycle feedback compensation unit 24 and the frequency range and modulation decision unit 26. The duty cycle feedback compensation unit 24 receives the switching frequency signal Aout and calculates the voltage division via the resistor R5 and the resistor R6 to obtain a divided voltage value, and transmits the divided voltage value to a first end of the comparison amplifier 240.

The comparison amplifier 240 compares the divided voltage value of the first end with a reference voltage value obtained by a second end, where the reference voltage value is obtained by dividing the resistor R3 and the resistor R4, and the resistor R4 can be A variable resistor. It is assumed that the resistor R3 and the resistor R4 are connected to a voltage of 5Vref, and the reference voltage value is obtained through the adjustment of the resistor R4. Here, the reference voltage value can be set to a voltage of 1.5V, and then the comparison amplifier 240 outputs the compensation frequency signal Bout according to the comparison result. The comparison amplifier 240 is connected to a Zener diode ZD1, and the maximum withstand voltage of the Zener diode ZD1 is assumed to be 3.3V, so the maximum voltage value of the compensation frequency signal Bout will be limited to 3.3V.

The compensation frequency signal Bout is directly transmitted to a first end of the comparison amplifier 280 in the duty cycle determining unit 28, and the comparison amplifier 280 uses the voltage value of the compensation frequency signal Bout at the first end and the reference voltage value obtained at the second terminal. In comparison, the reference voltage value here is obtained by dividing the resistor R7 and the resistor R8. Assuming that the resistor R7 and the resistor R8 are connected to a voltage of 5 Vref, a reference voltage value of 1.38 V can be obtained through the resistor R7 and the resistor R8, and then the comparison amplifier 280 outputs the value to the point b according to the comparison result. According to the above description, when the duty cycle is reduced, the voltage value of the compensation frequency signal Bout will vary between 1.38V and 3.3V.

When the voltage dividing voltage value of the first end of the comparison amplifier 240 is greater than the reference voltage value of the second terminal, then the device for reducing the duty cycle of the resonant converter of the present invention operates in the variable frequency duty cycle modulation, and the compensation frequency The signal Bout is less than 1.38V, and the transistors Q3 and Q4 in the duty cycle determining unit 28 are turned on and the transistor Q5 is turned off to obtain a variable reference voltage value Vref. At this time, the variable frequency reference voltage value Vref is equal to 1.38V. The duty cycle of the first driving signal and the second driving signal can be fixed.

The frequency range and comparison amplifier 260 of the modulation decision unit 26 compares the switching frequency signal Aout output by the variable frequency feedback compensation unit 22 with the reference voltage value Aout(min) of the duty cycle feedback compensation unit 24, at the output of the comparison amplifier 260. The point can obtain an output voltage value, and the d point of the output of the comparison amplifier 260 can obtain a fixed voltage value through the resistor R22 and the resistor R23. Here, the fixed voltage value is assumed to be 3.7V, because the voltage value of the switching frequency signal Aout is greater than the reference voltage. The value Aout(min), so the frequency range and the transistor Q2 of the modulation decision unit 26 are turned off, the FB voltage is output from the RT pin of the sawtooth generator IC 262, and the FB voltage generates a fixed current FB via a resistor RT ( This is the current that determines the lowest switching frequency. The FB voltage is generated through the resistor R24 to control the current iFB of the switching frequency. The current iFB enters the output of the variable frequency feedback compensation unit 22 via the transistor Q1 that is turned on. The sawtooth generator IC 262 also provides the voltage 5Vref required by the device for reducing the duty cycle modulation of the resonant converter of the present invention.

When the load is lighter, the higher the output voltage Vo and the lower the switching frequency signal Aout, the larger the current iFB, and the higher the sawtooth wave Vsaw frequency generated by the CT pin of the sawtooth generator IC 262, the first driving signal And the switching frequency of the second driving signal is higher, and the duty cycle control of the frequency conversion can be achieved. Conversely, the heavier the load, the lower the switching frequency. When the switching frequency is so low that the switching frequency signal Aout is greater than 3.7V, the transistor Q1 is turned off, and the switching frequency is connected to the RT pin of the sawtooth generator IC 262. The resistance RT determines that the so-called lock is at the lowest switching frequency.

As shown in the second C diagram, the sawtooth wave Vsaw generated by the CT pin of the sawtooth generator IC 262 is transmitted to the first comparison amplifier 300 and the second comparison amplifier 302 of the pulse width modulation unit 30, at the first comparison amplifier 300. A first terminal receives the voltage of the sawtooth wave Vsaw and a second terminal of the first comparison amplifier 300 receives the variable frequency reference voltage value Vref output by the duty cycle determining unit 28, and the first comparison amplifier 300 compares the voltage value of the sawtooth wave Vsaw and The reference voltage value Vref is converted to generate a first voltage value, and the first voltage value is transmitted to the dead time generating unit 32 to generate a first driving signal having a fixed dead time. The dead time generating unit 32 is composed of an RC charging circuit and an XOR logic gate 322.

A first end of the second comparison amplifier 302 receives the voltage of the sawtooth wave Vsaw and a second end of the second comparison amplifier 302 receives a variable voltage difference value, and the second comparison amplifier 302 compares the voltage value of the sawtooth wave Vsaw with the difference of the frequency conversion voltage. A value (Vp-Vref) is generated to generate a second voltage value, and the second voltage value is transmitted to the dead time generating unit 32 to generate a second driving signal having a fixed dead time.

As shown in the second B diagram, the variable voltage difference value is generated by a voltage difference generator 36, which may be a subtractor. The voltage difference generator 36 internally includes a first comparison amplifier 360 and a second comparison amplifier 362. The first comparison amplifier 360 can be a buffer circuit. A first end of the first comparison amplifier 360 receives the voltage value of the sawtooth wave Vsaw. An amplitude voltage Vp is generated, and a second end of the first comparison amplifier 360 is directly connected to the output terminal, so that the output voltage of the first comparison amplifier 360 is equal to the amplitude voltage Vp, and the second comparison amplifier 362 can be a differential here. An amplifier, such that a first end of the second comparison amplifier 362 receives the amplitude voltage Vp output by the first comparison amplifier 360, and a second end of the second comparison amplifier 362 receives the variable frequency reference voltage output by the duty cycle determining unit 28. The value Vref is then obtained by the operation of the second comparison amplifier 362, that is, the variable voltage difference value, that is, the amplitude difference value Vp minus the voltage difference value (Vp-Vref) of the variable frequency reference voltage value Vref.

The first driving signal and the second driving signal obtained are transmitted to the driving circuit unit 34 to drive a first switch and a second switch, respectively.

Please refer to the third figure, which is a waveform diagram of the device of the present invention operating on the variable frequency duty cycle control. In a complete cycle of the sawtooth wave, when the sawtooth wave rising phase exceeds the variable frequency reference voltage value and is at the critical point of point a of the fixed dead time time 320, the waveform of the second driving signal is high potential drop to a low potential, and the first The driving signal is low at this time. When the sawtooth rising phase exceeds the variable reference voltage value and the b-th limit of the fixed dead time 320 is reached, the waveform of the second driving signal is low, and the first driving signal is The low potential rises to a high potential. When the sawtooth wave falling phase exceeds the variable frequency reference voltage value and is at the critical point of point a of the fixed dead time time 320, the waveform of the second driving signal is low, and the first driving signal is lowered from the high potential to the low potential, when the sawtooth When the value of the variable frequency reference voltage is exceeded in the wave falling phase and the critical point of point b of the fixed dead time time 320 is reached, the waveform of the second driving signal is raised from the low potential to the high potential, and the first driving signal is low. The above-mentioned variable-frequency reference voltage value is obtained by subtracting the voltage difference value (Vp-Vref) of the variable-frequency reference voltage value Vref from the amplitude voltage Vp.

When the load is lighter, the switching frequency signal Aout outputted by the variable frequency feedback compensation unit 22 is smaller than the reference voltage value Aout(min) of the duty cycle feedback compensation unit 24, then the reduction duty cycle of the resonant converter of the present invention is modulated. The device will operate in a fixed frequency reduction duty cycle. The frequency range and modulation decision unit 26 causes the transistor Q1 to be turned off and the transistor Q2 to be turned on because the switching frequency signal Aout is smaller than the reference voltage value Aout(min), and the current iFB flows into the ground through the turned-on transistor Q2. This current FB is determined by the resistor R25, so-called locked at the highest switching frequency. As long as the switching frequency signal Aout is smaller than the reference voltage value Aout(min), the switching frequency of the first switch and the second switch is not affected regardless of the variation of the load.

As shown in the second B diagram, when the switching frequency signal Aout is less than 1.5V, the device of the present invention enters the fixed frequency reduction duty cycle modulation, and the voltage value of the compensation frequency signal Bout will be 1.38V~3.3V. Change between. When the load is lighter, the frequency signal Bout will be higher. On the contrary, the heavier the load, the lower the compensation frequency signal Bout. The voltage value of the compensation frequency signal Bout is transmitted to the first end of the comparison amplifier 280 in the duty cycle determining unit 28, and the transistor Q5 in the duty cycle determining unit 28 is turned on, and the transistor Q3 and the transistor Q4 are turned off, resulting in a reduction. The reference voltage value Vref1 and the reduced reference voltage value Vref1 are equal to the voltage value of the compensation frequency signal Bout because the current iFB is determined by the resistor R25, and the frequency of the sawtooth wave Vsaw generated by the CT pin of the sawtooth wave generator IC 262 at this time. At the highest switching frequency, the voltage difference generator 36 receives the amplitude voltage Vp1 of the sawtooth wave Vsaw at the highest switching frequency, and the amplitude difference generator V generates the amplitude voltage Vp1 of the sawtooth wave Vsaw at the highest switching frequency. The reduced voltage difference value (Vp1 - Vref1) is obtained by subtracting the reduced reference voltage value Vref1 from the amplitude voltage value.

The voltage of the sawtooth wave Vsaw at the highest switching frequency generated by the CT pin of the sawtooth generator IC 262 is transmitted to the first comparison amplifier 300 and the second comparison amplifier 302 of the pulse width modulation unit 30, at the first comparison amplifier 300. The first terminal receives the voltage of the sawtooth wave Vsaw at the highest switching frequency and the second terminal of the first comparison amplifier 300 receives the reduced reference voltage value Vref1 output by the duty cycle determining unit 28, and the first comparison amplifier 300 compares the highest switching frequency. The voltage of the sawtooth wave Vsaw and the reference voltage value Vref1 are reduced to generate a third voltage value, and the third voltage value is transmitted to the dead time generating unit 32 to generate a first driving signal having a fixed dead time.

The first end of the second comparison amplifier 302 receives the voltage of the sawtooth wave Vsaw at the highest switching frequency and the second end of the second comparison amplifier 302 receives a reduced voltage difference value (Vp1-Vref1), and the second comparison amplifier 302 compares the highest switching. The voltage of the sawtooth wave Vsaw at the frequency and the reduced voltage difference value (Vp1 - Vref1) to generate a fourth voltage value, and the fourth voltage value is transmitted to the dead time generating unit 32 to generate a second having a fixed dead time Drive signal.

The first driving signal and the second driving signal obtained as described above are transmitted to the driving circuit unit 34 to drive the first switch and the second switch, respectively.

Please refer to the fourth figure, which is a waveform diagram of the device of the present invention operating in a fixed frequency reduction duty cycle modulation. In a complete cycle of the sawtooth wave, when the sawtooth rising phase exceeds the reduced reference voltage value and is at the critical point of point a of the fixed dead time 320, the waveform of the first driving signal is lowered to a low potential, and the second The drive signal is low. When the sawtooth rising phase is at the b-th limit of the fixed dead time 320, the waveform of the first driving signal is low, and the second driving signal is raised from low to high. The second driving signal is maintained at a high potential until the sawtooth wave exceeds the reduced voltage difference value, and the second driving signal is lowered from the high potential to the low potential (as shown by point c in the figure), and the first driving signal and the second driving signal are at this time. The low potential to the sawtooth wave will continue until the next reduced reference voltage value occurs, and the first driving signal will rise from the low voltage to the high voltage (as shown by the point d in the figure).

As can be seen from the fourth figure, when the apparatus of the present invention operates in a fixed-frequency reduction duty cycle modulation, the width of the fixed dead time 320 is fixed, and the first driving signal is fixed at one end of the fixed dead time 320, that is, At point a in the fourth figure, the other end of the first drive signal is reduced. The same second driving signal is fixed at one end of the fixed dead time 320, that is, point b in the fourth figure, and the other end of the second driving signal is reduced. Through the operation of the fourth figure, the apparatus of the present invention can achieve the control of the fixed frequency reduction duty cycle modulation.

Please refer to the second B diagram, the second C diagram and the fifth diagram at the same time. The fifth diagram is a flowchart of the method for reducing the duty cycle of the resonant converter of the present invention. The device of the present invention receives a switching frequency signal and a compensation frequency signal (S100), and then detects that the resonant converter is currently in a variable duty cycle control state or a reduced duty cycle modulation control state (S102), when detecting The measurement result is that when the resonant converter is in the variable frequency duty cycle control state, the method further includes: generating a frequency conversion reference voltage value according to the compensation frequency signal and switching the frequency signal to obtain a sawtooth voltage value (S104), and transmitting the voltage of the sawtooth wave The operation between the value and the variable reference voltage value generates a variable voltage difference value (S106), sets a fixed dead time (S108), compares the converted reference voltage value and the sawtooth voltage value to obtain a first driving signal (S110) And comparing the variable frequency reference voltage value and the variable frequency voltage difference value to obtain a second driving signal (S112), and outputting the first driving signal and the second driving signal respectively according to the fixed dead time (S114).

When the detection result is that the resonant converter is in the reduced duty cycle modulation control state, the method includes: generating a reduced reference voltage value according to the compensation frequency signal and switching the frequency signal to obtain a maximum voltage value of the sawtooth wave (S116), The operation between the maximum voltage value of the sawtooth wave and the reduced reference voltage value to generate a reduced voltage difference value (S118), setting a fixed dead time (S120), comparing the reduced reference voltage value and the maximum voltage value of the sawtooth wave to obtain a The first driving signal (S122) compares the reduced reference voltage value and the reduced voltage difference value to obtain a second driving signal (S124), and respectively adjusts the width of one end of the first driving signal and the second driving signal with respect to the fixed dead time ( S126).

The device and method of the invention can not only achieve the output voltage regulation of light load, but also have single switch zero voltage switching, reduce switching loss of the switch, and thus have obvious benefits for the efficiency of the light load overall converter. As shown in the third figure, the controller usually works in the variable frequency duty cycle modulation. The heavier the load, the lower the switching frequency, the lighter the load, the higher the switching frequency. Once the set maximum frequency is exceeded, the fourth picture is entered. Frequency reduction minus duty cycle modulation control. At this time, the switching frequency is locked at the set maximum frequency, and the first switch and the second switch can be arbitrarily selected to have zero voltage switching. As shown in the fourth figure, the positive edge of the second driving signal represented by the second switch is fixed, and the negative edge is reduced from the outside to the inside; the negative edge of the first driving signal represented by the first switch is fixed, and the positive edge is from outside to Internal reduction, complete the change mechanism of the reduction of responsibility cycle. As shown in the fourth figure, the fixed dead time of one side will not become larger due to the reduction of the duty cycle, and the switch that will be turned on will still have zero voltage switching, so that not only the light load regulation output voltage does not change with the load. And can significantly improve the efficiency of the overall converter.

The above description is only a preferred embodiment of the present invention, and the scope of the present invention is not limited thereto, and the equivalent technical changes of the present invention and the contents of the drawings are included in the scope of protection of the present invention. Within, combined with Chen Ming.

10. . . Upper bridge switch drive signal

12. . . Lower bridge switch drive signal

14. . . Dead time

20. . . Output voltage sampling signal

twenty two. . . Frequency conversion feedback compensation unit

220, 240, 280. . . Comparison amplifier

twenty four. . . Responsibility cycle feedback compensation unit

26. . . Frequency range and modulation decision unit

260. . . Comparison amplifier

262. . . Sawtooth generator IC

28. . . Accountability cycle decision unit

30. . . Pulse width modulation unit

300. . . First comparison amplifier

302. . . Second comparison amplifier

32. . . Dead time generation unit

320. . . Fixed dead time

322. . . XOR logic gate

34. . . Drive circuit unit

36. . . Voltage difference generator

360. . . First comparison amplifier

362. . . Second comparison amplifier

R1, R2, R3, R4, R5, R6, R7, R8, Rref1, Rref2, R22, R23, R25, Rvo1, Rvo2, RT. . . resistance

Vo. . . The output voltage

Aout. . . Switch frequency signal

Bout. . . Compensation frequency signal

ZD1. . . Zener diode

Q1, Q2, Q3, Q4, Q5. . . Transistor

Vref. . . Frequency conversion reference voltage value

Vref1. . . Reduced reference voltage value

FB. . . Voltage

iFB. . . Control the switching frequency current

Vsaw. . . Sawtooth wave

Vp, Vp1. . . Amplitude voltage

Vp-Vref. . . Variable frequency voltage difference value

Vp1-Vref1. . . Reduced voltage difference value

The first A picture is a schematic diagram of a conventional frequency conversion duty cycle modulation control waveform;

The first B diagram is a schematic diagram of the modulation control waveform of the conventional fixed frequency reduction duty cycle;

The second A diagram is a block diagram of the apparatus for reducing the duty cycle of the resonant converter of the present invention;

The second B diagram and the second C diagram are circuit diagrams of the device for reducing the duty cycle of the resonant converter of the present invention;

The third figure is a waveform diagram of the device of the present invention operating in a variable frequency duty cycle control;

The fourth figure is a waveform diagram of the device of the present invention operating in a fixed frequency reduction duty cycle modulation;

The fifth figure is a flow chart of the method for reducing the duty cycle of the resonant converter of the present invention.

20. . . Output voltage sampling signal

twenty two. . . Frequency conversion feedback compensation unit

twenty four. . . Responsibility cycle feedback compensation unit

26. . . Frequency range and modulation decision unit

28. . . Accountability cycle decision unit

30. . . Pulse width modulation unit

32. . . Dead time generation unit

34. . . Drive circuit unit

Claims (8)

A device for reducing the duty cycle of a resonant converter includes: a frequency range and modulation determining unit receiving a switching frequency signal; and a responsibility period determining unit receiving the switching frequency signal and a compensation frequency signal, And generating a variable reference voltage value and a variable voltage difference value according to the switching frequency signal, and generating a reduced reference voltage value and a reduced voltage difference value by using the compensation frequency signal; a pulse width modulation unit having a a first comparison amplifier and a second comparison amplifier, the first comparison amplifier comparing a sawtooth wave and the variable reference voltage value or the reduced reference voltage value to generate a first driving signal, the second comparing amplifier comparing the sawtooth wave and the frequency conversion The voltage difference value or the voltage difference value is reduced to generate a second driving signal; and a dead time generating unit is configured to set a fixed dead time and is disposed between the first driving signal and the second driving signal, In the fixed dead time, when the pulse width modulation unit operates in a certain frequency reduction duty cycle, A first driving signal and the second driving signal is close to the fixed end fixed dead time domain, while adjusting the other end of the first driving signal and the second driving signal. The apparatus for reducing the duty cycle of the resonant converter according to the first aspect of the patent application, further comprising: a variable frequency feedback compensation unit, configured to receive an output voltage sampling signal generated by the resonant converter to output the Switching the frequency signal; a duty cycle feedback compensation unit receives the switching frequency signal to output the compensation frequency signal; and a driving circuit unit receives the first driving signal having the fixed dead time and the first The second driving signal drives a first switch and a second switch respectively. The apparatus for reducing duty cycle modulation of a resonant converter according to claim 1, wherein the frequency range and the modulation determining unit further comprise a sawtooth generator IC. The device for reducing the duty cycle of the resonant converter according to claim 1, wherein the dead time generating unit is composed of an RC charging circuit and an XOR logic gate. A method for reducing duty cycle modulation of a resonant converter includes the steps of: receiving a switching frequency signal and a compensation frequency signal; generating a reduced reference voltage value and the switching frequency signal to obtain a saw tooth according to the compensation frequency signal The maximum voltage value of the wave; the operation between the maximum voltage value of the sawtooth wave and the reduced reference voltage value to generate a reduced voltage difference value; setting a fixed dead time; comparing the reduced reference voltage value with the sawtooth wave Obtaining a first driving signal; comparing the sawtooth wave and the reduced voltage difference value to obtain a second driving signal; and respectively adjusting widths of one end of the first driving signal and the second driving signal with respect to the fixed dead time. The method for reducing the duty cycle of a resonant converter according to claim 5, wherein the step of receiving a switching frequency signal and a compensation frequency signal further comprises detecting that the resonant converter is currently in a frequency conversion The duty cycle control state or a reduced duty cycle modulation control state. The method for reducing the duty cycle of a resonant converter according to claim 6, wherein the detecting the resonant converter is currently in a variable duty cycle control state or a reduced duty cycle modulation control state. Step, when the detection result is that the resonant converter is in the reduced duty cycle modulation control state, performing the subtraction reference voltage value according to the compensation frequency signal and the switching frequency signal to obtain a maximum voltage value of a sawtooth wave Step, and vice versa, when the detection result is that the resonant converter is in the variable frequency duty cycle control state, the method further includes: generating a frequency conversion reference voltage value and the switching frequency signal according to the compensation frequency signal to obtain a sawtooth voltage value Transmitting a voltage difference between the voltage value of the sawtooth wave and the variable frequency reference voltage value to generate a variable voltage difference value; setting the fixed dead time; comparing the frequency conversion reference voltage value and the voltage value of the sawtooth wave to obtain the first a driving signal; comparing the converted reference voltage value and the variable voltage difference value to obtain the second driving a signal; and outputting the first driving signal and the second driving signal according to the fixed dead time. The method for reducing the duty cycle of a resonant converter according to claim 5 or 7, wherein the fixed dead time is set by an RC charging circuit and an XOR logic gate combination.