TWI408891B - Improved control module for acceleration device and a controlling method thereof - Google Patents

Improved control module for acceleration device and a controlling method thereof Download PDF

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TWI408891B
TWI408891B TW98135561A TW98135561A TWI408891B TW I408891 B TWI408891 B TW I408891B TW 98135561 A TW98135561 A TW 98135561A TW 98135561 A TW98135561 A TW 98135561A TW I408891 B TWI408891 B TW I408891B
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resistor
acceleration
deceleration mechanism
amplifier
unit
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TW98135561A
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Chinese (zh)
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TW201115901A (en
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Choung Wuu Ting
Chun Chin Chen
Chien Man Chen
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Solteam Electronics Co Ltd
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Abstract

The present invention is related to an improved control module for an acceleration device and a method for controlling the improved control module, the improved control module for the acceleration comprises: a feedback unit, the feedback unit is capable of feeding a drive signal outputted to the acceleration device back to an amplifier unit for adjusting output gain of the amplifier unit for supporting the acceleration device. The method for controlling the improved control module comprises the steps of: determining whether the rotation speed of the acceleration device is decreased due to a loading effect, if yes, a amplifier unit increases output gain for decreasing a drive signal voltage value due to the feedback unit; and determining whether the rotation speed of the acceleration device is increased due to loading effect, if yes, the amplifier unit decreases output gain for increasing the drive signal voltage value due to feedback unit.

Description

改良之加減速機構控制模組及其控制方法Improved acceleration and deceleration mechanism control module and control method thereof

本發明係關於一種加減速機構之控制模組,尤指利用負回授之方式,可針對一加減速機構所受到之不同負載效應,而調整該加減速機構轉速之一種改良之加減速機構控制模組及其控制方法。The invention relates to a control module of an acceleration/deceleration mechanism, in particular to an improved acceleration/deceleration mechanism control for adjusting the rotation speed of the acceleration/deceleration mechanism for a different load effect of an acceleration/deceleration mechanism by means of a negative feedback method. Module and its control method.

近年來,電動工具機已成為日常生活當中所不可或缺之工具,不論是欲於牆壁上鑽孔,或者自行組合裝釘木櫃、鞋櫃,電動工具機皆扮演不可或缺之角色。習用之電動工具機係具有一板機鈕,再配合一電子迴路之設計,當使用者於按壓該板機鈕之時,即可透過該電子迴路以控制電動工具機之馬達轉動,然而,習用之電動工具機之電子迴路,大部分皆設計成僅可控制馬達轉動,而少有除了能控制馬達轉動之外,又可同時具備其他功能之設計。In recent years, electric machine tools have become an indispensable tool in daily life. Whether it is to drill holes in walls or to assemble wooden cabinets and shoe cabinets by themselves, electric power tools play an indispensable role. The conventional electric power tool system has a trigger button, and is designed with an electronic circuit. When the user presses the trigger button, the electronic circuit can be used to control the motor rotation of the electric machine tool. However, the conventional use Most of the electronic circuits of the power tool machine are designed to control only the rotation of the motor, and there are few designs that can simultaneously control other functions in addition to controlling the rotation of the motor.

然而,一般人使用電動工具機之時,經常遇到之問題在於電動工具機無法針對所欲鑽穿之不同材料而自動調整馬達之轉速,例如,使用電動工具機對一牆壁進行鑽孔,當使用者於按壓該板機鈕之時,即可透過該電子迴路控制電動工具機之馬達轉動,但是當電動工具機碰觸牆壁之瞬間,電動工具機之馬達即因為承受過大之負載效應而使得其轉速瞬間減弱,相反地,若使用電動工具機對一薄木板進行鑽孔,因為馬達所遭受之負載效應相對的小,而顯得馬達轉速過快,因而浪費了多餘之功率消耗,即浪費了電能。However, when people use electric power tools, the problem often is that the power tool can't automatically adjust the speed of the motor for different materials to be drilled. For example, using a power tool to drill a wall, when using When the trigger of the trigger is pressed, the motor of the electric machine can be controlled to rotate through the electronic circuit, but when the electric machine touches the wall, the motor of the electric machine is subjected to an excessive load effect. The speed is instantaneously weakened. Conversely, if a thin wood board is drilled using a power tool, the load on the motor is relatively small, and the motor speed is too fast, thus wasting unnecessary power consumption, that is, wasting power. .

因此,本案之發明人有鑑於上述控制電子工具機馬達之電子迴路係具有諸多之缺點,故極力加以研究創作,終於研發完成本發明之改良之加減速機構控制模組及其控制方法。Therefore, the inventor of the present invention has in view of the above-mentioned advantages in controlling the electronic circuit of the electronic machine motor, and has made great efforts to research and create, and finally developed an improved acceleration and deceleration mechanism control module and a control method thereof according to the present invention.

本發明之主要目的,在於提供一種改良之加減速機構控制模組,可藉由負回授之方式,而自動調整加減速機構之加速/減速,以避免發生加減速機構之轉速不足或過大之情事發生。The main object of the present invention is to provide an improved acceleration/deceleration mechanism control module, which can automatically adjust the acceleration/deceleration of the acceleration/deceleration mechanism by means of negative feedback to avoid the occurrence of insufficient or excessive rotation speed of the acceleration/deceleration mechanism. The situation happened.

本發明之另一目的,在於提供一種改良之加減速機構控制模組之控制方法,該方法係可依照加減速機構所承受之不同負載效應,而自動地調整放大器單元輸出增益之大小,而增加/降低加減速機構之轉速,以維持加減速機構正常之工作狀態。Another object of the present invention is to provide an improved control method for an acceleration/deceleration mechanism control module, which can automatically adjust the output gain of the amplifier unit according to different load effects experienced by the acceleration/deceleration mechanism, thereby increasing / Reduce the speed of the acceleration and deceleration mechanism to maintain the normal working state of the acceleration and deceleration mechanism.

為了完成上述之主要目的,本案之發明人研發完成一種改良之加減速機構控制模組,該改良之加減速機構控制模組包括:一放大器單元,係連接該輸入源以接收並放大該輸入訊號;一脈寬調變單元,係連接於該放大器單元以接收一放大訊號,並執行該放大訊號之脈寬調變;一切換電晶體,係連接於該脈寬調變單元以接收一調變訊號,並輸出一驅動訊號以驅動該加減速機構;一振盪單元,係可產生一振盪波訊號予脈寬調變單元,藉由該振盪單元可調整該調變訊號之頻率;及一回授單元,係連接加減速機構與放大器單元,該回授單元可將輸出於加減速機構之驅動訊號回授至放大器單元,當驅動訊號因加減速機構之負載效應而有所誤差之時,放大器單元即可修正誤差,以維持驅動訊號之恆定。In order to accomplish the above main purpose, the inventor of the present invention has developed an improved acceleration/deceleration mechanism control module. The improved acceleration/deceleration mechanism control module includes an amplifier unit connected to the input source to receive and amplify the input signal. a pulse width modulation unit connected to the amplifier unit for receiving an amplification signal and performing pulse width modulation of the amplification signal; a switching transistor connected to the pulse width modulation unit to receive a modulation And outputting a driving signal to drive the acceleration/deceleration mechanism; an oscillating unit is configured to generate an oscillating wave signal to the pulse width modulation unit, wherein the oscillating unit can adjust the frequency of the modulating signal; and The unit is connected to the acceleration/deceleration mechanism and the amplifier unit, and the feedback unit can feed back the driving signal outputted to the acceleration/deceleration mechanism to the amplifier unit. When the driving signal has an error due to the loading effect of the acceleration/deceleration mechanism, the amplifier unit The error can be corrected to maintain a constant drive signal.

另外,為了完成上述之另一目的,本案之發明人研發完成一種改良之加減速機構控制模組之控制方法,係可依照不同之負載效應,自動調整一改良之加減速機構控制模組之訊號增益,以使得一加減速機構維持正常工作,該方法包括以下步驟:(1)一輸入源輸入一輸入訊號至一放大器單元;(2)該放大器單元接收並處理該輸入訊號;(3)放大器單元之一輸出級電晶體輸出一放大訊號至一脈寬調變單元;(4)一振盪單元產生一振盪波訊號至該脈寬調變單元;(5)脈寬調變單元接收該放大訊號與該振盪波訊號以執行脈寬調變;(6)脈寬調變單元輸出一調變訊號至一切換電晶體;(7)該切換電晶體輸出一驅動訊號以驅動一加減速機構;(8)一回授單元將輸出於該加減速機構之一驅動訊號電壓回授至放大器單元;(9)判斷是否加減速機構因負載效應而轉速減弱,若是則執行步驟(10),若否,則執行步驟(11);(10)放大器單元因該回授單元而自動增加其輸出增益,以降低驅動訊號電壓值,並執行步驟(3);(11)判斷是否加減速機構因負載效應而轉速增強,若是,則執行步驟(12),若否,則執行步驟(13);(12)放大器單元因回授單元而自動降低其輸出增益,以增加驅動訊號電壓值,並執行步驟(3);及(13)切換電晶體持續輸出該驅動訊號以驅動加減速機構。In addition, in order to accomplish the other object described above, the inventor of the present invention developed an improved control method for the acceleration and deceleration mechanism control module, which can automatically adjust the signal of an improved acceleration/deceleration mechanism control module according to different load effects. Gaining, so that an acceleration/deceleration mechanism maintains normal operation, the method includes the following steps: (1) an input source inputs an input signal to an amplifier unit; (2) the amplifier unit receives and processes the input signal; (3) an amplifier One of the output stage transistors outputs an amplification signal to a pulse width modulation unit; (4) an oscillation unit generates an oscillation wave signal to the pulse width modulation unit; (5) the pulse width modulation unit receives the amplification signal And the oscillating wave signal is used to perform pulse width modulation; (6) the pulse width modulation unit outputs a modulation signal to a switching transistor; (7) the switching transistor outputs a driving signal to drive an acceleration/deceleration mechanism; 8) a feedback unit returns a driving signal voltage outputted to the acceleration/deceleration mechanism to the amplifier unit; (9) determining whether the acceleration/deceleration mechanism is weakened due to a load effect, and if so, executing the step ( 10), if not, proceed to step (11); (10) the amplifier unit automatically increases its output gain due to the feedback unit to reduce the drive signal voltage value, and performs step (3); (11) determine whether to add The speed reduction mechanism is increased in speed due to the load effect. If yes, step (12) is performed. If not, step (13) is performed; (12) the amplifier unit automatically reduces its output gain due to the feedback unit to increase the drive signal voltage value. And performing step (3); and (13) switching the transistor to continuously output the driving signal to drive the acceleration/deceleration mechanism.

為了能夠更清楚地描述本發明所提出之一種改良之加減速機構及其控制方法,以下將配合圖示,詳盡說明之。In order to more clearly describe an improved acceleration/deceleration mechanism and a control method thereof according to the present invention, the following will be described in detail with reference to the drawings.

請參閱第一圖,係一種改良之加減速機構控制模組之架構圖,較佳地,該改良之加減速機構控制模組1,係連接於一輸入源2以接收並處理一輸入訊號,以驅動一加減速機構3,其包括:Please refer to the first figure, which is an architectural diagram of an improved acceleration/deceleration mechanism control module. Preferably, the improved acceleration/deceleration mechanism control module 1 is connected to an input source 2 for receiving and processing an input signal. To drive an acceleration and deceleration mechanism 3, which includes:

一放大器單元11,係連接該輸入源2以接收並放大該輸入訊號,請同時參閱第二圖,係該放大器單元之電路結構圖,於本實施例之中,放大器單元11包括:一運算放大器111,係具有一放大器正輸入端1112、一放大器負輸入端1111、及一放大器輸出端1113,如第二圖所示,輸入訊號透過一訊號輸入端Vin而輸入於放大器單元11後,該運算放大器111即可對輸入訊號執行訊號放大,並輸出一放大訊號;一第二可變電阻RV2,係連接於該放大器正輸入端1112,藉由調整該第二可變電阻RV2之電阻值,可調整由該放大器輸出端1113所輸出之該放大訊號之低準位;一二極體D1,係串接於第二可變電阻RV2,該二極體D1之作用在於穩定電壓準位,以防止當外接之一工作電壓Vcc產生飄動之時,而對放大訊號之低準位之值造成影響;二個放大電阻R1、R3,其中,一放大電阻R3係連接該放大器負輸入端1111與放大器輸出端1113,另一放大電阻R1則連接於放大器負輸入端1111,且,該二放大電阻為串聯,放大電阻係可協助運算放大器111執行該輸入訊號之放大;一第一可變電阻RV1,係連接於放大電阻R1,藉由調整該第一可變電阻RV1之電阻值,係可調整驅動該加減速機構3之一驅動訊號之功率,以增加或降低對於加減速機構3之驅動力;一穩壓電容C5,係連接第一可變電阻RV1與放大電阻R1,該穩壓電容C5係用於穩定放大訊號之高準位;一輸出級電晶體Q5,係連接於放大器輸出端1113,以作為放大器單元11之輸出級,該輸出級電晶體Q5係透過一訊號輸出端Vout以輸出放大訊號;一輸出級電阻R7,係串接於輸出級電晶體Q5,以作為輸出級電晶體Q5與接地端之耦合電阻;及一回授電阻R2,係連接放大器負輸入端1111,透過該回授電阻R2可將輸出於加減速機構3之驅動訊號回授至放大器負輸入端1111;一脈寬調變單元12,係連接於該放大器單元11以接收該放大訊號,並執行放大訊號之脈寬調變;一切換電晶體14,係連接於該脈寬調變單元12以接收一調變訊號,並輸出該驅動訊號以驅動該加減速機構3;一振盪單元13,係連接放大器單元11與脈寬調變單元12,該振盪單元13可產生一振盪波訊號至脈寬調變單元12以調整該調變訊號之頻率,請同時參閱第三圖,係振盪單元之電路結構圖,振盪器單元13包括:一比較器131,係具有一比較器正輸入端1312、一比較器負輸入端1311、及一比較器輸出端1313,該比較器131係可執行由該比較器正輸入端1312與該比較器負輸入端1311所輸入訊號之比較;一第一分壓電阻Rt4,該第一分壓電阻Rt4之一端係連接於比較器正輸入端1312,且,其另一端係耦接於外加之一工作電壓,以產生一分壓電阻端壓;一第二分壓電阻Rt3,該第二分壓電阻Rt3之一端係連接於比較器正輸入端1312,其另一端則為接地,以產生該分壓電阻端壓;一正回授電阻Rt2,該正回授電阻Rt2之一端係連接於比較器正輸入端1312,且,其另一端係連接於該比較器輸出端1313,以將比較器輸出端1313之電壓回授至比較器正輸入端1312;一充電電容Ct2,係連接於比較器負輸入端1311,當外加之該工作電壓Vcc於第二分壓電阻Rt3產生分壓電阻端壓Vrt3之時,該充電電容Ct2即開始進行充電;一充電電阻Rt1,係耦接該比較器負輸入端1311與比較器輸出端1313,該充電電阻Rt1之值係可決定充電電容Ct2充電之時間;一緩衝電阻Rt5,係連接於比較器輸出端1313,以作為比較器131與其下一級電路之緩衝介面;一放電電阻Rt6,係連接於充電電容Ct2,調整該放電電阻Rt6之值係可縮短充電電容Ct2之放電時間;及一放電電晶體Q6,係連接於放電電阻Rt6,當充電電容Ct2執行放電之時,該放電電晶體Q6將被導通以有效地縮短充電電容Ct2之放電時間;及一回授單元15,係以負回授之方式,連接該加減速機構3與該放大器單元11,該回授單元15可將輸出於加減速機構3之該驅動訊號回授至放大器單元11,因此,當加減速機構3受到不同之負載效應而導致其轉速減弱/增強,放大器單元11即可自動調整其輸出增益,以增加/降低加減速機構3之轉速,使其維持正常工作狀態。請同時參閱第四圖,係回授單元之電路結構圖,回授單元15包括:一保護電阻Rs1,該保護電阻Rs1透過一驅動訊號端dri而連接加減速機構3與該切換電晶體14,以減少切換電晶體14於切換開關期間所衍生之開關切換損失及電晶體溫度上升之現象;一保護電容Cs1,係連接該保護電阻Rs1,該保護電容Cs1搭配保護電阻Rs1可減少切換電晶體14於切換開關期間所衍生之開關切換損失及電晶體溫度上升之現象;一濾波電阻Rf2,係連接保護電阻Rs1與保護電容Cs1,以將保護電阻Rs1與保護電容Cs1所讀出之驅動訊號執行濾波之動作;及一濾波電容Cf2,係連接於該濾波電阻Rf2,且透過一回授端VFB而與放大器單元11連接,該濾波電容Cf2可接收驅動訊號並配合濾波電阻Rf2於執行驅動訊號之濾波後,透過該回授端VFB將一驅動訊號電壓Vdri(第四圖中未標示驅動訊號電壓)回授至放大器單元11。An amplifier unit 11 is connected to the input source 2 to receive and amplify the input signal. Please refer to the second figure, which is a circuit structure diagram of the amplifier unit. In this embodiment, the amplifier unit 11 includes: an operational amplifier. 111, having an amplifier positive input terminal 1112, an amplifier negative input terminal 1111, and an amplifier output terminal 1113. As shown in the second figure, the input signal is input to the amplifier unit 11 through a signal input terminal Vin, and the operation is performed. The amplifier 111 can perform signal amplification on the input signal and output an amplified signal; a second variable resistor RV2 is connected to the positive input terminal 1112 of the amplifier, and the resistance value of the second variable resistor RV2 can be adjusted. Adjusting the low level of the amplified signal outputted by the output end of the amplifier 1113; a diode D1 is connected in series with the second variable resistor RV2, and the role of the diode D1 is to stabilize the voltage level to prevent When one of the external working voltages Vcc is fluttering, it affects the value of the low level of the amplified signal; two amplification resistors R1, R3, wherein an amplification resistor R3 is connected to the amplifier The negative input terminal 1111 and the amplifier output terminal 1113, the other amplification resistor R1 is connected to the negative input terminal 1111 of the amplifier, and the two amplification resistors are connected in series, and the amplification resistor can assist the operational amplifier 111 to perform amplification of the input signal; A variable resistor RV1 is connected to the amplification resistor R1. By adjusting the resistance value of the first variable resistor RV1, the power of driving the driving signal of the acceleration/deceleration mechanism 3 can be adjusted to increase or decrease the acceleration/deceleration. The driving force of the mechanism 3; a voltage stabilizing capacitor C5 is connected to the first variable resistor RV1 and the amplifying resistor R1, the stabilizing capacitor C5 is used to stabilize the high level of the amplified signal; an output stage transistor Q5 is connected At the output end of the amplifier 1113, as the output stage of the amplifier unit 11, the output stage transistor Q5 is outputted through a signal output terminal Vout to output an amplification signal; an output stage resistor R7 is connected in series to the output stage transistor Q5 to The coupling resistance of the output stage transistor Q5 and the ground terminal; and a feedback resistor R2 are connected to the negative input terminal 1111 of the amplifier, and the driving signal outputted to the acceleration/deceleration mechanism 3 can be transmitted through the feedback resistor R2. Returning to the negative input terminal 1111 of the amplifier; a pulse width modulation unit 12 is connected to the amplifier unit 11 to receive the amplified signal, and performs pulse width modulation of the amplified signal; a switching transistor 14 is connected to the The pulse width modulation unit 12 receives a modulation signal and outputs the driving signal to drive the acceleration/deceleration mechanism 3; an oscillation unit 13 is connected to the amplifier unit 11 and the pulse width modulation unit 12, and the oscillation unit 13 can generate An oscillating wave signal is sent to the pulse width modulation unit 12 to adjust the frequency of the modulating signal. Please refer to the third figure, which is a circuit structure diagram of the oscillating unit. The oscillator unit 13 includes a comparator 131 having a comparison. The positive input terminal 1312, a comparator negative input terminal 1311, and a comparator output terminal 1313, the comparator 131 can perform a comparison between the comparator positive input terminal 1312 and the comparator negative input terminal 1311. a first voltage dividing resistor Rt4, one end of the first voltage dividing resistor Rt4 is connected to the comparator positive input terminal 1312, and the other end of the first voltage dividing resistor Rt4 is coupled to an applied operating voltage to generate a voltage dividing resistor end Pressure a voltage dividing resistor Rt3, one end of the second voltage dividing resistor Rt3 is connected to the comparator positive input terminal 1312, and the other end is grounded to generate the voltage dividing resistor terminal voltage; a positive feedback resistor Rt2, the positive return One end of the resistor Rt2 is connected to the comparator positive input terminal 1312, and the other end thereof is connected to the comparator output terminal 1313 to return the voltage of the comparator output terminal 1313 to the comparator positive input terminal 1312; The charging capacitor Ct2 is connected to the comparator negative input terminal 1311. When the operating voltage Vcc is applied to the second voltage dividing resistor Rt3 to generate the voltage dividing resistor terminal voltage Vrt3, the charging capacitor Ct2 starts to be charged; Rt1 is coupled to the comparator negative input terminal 1311 and the comparator output terminal 1313. The value of the charging resistor Rt1 determines the charging time of the charging capacitor Ct2. A buffering resistor Rt5 is connected to the comparator output terminal 1313 to As a buffer interface of the comparator 131 and its next-stage circuit; a discharge resistor Rt6 is connected to the charging capacitor Ct2, and the value of the discharge resistor Rt6 is adjusted to shorten the discharge time of the charging capacitor Ct2; and a discharge transistor Q6 is Connected to the discharge resistor Rt6, when the charging capacitor Ct2 performs discharge, the discharge transistor Q6 will be turned on to effectively shorten the discharge time of the charging capacitor Ct2; and a feedback unit 15 is connected in a negative feedback manner. The acceleration/deceleration mechanism 3 and the amplifier unit 11 can feed back the driving signal outputted to the acceleration/deceleration mechanism 3 to the amplifier unit 11. Therefore, when the acceleration/deceleration mechanism 3 is subjected to different loading effects, When the speed is weakened/enhanced, the amplifier unit 11 can automatically adjust its output gain to increase/decrease the speed of the acceleration/deceleration mechanism 3 to maintain its normal operating state. Please also refer to the fourth figure, which is a circuit structure diagram of the feedback unit. The feedback unit 15 includes: a protection resistor Rs1 connected to the acceleration/deceleration mechanism 3 and the switching transistor 14 through a driving signal terminal dri. The switch switching loss and the temperature rise of the transistor which are generated during the switching of the switching transistor 14 are reduced; a protection capacitor Cs1 is connected to the protection resistor Rs1, and the protection capacitor Cs1 is combined with the protection resistor Rs1 to reduce the switching transistor 14 The switch switching loss and the rise of the transistor temperature during the switching process; a filter resistor Rf2 is connected to the protection resistor Rs1 and the protection capacitor Cs1 to perform filtering of the drive signal read by the protection resistor Rs1 and the protection capacitor Cs1 And a filter capacitor Cf2 is connected to the filter resistor Rf2, and is connected to the amplifier unit 11 through a feedback terminal VFB. The filter capacitor Cf2 can receive the driving signal and cooperate with the filter resistor Rf2 to perform driving signal filtering. Then, a driving signal voltage Vdri (the driving signal voltage not shown in the fourth figure) is fed back to the amplifier unit 11 through the feedback terminal VFB. .

請再同時參閱第二圖與第四圖,於本實施例之中,該運算放大器111、該二放大電阻(R1、R3)、該回授電阻R2、及該第二可變電阻RV2係構成一反向加法電路,依照該反向加法電路之特性,若改變該訊號輸入端Vin與該回授端VFB上所具有之電壓值,將影響於放大器輸出端1113之輸出電壓。本實施例係透過負回授之方式,將該驅動訊號電壓Vdri透過回授端VFB而回授至該放大器單元11,藉由負回授與該反向加法電路之特性,以達成自動地調整該加減速機構3之轉速。當加減速機構3尚未被驅動時,該回授端VFB上即具有驅動訊號電壓Vdri之初始值,隨著加減速機構3被驅動而增加其轉速及扭力,驅動訊號電壓Vdri會隨著下降,稱之為一第一驅動訊號電壓值,若回授端VFB所回傳驅動訊號電壓之值係大於/小於該第一驅動訊號電壓值,則表示加減速機構3受到負載效應而導致其轉速減弱/增加;此時,由運算放大器111、二放大電阻(R1、R3)、回授電阻R2、與第二可變電阻RV2所構成之反向加法電路,將因為其透過回授端VFB所接收到驅動訊號電壓之值大於/小於第一驅動訊號電壓值,而造成了放大器輸出端1113之輸出電壓降低/增加,然後,藉由該輸出級電晶體Q5與該輸出級電阻R7之作用,於該訊號輸出端Vout所輸出之該放大訊號之電壓值,將隨之增加/降低,即,增加/降低了對於加減速機構3之驅動能力,使加減速機構3之轉速增加/降低,而使得加減速機3構於受到負載效應之情況下,仍可維持正常之工作狀態。Referring to the second and fourth figures, in the embodiment, the operational amplifier 111, the two amplification resistors (R1, R3), the feedback resistor R2, and the second variable resistor RV2 are configured. A reverse addition circuit, according to the characteristics of the reverse addition circuit, if the voltage value of the signal input terminal Vin and the feedback terminal VFB is changed, the output voltage of the amplifier output terminal 1113 is affected. In this embodiment, the driving signal voltage Vdri is fed back to the amplifier unit 11 through the feedback terminal VFB through a negative feedback mode, and the characteristics of the reverse adding circuit are negatively fed back to achieve automatic adjustment. The rotation speed of the acceleration/deceleration mechanism 3. When the acceleration/deceleration mechanism 3 has not been driven, the feedback terminal VFB has an initial value of the driving signal voltage Vdri. As the acceleration/deceleration mechanism 3 is driven to increase its rotational speed and torque, the driving signal voltage Vdri decreases. It is called a first driving signal voltage value. If the value of the driving signal voltage returned by the feedback terminal VFB is greater than/less than the value of the first driving signal voltage, it indicates that the acceleration/deceleration mechanism 3 is subjected to the load effect and the rotation speed is weakened. / increase; at this time, the inverse addition circuit composed of the operational amplifier 111, the two amplification resistors (R1, R3), the feedback resistor R2, and the second variable resistor RV2 will be received by the feedback terminal VFB. The value of the driving signal voltage is greater than/less than the value of the first driving signal voltage, causing the output voltage of the amplifier output terminal 1113 to decrease/increase, and then, by the output stage transistor Q5 and the output stage resistor R7, The voltage value of the amplified signal outputted by the signal output terminal Vout will increase/decrease accordingly, that is, increase/decrease the driving ability of the acceleration/deceleration mechanism 3, and increase/decrease the rotational speed of the acceleration/deceleration mechanism 3, Therefore, the acceleration/deceleration machine 3 can maintain a normal working state under the load effect.

如上述該改良之加減速機構控制模組1,於其實施例之中,該加減速機構3為一馬達,因此,當該馬達受到不同負載效應而使其轉速及扭力增加/降低之時,該回授單元15則透過負回授,將該驅動訊號電壓回授至該放大器單元11,藉由負回授之特性,放大器單元11會自動調整對馬達之驅動力,而使得馬達之轉速及扭力降低/增加,以維持馬達正常之工作狀態。另外,該切換電晶體14係可使用一雙載子接面電晶體(BJT)、一閘極絕緣雙極性電晶體(IGBT)、或者一金屬氧化半導體場效電晶體(MOSFET),較佳地,於本實施例之中,係使用高功率較之該金屬氧化半導體場效電晶體(MOSFET);且,該放電電晶體Q6係可使用一雙載子接面電晶體(BJT)、一閘極絕緣雙極性電晶體(IGBT)、或者一金屬氧化半導體場效電晶體(MOSFET),較佳地,於本實施例之中,係使用雙載子接面電晶體(BJT)。In the above-described modified acceleration/deceleration mechanism control module 1, in the embodiment, the acceleration/deceleration mechanism 3 is a motor. Therefore, when the motor is subjected to different load effects, the rotation speed and the torque are increased/decreased. The feedback unit 15 transmits the driving signal voltage to the amplifier unit 11 through negative feedback, and the amplifier unit 11 automatically adjusts the driving force to the motor by the negative feedback characteristic, so that the motor speed and Torque is reduced/increased to maintain normal motor operation. In addition, the switching transistor 14 can use a double carrier junction transistor (BJT), a gate insulated bipolar transistor (IGBT), or a metal oxide semiconductor field effect transistor (MOSFET), preferably. In this embodiment, a high power is used compared to the metal oxide semiconductor field effect transistor (MOSFET); and the discharge transistor Q6 can use a double carrier junction transistor (BJT), a gate A very insulated bipolar transistor (IGBT) or a metal oxide semiconductor field effect transistor (MOSFET) is preferably used in this embodiment as a bipolar junction transistor (BJT).

上述清楚地揭露了該改良之加減速機構控制模組各電路單元之功能,另外,請同時參閱第五A圖與第五B圖,係一種改良之加減速機構控制模組之控制方法流程圖,該改良之加減速機構控制模組之控制方法,係可依照不同之負載效應,自動調整該改良之加減速機構控制模組之訊號增益,其主要步驟包括:The above clearly discloses the functions of the circuit units of the improved acceleration/deceleration mechanism control module. In addition, please refer to the fifth A diagram and the fifth B diagram at the same time, which is a flowchart of a control method for the improved acceleration/deceleration mechanism control module. The improved control method of the acceleration/deceleration mechanism control module can automatically adjust the signal gain of the improved acceleration/deceleration mechanism control module according to different load effects, and the main steps include:

首先,執行步驟(601),該輸入源2輸入該輸入訊號至該放大器單元11;接著,執行步驟(602),放大器單元11接收並處理輸入訊號;然後,執行步驟(603),放大器單元11之該輸出級電晶體Q5輸出該放大訊號至該脈寬調變單元12;接著,執行步驟(604),該振盪單元13產生該振盪波訊號至脈寬調變單元12;然後,執行步驟(605),脈寬調變單元12接收放大訊號與振盪波訊號以執行脈寬調變;接續步驟(605)之後,則執行步驟(606),脈寬調變單元12輸出該調變訊號至該切換電晶體14;接著,執行步驟(607),切換電晶體14輸出該驅動訊號以驅動該加減速機構3;然後,執行步驟(608),該回授單元15將輸出於加減速機構3之該驅動訊號電壓回授至放大器單元11;接著,執行步驟(609),判斷是否加減速機構3因負載效應而轉速減弱,若是加減速機構3確實因為負載效應而導致功率減弱,則自動執行步驟(610),放大器單元11因該回授單元而自動增加其輸出增益,以降低驅動訊號電壓值,並自動執行步驟(603);若否,則執行步驟(611),判斷是否加減速機構3因負載效應而轉速增強,若是,則自動執行步驟(612),放大器單元11因回授單元而自動降低其輸出增益,以增加驅動訊號電壓值,並自動執行步驟(603);若否,則執行步驟(613)切換電晶體持續輸出該驅動訊號以驅動加減速機構。必須補充說明的是,於步驟(610)與步驟(612)之中,放大器單元11能夠自動增加/降低其輸出增益以降低/增加驅動訊號電壓值之原因,係因為於放大器單元11之中,該運算放大器111、該二放大電阻(R1、R3)、該回授電阻R2、與該第二可變電阻RV2所構成之該反向加法電路,其與該輸出級電晶體Q5與該輸出級電阻R7配合使用之結果,係屬於電路特性之自然結果,因此,對於步驟(610)與步驟(612)不再多加描述其詳細步驟。First, step (601) is performed, the input source 2 inputs the input signal to the amplifier unit 11; then, in step (602), the amplifier unit 11 receives and processes the input signal; then, performs step (603), the amplifier unit 11 The output stage transistor Q5 outputs the amplification signal to the pulse width modulation unit 12; then, performing step (604), the oscillation unit 13 generates the oscillation wave signal to the pulse width modulation unit 12; 605), the pulse width modulation unit 12 receives the amplification signal and the oscillation wave signal to perform pulse width modulation; after the step (605), the step (606) is performed, and the pulse width modulation unit 12 outputs the modulation signal to the Switching the transistor 14; then, performing step (607), the switching transistor 14 outputs the driving signal to drive the acceleration/deceleration mechanism 3; then, performing step (608), the feedback unit 15 is outputted to the acceleration/deceleration mechanism 3 The driving signal voltage is fed back to the amplifier unit 11; then, step (609) is executed to determine whether the acceleration/deceleration mechanism 3 is decelerated due to the load effect, and if the acceleration/deceleration mechanism 3 is actually weakened due to the load effect, then Step (610), the amplifier unit 11 automatically increases its output gain due to the feedback unit to reduce the driving signal voltage value, and automatically performs step (603); if not, performs step (611) to determine whether to accelerate or decelerate The mechanism 3 increases the rotational speed due to the load effect. If yes, the step (612) is automatically performed, and the amplifier unit 11 automatically reduces the output gain due to the feedback unit to increase the drive signal voltage value, and automatically performs the step (603); Then, the step (613) is performed to switch the transistor to continuously output the driving signal to drive the acceleration/deceleration mechanism. It should be added that, in the steps (610) and (612), the amplifier unit 11 can automatically increase/decrease its output gain to reduce/increase the value of the driving signal voltage, because in the amplifier unit 11, The operational amplifier 111, the two amplification resistors (R1, R3), the feedback resistor R2, the reverse addition circuit formed by the second variable resistor RV2, and the output stage transistor Q5 and the output stage The result of the use of resistor R7 is a natural consequence of the circuit characteristics. Therefore, the detailed steps of step (610) and step (612) will not be described.

上述清楚地揭露了該改良之加減速機構控制模組之控制方法之主要流程步驟,但為了更加地詳述改良之加減速機構控制模組之控制方法,請參考第六圖,係該步驟(602)之詳細步驟流程圖,其中,步驟(602)更包括以下詳細步驟:The above clearly reveals the main flow steps of the control method of the improved acceleration/deceleration mechanism control module, but in order to further detail the control method of the improved acceleration/deceleration mechanism control module, please refer to the sixth figure, which is the step ( 602) Detailed step flow chart, wherein step (602) further comprises the following detailed steps:

首先,必須先執行步驟(6021),該訊號輸入端Vin接收該輸入訊號;接著,執行步驟(6022),該運算放大器111搭配該放大電阻R1、R3以執行訊號放大;然後,執行步驟(6023),調整該第二可變電阻RV2之電阻值以決定放大訊號之低準位;以及執行步驟(6024),運算放大器111輸出放大訊號至該輸出級電晶體Q5,並繼續執行下一個主要步驟,即步驟(603)。First, the step (6021) must be performed first, the signal input terminal Vin receives the input signal; then, the step (6022) is performed, the operational amplifier 111 is matched with the amplification resistors R1 and R3 to perform signal amplification; and then, the step (6023) is performed. Adjusting the resistance value of the second variable resistor RV2 to determine the low level of the amplification signal; and performing the step (6024), the operational amplifier 111 outputs the amplification signal to the output stage transistor Q5, and proceeds to the next main step , step (603).

另外,請接著參考第七圖及第三圖,係該步驟(604)之詳細步驟流程圖,其中,步驟(604)更包括以下詳細步驟:In addition, please refer to the seventh and third figures, which are detailed step flowcharts of the step (604), wherein the step (604) further includes the following detailed steps:

首先,執行步驟(6041),外加該工作電壓Vcc至該第一分壓電阻Rt4;接著,執行步驟(6042),產生該分壓電阻端壓Vrt3;然後,執行步驟(6043),該充電電容Ct2執行充電並產生該電容端壓Vct2;接續著步驟(6043),然後,執行步驟(6044),判斷是否電容端壓Vct2等於分壓電阻端壓Vrt3,若是電容端壓Vct2等於分壓電阻端壓Vrt3,則執行步驟(6045),該放電電晶體導通Q6以加速充電電容Ct2放電,若否,則重覆執行步驟(6043),接續著步驟(6045)之後,係執行步驟(6046),充電電容Ct2執行放電並產生電容端壓Vct2;然後,再執行步驟(6047),判斷是否電容端壓Vct2等於分壓電阻端壓Vrt3之負值,若是電容端壓Vct2等於分壓電阻端壓Vrt3之負值,則自動執行步驟(6048),該比較器131輸出週期性之該振盪波訊號至該脈寬調變單元12,並繼續執行下一個主要步驟,即步驟(605),若否,則再重覆執行步驟(6046)。First, the step (6041) is performed, the working voltage Vcc is applied to the first voltage dividing resistor Rt4; then, the step (6042) is performed to generate the voltage dividing resistor terminal voltage Vrt3; then, the step (6043) is performed, the charging capacitor is performed. Ct2 performs charging and generates the capacitor terminal voltage Vct2; following the step (6043), and then performing step (6044) to determine whether the capacitor terminal voltage Vct2 is equal to the voltage dividing resistor terminal voltage Vrt3, and if the capacitor terminal voltage Vct2 is equal to the voltage dividing resistor terminal Pressing Vrt3, step (6045) is performed, the discharge transistor turns on Q6 to accelerate the discharge of the charging capacitor Ct2, and if not, repeats the step (6043), and after the step (6045), the step (6046) is performed, charging The capacitor Ct2 performs discharge and generates a capacitor terminal voltage Vct2; then, step (6047) is performed to determine whether the capacitor terminal voltage Vct2 is equal to the negative value of the voltage divider resistor terminal voltage Vrt3, and if the capacitor terminal voltage Vct2 is equal to the voltage divider resistor terminal voltage Vrt3 If the value is negative, the step (6048) is automatically performed, and the comparator 131 outputs the periodically oscillating wave signal to the pulse width modulation unit 12, and continues to perform the next main step, step (605), and if not, Repeat the steps (6 046).

另外,請接著繼續參考第八圖及第四圖,係該步驟(608)之詳細步驟流程圖,其中,步驟(608)更包括以下詳細步驟:In addition, please continue to refer to the eighth and fourth figures, which is a detailed step flow chart of the step (608), wherein the step (608) further includes the following detailed steps:

首先,先執行步驟(6081),透過該保護電阻Rs1與該保護電容Cs1將加減速機構3上之該驅動信號讀出;接著,步驟(6082),透過該濾波電阻Rf2與該濾波電容Cf2以對該驅動訊號電壓執行濾波;以及執行步驟(6083),透過該回授電阻R2將驅動訊號電壓回授至放大器單元,並繼續執行下一個主要步驟,即步驟(609)。First, the step (6081) is performed first, and the driving signal on the acceleration/deceleration mechanism 3 is read out through the protection resistor Rs1 and the protection capacitor Cs1. Then, in step (6082), the filter resistor Rf2 and the filter capacitor Cf2 are transmitted through the filter resistor Cf2. Performing filtering on the driving signal voltage; and performing step (6083), feeding back the driving signal voltage to the amplifier unit through the feedback resistor R2, and continuing to perform the next main step, step (609).

如此,藉由上述該改良之加減速機構控制模組之控制方法,該改良之加減速機構控制模組1即可針對該加減速機構3於受到不同負載效應之情況下,藉由該回授單元15將驅動訊號電壓回授至該放大器單元11,藉由放大器單元11內部電路之特性,放大器單元11會自動地調整其輸出增益,而調整加減速機構3之轉速以及扭力。Thus, with the improved control method of the acceleration/deceleration mechanism control module, the improved acceleration/deceleration mechanism control module 1 can be used for the feedback operation of the acceleration/deceleration mechanism 3 under different load effects. The unit 15 feeds back the driving signal voltage to the amplifier unit 11. By the characteristics of the internal circuit of the amplifier unit 11, the amplifier unit 11 automatically adjusts its output gain, and adjusts the rotational speed and torque of the acceleration/deceleration mechanism 3.

本發明之一種改良的加減速機構控制模組及其控制方法,已藉由上述之較佳實施例而完整地說明,因此,綜合上述,本發明具有下列之優點:An improved acceleration/deceleration mechanism control module and a control method thereof according to the present invention have been fully described by the above-described preferred embodiments. Therefore, in summary, the present invention has the following advantages:

該改良之加減速機構控制模組係具有一回授單元,該回授單元利用負回授之方式,將驅動訊號電壓回授至放大器單元,而使得大器單元可依照驅動訊號電壓之值,而調整提輸出增益,以自動控制該加減速機構之加速及減速,以避免發生轉速/扭力不足或過大之情事發生。The improved acceleration/deceleration mechanism control module has a feedback unit that uses a negative feedback method to feed back the driving signal voltage to the amplifier unit, so that the large unit can follow the value of the driving signal voltage. The output gain is adjusted to automatically control the acceleration and deceleration of the acceleration/deceleration mechanism to avoid the occurrence of insufficient speed/torque or excessive torque.

該改良之加減速機構之控制方法係可依照加減速機構所承受之不同負載效應,透過負回授與放大器單元內部電路之特性,而自動地調整放大器單元之輸出增益大小,而增加/降低加減速機構之轉速與扭力,以維持驅動加減速機構正常之工作狀態。The improved acceleration/deceleration mechanism control method can automatically adjust the output gain of the amplifier unit according to the different load effects of the acceleration/deceleration mechanism, and the characteristics of the internal circuit of the amplifier unit, and increase/decrease. The speed and torque of the speed reduction mechanism to maintain the normal working state of the drive acceleration/deceleration mechanism.

上述之詳細說明係針對本發明可行實施例之具體說明,惟該實施例並非用以限制本發明之專利範圍,凡未脫離本發明技藝精神所為之等效實施或變更,均應包含於本案之專利範圍中。The detailed description of the present invention is intended to be illustrative of the preferred embodiments of the present invention, and is not intended to limit the scope of the invention. In the scope of patents.

1...改良之加減速構控制模組1. . . Improved acceleration and deceleration control module

11...放大器單元(amplifier unit)11. . . Amplifier unit

111...運算放大器(OPA)111. . . Operational Amplifier (OPA)

1111...放大器負輸入端1111. . . Amplifier negative input

1112...放大器正輸入端1112. . . Amplifier positive input

1113...放大器輸出端1113. . . Amplifier output

12...脈寬調變單元(pulse width modulation unit)12. . . Pulse width modulation unit

13...振盪單元(oscillation unit)13. . . Oscillation unit

131...比較器(comparator)131. . . Comparator

1311...比較器負輸入端1311. . . Comparator negative input

1312...比較器正輸入端1312. . . Comparator positive input

1313...比較器輸出端1313. . . Comparator output

14...切換電晶體(switch transistor)14. . . Switch transistor

15...回授單元(feedback unit)15. . . Feedback unit

2...輸入源2. . . Input source

3...加減速機構(acceleration and deceleration apparatus)3. . . Acceleration and deceleration apparatus

601~608...方法步驟601~608. . . Method step

609~613...方法步驟609~613. . . Method step

6021~6024...方法步驟6021~6024. . . Method step

6041~6048...方法步驟6041~6048. . . Method step

6081~6083...方法步驟6081~6083. . . Method step

C5...穩壓電容C5. . . Voltage stabilizing capacitor

Cf2...濾波電容Cf2. . . Filter capacitor

Cs1...保護電容Cs1. . . Protection capacitor

Ct2...充電電容Ct2. . . Charging capacitor

D1...二極體(diode)D1. . . Diode

dri...驅動訊號端(drive signal terminal)Dri. . . Drive signal terminal

Q5...輸出級電晶體(output stage transistor)Q5. . . Output stage transistor

Q6...放電電晶體(discharge transistor)Q6. . . Discharge transistor

R1...放大電阻R1. . . Amplifying resistor

R2...回授電阻R2. . . Feedback resistor

R3...放大電阻R3. . . Amplifying resistor

R7...輸出級電阻R7. . . Output stage resistance

Rf2...濾波電阻Rf2. . . Filter resistor

Rs1...保護電阻Rs1. . . Protection resistor

Rt1...充電電阻Rt1. . . Charging resistor

Rt2...正回授電阻Rt2. . . Positive feedback resistor

Rt3...第二分壓電阻Rt3. . . Second voltage dividing resistor

Rt4...第二分壓電阻Rt4. . . Second voltage dividing resistor

Rt5...緩衝電阻Rt5. . . Buffer resistor

Rt6...放電電阻Rt6. . . Discharge resistor

RV1...第一可變電阻RV1. . . First variable resistor

RV2...第二可變電阻RV2. . . Second variable resistor

Vcc...工作電壓Vcc. . . Operating Voltage

Vct2...電容端壓Vct2. . . Capacitor terminal pressure

Vdri...驅動訊號電壓Vdri. . . Drive signal voltage

VFB...回授端(feedback terminal)VFB. . . Feedback terminal

Vin...訊號輸入端(signal input terminal)Vin. . . Signal input terminal

Vout...訊號輸出端(signal output terminal)Vout. . . Signal output terminal

Vtri...觸發訊號端(trigger signal terminal)Vtri. . . Trigger signal terminal

第一圖 係一種改良之加減速機構控制模組之架構圖;The first figure is an architectural diagram of an improved acceleration and deceleration mechanism control module;

第二圖 係放大器單元之電路結構圖;The second figure is a circuit structure diagram of the amplifier unit;

第三圖 係振盪單元之電路結構圖;The third figure is a circuit structure diagram of the oscillating unit;

第四圖 係回授單元之電路結構圖;The fourth figure is a circuit structure diagram of the feedback unit;

第五A圖、第五B圖 係一種改良之加減速機構之控制方法流程圖;Figure 5A and Figure 5B are flow charts of a control method for an improved acceleration/deceleration mechanism;

第六圖 係步驟(602)之詳細步驟流程圖;Figure 6 is a flow chart showing the detailed steps of step (602);

第七圖 係步驟(604)之詳細步驟流程圖;及Figure 7 is a detailed flow chart of the steps (604); and

第八圖 步驟(608)之詳細步驟流程圖。Figure 8 is a flow chart showing the detailed steps of step (608).

1...改良之加減速機構控制模組1. . . Improved acceleration and deceleration mechanism control module

2...輸入源2. . . Input source

3...加減速機構(acceleration and deceleration apparatus)3. . . Acceleration and deceleration apparatus

11...放大器單元(amplifier unit)11. . . Amplifier unit

12...脈寬調變單元(pulse width modulation unit)12. . . Pulse width modulation unit

13...振盪單元(oscillation unit)13. . . Oscillation unit

14...切換電晶體(switch transistor)14. . . Switch transistor

15...回授單元(feedback unit)15. . . Feedback unit

Vcc...工作電壓Vcc. . . Operating Voltage

Claims (11)

一種改良之加減速機構控制模組,係連接於一輸入源以接收並處理一輸入訊號,以驅動一加減速機構,係包括:一放大器單元,係連接該輸入源以接收並放大該輸入訊號,其中,該放大器單元更包括:一運算放大器,係具有一放大器正輸入端、一放大器負輸入端、及一放大器輸出端,該運算放大器係可將該輸入訊號作訊號放大,並輸出該放大訊號;一第二可變電阻,係連接於該放大器正輸入端,藉由調整該第二可變電阻之電阻值,係可調整由該放大器輸出端所輸出之放大訊號之低準位;一二極體,係連接於第二可變電阻,以防止當外接之一工作電壓產生飄動之時,而對放大訊號之低準位之值造成影響;二個放大電阻,其中,一放大電阻係連接該放大器負輸入端與放大器輸出端,另一放大電阻則連接於放大器負輸入端,且,該二放大電阻為串聯,放大電阻係可協助運算放大器執行該輸入訊號之放大;一第一可變電阻,係連接於該放大電阻;一穩壓電容,係連接第一可變電阻與該二個放大電阻,該穩壓電容係用於穩定放大訊號之高準位; 一輸出級電晶體,係連接於放大器輸出端,以作為放大器單元之輸出級電路;一輸出級電阻,係串接於該輸出級電晶體,以作為輸出級電晶體與接地端之耦合電阻;及一回授電阻,係連接放大器負輸入端;一脈寬調變單元,係連接於該放大器單元以接收一放大訊號,並執行該放大訊號之脈寬調變;一切換電晶體,係連接於該脈寬調變單元以接收一調變訊號,並輸出一驅動訊號以驅動該加減速機構,其中,藉由調整該第一可變電阻之電阻值,係可調整該切換電晶體輸出於該加減速機構之該驅動訊號之功率,以調整對於加減速機構之驅動力;一振盪單元,係連接放大器單元與脈寬調變單元,該振盪單元可產生一振盪波訊號至脈寬調變單元以調整該調變訊號之頻率;及一回授單元,係以負回授之方式,連接放大器單元之回授電阻與加減速機構,如此,回授單元可透過該回授電阻以將輸出於加減速機構之驅動訊號回授至放大器負輸入端;該回授單元可將輸出於加減速機構之一驅動訊號電壓回授至放大器單元,因此,當加減速機構受到不同負載效應而導致其轉速弱/增加時,放大器單元即可依照回授單元所回授之該驅動訊號電壓 之值,而自動地調整其輸出增益之大小,以增加/減弱加減速機構之轉速,使其維持正常工作狀態。 An improved acceleration/deceleration mechanism control module is coupled to an input source for receiving and processing an input signal to drive an acceleration/deceleration mechanism, comprising: an amplifier unit connected to the input source to receive and amplify the input signal The amplifier unit further includes: an operational amplifier having an amplifier positive input terminal, an amplifier negative input terminal, and an amplifier output terminal, wherein the operational amplifier can amplify the input signal and output the amplification a second variable resistor connected to the positive input terminal of the amplifier, and adjusting a resistance value of the second variable resistor to adjust a low level of the amplified signal outputted by the output end of the amplifier; The diode is connected to the second variable resistor to prevent an influence on the value of the low level of the amplified signal when one of the external working voltages is fluttering; two amplification resistors, wherein the amplification resistor is Connect the negative input of the amplifier to the output of the amplifier, and the other amplification resistor is connected to the negative input of the amplifier, and the two amplification resistors are connected in series. The resistor system can assist the operational amplifier to perform amplification of the input signal; a first variable resistor is connected to the amplification resistor; and a voltage stabilization capacitor is connected to the first variable resistor and the two amplification resistors, the voltage stabilization capacitor Used to stabilize the high level of the amplified signal; An output stage transistor is connected to the output end of the amplifier as an output stage circuit of the amplifier unit; an output stage resistor is serially connected to the output stage transistor as a coupling resistance of the output stage transistor and the ground end; And a feedback resistor is connected to the negative input terminal of the amplifier; a pulse width modulation unit is connected to the amplifier unit to receive an amplified signal, and performs pulse width modulation of the amplified signal; a switching transistor is connected The pulse width modulation unit receives a modulation signal and outputs a driving signal to drive the acceleration/deceleration mechanism, wherein the switching transistor output can be adjusted by adjusting the resistance value of the first variable resistor. The driving signal power of the acceleration/deceleration mechanism is used to adjust the driving force of the acceleration/deceleration mechanism; an oscillating unit is connected to the amplifier unit and the pulse width modulation unit, and the oscillating unit can generate an oscillating wave signal to the pulse width modulation The unit adjusts the frequency of the modulation signal; and a feedback unit connects the feedback resistor and the acceleration/deceleration mechanism of the amplifier unit in a negative feedback manner, so The unit can transmit the driving signal outputted to the acceleration/deceleration mechanism to the negative input end of the amplifier through the feedback resistor; the feedback unit can feed the driving signal voltage outputted to the acceleration/deceleration mechanism to the amplifier unit, so When the acceleration/deceleration mechanism is subjected to different load effects and the rotation speed is weak/increased, the amplifier unit can follow the driving signal voltage fed back by the feedback unit. The value is automatically adjusted by the output gain to increase/decrease the speed of the acceleration/deceleration mechanism to maintain normal operation. 如申請專利範圍第1項所述之改良之加減速機構控制模組,該振盪器單元包括:一比較器,係具有一比較器正輸入端、一比較器負輸入端、及一比較器輸出端,該比較器係可執行由該比較器正輸入端與該比較器負輸入端所輸入訊號之比較;一第一分壓電阻,該第一分壓電阻之一端係連接於比較器正輸入端,且,其另一端係耦接於外加之一工作電壓,以產生一分壓電阻端壓;一第二分壓電阻,該第二分壓電阻之一端係連接於比較器正輸入端,其另一端則為接地,以產生該分壓電阻端壓;一正回授電阻,該正回授電阻之一端係連接於比較器正輸入端,且,其另一端係連接於該比較器輸出端,以將比較器輸出端之電壓回授至比較器正輸入端;一充電電容,係連接於比較器負輸入端,當外加之該工作電壓於第二分壓電阻之上產生分壓電阻端壓之時,該充電電容即開始進行充電;一充電電阻,係耦接該比較器負輸入端與比較器輸出端,該充電電阻之值係可決定充電電容充電之時間; 一緩衝電阻,係連接於比較器輸出端,以作為比較器與其下一級電路之緩衝介面;一放電電阻,係連接於充電電容,該放電電阻Rt6之值可決定充電電容Ct2之放電時間;及一放電電晶體,係連接於放電電阻,當充電電容執行放電之時,該放電電晶體將被導通以有效地縮短充電電容之放電時間。 The improved acceleration/deceleration mechanism control module of claim 1, wherein the oscillator unit comprises: a comparator having a comparator positive input terminal, a comparator negative input terminal, and a comparator output The comparator can perform a comparison between the positive input terminal of the comparator and the input signal of the comparator negative input terminal; a first voltage dividing resistor, one of the first voltage dividing resistors is connected to the comparator positive input And the other end is coupled to one of the applied operating voltages to generate a voltage dividing resistor terminal voltage; a second voltage dividing resistor, one of the second voltage dividing resistors is connected to the positive input terminal of the comparator, The other end is grounded to generate the voltage dividing resistor terminal voltage; a positive feedback resistor, one end of the positive feedback resistor is connected to the positive input terminal of the comparator, and the other end is connected to the comparator output End, the voltage of the comparator output is fed back to the positive input of the comparator; a charging capacitor is connected to the negative input of the comparator, and the applied voltage is generated above the second voltage dividing resistor to generate a voltage dividing resistor When the terminal is pressed, the charging battery The charging starts to be charged; a charging resistor is coupled to the comparator negative input terminal and the comparator output terminal, and the value of the charging resistor determines the charging capacitor charging time; a buffer resistor is connected to the output end of the comparator as a buffer interface between the comparator and the next stage circuit; a discharge resistor is connected to the charging capacitor, and the value of the discharging resistor Rt6 determines the discharging time of the charging capacitor Ct2; A discharge transistor is connected to the discharge resistor, and when the charge capacitor performs discharge, the discharge transistor is turned on to effectively shorten the discharge time of the charge capacitor. 如申請專利範圍第1項所述之改良之加減速機構控制模組,該回授單元包括:一保護電阻,係連接該加減速機構與該切換電晶體,以減少切換電晶體於切換開關期間所衍生開關切換損失及電晶體溫度上升之現象;一保護電容,係連接該保護電阻,藉由該保護電容與保護電阻之搭配使用,係可減少切換電晶體於切換開關期間所衍生之開關切換損失及電晶體溫度上升之現象;一濾波電阻,係連接於保護電阻與保護電容,以將保護電阻與保護電容所讀出之驅動訊號執行濾波之動作;及一濾波電容,係連接於該濾波電阻,以接收驅動訊號,並配合濾波電阻於執行驅動訊號之濾波後,將一驅動訊號電壓回授至該放大器單元。 The improved acceleration/deceleration mechanism control module of claim 1, wherein the feedback unit comprises: a protection resistor connected to the acceleration/deceleration mechanism and the switching transistor to reduce switching of the transistor during the switching The switching loss of the derivative switch and the rise of the temperature of the transistor; a protection capacitor is connected to the protection resistor, and the protection capacitor and the protection resistor are used together to reduce the switching of the switching transistor during the switching Loss and rise in temperature of the transistor; a filter resistor is connected to the protection resistor and the protection capacitor to perform filtering action on the drive signal read by the protection resistor and the protection capacitor; and a filter capacitor is connected to the filter The resistor receives the driving signal and cooperates with the filter resistor to perform filtering of the driving signal, and then returns a driving signal voltage to the amplifier unit. 如申請專利範圍第1項所述之改良之加減速機構控制模組,該加減速機構為一馬達。 The improved acceleration/deceleration mechanism control module according to claim 1, wherein the acceleration/deceleration mechanism is a motor. 如申請專利範圍第1項所述之改良之加減速機構控制模組,該切換電晶體可為一雙載子接面電晶體(BJT)、一閘極絕緣雙極性電晶體(IGBT)、或一金屬氧化半導體場效電晶體(MOSFET)。 The improved acceleration/deceleration mechanism control module according to claim 1, wherein the switching transistor can be a double carrier junction transistor (BJT), a gate insulated bipolar transistor (IGBT), or A metal oxide semiconductor field effect transistor (MOSFET). 如申請專利範圍第3項所述之改良之加減速機構控制模組,該放電電晶體可為一雙載子接面電晶體(BJT)、一閘極絕緣雙極性電晶體(IGBT)、或一金屬氧化半導體場效電晶體(MOSFET)。 The improved acceleration/deceleration mechanism control module according to claim 3, wherein the discharge transistor can be a double carrier junction transistor (BJT), a gate insulated bipolar transistor (IGBT), or A metal oxide semiconductor field effect transistor (MOSFET). 如申請專利範圍第2項所述之改良之加減速機構控制模組,其中,該二個放大電阻、該回授電阻、該第二可變電阻、及該運算放大器係構成一反向加法器電路。 The improved acceleration/deceleration mechanism control module of claim 2, wherein the two amplification resistors, the feedback resistor, the second variable resistor, and the operational amplifier form an inverse adder Circuit. 一種改良之加減速機構控制模組之控制方法,係可依照不同之負載效應,自動調整一改良之加減速機構控制模組之訊號增益,該方法包括以下步驟:(1)一輸入源輸入一輸入訊號至一放大器單元;(2)該放大器單元接收並處理該輸入訊號;(3)放大器單元之一輸出級電晶體輸出一放大訊號至一脈寬調變單元;(4)一振盪單元產生一振盪波訊號至該脈寬調變單元; (5)脈寬調變單元接收該放大訊號與該振盪波訊號以執行脈寬調變;(6)脈寬調變單元輸出一調變訊號至一切換電晶體;(7)該切換電晶體輸出一驅動訊號以驅動一加減速機構;(8)一回授單元將輸出於該加減速機構之一驅動訊號電壓回授至放大器單元;(9)判斷是否加減速機構因負載效應而轉速減弱,若是,則執行步驟(10),若否,則執行步驟(11);(10)放大器單元因該回授單元而自動增加其輸出增益,以降低驅動訊號電壓值,並執行步驟(3);(11)判斷是否加減速機構因負載效應而轉速增強,若是,則執行步驟(12),若否,則執行步驟(13);(12)放大器單元因回授單元自動降低其輸出增益,以增加驅動訊號電壓值,並執行步驟(3);及(13)切換電晶體持續輸出該驅動訊號以驅動加減速機構。 An improved acceleration/deceleration mechanism control module control method can automatically adjust the signal gain of an improved acceleration/deceleration mechanism control module according to different load effects, and the method comprises the following steps: (1) an input source input one Input signal to an amplifier unit; (2) the amplifier unit receives and processes the input signal; (3) one of the amplifier unit output stage transistors outputs an amplified signal to a pulse width modulation unit; (4) an oscillation unit generates An oscillating wave signal to the pulse width modulation unit; (5) The pulse width modulation unit receives the amplified signal and the oscillating wave signal to perform pulse width modulation; (6) the pulse width modulation unit outputs a modulation signal to a switching transistor; (7) the switching transistor Outputting a driving signal to drive an acceleration/deceleration mechanism; (8) a feedback unit returns a driving signal voltage outputted to the acceleration/deceleration mechanism to the amplifier unit; (9) determining whether the acceleration/deceleration mechanism is weakened due to a load effect If yes, step (10) is performed; if not, step (11) is performed; (10) the amplifier unit automatically increases its output gain due to the feedback unit to reduce the driving signal voltage value, and performs step (3) (11) determining whether the acceleration/deceleration mechanism is increased in speed due to a load effect, and if so, executing step (12), and if not, performing step (13); (12) the amplifier unit automatically lowering its output gain due to the feedback unit, To increase the driving signal voltage value, and perform step (3); and (13) switch the transistor to continuously output the driving signal to drive the acceleration/deceleration mechanism. 如專利申請範圍第9項所述之一種改良之加減速機構控制模組之控制方法,其中,步驟(2)包括以下步驟:(21)一訊號輸入端接收該輸入訊號;(22)一運算放大器搭配二個放大電阻以執行訊號放大;(23)調整一第二可變電阻之電阻值以決定該放大訊號之低準位;及(24)該運算放大器輸出放大訊號至該輸出級電晶體。 The method for controlling an improved acceleration/deceleration mechanism control module according to claim 9, wherein the step (2) comprises the following steps: (21) a signal input terminal receives the input signal; (22) an operation The amplifier is matched with two amplification resistors for performing signal amplification; (23) adjusting a resistance value of a second variable resistor to determine a low level of the amplification signal; and (24) the operational amplifier outputting an amplification signal to the output stage transistor . 如專利申請範圍第9項所述之一種改良之加減速機構控制模組之控制方法,其中,步驟(4)包括以下步驟:(41)外加一工作電壓至一第一分壓電阻;(42)產生一分壓電阻端壓;(43)一充電電容執行充電並產生一電容端壓;(44)判斷是否該電容端壓等於該分壓電阻端壓,若是,則執行步驟(45),若否,則執行步驟(43);(45)一放電電晶體導通以加速該充電電容放電;(46)充電電容執行放電並產生電容端壓; (47)判斷是否電容端壓等於分壓電阻端壓之負值,若是,則執行步驟(48),若否,則執行步驟(46);及(48)一比較器輸出週期性之該振盪波訊號至該脈寬調變單元。 The method for controlling an improved acceleration/deceleration mechanism control module according to claim 9, wherein the step (4) comprises the following steps: (41) applying an operating voltage to a first voltage dividing resistor; Generating a voltage dividing resistor terminal voltage; (43) a charging capacitor performs charging and generates a capacitor terminal voltage; (44) determining whether the capacitor terminal voltage is equal to the voltage dividing resistor terminal voltage, and if yes, performing step (45), If not, proceed to step (43); (45) a discharge transistor is turned on to accelerate the discharge of the charge capacitor; (46) the charge capacitor performs discharge and generates a capacitor terminal pressure; (47) determining whether the capacitor terminal voltage is equal to a negative value of the voltage divider resistor terminal voltage, if yes, performing step (48), if not, performing step (46); and (48) a comparator outputting the periodic oscillation. Wave signal to the pulse width modulation unit. 如專利申請範圍第9項所述之一種改良之加減速機構控制模組之控制方法,其中,步驟(8)包括以下步驟:(81)透過一保護電阻與一保護電容將該加減速機構上之該驅動信號讀出;(82)透過一濾波電阻與一濾波電容以對驅動信號執行濾波;及(83)透過一回授電阻將該驅動訊號電壓回授至該放大器單元。 The method for controlling an improved acceleration/deceleration mechanism control module according to claim 9, wherein the step (8) comprises the following steps: (81) transmitting the acceleration/deceleration mechanism through a protection resistor and a protection capacitor The driving signal is read out; (82) filtering is performed on the driving signal through a filter resistor and a filter capacitor; and (83) the driving signal voltage is fed back to the amplifier unit through a feedback resistor.
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