TWI404460B - An electronic ballast that senses the brightness of the power line - Google Patents

Abstract

The present invention discloses an electronic ballast with dimming control by power line sensing for a fluorescent lamp tube. The electronic ballast includes: a power line ON/OFF sensing circuit, for performing a voltage comparison operation on a DC voltage to generate an ON/OFF sensing signal; an oscillation signal gate-controlling unit for gate-controlling an oscillation signal with a pulse signal to generate a gate-controlled oscillation signal, a pulse width of the pulse signal being generated according to the ON/OFF sensing signal; and a non-overlapped driver for generating a high-side driving signal and a low-side driving signal according to the gate-controlled oscillation signal.

Description

Electronic ballast that senses brightness by power line sensing

The present invention relates to electronic ballasts, and more particularly to electronic ballasts that modulate brightness with power line sensing.

In the case of powering a lighting device such as a fluorescent lamp or a cold cathode ray fluorescent lamp or a compact fluorescent lamp, an electronic ballast is generally used to keep the lamp current stable.

Figure 1 shows a typical architecture of an electronic ballast with a fluorescent brightness control function. As shown in FIG. 1, the electronic ballast mainly has a full bridge rectifier 101, a V _CC starting circuit 102, an electronic ballast controller 103, NMOS transistors 104-105 and a voltage dividing circuit 106.

In this architecture, the full bridge rectifier 101 is used to rectify an AC power source to generate a main input voltage V _IN . The V _CC starting circuit 102 is coupled to the main input voltage V _{IN for} starting the generation of the DC voltage V _CC . The electronic ballast controller 103 is configured to generate a high side driving signal V _HS to drive the NMOS transistor 104 and a low side driving signal V _LS to drive the NMOS transistor in response to the voltage of the DIM input pin 3 . 105 delivers a current I _LMP to the fluorescent lamp. The NMOS transistors 104-105 are used to generate a square wave to an LC resonant network. The LC resonant network then converts the square wave to the current I _LMP to drive the fluorescent lamp.

The voltage dividing circuit 106 is coupled to a 1~10V DIM input terminal to generate a DIM control voltage at the DIM input pin 3 of the electronic ballast controller 103. The 1~10V DIM input is an additional connection to the electronic ballast. In the prior art, the 1~10V DIM input terminal is generally coupled to an additional disc switch (a dimmer switch provided on the wall) or a remote control device, so that the user must have an existing rocker switch. The additional disc switch or remote control is operated externally to trigger the electronic ballast to adjust the brightness of the fluorescent lamp.

By setting a voltage value at the input of the DIM, the NMOS transistors _{104-105 are} periodically turned on and off by the high-side driving signal V _HS and the low-side driving signal V _LS , respectively, so that the input power is The main input voltage V _{IN is} converted into the current signal I _LMP to drive the lamp, wherein the root mean square value of the current signal I _LMP corresponds to the voltage value of the DIM input terminal.

However, since conventional dimming practices must utilize an additional disk switch or a remote control device, it is not possible to complete the setting of the DIM input on the existing fluorescent light switch, so that the user must have the additional disk type. Switch or remote control for an additional fee. Moreover, since the additional disk switch may have to be mounted on the wall, the wiring between the disk switch and the ballast may also cause trouble. As for the remote control device, since the communication between the transmitter and the receiver requires electric energy, when the battery power of the remote control device is used up, the fluorescent lamp cannot be dimmed unless the battery is replaced.

Therefore, there is a need to provide a solution that enables an electronic ballast with dimming function at a lower cost and without the need for additional disk switches or remote controls. In view of this bottleneck, the present invention proposes a novel electronic ballast architecture that regulates the brightness of the fluorescent tube according to the number of times the fluorescent lamp switch is turned on and off, without any additional disc switches or remote controls.

It is an object of the present invention to provide an electronic ballast that senses brightness with power line sensing without the need for any additional disc switches or remote controls to adjust the brightness of the fluorescent lamp.

Another object of the present invention is to provide an electronic ballast with a dimming function, which controls the brightness of the fluorescent tube according to the number of times the corresponding fluorescent lamp switch is turned on and off.

Another object of the present invention is to provide an electronic ballast with a compact architecture that is fully integrated into a single chip, which can adjust the brightness of the fluorescent lamp according to the number of times the fluorescent lamp switch is turned on and off.

In order to achieve the above objects, the present invention provides an electronic ballast for controlling brightness by a power line, which is suitable for a fluorescent lamp. The electronic ballast has a power line opening and closing sensing circuit, which is used for continuous flow. The voltage is subjected to a voltage comparison operation to generate an on and off sensing signal, and to detect a filtered DC voltage that falls below a reset threshold level to generate a reset signal, wherein the DC voltage and The filtered DC voltage is derived from a main input voltage, and the main input voltage is rectified by a power line, and the reset threshold level is higher than the minimum operating voltage of the electronic ballast; an oscillating signal gate The control unit is configured to gate an oscillating signal according to a pulse signal to generate a gated oscillating signal, wherein a pulse width of the pulse signal is generated according to the opening and closing sensing signal, and the pulse width is at the weight The set signal has a preset value, and the gated oscillating signal has an active period and a stationary period determined by the pulse signal; and a non-overlapping driver is used The oscillating signal generated by gating a high-side driving signal and a low-side driving signal, wherein the high-side driving signal and the low-side driving signal only during the action of the oscillating signals by the gating activity.

The detailed description of the drawings and the preferred embodiments are set forth in the accompanying drawings.

Referring to FIG. 2, a block diagram of a preferred embodiment of the electronic ballast of the present invention is shown. As shown in FIG. 2, the electronic ballast has a power line on/off sensing circuit 201, an oscillating signal gating unit 202, and a non-overlapping driver 203.

The power line on and off sensing circuit 201 is configured to perform a first voltage comparison operation on the DC voltage to generate an ON and OFF sensing signal V _CNT , and to count the turn-off time of a power line or a pair of times Filtering the DC voltage to perform a second voltage comparison operation to generate a reset signal RESET, wherein the DC voltage and the filtered DC voltage are obtained from a main input voltage V _IN , and the first voltage comparison operation can borrow a comparator Or a Schmitt trigger.

The oscillating signal gating unit 202 is configured to gate an oscillating signal V _OSC1 according to a pulse signal (not shown in FIG. 2 ) to generate a gated oscillating signal V _OSC2 , wherein the pulse width of the pulse signal is And the sensing signal V _CNT is generated, and the pulse width has a preset value under the action of the reset signal RESET, and the gated oscillation signal V _OSC2 has an activity period determined by the pulse signal. And a stationary period.

The non-overlapping driver 203 is configured to generate a high side driving signal V _HS and a low side driving signal V _LS according to the gated oscillating signal V _OSC2 , wherein the high side driving signal V _HS and the low side driving signal V _LS It only acts during this activity of the gated oscillating signal V _OSC2 .

Please refer to FIG. 3, which is a block diagram showing another preferred embodiment of the electronic ballast of the present invention. As shown in FIG. 3, the electronic ballast has a power line on and off sensing circuit 301, a counter 302, a digital analog converter 303, a sawtooth signal generator 304, a comparator 305, an oscillator 306, A gate 307 and a non-overlapping driver 308.

The power line on and off sensing circuit 301 is configured to perform a first voltage comparison operation on the DC voltage to generate an ON and OFF sensing signal V _CNT , and to count the turn-off time of a power line or a pair of times Filtering the DC voltage to perform a second voltage comparison operation to generate a reset signal RESET, wherein the DC voltage and the filtered DC voltage are obtained from a main input voltage V _IN , and the first voltage comparison operation can borrow a comparator Or a Schmitt trigger.

The counter 302 is configured to generate a digital count value B _n B _n-1 ... B ₁ B ₀ according to the on and off sensing signal V _CNT and the counter 302 is reset by the reset signal RESET. The digital analog converter 303 is configured to generate a control voltage V _C according to the digital count value B _n B _n-1 ... B ₁ B ₀ . The sawtooth signal generator 304 is configured to generate a sawtooth signal V _SAW . The comparator 305 is configured to generate a pulse signal V _P according to the control voltage V _C and the sawtooth wave signal V _SAW . The oscillator 306 is for generating the oscillating signal V _OSC1 .

The gate 307 is configured to perform a logical AND operation on the pulse signal V _P and the oscillation signal V _OSC1 to generate a gated oscillation signal V _OSC2 . The waveforms of V _P , V _OSC1 and V _OSC2 generated corresponding to a dimming level are shown in Fig. 6. As shown in FIG. 6, the pulse signal V _{P has} a pulse width of 2.5 ms, which corresponds to a work ratio of 50%, and the duty ratio may be 25 according to the change of the count value of the open and closed sensing signals V _CNT . %, 75% or 100%. The oscillation signal V _OSC1 has a pulse width of 12.5 μs in FIG. 6, and the gated oscillation signal V _OSC2 has an active period of 2.5 ms and a stationary period of 2.5 ms.

The non-overlapping driver 308 is configured to generate a high side driving signal V _HS and a low side driving signal V _LS according to the gated oscillating signal V _OSC2 , wherein the high side driving signal V _HS and the low side driving signal V _LS It only acts during this activity of the gated oscillating signal V _OSC2 . The lamp current (not shown in Fig. 3) caused by the high side drive signal V _HS and the low side drive signal V _LS is shown in Fig. 7. As shown in FIG. 7, the waveform of the lamp current I _LMP corresponding to a dimming level has an active period t _on corresponding to the active period of the gated oscillating signal V _OSC2 .

Please refer to FIG. 4a, which is a block diagram of a preferred embodiment of the power line on and off sensing circuit of FIG. As shown in FIG. 4a, the preferred embodiment of the present invention includes at least a capacitor 401, resistors 402-403, and comparators 404-405.

The capacitor 401 is used to filter out noise of the main input voltage V _IN . The resistors 402-403 are used as a voltage dividing circuit to generate a DC voltage V _X according to the main input voltage V _IN .

The comparator 404 is configured to generate the on and off sensing signal V _CNT according to a sensing threshold voltage V _TH and the DC voltage V _X . The sense threshold voltage V _{TH is} preferably, for example but not limited to, 11V. Figure 4c shows the waveforms of the V _IN , V _X and V _CNT signals when the fluorescent lamp switch is turned on and off. As shown in FIG. 4c, when V _X falls below the sensing threshold voltage V _TH , the on and off sensing signal V _CNT changes from a low potential state to a high potential; when V _X climbs to the sensing threshold voltage V _TH Above, the on and off sensing signal V _CNT changes from a high potential state to a low potential.

The comparator 405 is configured to generate the reset signal RESET according to a reset threshold voltage V _LOW and a filtered DC voltage V _CC supplied to the comparator 405, wherein the reset threshold voltage V _{LOW is} , for example but not limited to, 6V , is higher than the minimum operating voltage of the electronic ballast controller. When the fluorescent lamp switch is turned off, the main input voltage is pulled low, and at the same time, the filtered DC voltage V _CC can be gradually decreased due to the charge stored by a filter capacitor. Therefore, when the fluorescent lamp switch is turned off, the filtered DC voltage V _{CC is} only lower than the reset threshold voltage V _LOW after the off time exceeds a predetermined time, for example, 1 sec, wherein the predetermined time is related to the filter capacitor value. .

Referring to FIG. 4b, a block diagram of another preferred embodiment of the power line turn-on and turn-off sensing circuit of FIG. 3 of the present invention is shown. As shown in FIG. 4b, the preferred embodiment of the present invention includes at least a capacitor 401, resistors 402-403, a comparator 404, a delay unit 406, and a gate 407.

The capacitor 401 is used to filter out noise of the main input voltage V _IN . The resistors 402-403 are used as a voltage dividing circuit to generate a DC voltage V _X according to the main input voltage V _IN .

The comparator 404 is configured to generate the on and off sensing signal V _CNT according to a sensing threshold voltage V _TH and the DC voltage V _X . The sense threshold voltage V _{TH is} preferably, for example but not limited to, 11V. Figure 4c shows the waveforms of the V _IN , V _X and V _CNT signals when the fluorescent lamp switch is turned on and off. As shown in FIG. 4c, when V _X falls below the sensing threshold voltage V _TH , the on and off sensing signal V _CNT changes from a low potential state to a high potential; when V _X climbs to the sensing threshold voltage V _TH Above, the on and off sensing signal V _CNT changes from a high potential state to a low potential.

The delay unit 406 is configured to delay the opening and closing of the sensing signal V _{CNT for} the predetermined time to generate a delayed signal V _CNTD .

The AND gate 407 is configured to generate the reset signal RESET according to the opening and closing sensing signal V _CNT and the delayed signal V _CNTD . When the pulse width of the on/off sensing signal V _CNT is less than the predetermined time, the reset signal RESET is kept at a low potential; when the pulse width of the on and off sensing signal V _CNT is greater than the predetermined time, the reset The signal RESET changes state to high.

FIG. 5a is a block diagram showing still another preferred embodiment of the power line on and off sensing circuit of FIG. 3 of the present invention. As shown in FIG. 5a, the preferred embodiment of the present invention includes at least a V _CC starting circuit 501, a filter capacitor 502, a comparator 503, resistors 504-505, and a comparator 506.

The V _CC starting circuit 501 is configured to generate the filtered DC voltage V _CC according to the main input voltage V _IN . The filter capacitor 502 is configured to filter out the noise of the filtered DC voltage V _CC .

The comparator 503 and the resistors 504-505 are configured to implement a Schmitt trigger to generate the on and off sensing signal V _CNT according to the filtered DC voltage V _CC . The low threshold voltage of the Schmitt trigger is set according to a UVLO (Under Voltage Lock _Out ) turn-off level V _{UVLO_OFF} , and its value is, for example but not limited to, 9V, and the high threshold voltage of the Schmitt trigger It is set according to a UVLO conduction level V _{UVLO_ON} , and its value is, for example, but not limited to, 13V. Figure 5c shows the waveforms of the V _IN , V _CC and V _CNT signals when the fluorescent lamp switch is turned on and off. When V _CC falls below the UVLO turn-off level V _{UVLO_OFF} , the turn-on and turn-off sensing signal V _CNT changes from a low potential state to a high potential; when V _CC climbs above the UVLO turn-on level V _{UVLO_ON} , the turn-on, The off sensing signal V _CNT changes from a high potential state to a low potential.

The comparator 506 is configured to generate the reset signal RESET according to a reset threshold voltage V _LOW and the filtered DC voltage V _CC , wherein the reset threshold voltage V _LOW , for example but not limited to 6V, is higher than the electronic stability The minimum operating voltage of the controller. When the fluorescent lamp switch is turned off, the main input voltage V _IN is pulled low, and at the same time, the filtered DC voltage V _CC can gradually decrease due to the charge stored by the filter capacitor 502. Therefore, when the fluorescent lamp switch is turned off, the filtered DC voltage V _CC is lower than the reset threshold voltage V _LOW only after the off time exceeds a predetermined time, for example, 1 sec, wherein the predetermined time and the filter capacitor 502 The capacitance value is related.

FIG. 5b is a block diagram showing still another preferred embodiment of the power line on and off sensing circuit of FIG. 3 of the present invention. As shown in FIG. 5b, the preferred embodiment of the present invention includes at least a V _CC starting circuit 501, a filter capacitor 502, a comparator 503, resistors 504-505, a delay unit 507, and a gate 508.

The V _CC starting circuit 501 is configured to generate the filtered DC voltage V _CC according to the main input voltage V _IN . The filter capacitor 502 is configured to filter out the noise of the filtered DC voltage V _CC .

The comparator 503 and the resistors 504-505 are configured to implement a Schmitt trigger to generate the on and off sensing signal V _CNT according to the filtered DC voltage V _CC . The low threshold voltage of the Schmitt trigger is set according to a UVLO (Under Voltage Lock _Out ) turn-off level V _{UVLO_OFF} , and its value is, for example but not limited to, 9V, and the high threshold voltage of the Schmitt trigger It is set according to a UVLO conduction level V _{UVLO_ON} , and its value is, for example, but not limited to, 13V. Figure 5c shows the waveforms of the V _IN , V _CC and V _CNT signals when the fluorescent lamp switch is turned on and off. When V _CC falls below the UVLO turn-off level V _{UVLO_OFF} , the turn-on and turn-off sensing signal V _CNT changes from a low potential state to a high potential; when V _CC climbs above the UVLO turn-on level V _{UVLO_ON} , the turn-on, The off sensing signal V _CNT changes from a high potential state to a low potential.

The delay unit 507 is configured to delay the opening and closing of the sensing signal V _{CNT for} the predetermined time to generate a delayed signal V _CNTD . The gate 508 is configured to generate the reset signal RESET according to the opening and closing sensing signal V _CNT and the delayed signal V _CNTD . When the pulse width of the on/off sensing signal V _CNT is less than the predetermined time, the reset signal RESET is kept at a low potential; when the pulse width of the on and off sensing signal V _CNT is greater than the predetermined time, the reset The signal RESET changes state to high.

Therefore, through the implementation of the present invention, a fully integrated single-chip electronic ballast can be presented, which senses the brightness of a fluorescent lamp by sensing the number of times the fluorescent lamp is turned on and off, so the present invention with a simplified structure does overcome The shortcomings of the conventional circuit.

The disclosure of the present invention is a preferred embodiment. Any change or modification of the present invention originating from the technical idea of the present invention and being easily inferred by those skilled in the art will not deviate from the scope of patent rights of the present invention.

In summary, this case, regardless of its purpose, means and efficacy, is showing its technical characteristics that are different from the conventional ones, and its first invention is practical and practical, and it is also in compliance with the patent requirements of the invention. I will be granted a patent at an early date.

101. . . Full bridge rectifier

102, 501. . . V _CC start circuit

103. . . Electronic ballast controller

104~105. . . NMOS transistor

106. . . Voltage dividing circuit

201, 301. . . Power line on and off sensing circuit

202. . . Oscillating signal control unit

203, 308. . . Non-overlapping drives

302. . . counter

303. . . Digital analog converter

304. . . Sawtooth signal generator

305, 404~405, 503, 506. . . Comparators

306. . . Oscillator

307, 407, 508. . . Gate

401, 502. . . capacitance

402~403, 504~505. . . resistance

406, 507. . . Delay unit

FIG. 1 is a schematic diagram showing a typical architecture of an electronic ballast having a brightness adjustment function of a fluorescent lamp.

2 is a schematic block diagram showing a preferred embodiment of the electronic ballast of the present invention.

3 is a schematic block diagram showing another preferred embodiment of the electronic ballast of the present invention.

4a is a schematic view showing a block diagram of a preferred embodiment of the power line on and off sensing circuit of FIG. 3 of the present invention.

FIG. 4b is a schematic diagram showing another preferred embodiment of the power line turn-on and turn-off sensing circuit of FIG. 3 of the present invention.

FIG. 4c is a schematic diagram showing waveforms of the V _X and V _CNT signals in FIGS. 4 a and 4 b of the present invention when the AC power source is turned on and off in succession.

FIG. 5a is a schematic diagram showing another preferred embodiment of the power line opening and closing sensing circuit of FIG. 3 of the present invention.

FIG. 5b is a schematic diagram showing another preferred embodiment of the power line on and off sensing circuit of FIG. 3 of the present invention.

FIG. 5c is a schematic diagram showing waveforms of the V _CC and V _CNT signals in FIG. 5a and FIG. 5b when the AC power source is turned on and off in succession.

FIG 6 is a schematic diagram which illustrates the present invention in FIG. 3 of V _P, V _OSC1 and V _OSC2 signal corresponding to a waveform diagram of the luminance values.

FIG. 7 is a schematic diagram showing a waveform diagram of the lamp current signal I _LMP corresponding to a brightness value.

301. . . Power line on and off sensing circuit

302. . . counter

303. . . Digital analog converter

304. . . Sawtooth signal generator

305. . . Comparators

306. . . Oscillator

307. . . Gate

308. . . Non-overlapping drives

Claims (7)

The utility model relates to an electronic ballast for controlling brightness by a power line, which is suitable for a fluorescent lamp. The electronic ballast has a power line opening and closing sensing circuit, which is used for performing a voltage comparison operation on the DC voltage to generate an opening. And detecting a signal, and detecting a time when the filtered DC voltage drops below a reset threshold level to generate a reset signal, wherein the DC voltage and the filtered DC voltage are obtained from a master Input voltage, and the main input voltage is rectified by a power line, and the reset threshold level is higher than the minimum working voltage of the electronic ballast; an oscillating signal gating unit is used for one pulse The signal gates an oscillating signal to generate a gated oscillating signal, wherein a pulse width of the pulse signal is generated according to the opening and closing sensing signal, and the pulse width has a preset value under the action of the reset signal. And the gated oscillating signal has an active period and a stationary period determined by the pulse signal; and a non-overlapping driver is configured to generate a high side drive according to the gated oscillating signal Signal and a low-side driving signal, wherein the high-side driving signal and the low-side driving signal only during the action of the oscillating signals by the gating activity. For example, in the first application of the patent scope, the power ballast senses the brightness of the electronic ballast, wherein the power line on and off sensing circuit has: a capacitor for filtering the noise of the main input voltage; a voltage dividing circuit for generating the DC voltage according to the main input voltage; a first comparator for generating the on and off sensing signals according to the DC voltage and a sensing threshold voltage; and a a second comparator configured to generate the reset signal according to the filtered DC voltage and a reset threshold voltage, wherein a level of the reset threshold voltage corresponds to the filtered DC voltage being turned off at the power line A level after the scheduled time. For example, in the first application of the patent scope, the power ballast senses the brightness of the electronic ballast, wherein the power line on and off sensing circuit has: a capacitor for filtering the noise of the main input voltage; a voltage dividing circuit for generating the DC voltage according to the main input voltage; a comparator for generating the on and off sensing signals according to the DC voltage and a sensing threshold voltage; a delay unit, The method is for delaying the opening and closing of the sensing signal for a predetermined time to generate a delayed signal; and a gate for generating the reset signal according to the opening and closing sensing signal and the delayed signal. For example, in the first application of the patent scope, the power ballast senses the brightness of the electronic ballast, wherein the power line on and off sensing circuit has: a moving circuit for generating the filtered DC according to the main input voltage. a capacitor, which is used to filter out the filtered DC voltage noise; a Schmitt trigger circuit for generating the on and off sensing signals according to the filtered DC voltage, wherein the Schmitt The trigger circuit has a high threshold voltage corresponding to a UVLO turn-on level, and a low threshold voltage corresponding to a UVLO turn-off level; and a comparator for filtering the DC voltage and The reset threshold voltage is generated by a reset threshold voltage, wherein the level of the reset threshold voltage corresponds to a level at which the filtered DC voltage is turned off after the power line is turned off for a predetermined time. For example, in the first application of the patent scope, the power ballast senses the brightness of the electronic ballast, wherein the power line on and off sensing circuit has: a moving circuit for generating the filtered DC according to the main input voltage. a capacitor, which is used to filter out the filtered DC voltage noise; a Schmitt trigger circuit for generating the on and off sensing signals according to the filtered DC voltage, wherein the Schmitt The trigger circuit has a high threshold voltage corresponding to a UVLO turn-on level, and a low threshold voltage corresponding to a UVLO turn-off level; a delay unit for delaying the turn-on and turn-off sensing signals The predetermined time is to generate a delayed signal; and a gate is used to generate the reset signal according to the opening and closing sensing signals and the delayed signal. For example, the electronic ballast with the power line sensing and adjusting the brightness according to the first aspect of the patent application, wherein the oscillating signal control unit has: a pulse width modulator for generating the signal according to the opening and closing sensing signals a pulse signal, wherein a pulse width of the pulse signal is determined according to a count value of the open and closed sensing signals; an oscillator for generating the oscillation signal; and a gate for the pulse signal And the oscillating signal performs a logical AND operation to generate the gated oscillating signal. An electronic ballast for sensing brightness by power line sensing, suitable for fluorescent lamps, wherein the electronic ballast is integrated into a single chip, the electronic ballast has: a power line opening and closing sensing circuit, which is used for one The DC voltage performs a voltage comparison operation to generate an on and off sensing signal, wherein the DC voltage is derived from a main input voltage, and the main input voltage is rectified by a power line; a pulse width modulator, The method is configured to generate a pulse signal according to the opening and closing sensing signals and an oscillating signal, wherein a pulse width of the pulse signal is determined according to a count value of the opening and closing sensing signals; and an oscillator is used for Generating the oscillating signal; and a gate for performing a logical AND operation on the pulse signal and the oscillating signal to generate a gated oscillating signal, wherein the gated oscillating signal has an activity period determined by the pulse signal And a non-overlapping driver for generating a high side driving signal and a low side driving signal according to the gated oscillating signal, wherein the high side driving signal And the low-side driving signal only during the action of the oscillating signals by the gating activity.