TWI400991B - Control circuit with frequency compensation - Google Patents

Control circuit with frequency compensation Download PDF

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TWI400991B
TWI400991B TW98107316A TW98107316A TWI400991B TW I400991 B TWI400991 B TW I400991B TW 98107316 A TW98107316 A TW 98107316A TW 98107316 A TW98107316 A TW 98107316A TW I400991 B TWI400991 B TW I400991B
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oscillator
input
control circuit
output
input terminal
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TW98107316A
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Chinese (zh)
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TW201034512A (en
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Chia Chieh Hung
Yen Hui Wang
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Grenergy Opto Inc
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Description

具頻率補償之控制電路Control circuit with frequency compensation

本發明為提供一種應用於開迴路控制系統之控制電路,尤指一種當系統所需的導通時間小於最小導通時間則控制電路自動降頻的具頻率補償之控制電路。The invention provides a control circuit applied to an open loop control system, in particular to a control circuit with frequency compensation which automatically reduces the frequency of the control circuit when the required on-time of the system is less than the minimum on-time.

按,發光二極體已經是近年來最重要的一種發光源了,由於發光二極體具有發光效率高、使用壽命長、不易損壞、耗電量少、環保與體積小等等優點,於強調節能的現代,非常符合目前的需求。而早期由於發光二極體之發光亮度不足常常被應用在指示燈與顯示板之發光上,然,近年來由於材料及技術突破之下,發光二極體的發光亮度已經有了非常多的提升了,尤其是白光發光二極體的出現,更使得發光二極體漸漸的取代目前傳統照明設備。According to the light-emitting diode, it has become the most important kind of light source in recent years. Because the light-emitting diode has the advantages of high luminous efficiency, long service life, no damage, low power consumption, environmental protection and small volume, etc. Modern energy-saving, very in line with current needs. In the early days, due to the insufficient brightness of the light-emitting diodes, it was often applied to the light of the indicator light and the display panel. However, in recent years, due to the breakthrough of materials and technology, the brightness of the light-emitting diode has been greatly improved. The emergence of white light-emitting diodes, in particular, has led to the replacement of current conventional lighting devices by light-emitting diodes.

而當發光二極體的應用越來越多時,為了驅動發光二極體的驅動電路也就非常重要了,驅動電路可以適當的提供發光二極體穩定的電源,使得發光二極體能夠穩定的發光,而為了降低成本與電路空間,更有許多廠商將照明驅動電路整合於積體電路內,廠商只要利用一照明驅動電路積體電路,即可以有效的驅動發光二極體以作為照明使用。When the application of the light-emitting diode is more and more, it is very important to drive the driving circuit of the light-emitting diode, and the driving circuit can appropriately provide the stable power supply of the light-emitting diode, so that the light-emitting diode can be stabilized. In order to reduce the cost and circuit space, many manufacturers integrate the illumination driver circuit into the integrated circuit. The manufacturer can effectively drive the LED for illumination by using an illumination driver circuit. .

然上述照明驅動電路於使用時,為確實存在下列問題與缺失尚待改進:However, when the above illumination driving circuit is used, the following problems and defects are indeed to be improved:

市面上的照明驅動電路都無法應用於重線電壓(heavy line)且輕載(light load)的條件下,係因為此時電路所需的導通時間往往小於最小的導通時間,因此造成了通過照明元件例如發光二極體之電流過大而導致發光二極體燒毀。The lighting driver circuits on the market cannot be applied to the heavy line and light load conditions, because the on-time required by the circuit is often less than the minimum on-time, thus causing the illumination through The current of an element such as a light-emitting diode is too large to cause the light-emitting diode to burn out.

是以,要如何解決上述習用之問題與缺失,即為本發明之發明人與從事此行業之相關廠商所亟欲研究改善之方向所在者。Therefore, how to solve the above problems and deficiencies in the above-mentioned applications, that is, the inventors of the present invention and those involved in the industry are eager to study the direction of improvement.

故,本發明之發明人有鑑於上述缺失,乃搜集相關資料,經由多方評估及考量,並以從事於此行業累積之多年經驗,經由不斷試作及修改,始設計出此種當系統所需的導通時間小於最小導通時間則控制電路自動降頻的具頻率補償之控制電路的發明專利者。Therefore, the inventors of the present invention have collected the relevant materials in view of the above-mentioned shortcomings, and through multi-party evaluation and consideration, and through years of experience accumulated in the industry, through continuous trial and modification, the design of such a system is required. The inventor of the control circuit with frequency compensation is automatically controlled by the control circuit when the on-time is less than the minimum on-time.

本發明之主要目的在於提供一種可根據系統需要而自動降頻的控制電路。The main object of the present invention is to provide a control circuit that can automatically down-convert according to system requirements.

為了達到上述目的,本發明之控制電路包括有振盪器、第一比較器、第二比較器與正反器。其中,該振盪器係可週期性的產生設置信號;該第一比較器包括有可供輸入電流取樣之第一輸入端,可供輸入參考電壓與直流位準電壓總和電壓之第二輸入端,以及可根據該第一輸入端與該第二輸入端進行比較,當該電流取樣大於該總和電壓值時即產生一降頻信號輸出至該振盪器之第一輸出端,藉此降低該振盪器產生設置信號之頻率;該第二比較器包括有可供輸入該電流取樣之第三輸入端,可供輸入該參考電壓之第四輸入端,以及可根據該第三輸入端與該第四輸入端進行比較,當該電流取樣大於該參考電壓時即產生一重置信號輸出之第二輸出端;該正反器包括有設置端、重置端與輸出端,該設置端可接收該振盪器所產生之設置信號,而該重置端可接收該第二輸出端所產生之重置信號,該輸出端可根據該設置信號與該重置信號進行高位準與低位準之切換。In order to achieve the above object, the control circuit of the present invention includes an oscillator, a first comparator, a second comparator, and a flip-flop. Wherein, the oscillator is capable of periodically generating a setting signal; the first comparator includes a first input terminal for sampling the input current, and a second input terminal for inputting a reference voltage and a DC level voltage summing voltage, And comparing, according to the first input end, the second input end, when the current sample is greater than the sum voltage value, generating a down-converted signal output to the first output end of the oscillator, thereby lowering the oscillator Generating a frequency of the set signal; the second comparator includes a third input terminal for inputting the current sample, a fourth input terminal for inputting the reference voltage, and according to the third input terminal and the fourth input Comparing the end, when the current sampling is greater than the reference voltage, generating a second output end of the reset signal output; the flip-flop includes a setting end, a reset end and an output end, and the setting end can receive the oscillator a set signal generated, and the reset end can receive a reset signal generated by the second output end, and the output end can perform high level and low level according to the set signal and the reset signal Change.

藉此,當第一比較器之電流取樣大於參考電壓與直流位準電壓之總和電壓,也就是當系統所需的導通時間小於最小導通時間時,該第一比較器即會輸出一降頻信號降低該振盪器之頻率,以符合電路所需之頻率,進一步避免系統負載電流過大造成燒毀的危險。Thereby, when the current sample of the first comparator is greater than the sum voltage of the reference voltage and the DC level voltage, that is, when the required on-time of the system is less than the minimum on-time, the first comparator outputs a down-converted signal. Reduce the frequency of the oscillator to match the frequency required by the circuit, further avoiding the risk of burnout due to excessive system load current.

為達成上述目的及功效,本發明所採用之技術手段及構造,茲繪圖就本發明較佳實施例詳加說明其特徵與功能如下,俾利完全了解。In order to achieve the above objects and effects, the technical means and the structure of the present invention will be described in detail with reference to the preferred embodiments of the present invention.

請參閱第一圖與第二圖所示,係為本發明較佳實施例之實施示意圖一與二,由圖中可清楚看出本發明係可應用於照明驅動電路1中, 該照明驅動電路1包括有發光二極體14、電容15、電感16、二極體17、功率電晶體18與電阻19,其中,該功率電晶體18於本電路中做為開關使用,而功率電晶體18之其中兩端分別連接至一控制電路2,分別為輸出端63與電流取樣11端,而該控制電路2包括有(由第二圖觀之):Referring to the first and second figures, which are schematic diagrams of the first and second embodiments of the preferred embodiment of the present invention, it will be apparent from the drawings that the present invention can be applied to the illumination driving circuit 1. The illumination driving circuit 1 includes a light emitting diode 14, a capacitor 15, an inductor 16, a diode 17, a power transistor 18 and a resistor 19, wherein the power transistor 18 is used as a switch in the circuit, and the power is used. The two ends of the transistor 18 are respectively connected to a control circuit 2, which is an output end 63 and a current sampling end 11, respectively, and the control circuit 2 includes (from the second figure):

振盪器3,該振盪器3可週期性的產生一設置信號31; 第一比較器4,該第一比較器4可供產生一降頻信號44以降低該振盪器3之頻率,而該第一比較器4包括有:第一輸入端41,該第一輸入端41係供輸入該電流取樣11;第二輸入端42,該第二輸入端42係供輸入參考電壓12與直流位準電壓13之總和電壓,該參考電壓12為控制電路2內所產生,而該直流位準電壓13可為0.1伏特至10伏特之間,一般而言依照材料特性通常為0.25伏特;第一輸出端43,係可根據該第一輸入端41與該第二輸入端42進行比較,俾當該電流取樣11大於該總和電壓時即產生一降頻信號44輸出至該振盪器3,藉此降低該振盪器3產生設置信號31之頻率。Oscillator 3, the oscillator 3 can periodically generate a setting signal 31; a first comparator 4, the first comparator 4 is configured to generate a down-converted signal 44 to reduce the frequency of the oscillator 3, and the first comparator 4 includes a first input terminal 41, the first input terminal 41 is for inputting the current sample 11; a second input terminal 42 is for summing the input reference voltage 12 and the DC level voltage 13 which is generated in the control circuit 2, and The DC level voltage 13 can be between 0.1 volts and 10 volts, typically 0.25 volts according to material properties; the first output 43 can be based on the first input 41 and the second input 42 In comparison, when the current sample 11 is greater than the sum voltage, a down-converted signal 44 is generated and output to the oscillator 3, thereby reducing the frequency at which the oscillator 3 generates the set signal 31.

第二比較器5,該第二比較器5包括有:第三輸入端51,該第三輸入端51可供輸入該電流取樣11;第四輸入端52,該第四輸入端52可供輸入該參考電壓12;第二輸出端53,該第二輸出端53係可根據該第三輸入端51與該第四輸入端52進行比較,當該電流取樣11大於該參考電壓12時即產生一重置信號54輸出。a second comparator 5, the second comparator 5 includes: a third input terminal 51 for inputting the current sample 11; a fourth input terminal 52, the fourth input terminal 52 is inputtable The second output terminal 53 is compared with the fourth input terminal 52 according to the third input terminal 51. When the current sample 11 is greater than the reference voltage 12, a voltage is generated. The reset signal 54 is output.

正反器6,該正反器6可為RS正反器6,該正反器6包括有設置端61、重置端62與輸出端63,該設置端61可接收該振盪器3所產生之設置信號31,而該重置端62可接收該第二輸出端53所產生之重置信號54,該輸出端63可根據該設置信號31與該重 置信號54進行高位準與低位準之切換。The flip-flop 6 can be an RS flip-flop 6 , and the flip-flop 6 includes a set end 61 , a reset end 62 and an output end 63 , and the set end 61 can receive the oscillator 3 The reset signal 62 can receive the reset signal 54 generated by the second output end 53, and the output end 63 can be based on the set signal 31 and the weight The signal 54 is switched between a high level and a low level.

藉由上述之結構、組成設計,茲就本發明之使用作動情形說明如下,請同時配合參閱第一圖、第二圖、第三圖與第四圖所示,係為本發明較佳實施例之實施示意圖一、二、動作示意圖三與四,由圖中可清楚看出,當本發明之控制電路2應用於照明驅動電路1並且作動時,由於該電感16會先進行充電,而使得照明驅動電路1具有電感性,進一步使得作為開關使用之功率電晶體18為開啟(ON),而該振盪器3即週期性的產生設置信號31輸出至正反器6之設置端61,藉此,使得正反器6之輸出端63切換為高位準輸出。With the above structure and composition design, the operation of the present invention will be described as follows. Please refer to the first, second, third and fourth figures at the same time, which is a preferred embodiment of the present invention. FIG. 1 and FIG. 2 are schematic diagrams 3 and 4, as is clear from the figure, when the control circuit 2 of the present invention is applied to the illumination driving circuit 1 and is actuated, since the inductor 16 is charged first, the illumination is made. The driving circuit 1 is inductive, further causing the power transistor 18 used as a switch to be turned on (ON), and the oscillator 3, that is, the periodic generating setting signal 31 is outputted to the setting end 61 of the flip-flop 6, whereby The output 63 of the flip-flop 6 is switched to a high level output.

又因為功率電晶體18為開啟狀態,該電流取樣11即會因為電感16充電而慢慢提高,當電流取樣11大於該參考電壓12時,該第二比較器5即會產生一重置信號54輸出,藉此,即使得該正反器6切換為低位準輸出。Moreover, since the power transistor 18 is in an on state, the current sample 11 is gradually increased due to the charging of the inductor 16. When the current sample 11 is greater than the reference voltage 12, the second comparator 5 generates a reset signal 54. The output, whereby the flip-flop 6 is switched to a low level output.

而又當電流取樣11繼續提高並且大於該參考電壓12與該直流位準電壓13之總和電壓時,此時即為此照明驅動電路1之所需導通時間小於最小的導通時間,該第一比較器4即會降頻信號44輸出至該振盪器3,藉此降低該振盪器3產生設置信號31之頻率,以令照明驅動電路1所需之導通時間大於最小的導通時間,藉由本發明之控制電路2,可以使得照明驅動電路1同樣的可以應用於重線電壓(heavy line)且輕載(light load)的條件下,避免照明元件例如發光二極體14由於通過電流過大導致燒毀,進一步增加照明驅動電路1模組的應用範圍,也可以作為極端系統條件的保護機制。When the current sampling 11 continues to increase and is greater than the sum voltage of the reference voltage 12 and the DC level voltage 13, the required conduction time for the illumination driving circuit 1 is less than the minimum conduction time, the first comparison. The device 4 outputs a down-converted signal 44 to the oscillator 3, thereby reducing the frequency at which the oscillator 3 generates the set signal 31, so that the on-time required for the illumination driving circuit 1 is greater than the minimum on-time, by the present invention The control circuit 2 can make the illumination driving circuit 1 equally applicable to the heavy line and light load conditions, and prevent the illumination element such as the light-emitting diode 14 from being burnt due to excessive current flow, further Increasing the application range of the module of the illumination driving circuit 1 can also be used as a protection mechanism for extreme system conditions.

再者,如第四圖可以看出,由於系統所需之導通時間小於最小的導通時間,造成負載電流7不斷的提高,若此情形持續發生,將會造成負載電流7過大燒毀負載,而本發明由於第一比較器4會產生一降頻信號44輸出至振盪器3,以降低該振盪器3產生設置信號31之頻率,進一步使得系統原本週期71變慢為調整週期72,達到自動頻率補償之實用進步性。Furthermore, as can be seen from the fourth figure, since the on-time required by the system is less than the minimum on-time, the load current 7 is continuously increased. If this situation continues to occur, the load current 7 will be too large to burn the load. In the invention, the first comparator 4 generates a down-converted signal 44 to be output to the oscillator 3 to reduce the frequency at which the oscillator 3 generates the set signal 31, further reducing the system original period 71 to the adjustment period 72, and achieving automatic frequency compensation. Practical and progressive.

是以,本發明之具頻率補償之控制電路為可改善習用之技術關鍵 在於:Therefore, the control circuit with frequency compensation of the present invention is a key to improving the technical application of the prior art. Lie in:

本發明於振盪器3上另外連接了第一比較器4,俾當照明驅動電路1之電流取樣11提高並且大於該參考電壓12與該直流位準電壓13之總和電壓時,此時即為此照明驅動電路1之所需導通時間小於最小的導通時間,該第一比較器4即會產生一降頻信號44輸出至該振盪器3,藉此降低該振盪器3產生設置信號31之頻率,以令照明驅動電路1所需之導通時間大於最小的導通時間。The first comparator 4 is additionally connected to the oscillator 3, and when the current sampling 11 of the illumination driving circuit 1 is increased and greater than the sum of the reference voltage 12 and the DC level voltage 13, this is the case. The required on-time of the illumination driving circuit 1 is less than the minimum on-time, and the first comparator 4 generates a down-converted signal 44 to be output to the oscillator 3, thereby reducing the frequency at which the oscillator 3 generates the set signal 31. In order to make the illumination circuit 1 require a conduction time greater than the minimum on-time.

藉由本發明之控制電路2,可以使得照明驅動電路1同樣的可以應用於重線電壓(heavy line)且輕載(light load)的條件下,避免電流過大導致燒毀發光二極體14。With the control circuit 2 of the present invention, the illumination driving circuit 1 can be similarly applied to a heavy line and a light load, and the current is prevented from being excessively burned to cause the light-emitting diode 14 to be burnt.

惟,以上所述僅為本發明之較佳實施例而已,非因此即拘限本發明之專利範圍,故舉凡運用本發明說明書及圖式內容所為之簡易修飾及等效結構變化,均應同理包含於本發明之專利範圍內,合予陳明。However, the above description is only for the preferred embodiment of the present invention, and thus the scope of the present invention is not limited thereto, so that the simple modification and equivalent structural changes that are made by using the specification and the contents of the present invention should be the same. It is included in the scope of the patent of the present invention and is combined with Chen Ming.

綜上所述,本發明之具頻率補償之控制電路於使用時,為確實能達到其功效及目的,故本發明誠為一實用性優異之發明,為符合發明專利之申請要件,爰依法提出申請,盼 審委早日賜准本發明,以保障發明人之辛苦發明,倘若 鈞局審委有任何稽疑,請不吝來函指示,發明人定當竭力配合,實感公便。In summary, the frequency compensation control circuit of the present invention can achieve its efficacy and purpose when used, so the invention is an invention with excellent practicability, and is an application requirement for the invention patent, and is proposed according to law. To apply, I hope that the trial committee will grant the invention as soon as possible to protect the inventor's hard work. If there is any doubt in the audit committee, please do not hesitate to give instructions, the inventor will try his best to cooperate and feel polite.

1‧‧‧照明驅動電路1‧‧‧Lighting drive circuit

11‧‧‧電流取樣11‧‧‧current sampling

12‧‧‧參考電壓12‧‧‧Reference voltage

13‧‧‧直流位準電壓13‧‧‧DC level voltage

14‧‧‧發光二極體14‧‧‧Lighting diode

15‧‧‧電容15‧‧‧ Capacitance

16‧‧‧電感16‧‧‧Inductance

17‧‧‧二極體17‧‧‧ diode

18‧‧‧功率電晶體18‧‧‧Power transistor

19‧‧‧電阻19‧‧‧resistance

2‧‧‧控制電路2‧‧‧Control circuit

3‧‧‧振盪器3‧‧‧Oscillator

31‧‧‧設置信號31‧‧‧Set signal

4‧‧‧第一比較器4‧‧‧First comparator

41‧‧‧第一輸入端41‧‧‧ first input

42‧‧‧第二輸入端42‧‧‧second input

43‧‧‧第一輸出端43‧‧‧ first output

44‧‧‧降頻信號44‧‧‧down signal

5‧‧‧第二比較器5‧‧‧Second comparator

51‧‧‧第三輸入端51‧‧‧ third input

52‧‧‧第四輸入端52‧‧‧ fourth input

53‧‧‧第二輸出端53‧‧‧second output

54‧‧‧重置信號54‧‧‧Reset signal

6‧‧‧正反器6‧‧‧Fracture

61‧‧‧設置端61‧‧‧Setting end

62‧‧‧重置端62‧‧‧Reset end

63‧‧‧輸出端63‧‧‧ Output

7‧‧‧負載電流7‧‧‧Load current

71‧‧‧原本週期71‧‧‧ original cycle

72‧‧‧調整週期72‧‧‧ adjustment cycle

第一圖 係為本發明較佳實施例之實施示意圖一。The first figure is a first embodiment of a preferred embodiment of the invention.

第二圖 係為本發明較佳實施例之實施示意圖二。The second figure is a second embodiment of the preferred embodiment of the present invention.

第三圖 係為本發明較佳實施例之動作示意圖一。The third figure is a schematic diagram 1 of the operation of the preferred embodiment of the present invention.

第四圖 係為本發明較佳實施例之動作示意圖二。The fourth figure is a schematic diagram 2 of the action of the preferred embodiment of the present invention.

11‧‧‧電流取樣11‧‧‧current sampling

12‧‧‧參考電壓12‧‧‧Reference voltage

13‧‧‧直流位準電壓13‧‧‧DC level voltage

2‧‧‧控制電路2‧‧‧Control circuit

3‧‧‧振盪器3‧‧‧Oscillator

31‧‧‧設置信號31‧‧‧Set signal

4‧‧‧第一比較器4‧‧‧First comparator

41‧‧‧第一輸入端41‧‧‧ first input

42‧‧‧第二輸入端42‧‧‧second input

43‧‧‧第一輸出端43‧‧‧ first output

44‧‧‧降頻信號44‧‧‧down signal

5‧‧‧第二比較器5‧‧‧Second comparator

51‧‧‧第三輸入端51‧‧‧ third input

52‧‧‧第四輸入端52‧‧‧ fourth input

53‧‧‧第二輸出端53‧‧‧second output

54‧‧‧重置信號54‧‧‧Reset signal

6‧‧‧正反器6‧‧‧Fracture

61‧‧‧設置端61‧‧‧Setting end

62‧‧‧重置端62‧‧‧Reset end

63‧‧‧輸出端63‧‧‧ Output

Claims (3)

一種具頻率補償之控制電路,係可應用於開迴路控制系統中,所述控制電路包括有:一振盪器,係可週期性的產生一設置信號;一第一比較器,包括有:一第一輸入端,係可供輸入一電流取樣;一第二輸入端,係可供輸入一參考電壓與一直流位準電壓之總和電壓;一第一輸出端,耦接於該振盪器,係可根據該第一輸入端與該第二輸入端進行比較,當該電流取樣大於該總和電壓值時即產生一降頻信號輸出至該振盪器,藉此降低該振盪器產生設置信號之頻率;一第二比較器,包括有:一第三輸入端,係可供輸入該電流取樣;一第四輸入端,係可供輸入該參考電壓;一第二輸出端,係可根據該第三輸入端與該第四輸入端進行比較,當該電流取樣大於該參考電壓時即產生一重置信號輸出;一正反器,係包括有一設置端、一重置端與一輸出端,其中,該設置端耦接於該振盪器,可接收該振盪器所產生之設置信號,而該重置端耦接於該第二比較器,可接收該第二輸出端所產生之重置信號,該輸出端可根據該設置信號與該重置信號進行高位準與低位準之切換。 A control circuit with frequency compensation is applicable to an open loop control system, the control circuit includes: an oscillator that periodically generates a set signal; and a first comparator, including: a first An input terminal is configured to input a current sampling; a second input terminal is configured to input a sum of a reference voltage and a DC current level voltage; a first output end coupled to the oscillator is Comparing the first input end and the second input end, when the current sampling is greater than the sum voltage value, generating a down-converted signal output to the oscillator, thereby reducing a frequency at which the oscillator generates the setting signal; The second comparator includes: a third input terminal for inputting the current sampling; a fourth input terminal for inputting the reference voltage; and a second output terminal for selecting the third input terminal according to the third input terminal Comparing with the fourth input end, when the current sampling is greater than the reference voltage, a reset signal output is generated; a flip-flop includes a setting end, a reset end and an output end, wherein the setting The oscillator is coupled to the oscillator to receive a setting signal generated by the oscillator, and the reset terminal is coupled to the second comparator to receive a reset signal generated by the second output terminal, where the output terminal can be Switching between the high level and the low level is performed according to the setting signal and the reset signal. 如申請專利範圍第1項所述之具頻率補償之控制電路,其中該直流位準電壓可為0.1伏特至10伏特之間。 A control circuit with frequency compensation as described in claim 1 wherein the DC level voltage can be between 0.1 volts and 10 volts. 如申請專利範圍第1項所述之具頻率補償之控制電路,其中該正反器為RS正反器。 A control circuit with frequency compensation as described in claim 1 wherein the flip-flop is an RS flip-flop.
TW98107316A 2009-03-06 2009-03-06 Control circuit with frequency compensation TWI400991B (en)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWM302195U (en) * 2006-05-16 2006-12-01 System General Corp Primary side controlled switching regulator
JP2007185066A (en) * 2006-01-10 2007-07-19 Rohm Co Ltd Power supply and electronic device with same
US20080232018A1 (en) * 2007-03-16 2008-09-25 Ta-Yung Yang Control Circuit with Short-circuit Protection for Current Sense Terminal of Power Converters
TW200849824A (en) * 2007-06-14 2008-12-16 System General Corp PWM controller and method for compensating a maximum output power of a power converter

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007185066A (en) * 2006-01-10 2007-07-19 Rohm Co Ltd Power supply and electronic device with same
TWM302195U (en) * 2006-05-16 2006-12-01 System General Corp Primary side controlled switching regulator
US20080232018A1 (en) * 2007-03-16 2008-09-25 Ta-Yung Yang Control Circuit with Short-circuit Protection for Current Sense Terminal of Power Converters
TW200849824A (en) * 2007-06-14 2008-12-16 System General Corp PWM controller and method for compensating a maximum output power of a power converter

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