TWI393108B - Liquid crystal display device and method for driving same - Google Patents

Liquid crystal display device and method for driving same Download PDF

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TWI393108B
TWI393108B TW97125306A TW97125306A TWI393108B TW I393108 B TWI393108 B TW I393108B TW 97125306 A TW97125306 A TW 97125306A TW 97125306 A TW97125306 A TW 97125306A TW I393108 B TWI393108 B TW I393108B
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circuit
voltage
liquid crystal
driving
signal
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TW201003614A (en
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Huan-Xi Peng
Sha Feng
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Chimei Innolux Corp
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Description

液晶顯示裝置及其驅動方法Liquid crystal display device and driving method thereof

本發明係關於一種液晶顯示裝置及驅動方法。The present invention relates to a liquid crystal display device and a driving method.

液晶顯示裝置因其具有輕薄、輝度高、低輻射等優點已被廣泛應用於個人電腦等電子設備中。惟,在開機瞬間,由於傳送之工作訊號不穩定,會對液晶顯示裝置產生干擾,進而導致開機雜訊等不良現象。Liquid crystal display devices have been widely used in electronic devices such as personal computers because of their advantages such as lightness, high brightness, and low radiation. However, at the moment of power-on, due to the unstable working signal transmitted, the liquid crystal display device may be disturbed, which may cause undesirable phenomena such as boot noise.

請參閱圖1,係一種先前技術液晶顯示裝置之電路結構示意圖。該液晶顯示裝置1包括一電源電路11、一面板電源電路12、一驅動控制電路13、一資料驅動電路14、一掃描驅動電路15及一顯示面板16。其中,該顯示面板16包括複數畫素單元(未標示),每一畫素單元包括一薄膜電晶體(未標示)及一液晶電容(未標示)。Please refer to FIG. 1 , which is a schematic diagram of a circuit structure of a prior art liquid crystal display device. The liquid crystal display device 1 includes a power supply circuit 11, a panel power supply circuit 12, a drive control circuit 13, a data drive circuit 14, a scan drive circuit 15, and a display panel 16. The display panel 16 includes a plurality of pixel units (not labeled), and each of the pixel units includes a thin film transistor (not labeled) and a liquid crystal capacitor (not labeled).

該電源電路11為該面板電源電路12及該驅動控制電路13提供一工作電壓。該驅動控制電路13向該掃描驅動電路15輸出一掃描控制訊號,並向該資料驅動電路14輸出一時鐘脈衝電壓訊號。該掃描驅動電路15根據該掃描控制訊號對該顯示面板16進行掃描。該資料驅動電路14根據該時鐘脈衝電壓訊號向該顯示面板16輸出資料訊號。The power supply circuit 11 provides an operating voltage for the panel power supply circuit 12 and the drive control circuit 13. The drive control circuit 13 outputs a scan control signal to the scan drive circuit 15 and outputs a clock pulse voltage signal to the data drive circuit 14. The scan driving circuit 15 scans the display panel 16 based on the scan control signal. The data driving circuit 14 outputs a data signal to the display panel 16 according to the clock pulse voltage signal.

該面板電源電路12將由該電源電路11提供之工作電壓轉換成驅動該掃描驅動電路15所需之閘極導通電壓VGH(High-Level Gate Voltage)、閘極截止電壓VGL(Low-Level Gate Voltage)以及驅動該資料驅動電路14 所需之主工作電壓AVDD。其中,主工作電壓AVDD係驅動該顯示面板之薄膜電晶體之高電壓或高電流輸出,其電壓值通常為+5.xV或+12.xV;閘極導通電壓VGH係使薄膜電晶體偏壓之高電壓輸出,其電壓值通常為+15.xV或+24.xV;閘極截止電壓VGL係使薄膜電晶體反向偏壓之反向電壓輸出,其電壓值通常為-10.xV或-6.xV,x為任意自然數。The panel power supply circuit 12 converts the operating voltage supplied from the power supply circuit 11 into a gate-on voltage VGH (High-Level Gate Voltage) and a gate-off voltage VGL (Low-Level Gate Voltage) required to drive the scan driving circuit 15. And driving the data driving circuit 14 The required main operating voltage, AVDD. Wherein, the main working voltage AVDD is a high voltage or high current output of the thin film transistor of the display panel, and the voltage value is usually +5.xV or +12.xV; the gate conduction voltage VGH is used to bias the thin film transistor The high voltage output, the voltage value is usually +15.xV or +24.xV; the gate cutoff voltage VGL is the reverse voltage output of the reverse bias of the thin film transistor, and its voltage value is usually -10.xV or -6.xV, x is any natural number.

請一併參閱圖2,係該液晶顯示裝置1開機過程中面板電源電路12之輸出電壓訊號時序圖。該面板電源電路12接收到該電源電路11輸出之工作電壓後,先輸出驅動該資料驅動電路14所需之主工作電壓AVDD。接著,該面板電源電路12向該掃描驅動電路15輸出一閘極截止電壓VGL。最後,該面板電源電路12向該掃描驅動電路15輸出一閘極導通電壓VGH。Please refer to FIG. 2 together, which is a timing diagram of the output voltage signal of the panel power supply circuit 12 during the startup of the liquid crystal display device 1. After receiving the operating voltage outputted by the power supply circuit 11, the panel power supply circuit 12 outputs the main operating voltage AVDD required to drive the data driving circuit 14. Next, the panel power supply circuit 12 outputs a gate-off voltage VGL to the scan driving circuit 15. Finally, the panel power supply circuit 12 outputs a gate-on voltage VGH to the scan driving circuit 15.

該液晶顯示裝置1之面板電源電路12、驅動控制電路13共同配合為該顯示面板11提供所需之工作電壓及工作訊號,進而使該液晶顯示裝置1正常顯示。The panel power supply circuit 12 and the drive control circuit 13 of the liquid crystal display device 1 cooperate to provide the display panel 11 with the required operating voltage and operation signal, thereby enabling the liquid crystal display device 1 to display normally.

該液晶顯示裝置1開機過程中,該面板電源電路12向該資料驅動電路14輸出該主工作電壓AVDD之後,向該掃描驅動電路15輸出該閘極截止電壓VGL以前,該資料驅動電路14接收到該主工作電壓AVDD,並準備根據該驅動控制電路13輸出之時鐘脈衝電壓訊號向該顯示面板16輸出資料訊號。該掃描驅動電路15未接收到該閘極截止電壓VGL,因而不能完全關閉該顯示面板16之薄膜電 晶體。During the startup of the liquid crystal display device 1, after the panel power supply circuit 12 outputs the main operating voltage AVDD to the data driving circuit 14, the data driving circuit 14 receives the gate-off voltage VGL before outputting the gate-off voltage VGL to the scan driving circuit 15. The main operating voltage AVDD is prepared to output a data signal to the display panel 16 according to the clock pulse voltage signal outputted by the driving control circuit 13. The scan driving circuit 15 does not receive the gate cutoff voltage VGL, and thus cannot completely turn off the thin film power of the display panel 16. Crystal.

惟,該資料驅動電路14接收到該主工作電壓AVDD後會因為誤動而向該顯示面板16輸出雜訊訊號,該雜訊訊號藉由該薄膜電晶體為該顯示面板16之液晶電容充電,從而使該液晶顯示裝置1在開機時,出現閃爍現像,使該液晶顯示裝置1之顯示品質較差。However, after receiving the main working voltage AVDD, the data driving circuit 14 outputs a noise signal to the display panel 16 due to a malfunction, and the noise signal charges the liquid crystal capacitor of the display panel 16 by the thin film transistor. Therefore, when the liquid crystal display device 1 is turned on, a flickering phenomenon occurs, and the display quality of the liquid crystal display device 1 is poor.

有鑑於此,提供一種顯示品質較好之液晶顯示裝置實為必要。In view of this, it is necessary to provide a liquid crystal display device having a good display quality.

有鑑於此,提供一種顯示品質較好之液晶顯示裝置驅動方法亦為必要。In view of the above, it is also necessary to provide a liquid crystal display device driving method with better display quality.

一種液晶顯示裝置包括一顯示面板、複數開關元件、一驅動模塊及一檢測控制電路。該驅動模塊產生電壓訊號。該驅動模塊藉由該複數開關元件驅動該顯示面板。該檢測控制電路檢測該驅動模塊之電壓訊號,並控制該複數開關元件。A liquid crystal display device includes a display panel, a plurality of switching elements, a driving module and a detection control circuit. The drive module generates a voltage signal. The driving module drives the display panel by the plurality of switching elements. The detection control circuit detects a voltage signal of the driving module and controls the plurality of switching elements.

一種液晶顯示裝置驅動方法,其包括以下步驟:提供一顯示面板,其用於顯示各種畫面;提供一驅動模塊,其產生電壓訊號;提供複數開關元件,該驅動模塊藉由該複數開關元件驅動該顯示面板;提供一檢測電路,其檢測該驅動模塊之電壓訊號,並控制該複數開關元件。A liquid crystal display device driving method, comprising the steps of: providing a display panel for displaying various screens; providing a driving module for generating a voltage signal; providing a plurality of switching elements, wherein the driving module drives the plurality of switching elements a display panel; providing a detection circuit that detects a voltage signal of the driving module and controls the plurality of switching elements.

本發明之液晶顯示裝置及驅動方法在該液晶顯示裝置開機時,該複數開關元件使該驅動模塊輸出之雜訊訊號不能輸出到該顯示面板,並使該開關元件在各電壓訊號穩定 後開啟,使該液晶顯示裝置正常顯示。減少開機時雜訊訊號引起之液晶顯示裝置開機閃爍現像,改善該液晶顯示裝置之顯示品質。In the liquid crystal display device and the driving method of the present invention, when the liquid crystal display device is turned on, the plurality of switching elements can output the noise signal outputted by the driving module to the display panel, and stabilize the switching element in each voltage signal After the opening, the liquid crystal display device is normally displayed. The display of the liquid crystal display device caused by the noise signal at the time of starting up is reduced to improve the display quality of the liquid crystal display device.

請參閱圖3,係本發明液晶顯示裝置第一實施方式之電路結構示意圖。該液晶顯示裝置2包括一驅動模塊29、一檢測控制電路26、一顯示面板27及複數開關元件28。 其中,該驅動模塊29包括一電源電路21、一面板電源電路22、一驅動控制電路23、一資料驅動電路24及一掃描驅動電路25。Please refer to FIG. 3 , which is a schematic structural diagram of a circuit of a first embodiment of a liquid crystal display device of the present invention. The liquid crystal display device 2 includes a driving module 29, a detection control circuit 26, a display panel 27, and a plurality of switching elements 28. The driving module 29 includes a power circuit 21, a panel power circuit 22, a driving control circuit 23, a data driving circuit 24, and a scan driving circuit 25.

該電源電路21包括一電源輸出端211。The power circuit 21 includes a power output 211.

該面板電源電路22包括一電源輸入端221、一主工作電壓輸出端222、一閘極導通電壓輸出端223及一閘極截止電壓輸出端224。該電源輸入端221與該電源電路21之電源輸出端211電連接。The panel power circuit 22 includes a power input terminal 221, a main operating voltage output terminal 222, a gate turn-on voltage output terminal 223, and a gate turn-off voltage output terminal 224. The power input terminal 221 is electrically connected to the power output terminal 211 of the power circuit 21.

該驅動控制電路23包括一控制電源輸入端231、一時鐘訊號輸出端232及一掃描訊號輸出端233。該控制電源輸入端231電連接該電源電路21之電源輸出端211。The drive control circuit 23 includes a control power input terminal 231, a clock signal output terminal 232, and a scan signal output terminal 233. The control power input terminal 231 is electrically connected to the power output terminal 211 of the power circuit 21.

該資料驅動電路24包括一主工作電壓輸入端241、一時鐘訊號輸入端242及複數資料訊號輸出端243。該主工作電壓輸入端241電連接該面板電源電路22之主工作電壓輸出端222。該時鐘訊號輸入端242電連接該驅動控制電路23之時鐘訊號輸出端232。The data driving circuit 24 includes a main operating voltage input terminal 241, a clock signal input terminal 242 and a plurality of data signal output terminals 243. The main operating voltage input terminal 241 is electrically coupled to the main operating voltage output terminal 222 of the panel power supply circuit 22. The clock signal input terminal 242 is electrically coupled to the clock signal output terminal 232 of the drive control circuit 23.

該掃描驅動電路25包括一閘極導通電壓輸入端251、 一閘極截止電壓輸入端252、一掃描訊號輸入端254及複數掃描輸出端253。該閘極導通電壓輸入端251與該面板電源電路22之閘極導通電壓輸出端223電連接。該閘極截止電壓輸入端252電連接該面板電源電路22之閘極截止電壓輸出端224。該掃描訊號輸入端254電連接該驅動控制電路23之掃描訊號輸出端233。The scan driving circuit 25 includes a gate turn-on voltage input terminal 251, A gate cutoff voltage input terminal 252, a scan signal input terminal 254 and a plurality of scan output terminals 253. The gate-on voltage input terminal 251 is electrically connected to the gate-on voltage output terminal 223 of the panel power supply circuit 22. The gate cutoff voltage input terminal 252 is electrically coupled to the gate cutoff voltage output terminal 224 of the panel power supply circuit 22. The scan signal input terminal 254 is electrically connected to the scan signal output terminal 233 of the drive control circuit 23.

該開關元件28包括一開關控制端281。該開關元件28係一常閉型開關元件,則該開關元件28未被施加控制訊號至該開關控制端281時,該開關元件28斷開。The switching element 28 includes a switch control terminal 281. The switching element 28 is a normally closed switching element. When the switching element 28 is not applied with a control signal to the switching control terminal 281, the switching element 28 is turned off.

該顯示面板27包括複數資料線271及複數掃描線272。該複數資料線271藉由該複數開關元件28分別對應電連接該資料驅動電路24之資料訊號輸出端243。該複數掃描線272分別對應電連接該掃描驅動電路25之複數掃描輸出端253。The display panel 27 includes a plurality of data lines 271 and a plurality of scan lines 272. The plurality of data lines 271 are electrically connected to the data signal output terminal 243 of the data driving circuit 24 by the plurality of switching elements 28, respectively. The plurality of scan lines 272 respectively correspond to the plurality of scan output ends 253 electrically connected to the scan drive circuit 25.

該檢測控制電路26包括一檢測端261及一控制輸出端262。該檢測控制電路26內部包括一檢測電路263及一延時電路264。該檢測端261電連接該驅動控制電路23之時鐘訊號輸出端232。該控制輸出端262電連接該複數開關元件28之該開關控制端281。The detection control circuit 26 includes a detection terminal 261 and a control output 262. The detection control circuit 26 internally includes a detection circuit 263 and a delay circuit 264. The detecting terminal 261 is electrically connected to the clock signal output terminal 232 of the driving control circuit 23. The control output 262 is electrically coupled to the switch control terminal 281 of the plurality of switching elements 28.

該液晶顯示裝置2之工作原理如下:該電源電路21產生一電源電壓,並藉由該電源輸出端211輸出至該面板電源電路22。The working principle of the liquid crystal display device 2 is as follows: The power supply circuit 21 generates a power supply voltage and outputs the power supply output terminal 211 to the panel power supply circuit 22.

該面板電源電路22接收該電源電壓後,先產生一主工作電壓AVDD,並藉由該主工作電壓輸出端222輸出至該 資料驅動電路24;然後,該面板電源電路22產生一閘極截止電壓VGL,並藉由該閘極截止電壓輸出端224輸出至該掃描驅動電路25;最後,該面板電源電路22產生一閘極導通電壓VGH,並藉由該閘極導通電壓輸出端223輸出至該掃描驅動電路25。After receiving the power voltage, the panel power circuit 22 first generates a main operating voltage AVDD, and outputs the main operating voltage output 222 to the The data driving circuit 24; then, the panel power supply circuit 22 generates a gate-off voltage VGL, and outputs the gate-off voltage output terminal 224 to the scan driving circuit 25; finally, the panel power circuit 22 generates a gate. The voltage VGH is turned on and output to the scan driving circuit 25 via the gate-on voltage output terminal 223.

該驅動控制電路23接收外部電路(圖未示)輸入之同步訊號並對該同步訊號進行分析處理,在該面板電源電路22穩定輸出該主工作電壓AVDD、閘極截止電壓VGL及閘極導通電壓VGH後,根據該同步訊號生成一掃描訊號及一時鐘脈衝電壓訊號。該掃描訊號藉由該掃描訊號輸出端233輸出至該掃描驅動電路25。該時鐘脈衝電壓訊號藉由該時鐘訊號輸出端232輸出至該資料驅動電路24。The driving control circuit 23 receives the synchronization signal input from an external circuit (not shown) and analyzes the synchronization signal, and stably outputs the main operating voltage AVDD, the gate-off voltage VGL and the gate-on voltage in the panel power supply circuit 22. After VGH, a scan signal and a clock pulse voltage signal are generated according to the synchronization signal. The scan signal is output to the scan driving circuit 25 via the scan signal output terminal 233. The clock pulse voltage signal is output to the data driving circuit 24 via the clock signal output terminal 232.

該掃描驅動電路25接收該掃描訊號,並根據該掃描訊號對該顯示面板27進行掃描。The scan driving circuit 25 receives the scan signal and scans the display panel 27 according to the scan signal.

該資料驅動電路24接收該時鐘脈衝電壓訊號。在該時鐘脈衝電壓訊號一脈衝週期中,時鐘脈衝電壓訊號之上升沿使該資料驅動電路24從一外部電路(圖未示)讀取資料訊號;時鐘脈衝電壓訊號之下降沿使該資料驅動電路24藉由該複數資料訊號輸出端243及該開關元件28輸出資料訊號至該顯示面板27。The data driving circuit 24 receives the clock pulse voltage signal. During the pulse period of the clock pulse signal, the rising edge of the clock pulse signal causes the data driving circuit 24 to read the data signal from an external circuit (not shown); the falling edge of the clock pulse signal causes the data driving circuit The data signal output terminal 243 and the switching element 28 output the data signal to the display panel 27.

該顯示面板27在該掃描驅動電路25及該資料驅動電路24之配合驅動下顯示各種影像訊息。The display panel 27 displays various image messages under the cooperative driving of the scan driving circuit 25 and the data driving circuit 24.

該檢測控制電路26之檢測端261接收該驅動控制電路23之時鐘訊號輸出端232輸出之時鐘脈衝電壓訊號。該檢 測電路263從該檢測端261輸入的時鐘脈衝電壓訊號。當該檢測電路263檢測到該時鐘脈衝電壓訊號之上升沿則輸出一控制訊號。該延時電路264對該檢測電路263輸出之控制訊號延時一定時間後則藉由該控制輸出端262輸出至該複數開關元件28之開關控制端281。該控制訊號使該開關元件28導通,使該資料驅動電路24輸出之資料訊號能輸出到該顯示面板27之複數資料線271,從而使該顯示面板27顯示各種影像訊息。The detection terminal 261 of the detection control circuit 26 receives the clock pulse voltage signal output from the clock signal output terminal 232 of the drive control circuit 23. The inspection The clock circuit voltage input from the detecting terminal 261 is measured by the measuring circuit 263. When the detecting circuit 263 detects the rising edge of the clock pulse signal, it outputs a control signal. The delay circuit 264 delays the control signal outputted by the detection circuit 263 for a certain period of time, and then outputs the control output 262 to the switch control terminal 281 of the complex switching element 28. The control signal causes the switching element 28 to be turned on, so that the data signal outputted by the data driving circuit 24 can be output to the plurality of data lines 271 of the display panel 27, so that the display panel 27 displays various image information.

相較於先前技術,本發明之液晶顯示裝置2開機時先藉由常閉之開關元件28使該液晶顯示裝置2在該資料驅動電路24獲得主工作電壓AVDD到該掃描驅動電路25獲得閘極截止電壓VGL之時間段內,從該複數資料訊號輸出端243輸出之雜訊訊號不能輸出到該顯示面板27,並使該開關元件28在各電壓訊號穩定後開啟,使該液晶顯示裝置2正常顯示。減少開機時,雜訊訊號藉由顯示面板27內未能完全關閉之薄膜電晶體對液晶電容誤充電而引起之液晶顯示裝置2開機閃爍現像,改善該液晶顯示裝置2之顯示品質。Compared with the prior art, the liquid crystal display device 2 of the present invention first causes the liquid crystal display device 2 to obtain the main operating voltage AVDD from the data driving circuit 24 to the scan driving circuit 25 to obtain the gate by the normally closed switching element 28. During the period of the cutoff voltage VGL, the noise signal outputted from the complex data signal output terminal 243 cannot be output to the display panel 27, and the switching element 28 is turned on after the voltage signals are stabilized, so that the liquid crystal display device 2 is normal. display. When the power-on signal is turned on, the liquid crystal display device 2 is turned on and blinked due to the mischarge of the liquid crystal capacitor by the thin film transistor which is not completely turned off in the display panel 27, thereby improving the display quality of the liquid crystal display device 2.

請參閱圖4,係本發明液晶顯示裝置第二實施方式之電路結構示意圖。該第二實施方式之液晶顯示裝置3與該第一實施方式之液晶顯示裝置2基本相同,其區別在於:該檢測控制電路36包括一第一檢測端361、一第二檢測端365、一比較電路363、一延時電路364及一控制輸出端362。該第一、第二檢測端361、365分別電連接面板電源 電路32之主工作電壓輸出端322及閘極導通電壓輸出端323。Please refer to FIG. 4 , which is a schematic structural diagram of a circuit of a second embodiment of a liquid crystal display device of the present invention. The liquid crystal display device 3 of the second embodiment is substantially the same as the liquid crystal display device 2 of the first embodiment, and the difference is that the detection control circuit 36 includes a first detecting end 361, a second detecting end 365, and a comparison. Circuit 363, a delay circuit 364 and a control output 362. The first and second detecting ends 361 and 365 are electrically connected to the panel power supply The main operating voltage output terminal 322 and the gate turn-on voltage output terminal 323 of the circuit 32.

該液晶顯示裝置3之工作原理如下:該第一、第二檢測端361、365分別接收該閘極導通電壓輸出端323輸出之閘極導通電壓VGH及該主工作電壓輸出端322輸出之主工作電壓AVDD,該比較電路363比較分別從該第一、第二檢測端361、365輸入之閘極導通電壓VGH及主工作電壓AVDD之電壓值之大小,當該閘極導通電壓VGH較該主工作電壓AVDD大時,該比較電路363輸出一控制訊號。該延時電路364對該比較電路363輸出之控制訊號延時一定時間後輸出至該複數開關元件38之開關控制端381,使該複數開關元件38導通。The working principle of the liquid crystal display device 3 is as follows: the first and second detecting ends 361 and 365 respectively receive the gate-on voltage VGH outputted by the gate-on voltage output terminal 323 and the main operation of the output of the main operating voltage output terminal 322. The voltage AVDD, the comparison circuit 363 compares the magnitudes of the voltages of the gate-on voltage VGH and the main operating voltage AVDD input from the first and second detecting terminals 361 and 365, respectively, when the gate-on voltage VGH is higher than the main operation. When the voltage AVDD is large, the comparison circuit 363 outputs a control signal. The delay circuit 364 delays the control signal output from the comparison circuit 363 for a certain period of time and outputs it to the switch control terminal 381 of the complex switching element 38 to turn on the plurality of switching elements 38.

相較於第一實施方式之液晶顯示裝置2,該液晶顯示裝置3之檢測電路36直接檢測主工作電壓AVDD及閘極導通電壓VGH的變化以控制該複數開關元件。可防止第一實施方式中,該驅動控制電路23誤動而導致該複數開關元件28過早開啟。Compared with the liquid crystal display device 2 of the first embodiment, the detection circuit 36 of the liquid crystal display device 3 directly detects changes in the main operating voltage AVDD and the gate-on voltage VGH to control the plurality of switching elements. In the first embodiment, the drive control circuit 23 can be prevented from being erroneously caused to cause the plurality of switching elements 28 to be turned on prematurely.

請參閱圖5,係本發明液晶顯示裝置第三實施方式之電路結構示意圖。該第三實施方式之液晶顯示裝置4與該第一實施方式之液晶顯示裝置2基本相同,其區別在於:該檢測控制電路46內包括一延時電路464,該檢測控制電路46之檢測端461電連接面板電源電路42之閘極導通電壓輸出端423。該檢測控制電路46直接將該閘極導通電壓輸出端423輸出之穩定閘極導通電壓作為控制訊號。該檢 測控制電路46的延時電路對該控制訊號延時後,輸出到複數開關元件48之開關控制端481,使該複數開關元件48導通。Please refer to FIG. 5 , which is a schematic structural diagram of a circuit of a third embodiment of a liquid crystal display device of the present invention. The liquid crystal display device 4 of the third embodiment is substantially the same as the liquid crystal display device 2 of the first embodiment, and the difference is that the detection control circuit 46 includes a delay circuit 464, and the detection terminal 461 of the detection control circuit 46 is electrically The gate of the panel power supply circuit 42 is connected to the voltage output terminal 423. The detection control circuit 46 directly uses the stable gate-on voltage outputted from the gate-on voltage output terminal 423 as a control signal. The inspection The delay circuit of the measurement control circuit 46 delays the control signal and outputs it to the switch control terminal 481 of the plurality of switching elements 48 to turn on the plurality of switching elements 48.

相較於第二實施方式之液晶顯示裝置3,該液晶顯示裝置4之檢測控制電路46僅有一檢測端461,其內部僅有一延時電路464,因而電路比較簡單,方便電路設計及製造。Compared with the liquid crystal display device 3 of the second embodiment, the detection control circuit 46 of the liquid crystal display device 4 has only one detecting end 461, and has only one delay circuit 464 therein, so that the circuit is relatively simple and convenient for circuit design and manufacture.

惟,本發明並不限於上述實施方式所述,如該延時電路264、364或464係一計時延時電路,該延時電路264、364或464亦可係一RC延時電路;該檢測電路263及該比較電路363輸出的控制訊號係一電壓值與該閘極導通電壓相同的電壓訊號。However, the present invention is not limited to the above embodiments. For example, the delay circuit 264, 364 or 464 is a timing delay circuit, and the delay circuit 264, 364 or 464 may also be an RC delay circuit; the detection circuit 263 and the The control signal outputted by the comparison circuit 363 is a voltage signal having the same voltage value as the gate conduction voltage.

綜上所述,本發明確已符合發明專利之要件,爰依法提出專利申請。惟,以上所述者僅為本發明之較佳實施方式,本發明之範圍並不以上述實施方式為限,舉凡熟悉本案技藝之人士援依本發明之精神所作之等效修飾或變化,皆應涵蓋於以下申請專利範圍內。In summary, the present invention has indeed met the requirements of the invention patent, and has filed a patent application according to law. However, the above description is only the preferred embodiment of the present invention, and the scope of the present invention is not limited to the above-described embodiments, and equivalent modifications or variations made by those skilled in the art in light of the spirit of the present invention are It should be covered by the following patent application.

電源輸出端‧‧‧211Power output ‧‧‧211

電源電路‧‧‧21Power circuit ‧‧21.

電源輸入端‧‧‧221Power input ‧‧‧221

閘極截止電壓輸出端‧‧‧252Gate cut-off voltage output ‧‧‧252

驅動控制電路‧‧‧23Drive control circuit ‧‧23

主工作電壓輸出端‧‧‧222、322Main working voltage output ‧‧‧222,322

資料驅動電路‧‧‧24Data drive circuit ‧‧24

閘極截止電壓輸出端‧‧‧224Gate cut-off voltage output ‧‧‧224

時鐘訊號輸入端‧‧‧242Clock signal input ‧‧‧242

控制電源輸入端‧‧‧231Control power input ‧‧‧231

掃描驅動電路‧‧‧25Scanning drive circuit ‧‧25

掃描訊號輸出端‧‧‧233Scanning signal output ‧‧‧233

掃描輸出端‧‧‧253Scanning output ‧‧‧253

主工作電壓輸入端‧‧‧241Main working voltage input ‧‧‧241

資料線‧‧‧271Information line ‧‧‧271

資料訊號輸出端‧‧‧243Data signal output ‧‧‧243

控制輸出端‧‧‧262Control output ‧‧‧262

閘極導通電壓輸入端‧‧‧251Gate turn-on voltage input ‧‧‧251

第二檢測端‧‧‧365Second detection end ‧‧‧365

掃描訊號輸入端‧‧‧254Scanning signal input ‧‧‧254

第一檢測端‧‧‧361First detection end ‧‧‧361

顯示面板‧‧‧27Display panel ‧‧27

比較電路‧‧‧363Comparison circuit ‧‧‧363

掃描線‧‧‧272Scanning line ‧‧‧272

檢測電路‧‧‧263Detection circuit ‧‧‧263

檢測端‧‧‧261、461Detection side ‧‧‧261,461

驅動模塊‧‧‧29Drive module ‧‧29

閘極導通電壓輸出端‧‧‧223、323、423Gate turn-on voltage output ‧‧‧223, 323, 423

檢測控制電路‧‧‧26、36、46Detection control circuit ‧‧‧26, 36, 46

延時電路‧‧‧264、364、464Delay circuit ‧‧‧264, 364, 464

開關控制端‧‧‧281、381、481Switch control terminal ‧‧‧281, 381, 481

液晶顯示裝置‧‧‧2、3、4Liquid crystal display device ‧‧2,3,4

面板電源電路‧‧‧22、32、42Panel power circuit ‧‧22,32,42

時鐘訊號輸出端‧‧‧232Clock signal output ‧‧‧232

開關元件‧‧‧28、38、48Switching elements ‧‧‧28, 38, 48

圖1係一種先前技術液晶顯示裝置之電路結構示意圖。1 is a schematic diagram showing the circuit structure of a prior art liquid crystal display device.

圖2係圖1所示液晶顯示裝置開機過程中面板電源電路之輸出電壓訊號時序圖。2 is a timing diagram of output voltage signals of the panel power supply circuit during the startup of the liquid crystal display device shown in FIG. 1.

圖3係本發明液晶顯示裝置第一實施方式之電路結構示意圖。3 is a schematic view showing the circuit structure of a first embodiment of a liquid crystal display device of the present invention.

圖4係本發明液晶顯示裝置第二實施方式之電路結構示意圖。4 is a schematic view showing the circuit structure of a second embodiment of the liquid crystal display device of the present invention.

圖5係本發明液晶顯示裝置第三實施方式之電路結構示意圖。Fig. 5 is a schematic view showing the circuit structure of a third embodiment of the liquid crystal display device of the present invention.

液晶顯示裝置‧‧‧2Liquid crystal display device ‧‧2

電源電路‧‧‧21Power circuit ‧‧21.

電源輸出端‧‧‧211Power output ‧‧‧211

面板電源電路‧‧‧22Panel power circuit ‧‧22

電源輸入端‧‧‧221Power input ‧‧‧221

主工作電壓輸出端‧‧‧222Main working voltage output ‧‧‧222

閘極導通電壓輸出端‧‧‧223Gate turn-on voltage output ‧‧‧223

閘極截止電壓輸出端‧‧‧224Gate cut-off voltage output ‧‧‧224

驅動控制電路‧‧‧23Drive control circuit ‧‧23

控制電源輸入端‧‧‧231Control power input ‧‧‧231

時鐘訊號輸出端‧‧‧232Clock signal output ‧‧‧232

掃描訊號輸出端‧‧‧233Scanning signal output ‧‧‧233

資料驅動電路‧‧‧24Data drive circuit ‧‧24

主工作電壓輸入端‧‧‧241Main working voltage input ‧‧‧241

時鐘訊號輸入端‧‧‧242Clock signal input ‧‧‧242

資料訊號輸出端‧‧‧243Data signal output ‧‧‧243

掃描驅動電路‧‧‧25Scanning drive circuit ‧‧25

閘極導通電壓輸入端‧‧‧251Gate turn-on voltage input ‧‧‧251

閘極截止電壓輸出端‧‧‧252Gate cut-off voltage output ‧‧‧252

掃描訊號輸入端‧‧‧254Scanning signal input ‧‧‧254

掃描輸出端‧‧‧253Scanning output ‧‧‧253

顯示面板‧‧‧27Display panel ‧‧27

資料線‧‧‧271Information line ‧‧‧271

掃描線‧‧‧272Scanning line ‧‧‧272

檢測控制電路‧‧‧26Detection control circuit ‧‧26

檢測端‧‧‧261Detection side ‧‧‧261

控制輸出端‧‧‧262Control output ‧‧‧262

檢測電路‧‧‧263Detection circuit ‧‧‧263

延時電路‧‧‧264Delay circuit ‧‧‧264

開關元件‧‧‧28Switching element ‧‧‧28

開關控制端‧‧‧281Switch control terminal ‧‧‧281

驅動模塊‧‧‧29Drive module ‧‧29

Claims (16)

一種液晶顯示裝置,其包括:一顯示面板;複數開關元件;一驅動模塊,其產生電壓訊號,該驅動模塊藉由該複數開關元件驅動該顯示面板;及一檢測控制電路,其檢測該驅動模塊之電壓訊號,該檢測控制電路包括一延時電路,該延時電路使該控制訊號延時後再輸出到該複數開關元件。 A liquid crystal display device comprising: a display panel; a plurality of switching elements; a driving module that generates a voltage signal, the driving module drives the display panel by the plurality of switching elements; and a detection control circuit that detects the driving module The voltage control signal includes a delay circuit that delays the control signal and outputs the same to the plurality of switching elements. 如申請專利範圍第1項所述之液晶顯示裝置,其中,該驅動模塊包括一資料驅動電路,該資料驅動電路藉由該複數開關元件向該顯示面板輸出資料訊號。 The liquid crystal display device of claim 1, wherein the driving module comprises a data driving circuit, and the data driving circuit outputs a data signal to the display panel by the plurality of switching elements. 如申請專利範圍第2項所述之液晶顯示裝置,其中,該驅動模塊進一步包括一驅動控制電路,該檢測控制電路包括一檢測電路,該驅動控制電路輸出一時鐘脈衝電壓訊號控制該資料驅動電路輸出資料訊號,該檢測控制電路檢測之電壓訊號係該時鐘脈衝電壓訊號,該檢測電路檢測到該時鐘脈衝電壓訊號之上升沿後輸出一控制訊號,該控制訊號使該複數開關元件導通。 The liquid crystal display device of claim 2, wherein the driving module further comprises a driving control circuit, wherein the detecting control circuit comprises a detecting circuit, and the driving control circuit outputs a clock pulse voltage signal to control the data driving circuit. And outputting a data signal, wherein the voltage signal detected by the detection control circuit is the clock pulse voltage signal, and the detecting circuit detects a rising edge of the clock pulse voltage signal and outputs a control signal, and the control signal turns on the plurality of switching elements. 如申請專利範圍第2項所述之液晶顯示裝置,其中,該驅動模塊進一步包括一掃描驅動電路和一面板電源電路,該掃描驅動電路對該顯示面板進行掃描,該面板電源電路包括一閘極導通電壓輸出端、一閘極截止電壓輸 出端及一主工作電壓輸出端,該面板電源電路分別藉由該閘極導通電壓輸出端及閘極截止電壓輸出端提供該掃描驅動電路一閘極導通電壓及一閘極截止電壓,並藉由該主工作電壓輸出端提供該資料驅動電路一主工作電壓。 The liquid crystal display device of claim 2, wherein the driving module further comprises a scan driving circuit and a panel power supply circuit, wherein the scan driving circuit scans the display panel, the panel power supply circuit includes a gate On voltage output terminal, one gate cutoff voltage input And a main working voltage output end, wherein the panel power supply circuit provides a gate turn-on voltage and a gate turn-off voltage of the scan driving circuit by the gate turn-on voltage output terminal and the gate turn-off voltage output terminal, respectively, and A main operating voltage of the data driving circuit is provided by the main working voltage output terminal. 如申請專利範圍第4項所述之液晶顯示裝置,其中,該檢測控制電路包括一比較電路。該比較電路比較該面板電源電路之閘極導通電壓輸出端及該主工作電壓輸出端輸出電壓值大小,並根據該比較結果決定是否輸出一使該複數開關元件導通之控制訊號。 The liquid crystal display device of claim 4, wherein the detection control circuit comprises a comparison circuit. The comparison circuit compares the gate on voltage output end of the panel power supply circuit and the output voltage value of the main working voltage output terminal, and determines whether to output a control signal for turning on the plurality of switching elements according to the comparison result. 如申請專利範圍第5項所述之液晶顯示裝置,其中,當該閘極導通電壓輸出端輸出之電壓值較該主工作電壓輸出端大時,該比較電路輸出該控制訊號。 The liquid crystal display device of claim 5, wherein the comparison circuit outputs the control signal when a voltage value outputted by the gate-on voltage output terminal is greater than the main operating voltage output terminal. 如申請專利範圍第4項所述之液晶顯示裝置,其中,該面板電源電路之閘極導通電壓輸出端輸出之閘極導通電壓藉由該延時電路延時後直接使該複數開關元件導通。 The liquid crystal display device of claim 4, wherein the gate on-voltage outputted by the gate-on voltage output terminal of the panel power supply circuit directly turns on the plurality of switching elements by delaying the delay circuit. 如申請專利範圍第7項所述之液晶顯示裝置,其中,該延時電路係一RC延時電路或一計時延時電路。 The liquid crystal display device of claim 7, wherein the delay circuit is an RC delay circuit or a timing delay circuit. 一種液晶顯示裝置驅動方法,其包括以下步驟:提供一顯示面板,其用於顯示各種畫面;提供一驅動模塊,其產生電壓訊號;提供複數開關元件,該驅動模塊藉由該複數開關元件驅動該顯示面板; 提供一檢測電路,其檢測該驅動模塊之電壓訊號並輸出控制信號,該檢測控制電路包括一延時電路,由該延時電路對該控制訊號延時後輸出至該複數開關元件;其中,該驅動模塊包括一資料驅動電路和一驅動控制電路,該資料驅動電路藉由該複數開關元件向該顯示面板輸出資料訊號,該驅動控制電路輸出一時鐘脈衝電壓訊號控制該資料驅動電路輸出資料訊號,該檢測電路檢測到該時鐘脈衝電壓訊號之上升沿後輸出一控制訊號,該控制訊號使該複數開關元件導通。 A liquid crystal display device driving method, comprising the steps of: providing a display panel for displaying various screens; providing a driving module for generating a voltage signal; providing a plurality of switching elements, wherein the driving module drives the plurality of switching elements Display panel Providing a detection circuit for detecting a voltage signal of the driving module and outputting a control signal, the detection control circuit comprising a delay circuit, wherein the delay signal delays the control signal and outputs the control signal to the plurality of switching elements; wherein the driving module comprises a data driving circuit and a driving control circuit, the data driving circuit outputs a data signal to the display panel by the plurality of switching elements, the driving control circuit outputs a clock pulse voltage signal to control the data driving circuit to output a data signal, the detecting circuit After detecting the rising edge of the clock pulse signal, a control signal is output, and the control signal turns on the plurality of switching elements. 如申請專利範圍第9項所述之液晶顯示裝置驅動方法,其中,該驅動模塊進一步包括一掃描驅動電路,該掃描驅動電路對該顯示面板進行掃描。 The liquid crystal display device driving method of claim 9, wherein the driving module further comprises a scan driving circuit that scans the display panel. 如申請專利範圍第10項所述之液晶顯示裝置驅動方法,其中,該驅動模塊進一步包括一面板電源電路,該面板電源電路包括一閘極導通電壓輸出端、一閘極截止電壓輸出端及一主工作電壓輸出端,該面板電源電路分別藉由該閘極導通電壓輸出端及閘極截止電壓輸出端提供該掃描驅動電路一閘極導通電壓及一閘極截止電壓,並藉由該主工作電壓輸出端提供該資料驅動電路一主工作電壓。 The driving method of the liquid crystal display device of claim 10, wherein the driving module further comprises a panel power supply circuit, the panel power supply circuit comprising a gate conduction voltage output terminal, a gate cutoff voltage output terminal, and a gate a main working voltage output end, the panel power supply circuit respectively provides a gate turn-on voltage and a gate turn-off voltage of the scan driving circuit by the gate turn-on voltage output terminal and the gate turn-off voltage output terminal, and the main work is performed by the main working voltage The voltage output terminal provides a main operating voltage of the data driving circuit. 如申請專利範圍第11項所述之液晶顯示裝置驅動方法,其中,該檢測控制電路包括一比較電路。該比較電路比較該面板電源電路之閘極導通電壓輸出端及該主工 路比較該面板電源電路之閘極導通電壓輸出端及該主工作電壓輸出端輸出電壓值大小,並根據該比較結果決定是否輸出一使該複數開關元件導通之控制訊號。 The method of driving a liquid crystal display device according to claim 11, wherein the detection control circuit comprises a comparison circuit. The comparison circuit compares the gate conduction voltage output end of the panel power supply circuit and the main work The circuit compares the gate conduction voltage output end of the panel power supply circuit and the output voltage value of the main working voltage output terminal, and determines whether to output a control signal for turning on the plurality of switching elements according to the comparison result. 如申請專利範圍第12項所述之液晶顯示裝置驅動方法,其中,當該閘極導通電壓輸出端輸出之電壓值較該主工作電壓輸出端大時,該比較電路輸出該控制訊號。 The liquid crystal display device driving method of claim 12, wherein the comparison circuit outputs the control signal when a voltage value outputted by the gate-on voltage output terminal is greater than the main operating voltage output terminal. 如申請專利範圍第13項所述之液晶顯示裝置驅動方法,其中,該檢測控制電路進一步包括一延時電路,該延時電路使該控制訊號延時後再輸出到該複數開關元件。 The liquid crystal display device driving method of claim 13, wherein the detection control circuit further comprises a delay circuit, wherein the delay signal delays the control signal and outputs the signal to the plurality of switching elements. 如申請專利範圍第11項所述之液晶顯示裝置驅動方法,其中,該檢測控制電路包括一延時電路,該面板電源電路之閘極導通電壓輸出端輸出之閘極導通電壓藉由該延時電路延時後直接控制該複數開關元件,使該複數開關元件導通。 The liquid crystal display device driving method of claim 11, wherein the detection control circuit comprises a delay circuit, and the gate conduction voltage outputted by the gate conduction voltage output terminal of the panel power supply circuit is delayed by the delay circuit The plurality of switching elements are directly controlled to turn on the plurality of switching elements. 如申請專利範圍第15項所述之液晶顯示裝置驅動方法,其中,該延時電路係一RC延時電路。The method of driving a liquid crystal display device according to claim 15, wherein the delay circuit is an RC delay circuit.
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