TWI392207B - A dc/dc conversion device, a frequency skip module and a method of frequency skip control - Google Patents

A dc/dc conversion device, a frequency skip module and a method of frequency skip control Download PDF

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TWI392207B
TWI392207B TW98126361A TW98126361A TWI392207B TW I392207 B TWI392207 B TW I392207B TW 98126361 A TW98126361 A TW 98126361A TW 98126361 A TW98126361 A TW 98126361A TW I392207 B TWI392207 B TW I392207B
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signal
voltage
frequency hopping
storage capacitor
switch
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TW98126361A
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TW201106596A (en
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Mingzhu Li
Qinglin Zhao
Zhihong Ye
Xuefeng Tang
Dinghui Cai
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Silitek Electronic Guangzhou
Lite On Technology Corp
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直流/直流轉換裝置與跳頻控制模組及跳頻控制方法DC/DC conversion device, frequency hopping control module and frequency hopping control method

本發明是有關於一種電壓轉換控制方法,特別是指一種針對電壓轉換電路操作於跳頻模式下的跳頻控制方法。The invention relates to a voltage conversion control method, in particular to a frequency hopping control method for a voltage conversion circuit operating in a frequency hopping mode.

參閱圖1,為習知直流/直流轉換裝置900,其中包含一直流/直流轉換器(DC/DC Converter)901及一回授控制電路902,直流/直流轉換器901為半橋式LLC振盪電路且回授控制電路902,其中具有一ST L6599型控制晶片903。Referring to FIG. 1 , a conventional DC/DC converter 900 includes a DC/DC converter 901 and a feedback control circuit 902. The DC/DC converter 901 is a half bridge LLC oscillator circuit. And feedback control circuit 902 has an ST L6599 type control chip 903.

當負載電流減小(負載電阻Ro增大)時,直流/直流轉換器901的輸出電壓Vo會微幅上升,導致回授控制電路902中的A點電壓Vcomp 下降,當A點電壓Vcomp 低於控制晶片903的預設值時,則回授控制電路902將不會輸出驅動訊號HVG、LVG,使得直流/直流轉換器901停止電壓轉換動作,此時,直流/直流轉換器901停止工作一段間歇時間。由於在該間歇時間內,直流/直流轉換器901的輸出電壓Vo會微幅下降,導致回授控制電路902中的A點電壓Vcomp 上升,因此,回授控制電路將會輸出驅動訊號HVG、LVG,使得直流/直流轉換器901開始進行電壓轉換動作而進入工作時間。When the load current is reduced (increased load resistance Ro), DC / DC converter output voltage Vo 901 will slightly increase, causing feedback voltage V comp at point A control circuit 902 is decreased, point A when the voltage V comp When the preset value of the control chip 903 is lower, the feedback control circuit 902 will not output the driving signals HVG, LVG, so that the DC/DC converter 901 stops the voltage conversion operation, and at this time, the DC/DC converter 901 stops working. An interval of time. Since the output voltage Vo of the DC/DC converter 901 drops slightly during the intermittent time, the voltage V comp at the point A in the feedback control circuit 902 rises. Therefore, the feedback control circuit outputs the drive signal HVG, The LVG causes the DC/DC converter 901 to start a voltage conversion operation and enter the operating time.

因此,習知回授控制電路902是根據A點電壓Vcomp 的變化來控制直流/直流轉換器901工作還是間歇。且配合參閱圖2所示,A點電壓Vcomp 為一漸變訊號,也就是說A點電壓Vcomp 遞減至控制晶片903的預設值的時間相較於輸出電壓Vo緩慢,以致於直流/直流轉換器901在A點電壓Vcomp 遞減過程中產生過長的工作時間,如圖2之t91-t92時間所示。然而,直流/直流轉換器901所轉換的能量大都集中於前幾個週期,如圖2之電感電流Ipri所示,而後幾個週期直流/直流轉換器901所轉換的能量很少,甚至幾乎不轉換能量,因此,過長的工作時間將會造成習知直流/直流轉換裝置900之功率耗損。Therefore, the conventional feedback control circuit 902 controls whether the DC/DC converter 901 operates or is intermittent according to the change in the voltage V comp of the point A. Referring to FIG. 2, the voltage V comp at point A is a gradual signal, that is, the time at which the point V voltage V comp is decremented to the preset value of the control wafer 903 is slower than the output voltage Vo, so that the DC/DC is slow. The converter 901 generates an excessively long working time during the decrementing of the voltage V comp at point A, as shown by time t91-t92 of FIG. However, the energy converted by the DC/DC converter 901 is mostly concentrated in the first few cycles, as shown by the inductor current Ipri in FIG. 2, and the energy converted by the DC/DC converter 901 in the last few cycles is little or even almost The energy is converted, so that an excessively long working time will cause power loss of the conventional DC/DC converter 900.

因此,本發明之目的,即在提供一種可以降低功率消耗的跳頻控制方法。Accordingly, it is an object of the present invention to provide a frequency hopping control method that can reduce power consumption.

於是,本發明跳頻控制方法,是應用於一跳頻控制模組,該跳頻控制模組適合與一電壓轉換電路配合使用,用以在該電壓轉換電路操作於一跳頻模式下產生一驅動電壓轉換電路的驅動訊號,跳頻控制方法包含以下步驟:Therefore, the frequency hopping control method of the present invention is applied to a frequency hopping control module, and the frequency hopping control module is suitable for use with a voltage conversion circuit for generating a voltage conversion circuit operating in a frequency hopping mode. The driving signal of the driving voltage conversion circuit, the frequency hopping control method comprises the following steps:

(A)產生一週期性的脈衝訊號;(A) generating a periodic pulse signal;

(B)根據一與電壓轉換電路的輸出電壓成反比的調節訊號產生一控制訊號,該控制訊號的每一週期具有一間歇時間(off-time)及一固定的工作時間(on-time),且間歇時間是與調節訊號成反比;及(B) generating a control signal according to an adjustment signal inversely proportional to the output voltage of the voltage conversion circuit, each cycle of the control signal having an off-time and a fixed on-time. And the intermittent time is inversely proportional to the adjustment signal; and

(C)根據控制訊號與脈衝訊號產生驅動訊號,以驅動電壓轉換電路進行電壓轉換。(C) generating a driving signal according to the control signal and the pulse signal to drive the voltage conversion circuit for voltage conversion.

較佳地,步驟(B)是利用調節訊號控制一壓控電流源的輸出電流,並使該輸出電流對一儲能電容充電至一第一臨界電壓值,以決定間歇時間。Preferably, in step (B), the output current of a voltage controlled current source is controlled by the adjustment signal, and the output current is charged to a first threshold voltage value to determine the intermittent time.

較佳地,步驟(B)的工作時間是儲能電容對一電阻放電至一低於第一臨界電壓值的第二臨界電壓值的時間。Preferably, the working time of step (B) is the time during which the storage capacitor discharges a resistor to a second threshold voltage value lower than the first threshold voltage value.

較佳地,步驟(C)是將控制訊號與脈衝訊號作“及(AND)運算”而產生驅動訊號。Preferably, the step (C) is to "AND" the control signal and the pulse signal to generate a driving signal.

此外,本發明之目的,即在提供一種可以降低功率消耗的跳頻控制模組。Furthermore, it is an object of the present invention to provide a frequency hopping control module that can reduce power consumption.

本發明跳頻控制模組,適合與一電壓轉換電路配合使用,用以在電壓轉換電路操作於一跳頻模式下產生一驅動電壓轉換電路的驅動訊號,跳頻控制模組包含:一高頻訊號產生器、一間歇時間調節器及一驅動訊號產生電路。The frequency hopping control module of the present invention is suitable for use with a voltage conversion circuit for generating a driving signal of a driving voltage conversion circuit when the voltage conversion circuit operates in a frequency hopping mode, and the frequency hopping control module comprises: a high frequency A signal generator, an intermittent time adjuster and a drive signal generating circuit.

高頻訊號產生器用以產生一週期性的脈衝訊號;間歇時間調節器根據一與電壓轉換電路的輸出電壓成反比的調節訊號產生一控制訊號,該控制訊號的每一週期具有一間歇時間及一固定的工作時間,且間歇時間是與調節訊號成反比;驅動訊號產生電路根據脈衝訊號與控制訊號產生驅動訊號,以驅動電壓轉換電路進行電壓轉換。The high frequency signal generator is configured to generate a periodic pulse signal; the intermittent time adjuster generates a control signal according to an adjustment signal inversely proportional to the output voltage of the voltage conversion circuit, and each cycle of the control signal has an intermittent time and a The fixed working time, and the intermittent time is inversely proportional to the adjustment signal; the driving signal generating circuit generates a driving signal according to the pulse signal and the control signal to drive the voltage conversion circuit to perform voltage conversion.

較佳地,間歇時間調節器包括一壓控電流源、一儲能電容及一遲滯比較器。其中,壓控電流源根據電壓轉換電路的輸出電壓而產生輸出電流;儲能電容具有一耦接壓控電流源的第一端及一接地的第二端;遲滯比較器具有一耦接儲能電容的第一端的非反相端、一接收一參考電壓的反相端及一輸出端,遲滯比較器藉由參考電壓形成一遲滯區間,該遲滯區間具有一第一臨界電壓值。遲滯比較器會限制壓控電流源對儲能電容充電至第一臨界電壓值,以決定間歇時間,且由遲滯比較器的輸出端輸出控制訊號。Preferably, the intermittent time adjuster comprises a voltage controlled current source, a storage capacitor and a hysteresis comparator. The voltage-controlled current source generates an output current according to the output voltage of the voltage conversion circuit; the storage capacitor has a first end coupled to the voltage-controlled current source and a grounded second end; the hysteresis comparator has a coupled storage capacitor The non-inverting terminal of the first end, the inverting terminal receiving a reference voltage, and an output terminal, the hysteresis comparator forms a hysteresis interval by the reference voltage, and the hysteresis interval has a first threshold voltage value. The hysteresis comparator limits the voltage-controlled current source to charge the storage capacitor to a first threshold voltage to determine the interval time, and the output of the hysteresis comparator outputs a control signal.

進一步地,間歇時間調節器還包括一電阻,該電阻具有一耦接儲能電容的第一端及一接地的第二端,且遲滯區間還具有一低於第一臨界電壓值的第二臨界電壓值。遲滯比較器會限制儲能電容對電阻放電至第二臨界電壓值,以決定工作時間。Further, the intermittent time adjuster further includes a resistor having a first end coupled to the storage capacitor and a second end connected to the ground, and the hysteresis interval further has a second threshold lower than the first threshold voltage Voltage value. The hysteresis comparator limits the storage capacitor to discharge the resistor to a second threshold voltage to determine the operating time.

進一步地,間歇時間調節器還包括一第一開關、一第二開關及一反相器。第一開關串接於壓控電流源與儲能電容之間;第二開關串接於電阻與地之間;反相器的輸入端耦接遲滯比較器的輸出端,反相器的輸出端控制第一開關的啟閉,遲滯比較器的輸出端控制該第二開關的啟閉,該第一開關與第二開關用以切換儲能電容的充/放電。Further, the intermittent time adjuster further includes a first switch, a second switch, and an inverter. The first switch is connected in series between the voltage controlled current source and the storage capacitor; the second switch is connected in series between the resistor and the ground; the input end of the inverter is coupled to the output of the hysteresis comparator, and the output of the inverter The first switch is controlled to open and close, the output of the hysteresis comparator controls the opening and closing of the second switch, and the first switch and the second switch are used to switch the charging/discharging of the storage capacitor.

此外,本發明之目的,即在提供一種可以降低功率消耗的直流/直流轉換裝置。Further, it is an object of the present invention to provide a DC/DC converter which can reduce power consumption.

本發明直流/直流轉換裝置包含一電壓轉換電路及一跳頻控制模組。電壓轉換電路操作於一跳頻模式;跳頻控制模組包括一高頻訊號產生器、一間歇時間調節器及一驅動訊號產生電路,其內部構件與上述相同。The DC/DC converter of the present invention comprises a voltage conversion circuit and a frequency hopping control module. The voltage conversion circuit operates in a frequency hopping mode; the frequency hopping control module comprises a high frequency signal generator, an intermittent time adjuster and a driving signal generating circuit, the internal components of which are the same as described above.

本發明之功效在於,跳頻控制模組根據電壓轉換電路的輸出電壓來調整控制訊號的間歇時間,並固定控制訊號的工作時間,如此一來,將可以避免發生工作時間過長的問題。The function of the invention is that the frequency hopping control module adjusts the intermittent time of the control signal according to the output voltage of the voltage conversion circuit, and fixes the working time of the control signal, so that the problem that the working time is too long can be avoided.

有關本發明之前述及其他技術內容、特點與功效,在以下配合參考圖式之一個較佳實施例的詳細說明中,將可清楚的呈現。The above and other technical contents, features and advantages of the present invention will be apparent from the following detailed description of the preferred embodiments.

參閱圖3,為本發明直流/直流轉換裝置100之較佳實施例,該直流/直流轉換裝置100是應用於跳頻技術(Frequency-Hopping Spread Spectrum,FHSS),並且在一固定的工作時間(on-time)下,適當地調整間歇時間(off-time)的時間長度,使得直流/直流轉換裝置100在工作時間內高效率地傳遞能量,並減少輕載時電路的耗損。在本實施例中,直流/直流轉換裝置100包含一電壓轉換電路1及一跳頻控制模組2。Referring to FIG. 3, a DC/DC conversion device 100 of the present invention is applied to a Frequency-to-Hopping Spread Spectrum (FHSS) and is applied at a fixed working time (Frequency-Hopping Spread Spectrum (FHSS)). Under on-time, the length of the off-time is appropriately adjusted so that the DC/DC converter 100 transmits energy efficiently during the operating time and reduces the loss of the circuit at the time of light load. In the present embodiment, the DC/DC converter device 100 includes a voltage conversion circuit 1 and a frequency hopping control module 2.

電壓轉換電路1可應用於隔離與非隔離的各類直流/直流轉換器,例如:降壓轉換器(Buck Converter)、升壓轉換器(Boost Converter)、升降壓轉換器(Buck-Boost Converter)、馳返轉換器(Flyback Converter)、順向式轉換器(Forward Converter),及LLC振盪電路等,而本實施例之電壓轉換電路1則為一半橋式LLC振盪電路,並具有一第一功率開關Q1及第二功率開關Q2。The voltage conversion circuit 1 can be applied to isolated and non-isolated DC/DC converters such as Buck Converter, Boost Converter, Buck-Boost Converter. a flyback converter, a forward converter, an LLC oscillator circuit, etc., and the voltage conversion circuit 1 of the embodiment is a half bridge LLC oscillation circuit and has a first power Switch Q1 and second power switch Q2.

跳頻控制模組2用以產生一組驅動訊號,以控制電壓轉換電路1中第一功率開關Q1及第二功率開關Q2的啟閉。然而,在本實施例中,電壓轉換電路1是操作於一跳頻模式,在跳頻模式下,跳頻控制模組2控制電壓轉換電路1在一工作時間與一間歇時間之間交替作動。於工作時間內,跳頻控制模組2會輸出驅動訊號,使得電壓轉換電路1進行電壓轉換;反之,跳頻控制模組2會於間歇時間內開啟(open/off)第一功率開關Q1及第二功率開關Q2,以停止電壓轉換電路1作動。跳頻控制模組2包括一回授調節電路3、一高頻訊號產生器4、一間歇時間調節器5及一驅動訊號產生電路6。The frequency hopping control module 2 is configured to generate a set of driving signals to control the opening and closing of the first power switch Q1 and the second power switch Q2 in the voltage converting circuit 1. However, in the present embodiment, the voltage conversion circuit 1 is operated in a frequency hopping mode. In the frequency hopping mode, the frequency hopping control module 2 controls the voltage conversion circuit 1 to alternately operate between an operation time and an intermittent time. During the working time, the frequency hopping control module 2 outputs a driving signal, so that the voltage converting circuit 1 performs voltage conversion; otherwise, the frequency hopping control module 2 opens (open/off) the first power switch Q1 and the intermittent time. The second power switch Q2 is actuated by the stop voltage conversion circuit 1. The frequency hopping control module 2 includes a feedback adjustment circuit 3, a high frequency signal generator 4, an intermittent time adjuster 5, and a drive signal generating circuit 6.

回授調節電路3用以根據電壓轉換電路1的輸出電壓Vo產生一調節訊號Vreg,調節訊號Vreg用以產生控制訊號LF及控制驅動訊號產生電路6產生之驅動訊號的切換頻率,回授調節電路3將產生之調節訊號Vreg傳送至高頻訊號產生器4及間歇時間調節器5;高頻訊號產生器4及間歇時間調節器5根據調節訊號Vreg分別產生一組週期性的脈衝訊號Drv01、Drv02及一控制訊號LF,其細部動作容後補述;驅動訊號產生電路6則根據脈衝訊號Drv01、Drv02及控制訊號LF轉換產生足以驅動第一功率開關Q1及第二功率開關Q2啟閉的驅動訊號Drv1、Drv2。The feedback adjustment circuit 3 is configured to generate an adjustment signal Vreg according to the output voltage Vo of the voltage conversion circuit 1. The adjustment signal Vreg is used to generate the control signal LF and control the switching frequency of the driving signal generated by the driving signal generating circuit 6, and the feedback adjustment circuit is provided. 3, the generated adjustment signal Vreg is transmitted to the high frequency signal generator 4 and the intermittent time adjuster 5; the high frequency signal generator 4 and the intermittent time adjuster 5 respectively generate a set of periodic pulse signals Drv01, Drv02 according to the adjustment signal Vreg And a control signal LF, the detailed operation of which is further described; the driving signal generating circuit 6 generates a driving signal sufficient to drive the first power switch Q1 and the second power switch Q2 to be turned on and off according to the pulse signals Drv01, Drv02 and the control signal LF. Drv1, Drv2.

特別說明的是,當負載電流越小(負載電阻Ro越大)時,電壓轉換電路1的輸出電壓Vo則會微幅上升,因此,第一功率開關Q1及第二功率開關Q2需要較高的切換頻率,方能維持固定的輸出電壓Vo,故需要較低電壓值的調節訊號Vreg,換言之,輸出電壓Vo與調節訊號Vreg成反比。In particular, when the load current is smaller (the load resistance Ro is larger), the output voltage Vo of the voltage conversion circuit 1 rises slightly, and therefore, the first power switch Q1 and the second power switch Q2 need to be higher. The switching frequency is maintained to maintain a fixed output voltage Vo, so a lower voltage value adjustment signal Vreg is required, in other words, the output voltage Vo is inversely proportional to the adjustment signal Vreg.

參閱圖4,為本實施例之間歇時間調節器5的內部電路圖,該間歇時間調節器5包括有一壓控電流源51、一第一開關S1、一第二開關S2、一儲能電容C1、一電阻R1、一反相器52及一遲滯比較器53。Referring to FIG. 4, an internal circuit diagram of the intermittent time adjuster 5 of the present embodiment includes a voltage controlled current source 51, a first switch S1, a second switch S2, and a storage capacitor C1. A resistor R1, an inverter 52 and a hysteresis comparator 53.

壓控電流源51用以根據調節訊號Vreg改變其輸出的充電電流;第一開關S1具有一耦接壓控電流源51的第一端501及一第二端502;儲能電容C1具有一耦接第一開關S1之第二端502的第一端503及一接地的第二端504;電阻R1具有一耦接儲能電容C1之第一端503的第一端505及一第二端506;第二開關S2具有一耦接電阻R1之第二端506的第一端507及一接地的第二端508;遲滯比較器53具有一耦接儲能電容C1之第一端503的非反相端、一接收一參考電壓Vref的反相端及一輸出端;反相器52的輸入端耦接遲滯比較器53的輸出端,且反相器52的輸出端控制第一開關S1及第二開關S2的啟閉。The voltage-controlled current source 51 is configured to change the charging current of the output according to the adjustment signal Vreg; the first switch S1 has a first end 501 coupled to the voltage-controlled current source 51 and a second end 502; the storage capacitor C1 has a coupling The first end 503 of the second end 502 of the first switch S1 and the grounded second end 504 are connected to the second end 504 of the first switch S1. The resistor R1 has a first end 505 coupled to the first end 503 of the storage capacitor C1 and a second end 506. The second switch S2 has a first end 507 coupled to the second end 506 of the resistor R1 and a grounded second end 508. The hysteresis comparator 53 has a non-reverse coupled to the first end 503 of the storage capacitor C1. The phase end receives an inverting end of a reference voltage Vref and an output end; the input end of the inverter 52 is coupled to the output end of the hysteresis comparator 53, and the output end of the inverter 52 controls the first switch S1 and the The opening and closing of the two switches S2.

值得一提的是,遲滯比較器53利用參考電壓Vref形成一遲滯區間(hysteresis),配合參閱圖5,其中具有一第一臨界電壓值VH 及一第二臨界電壓值VL 。此外,遲滯比較器53的輸出端所輸出的訊號即為控制訊號LF。It is worth mentioning that the hysteresis comparator 53 forms a hysteresis using the reference voltage Vref. Referring to FIG. 5, it has a first threshold voltage value V H and a second threshold voltage value V L . In addition, the signal outputted by the output of the hysteresis comparator 53 is the control signal LF.

配合參閱圖6,首先,假設控制訊號LF為低準位,使得第一開關S1為關閉(close/on),第二開關S2則為開啟(open/off),且儲能電容C1的初始電壓Vc為零。因此,壓控電流源51在接收到調節訊號Vreg後產生對應的充電電流,並對儲能電容C1進行充電(如t0-t1時間),當儲能電容C1所儲存的電壓Vc達到遲滯比較器53的第一臨界電壓值L1(VH )時,控制訊號LF會轉換為高準位,使得第一開關S1被開啟(open/off)而停止充電。Referring to FIG. 6, first, it is assumed that the control signal LF is at a low level, so that the first switch S1 is closed (close/on), the second switch S2 is open (open/off), and the initial voltage of the storage capacitor C1 is Vc is zero. Therefore, the voltage-controlled current source 51 generates a corresponding charging current after receiving the adjustment signal Vreg, and charges the storage capacitor C1 (eg, t0-t1 time), and when the voltage Vc stored in the storage capacitor C1 reaches the hysteresis comparator When the first threshold voltage value L1 (V H ) of 53 is reached, the control signal LF is converted to a high level, so that the first switch S1 is turned on (open/off) to stop charging.

特別說明的是,控制訊號LF中包含工作時間及間歇時 間,而儲能電容C1充電至第一臨界電壓值L1(VH )的時間即為控制訊號LF中的間歇時間,此時,控制訊號LF為低準位。換言之,驅動訊號產生電路6根據控制訊號LF轉換產生之驅動訊號Drv1、Drv2中會有一段間歇時間及一段工作時間,電壓轉換電路1會在該間歇時間暫時停止作動,直到進入工作時間。Specifically, the control signal LF includes the working time and the intermittent time, and the time when the storage capacitor C1 is charged to the first threshold voltage value L1 (V H ) is the intermittent time in the control signal LF. At this time, the control signal LF is a low level. In other words, the driving signal generating circuit 6 generates an intermittent time and a working time in the driving signals Drv1 and Drv2 generated according to the control signal LF conversion, and the voltage converting circuit 1 temporarily stops the operation during the intermittent time until the working time is entered.

當控制訊號LF轉換為高準位時,第一開關S1開啟(open/off)且第二開關S2關閉(close/on),儲能電容C1開始對電阻R1進行放電(如t1-t2時間),且放電時間則為RC時間常數。在放電的過程中,儲能電容C1的電壓Vc會下降直到低於遲滯比較器53的第二臨界電壓值L2(VL ),則控制訊號LF會再轉換為低準位。When the control signal LF is converted to the high level, the first switch S1 is turned on (open/off) and the second switch S2 is turned off (close/on), and the storage capacitor C1 starts to discharge the resistor R1 (eg, t1-t2 time). And the discharge time is the RC time constant. During the discharge, the voltage Vc of the storage capacitor C1 drops until it is lower than the second threshold voltage L2 (V L ) of the hysteresis comparator 53, and the control signal LF is again converted to the low level.

在本實施例中,儲能電容C1放電至第二臨界電壓值L2(VL )的時間即為控制訊號LF中的工作時間,此時,控制訊號LF為高準位。又由於儲能電容C1的容值及電阻R1的阻值皆不變,因此,儲能電容C1的放電時間將會固定為RC時間常數,也就是說控制訊號LF的工作時間將為固定值,換言之,t1-t2時間會與t3-t4時間相同,至於t0-t1時間是否會與t2-t3時間相同,則是由調節訊號Vreg來決定,若調節訊號Vreg越小,則儲能電容C1的電壓Vc越慢充電至第一臨界電壓值L1(VH ),故控制訊號LF的間歇時間越長(如t0-t1時間);反之,調節訊號Vreg越大,則儲能電容C1的電壓Vc越快充電至第一臨界電壓值L1(VH ),故控制訊號LF的間歇時間越短(如t2-t3時間)。In this embodiment, the time during which the storage capacitor C1 is discharged to the second threshold voltage value L2 (V L ) is the operating time in the control signal LF. At this time, the control signal LF is at a high level. Since the capacitance of the storage capacitor C1 and the resistance of the resistor R1 are unchanged, the discharge time of the storage capacitor C1 will be fixed to the RC time constant, that is, the operating time of the control signal LF will be a fixed value. In other words, the time t1-t2 will be the same as the time t3-t4. Whether the time t0-t1 will be the same as the time t2-t3 is determined by the adjustment signal Vreg. If the adjustment signal Vreg is smaller, the storage capacitor C1 is The slower the voltage Vc is charged to the first threshold voltage value L1 (V H ), so the interval time of the control signal LF is longer (such as t0-t1 time); conversely, the larger the adjustment signal Vreg is, the voltage Vc of the storage capacitor C1 is. The faster the charge is to the first threshold voltage value L1 (V H ), the shorter the pause time of the control signal LF (e.g., t2-t3 time).

整體而言,在負載電流減小(負載電阻Ro增大)的情況下,電壓轉換電路1的輸出電壓Vo上升,則調節訊號Vreg的電壓會降低(兩者成反比),使得壓控電流源51輸出較小的充電電流,充電時間變長,以致於控制訊號LF中的間歇時間變長,電壓轉換電路1不作動的時間也相對變長,使輸出電壓Vo下降;反之,當電壓轉換電路1的輸出電壓Vo下降,則調節訊號Vreg的電壓上升,使得壓控電流源51可用較大的充電電流對儲能電容C1進行充電,故控制訊號LF中的間歇時間縮短,但工作時間固定,因此在一個波形週期中,電壓轉換電路1進行電壓轉換的工作時間相對變長,而使輸出電壓Vo上升,如此一來,跳頻控制模組2可維持電壓轉換電路1輸出固定的輸出電壓Vo。In general, in the case where the load current is reduced (the load resistance Ro is increased), the output voltage Vo of the voltage conversion circuit 1 rises, the voltage of the adjustment signal Vreg is lowered (the two are inversely proportional), so that the voltage-controlled current source 51 outputting a smaller charging current, the charging time becomes longer, so that the intermittent time in the control signal LF becomes longer, and the time during which the voltage conversion circuit 1 does not operate is relatively longer, so that the output voltage Vo decreases; conversely, when the voltage conversion circuit When the output voltage Vo of 1 decreases, the voltage of the adjustment signal Vreg rises, so that the voltage control current source 51 can charge the storage capacitor C1 with a larger charging current, so the intermittent time in the control signal LF is shortened, but the working time is fixed. Therefore, in one waveform period, the operating time of the voltage conversion circuit 1 for voltage conversion is relatively long, and the output voltage Vo is increased. Thus, the frequency hopping control module 2 can maintain the voltage conversion circuit 1 to output a fixed output voltage Vo. .

參閱圖3、圖7及圖8,以下將詳細說明跳頻控制模組2的細部作動,圖7為本實施例之跳頻控制方法的流程圖,圖8為跳頻控制模組2所產生的訊號波形圖。Referring to FIG. 3, FIG. 7 and FIG. 8, the detailed operation of the frequency hopping control module 2 will be described in detail below. FIG. 7 is a flowchart of the frequency hopping control method of the embodiment, and FIG. 8 is generated by the frequency hopping control module 2. Signal waveform diagram.

步驟10,回授調節電路3根據電壓轉換電路1的輸出電壓Vo對應產生一與輸出電壓Vo成反比的調節訊號Vreg,並傳送至高頻訊號產生器4及間歇時間調節器5。In step 10, the feedback adjustment circuit 3 generates an adjustment signal Vreg which is inversely proportional to the output voltage Vo according to the output voltage Vo of the voltage conversion circuit 1, and transmits the adjustment signal Vreg to the high frequency signal generator 4 and the intermittent time adjuster 5.

步驟20,高頻訊號產生器4根據調節訊號Vreg產生一組週期性的脈衝訊號Drv01、Drv02。脈衝訊號Drv01及Drv02分別用以提供驅動訊號產生電路6,使其產生驅動訊號Drv1及Drv2。In step 20, the high frequency signal generator 4 generates a set of periodic pulse signals Drv01 and Drv02 according to the adjustment signal Vreg. The pulse signals Drv01 and Drv02 are respectively used to provide the driving signal generating circuit 6 to generate the driving signals Drv1 and Drv2.

在高頻訊號產生器4執行步驟20的同時,間歇時間調節器5於接收到調節訊號Vreg後執行步驟30及步驟40。While the high frequency signal generator 4 performs step 20, the intermittent time adjuster 5 performs steps 30 and 40 after receiving the adjustment signal Vreg.

步驟30,間歇時間調節器5利用調節訊號Vreg控制壓控電流源51的輸出電流,並對儲能電容C1進行充電,以產生控制訊號LF中的間歇時間,即t20-t30時間。由圖8可知,在t20-t30時間區間中,調節訊號Vreg上升的斜率較緩,即表示儲能電容C1的充電速度較慢,因此間歇時間較長;相對地,在下一個週期的t40-t50時間區間中,調節訊號Vreg上升的斜率較陡,因此,儲能電容C1較快充電至第一臨界電壓值,故間歇時間較短。In step 30, the intermittent time adjuster 5 controls the output current of the voltage-controlled current source 51 by using the adjustment signal Vreg, and charges the storage capacitor C1 to generate an intermittent time in the control signal LF, that is, t20-t30 time. As can be seen from FIG. 8, in the time interval t20-t30, the slope of the rising signal Vreg rises slowly, that is, the charging speed of the storage capacitor C1 is slow, so the intermittent time is longer; relatively, t40-t50 in the next cycle. In the time interval, the slope of the rising signal Vreg rises steeply. Therefore, the storage capacitor C1 is charged to the first threshold voltage faster, so the intermittent time is shorter.

步驟40,間歇時間調節器5利用儲能電容C1對電阻R1放電的RC時間常數及遲滯比較器53的遲滯區間,產生控制訊號LF中的工作時間,即t10-t20時間。在本實施例中,工作時間的長度為脈衝訊號Drv01(或Drv02)的三個脈衝週期,換言之,儲能電容C1的容值及電阻R的阻值將需要被妥善的設計,使得RC時間常數為脈衝訊號Drv01(或Drv02)的三個脈衝週期。In step 40, the intermittent time adjuster 5 generates the operating time in the control signal LF by using the RC time constant of the storage capacitor C1 to discharge the resistor R1 and the hysteresis interval of the hysteresis comparator 53, that is, t10-t20 time. In this embodiment, the length of the working time is three pulse periods of the pulse signal Drv01 (or Drv02). In other words, the capacitance of the storage capacitor C1 and the resistance of the resistor R need to be properly designed so that the RC time constant Three pulse periods for the pulse signal Drv01 (or Drv02).

步驟50,驅動訊號產生電路6將脈衝訊號Drv01(或Drv02)及控制訊號LF轉換後產生足以驅動第一功率開關Q1及第二功率開關Q2的驅動訊號Drv1、Drv2。在本實施例中,驅動訊號產生電路6為數位邏輯電路,其中是將脈衝訊號Drv01、Drv02與控制訊號LF相互作”及(AND)”運算而產生驅動訊號Drv1、Drv2。In step 50, the driving signal generating circuit 6 converts the pulse signal Drv01 (or Drv02) and the control signal LF to generate driving signals Drv1 and Drv2 sufficient to drive the first power switch Q1 and the second power switch Q2. In the present embodiment, the driving signal generating circuit 6 is a digital logic circuit in which the pulse signals Drv01, Drv02 and the control signal LF are ANDed together to generate the driving signals Drv1 and Drv2.

因此,驅動訊號產生電路6所產生之驅動訊號Drv1、Drv2會控制第一功率開關Q1及第二功率開關Q2的啟閉,使得電壓轉換電路中的儲能電感Lr進行儲能與釋能,其電 感電流Ipri的波形如圖8所示。Therefore, the driving signals Drv1 and Drv2 generated by the driving signal generating circuit 6 control the opening and closing of the first power switch Q1 and the second power switch Q2, so that the energy storage inductor Lr in the voltage converting circuit performs energy storage and energy release. Electricity The waveform of the sense current Ipri is as shown in FIG.

此外,控制訊號LF中工作時間的長度並不以三個脈衝訊號Drv01(或Drv02)的週期為限,設計人員可以依不同的需求而改變,只要適當地調整電阻R1的阻值、儲能電容C1的容值,或是遲滯比較器53的遲滯區間即可。順代一提的是,在跳頻控制模組2運作時,僅會調整間歇時間的長度,故工作時間一旦決定之後,在跳頻控制模組2運作的時候將不會改變。In addition, the length of the working time in the control signal LF is not limited to the period of the three pulse signals Drv01 (or Drv02), and the designer can change according to different requirements, as long as the resistance of the resistor R1 and the storage capacitor are properly adjusted. The capacitance value of C1 or the hysteresis interval of the hysteresis comparator 53 can be used. As mentioned in the following, when the frequency hopping control module 2 operates, only the length of the intermittent time is adjusted, so once the working time is determined, it will not change when the frequency hopping control module 2 operates.

綜上所述,本發明直流/直流轉換裝置100藉由跳頻控制模組2產生一個工作時間固定但間歇時間可調整的驅動訊號Drv1、Drv2,不僅可以維持一個固定的輸出電壓Vo,且電壓轉換電路1在一個預先規劃好的工作時間內進行轉換,可避免過長的工作時間所導致的開關切換損耗及電壓轉換效能不佳的問題。In summary, the DC/DC converter device 100 of the present invention generates a drive signal Drv1 and Drv2 with fixed working time but adjustable intermittent time by the frequency hopping control module 2, which can maintain a fixed output voltage Vo and voltage. The conversion circuit 1 performs conversion in a pre-planned working time to avoid switching switching loss and poor voltage conversion performance caused by excessive working time.

惟以上所述者,僅為本發明之較佳實施例而已,當不能以此限定本發明實施之範圍,即大凡依本發明申請專利範圍及發明說明內容所作之簡單的等效變化與修飾,皆仍屬本發明專利涵蓋之範圍內。The above is only the preferred embodiment of the present invention, and the scope of the invention is not limited thereto, that is, the simple equivalent changes and modifications made by the scope of the invention and the description of the invention are All remain within the scope of the invention patent.

10~50‧‧‧步驟10~50‧‧‧Steps

100‧‧‧直流/直流轉換裝置100‧‧‧DC/DC converter

1‧‧‧電壓轉換電路1‧‧‧Voltage conversion circuit

2‧‧‧跳頻控制模組2‧‧‧Frequency hopping control module

3‧‧‧回授調節電路3‧‧‧ feedback adjustment circuit

4‧‧‧高頻訊號產生器4‧‧‧High frequency signal generator

5‧‧‧間歇時間調節器5‧‧‧Intermittent time regulator

501‧‧‧第一端(第一開關)501‧‧‧ first end (first switch)

502‧‧‧第二端(第一開關)502‧‧‧ second end (first switch)

503‧‧‧第一端(儲能電容)503‧‧‧First end (storage capacitor)

504‧‧‧第二端(儲能電容)504‧‧‧second end (storage capacitor)

505‧‧‧第一端(電阻)505‧‧‧ first end (resistance)

506‧‧‧第二端(電阻)506‧‧‧second end (resistance)

507‧‧‧第一端(第二開關)507‧‧‧ first end (second switch)

508‧‧‧第二端(第二開關)508‧‧‧second end (second switch)

51‧‧‧壓控電流源51‧‧‧voltage controlled current source

52‧‧‧反相器52‧‧‧Inverter

53‧‧‧遲滯比較器53‧‧‧hysteresis comparator

6‧‧‧驅動訊號產生電路6‧‧‧Drive signal generation circuit

Q1‧‧‧第一功率開關Q1‧‧‧First power switch

Q2‧‧‧第二功率開關Q2‧‧‧second power switch

Vo‧‧‧輸出電壓Vo‧‧‧ output voltage

LF‧‧‧控制訊號LF‧‧‧ control signal

Vreg‧‧‧調節訊號Vreg‧‧‧ adjustment signal

Vc‧‧‧電壓Vc‧‧‧ voltage

VH ‧‧‧第一臨界電壓值V H ‧‧‧first threshold voltage value

VL ‧‧‧第二臨界電壓值V L ‧‧‧second threshold voltage value

Drv01‧‧‧脈衝訊號Drv01‧‧‧ pulse signal

Drv02‧‧‧脈衝訊號Drv02‧‧‧ pulse signal

Drv1‧‧‧驅動訊號Drv1‧‧‧ drive signal

Drv2‧‧‧驅動訊號Drv2‧‧‧ drive signal

S1‧‧‧第一開關S1‧‧‧ first switch

S2‧‧‧第二開關S2‧‧‧ second switch

C1‧‧‧儲能電容C1‧‧‧ storage capacitor

R1‧‧‧電阻R1‧‧‧ resistance

Ro‧‧‧負載電阻Ro‧‧‧ load resistor

Lr‧‧‧儲能電感Lr‧‧‧ storage inductor

圖1是一電路圖,說明習知直流/直流轉換裝置之內部元件關係;圖2是一波形圖,說明習知直流/直流轉換裝置因為工作時間過長所產生能量損耗的問題;圖3是一電路圖,說明本發明直流/直流轉換裝置之較 佳實施例;圖4是一電路圖,說明本實施例之間歇時間調節器的內部電路;圖5是一波形圖,說明本實施例之遲滯比較器的遲滯區間;圖6是一波形圖,說明間歇時間調節器如何產生控制訊號LF;圖7是一流程圖,說明本發明跳頻控制方法的細部流程;及圖8是一波形圖,說明跳頻控制模組如何產生驅動訊號Drv1、Drv2。1 is a circuit diagram showing the internal component relationship of a conventional DC/DC converter; FIG. 2 is a waveform diagram illustrating the problem of energy loss caused by a conventional DC/DC converter because the working time is too long; FIG. 3 is a circuit diagram. , illustrating the comparison of the DC/DC converter of the present invention FIG. 4 is a circuit diagram illustrating the internal circuit of the intermittent time adjuster of the present embodiment; FIG. 5 is a waveform diagram illustrating the hysteresis interval of the hysteresis comparator of the present embodiment; FIG. 6 is a waveform diagram illustrating How does the intermittent time adjuster generate the control signal LF; FIG. 7 is a flow chart illustrating the detailed flow of the frequency hopping control method of the present invention; and FIG. 8 is a waveform diagram illustrating how the frequency hopping control module generates the drive signals Drv1 and Drv2.

100...直流/直流轉換裝置100. . . DC/DC converter

1...電壓轉換電路1. . . Voltage conversion circuit

2...跳頻控制模組2. . . Frequency hopping control module

3...回授調節電路3. . . Feedback adjustment circuit

4...高頻訊號產生器4. . . High frequency signal generator

5...間歇時間調節器5. . . Intermittent time regulator

6...驅動訊號產生電路6. . . Drive signal generation circuit

Claims (20)

一種跳頻控制方法,應用於一跳頻控制模組,該跳頻控制模組適合與一電壓轉換電路配合使用,用以在該電壓轉換電路操作於一跳頻模式下產生一驅動該電壓轉換電路之驅動訊號,該跳頻控制方法包含以下步驟:(A)產生一週期性的脈衝訊號;(B)根據一與該輸出電壓成反比的調節訊號產生一控制訊號,該控制訊號的每一週期包括一間歇時間及一固定的工作時間,且該間歇時間與該調節訊號成反比;及(C)根據該控制訊號與該脈衝訊號產生該驅動訊號,以驅動該電壓轉換電路進行電壓轉換。A frequency hopping control method is applied to a frequency hopping control module, and the frequency hopping control module is suitable for use with a voltage conversion circuit for generating a driving voltage conversion when the voltage conversion circuit operates in a frequency hopping mode The driving signal of the circuit, the frequency hopping control method comprises the following steps: (A) generating a periodic pulse signal; (B) generating a control signal according to an adjustment signal inversely proportional to the output voltage, each of the control signals The cycle includes an intermittent time and a fixed working time, and the intermittent time is inversely proportional to the adjustment signal; and (C) generating the driving signal according to the control signal and the pulse signal to drive the voltage conversion circuit to perform voltage conversion. 依據申請專利範圍第1項所述之跳頻控制方法,其中,該步驟(A)是產生一週期性的脈衝訊號,該脈衝訊號的頻率為允許的最高開關頻率。The frequency hopping control method according to claim 1, wherein the step (A) is to generate a periodic pulse signal, the frequency of the pulse signal being the highest allowable switching frequency. 依據申請專利範圍第1項所述之跳頻控制方法,其中,該步驟(B)是利用該調節訊號控制一壓控電流源的輸出電流,並使該輸出電流對一儲能電容充電至一第一臨界電壓值以決定該間歇時間。According to the frequency hopping control method of claim 1, wherein the step (B) is to control the output current of a voltage control current source by using the adjustment signal, and charge the output current to a storage capacitor. The first threshold voltage value determines the intermittent time. 依據申請專利範圍第3項所述之跳頻控制方法,其中,該步驟(B)之工作時間是該儲能電容對一電阻放電至一低於該第一臨界電壓值的第二臨界電壓值的時間。The frequency hopping control method according to claim 3, wherein the working time of the step (B) is that the storage capacitor discharges a resistor to a second threshold voltage lower than the first threshold voltage. time. 依據申請專利範圍第1項所述之跳頻控制方法,其中,該步驟(C)是將該控制訊號與該脈衝訊號作“及運算”而產生該驅動訊號。According to the frequency hopping control method of claim 1, wherein the step (C) is to "AND" the control signal and the pulse signal to generate the driving signal. 一種跳頻控制模組,適合與一電壓轉換電路配合使用,用以在該電壓轉換電路操作於一跳頻模式下產生一驅動該電壓轉換電路之驅動訊號,該跳頻控制模組包含:一高頻訊號產生器,用以產生一週期性的脈衝訊號;一間歇時間調節器,根據一與該輸出電壓成反比的調節訊號產生一控制訊號,該控制訊號的每一週期包括一間歇時間及一固定的工作時間,且該間歇時間與該調節訊號成反比;及一驅動訊號產生電路,根據該脈衝訊號與該控制訊號產生該驅動訊號,以驅動該電壓轉換電路進行電壓轉換。A frequency hopping control module is suitable for use with a voltage conversion circuit for generating a driving signal for driving the voltage conversion circuit when the voltage conversion circuit operates in a frequency hopping mode, the frequency hopping control module includes: a high frequency signal generator for generating a periodic pulse signal; an intermittent time adjuster for generating a control signal according to an adjustment signal inversely proportional to the output voltage, each cycle of the control signal including an intermittent time and a fixed working time, and the intermittent time is inversely proportional to the adjustment signal; and a driving signal generating circuit generates the driving signal according to the pulse signal and the control signal to drive the voltage conversion circuit to perform voltage conversion. 依據申請專利範圍第6項所述之跳頻控制模組,其中,該間歇時間調節器包括一壓控電流源、一儲能電容及一遲滯比較器,該壓控電流源根據該調節訊號而產生輸出電流,該儲能電容具有一耦接該壓控電流源的第一端及一接地的第二端,該遲滯比較器具有一耦接該儲能電容的第一端的非反相端、一接收一參考電壓的反相端及一輸出端,該遲滯比較器根據該參考電壓形成一遲滯區間,該遲滯區間具有一第一臨界電壓值,該遲滯比較器限制該壓控電流源對該儲能電容充電至該第一臨界電壓值,以決定該間歇時間,且由該遲滯比較器的輸出端輸出該控制訊號。The frequency hopping control module according to claim 6, wherein the intermittent time adjuster comprises a voltage controlled current source, a storage capacitor and a hysteresis comparator, and the voltage control current source is according to the adjustment signal. An output current is generated, the storage capacitor has a first end coupled to the voltage-controlled current source and a grounded second end, the hysteresis comparator having a non-inverting end coupled to the first end of the storage capacitor, Receiving an inverting terminal and an output terminal of a reference voltage, the hysteresis comparator forming a hysteresis interval according to the reference voltage, the hysteresis interval having a first threshold voltage value, the hysteresis comparator limiting the voltage control current source to the The storage capacitor is charged to the first threshold voltage to determine the intermittent time, and the control signal is outputted by the output of the hysteresis comparator. 依據申請專利範圍第7項所述之跳頻控制模組,其中,該間歇時間調節器還包括一電阻,該電阻具有一耦接於該儲能電容的第一端及一接地的第二端,該遲滯區間還具有一低於該第一臨界電壓值的第二臨界電壓值,該遲滯比較器限制該儲能電容對該電阻放電至該第二臨界電壓值,以決定該工作時間。The frequency hopping control module of claim 7, wherein the intermittent time adjuster further includes a resistor having a first end coupled to the storage capacitor and a grounded second end The hysteresis interval further has a second threshold voltage value lower than the first threshold voltage value, and the hysteresis comparator limits the storage capacitor to discharge the resistor to the second threshold voltage value to determine the working time. 依據申請專利範圍第8項所述之跳頻控制模組,其中,該間歇時間調節器還包括一第一開關、一第二開關及一反相器,該第一開關串接於該壓控電流源與該儲能電容之間,該第二開關串接於該電阻與地之間,該反相器的輸入端耦接該遲滯比較器的輸出端,該反相器的輸出端控制該第一開關的啟閉,該遲滯比較器的輸出端控制該第二開關的啟閉,該第一開關與第二開關用以切換該儲能電容的充/放電。The frequency hopping control module according to claim 8 , wherein the intermittent time adjuster further comprises a first switch, a second switch and an inverter, wherein the first switch is connected in series with the voltage control Between the current source and the storage capacitor, the second switch is connected in series between the resistor and the ground, and the input end of the inverter is coupled to the output of the hysteresis comparator, and the output of the inverter controls the The first switch is turned on and off, the output of the hysteresis comparator controls the opening and closing of the second switch, and the first switch and the second switch are used to switch the charging/discharging of the storage capacitor. 依據申請專利範圍第6項所述之跳頻控制模組,還包含一回授調節電路,用以根據該電壓轉換電路的輸出電壓產生該調節訊號。The frequency hopping control module according to claim 6 further includes a feedback adjustment circuit for generating the adjustment signal according to an output voltage of the voltage conversion circuit. 依據申請專利範圍第6項所述之跳頻控制模組,其中,該高頻訊號產生器產生一週期性的脈衝訊號,該脈衝訊號的頻率為允許的最高開關頻率。The frequency hopping control module according to claim 6, wherein the high frequency signal generator generates a periodic pulse signal whose frequency is the highest allowable switching frequency. 依據申請專利範圍第6項所述之跳頻控制模組,其中,該驅動訊號產生電路是將該控制訊號與該脈衝訊號作“及”運算而產生該驅動訊號。According to the frequency hopping control module of claim 6, wherein the driving signal generating circuit performs an AND operation on the control signal and the pulse signal to generate the driving signal. 一種直流/直流轉換裝置,包含:一電壓轉換電路,於一跳頻模式下操作;及一跳頻控制模組,包括一高頻訊號產生器、一間歇時間調節器及一驅動訊號產生電路,該高頻訊號產生器用以產生一週期性的脈衝訊號,該間歇時間調節器根據一與該輸出電壓成反比的調節訊號產生一控制訊號,該控制訊號的每一週期包括一間歇時間及一固定的工作時間,且該間歇時間與該調節訊號成反比,該驅動訊號產生電路根據該脈衝訊號與該控制訊號產生該驅動訊號,以驅動該電壓轉換電路進行電壓轉換。A DC/DC conversion device comprising: a voltage conversion circuit operating in a frequency hopping mode; and a frequency hopping control module comprising a high frequency signal generator, an intermittent time adjuster and a driving signal generating circuit, The high frequency signal generator is configured to generate a periodic pulse signal, and the intermittent time adjuster generates a control signal according to an adjustment signal inversely proportional to the output voltage, and each cycle of the control signal includes an intermittent time and a fixed time. The driving time is inversely proportional to the adjustment signal, and the driving signal generating circuit generates the driving signal according to the pulse signal and the control signal to drive the voltage conversion circuit to perform voltage conversion. 依據申請專利範圍第13項所述之直流/直流轉換裝置,其中,該間歇時間調節器包括一壓控電流源、一儲能電容及一遲滯比較器,該壓控電流源根據該調節訊號而產生輸出電流,該儲能電容具有一耦接該壓控電流源的第一端及一接地的第二端,該遲滯比較器具有一耦接該儲能電容的第一端的非反相端、一接收一參考電壓的反相端及一輸出端,該遲滯比較器根據該參考電壓形成一遲滯區間,該遲滯區間具有一第一臨界電壓值,該遲滯比較器限制該壓控電流源對該儲能電容充電至該第一臨界電壓值,以決定該間歇時間,且由該遲滯比較器的輸出端輸出該控制訊號。The DC/DC converter of claim 13, wherein the intermittent time regulator comprises a voltage-controlled current source, a storage capacitor and a hysteresis comparator, and the voltage-controlled current source is based on the adjustment signal. An output current is generated, the storage capacitor has a first end coupled to the voltage-controlled current source and a grounded second end, the hysteresis comparator having a non-inverting end coupled to the first end of the storage capacitor, Receiving an inverting terminal and an output terminal of a reference voltage, the hysteresis comparator forming a hysteresis interval according to the reference voltage, the hysteresis interval having a first threshold voltage value, the hysteresis comparator limiting the voltage control current source to the The storage capacitor is charged to the first threshold voltage to determine the intermittent time, and the control signal is outputted by the output of the hysteresis comparator. 依據申請專利範圍第14項所述之直流/直流轉換裝置,其中,該間歇時間調節器還包括一電阻,該電阻具有一耦接於該儲能電容的第一端及一接地的第二端,該遲滯區間還具有一低於該第一臨界電壓值的第二臨界電壓值,該遲滯比較器限制該儲能電容對該電阻放電至該第二臨界電壓值,以決定該工作時間。The DC/DC converter of claim 14, wherein the intermittent time adjuster further includes a resistor having a first end coupled to the storage capacitor and a second end connected to the ground. The hysteresis interval further has a second threshold voltage value lower than the first threshold voltage value, and the hysteresis comparator limits the storage capacitor to discharge the resistor to the second threshold voltage value to determine the working time. 依據申請專利範圍第15項所述之直流/直流轉換裝置,其中,該間歇時間調節器還包括一第一開關、一第二開關及一反相器,該第一開關串接於該壓控電流源與該儲能電容之間,該第二開關串接於該電阻與地之間,該反相器的輸入端耦接該遲滯比較器的輸出端,該反相器的輸出端控制該第一開關的啟閉,該遲滯比較器的輸出端控制該第二開關的啟閉,該第一開關與第二開關用以切換該儲能電容的充/放電。The DC/DC converter of claim 15, wherein the intermittent time adjuster further includes a first switch, a second switch, and an inverter, wherein the first switch is connected in series with the voltage control Between the current source and the storage capacitor, the second switch is connected in series between the resistor and the ground, and the input end of the inverter is coupled to the output of the hysteresis comparator, and the output of the inverter controls the The first switch is turned on and off, the output of the hysteresis comparator controls the opening and closing of the second switch, and the first switch and the second switch are used to switch the charging/discharging of the storage capacitor. 依據申請專利範圍第13項所述之直流/直流轉換裝置,其中,該跳頻控制模組還包含一回授調節電路,用以根據該電壓轉換電路的輸出電壓產生該調節訊號。The DC/DC converter of claim 13, wherein the frequency hopping control module further comprises a feedback adjustment circuit for generating the adjustment signal according to an output voltage of the voltage conversion circuit. 依據申請專利範圍第13項所述之直流/直流轉換裝置,其中,該高頻訊號產生器產生一週期性的脈衝訊號,該脈衝訊號的頻率為允許的最高開關頻率。The DC/DC converter of claim 13, wherein the high frequency signal generator generates a periodic pulse signal, the frequency of the pulse signal being the highest allowable switching frequency. 依據申請專利範圍第13項所述之直流/直流轉換裝置,其中,該驅動訊號產生電路是將該控制訊號與該脈衝訊號作“及”運算而產生該驅動訊號。The DC/DC converter of claim 13, wherein the driving signal generating circuit generates the driving signal by performing a AND operation on the control signal and the pulse signal. 依據申請專利範圍第13項所述之直流/直流轉換裝置,其中,該電壓轉換電路為一半橋式LLC振盪電路。The DC/DC converter of claim 13, wherein the voltage conversion circuit is a half bridge LLC oscillation circuit.
TW98126361A 2009-08-05 2009-08-05 A dc/dc conversion device, a frequency skip module and a method of frequency skip control TWI392207B (en)

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US6229366B1 (en) * 1998-05-18 2001-05-08 Power Integrations, Inc. Off-line converter with integrated softstart and frequency jitter
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