TWI391677B - Coupled-line structure hf capacitance tester and its test method - Google Patents

Coupled-line structure hf capacitance tester and its test method Download PDF

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TWI391677B
TWI391677B TW98118536A TW98118536A TWI391677B TW I391677 B TWI391677 B TW I391677B TW 98118536 A TW98118536 A TW 98118536A TW 98118536 A TW98118536 A TW 98118536A TW I391677 B TWI391677 B TW I391677B
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line
coupling
high frequency
coupling line
signal
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TW201043976A (en
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Jan Dong Tseng
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Nat Univ Chin Yi Technology
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耦合線結構之高頻電容測試器及其測試方法High-frequency capacitance tester with coupled line structure and test method thereof

本發明係有關一種耦合線結構之高頻電容測試器及其測試方法,尤指一種於基板上覆設一耦合線組以供待測電容器電性搭接,俾能以量測裝置來量測出高頻電容測試器的一散射參數,進而得到與散射參數相應的待測電容值者。The present invention relates to a high-frequency capacitance tester for a coupled line structure and a test method thereof, and more particularly to a method of coating a coupled line group on a substrate for electrical bonding of a capacitor to be tested, and measuring the same by a measuring device. A scattering parameter of the high-frequency capacitance tester is obtained, and then the capacitance value to be measured corresponding to the scattering parameter is obtained.

按,一般所知的電容器基本結構係由兩片金屬平板,中間隔以絕緣介質組合而成,其中電容量的大小取決於金屬片的面積、兩板間的間距以及介於兩板間材質的介質常數。歷史上第一個有留下記錄的電容器是克拉斯特主教(Ewald Georg von Kleist)於1745年10月所發明的,其結構是一個內外層均鍍有金屬膜的玻璃瓶,玻璃瓶內有一金屬桿,一端和內層的金屬膜連結,另一端則連結一金屬球體。在1746年1月時,一個丹麥物理學家馬森布魯克也獨立發明了構造非常類似的電容器,當時克拉斯特主教的發明尚未廣為人知。由於馬森布魯克當時在萊頓大學任教,因此將其命名為萊頓瓶如參考文獻[1]。According to the general structure of the capacitor, the basic structure of the capacitor is composed of two metal plates, and the intermediate space is formed by a combination of insulating materials. The size of the capacitance depends on the area of the metal piece, the spacing between the two plates, and the material between the two plates. Medium constant. The first recorded capacitor in history was invented by Ewald Georg von Kleist in October 1745. The structure is a glass bottle with a metal film inside and outside, and a glass bottle. The metal rod has one end connected to the inner metal film and the other end to a metal sphere. In January 1746, a Danish physicist, Masonbrook, independently invented a very similar capacitor, and the invention of Bishop Crest was not well known. Since Masonbrook taught at Leiden University at the time, he named it the Leiden bottle as a reference [1].

隨著現代通訊系統的快速發展,電容器被廣泛運用於高頻旁路、交連電容與直流阻隔(DC block)如參考文獻[2-3]等,若與電感器組合,則可設計為濾波器如參考文獻[4-6],或調諧電路如參考文獻[7]。在電容器的廣泛運用下,量測電容的技術日趨重要。With the rapid development of modern communication systems, capacitors are widely used in high-frequency bypass, cross-connect capacitors and DC blocking (DC block), such as reference [2-3]. If combined with inductors, they can be designed as filters. Such as reference [4-6], or tuning circuit such as reference [7]. With the widespread use of capacitors, the technology of measuring capacitance is becoming increasingly important.

目前電容測試器具體作法有:使用LCR Meter量測,其原理為發送一已知振幅及頻率的交流信號給待測電容,電容之電流經儀器內部處理計算後即可量測出待測電容器的電容值。M. Fonseca da Silva 等提出基於傳統的Schering橋式電路上增加類比轉數位(Analog to Digital,ADC)電路,數位轉類比(Digital to Analog,DAC)電路,整合電路以及個人電腦的自動電容量測方法[8]。P. Aronhime等提出三種架構,分別為使用基本的RC串聯電路,加上二極體以及開關,且透過電容充放電時間,推算出電容量如參考文獻[9]。M. A. Atmanand等提出在未知的待測元件上,加上電壓源或電流源,計算出元件上的電壓或電流以及其相位差,即可量測出未知的待測元件為電感或電容如參考文獻[10]。本文提出利用平面電路結構與網路分析儀達到量測高頻電容值之新方法。At present, the specific method of the capacitance tester is: using the LCR meter measurement, the principle is to send an AC signal with a known amplitude and frequency to the capacitor to be tested, and the current of the capacitor can be measured by the internal processing of the instrument to measure the capacitor to be tested. Capacitance value. M. Fonseca da Silva et al. proposed an analog-to-digital (ADC) circuit, a digital to analog (DAC) circuit, an integrated circuit, and an automatic capacitance measurement of a personal computer based on a conventional Schering bridge circuit. Method [8]. P. Aronhime et al. proposed three architectures, using a basic RC series circuit, plus a diode and a switch, and calculating the capacitance through the charge and discharge time of the capacitor as described in [9]. MA Atmanand et al. proposed to measure the voltage or current on the component and its phase difference on the unknown component to be tested, and then measure the unknown component to be tested as an inductor or capacitor. [10]. This paper proposes a new method for measuring high-frequency capacitance values using planar circuit structures and network analyzers.

參考文獻references

[1] http://wikipedia. tw/[1] http://wikipedia. tw/

[2] D. Lacombe,J. Cohen,“Octave-Band Microstrip DC Blocks(Short Papers),”IEEE Trans. Microwave Theory and Tech.,Vol. 20,no. 8,pp. 555-556,Aug. 1972.[2] D. Lacombe, J. Cohen, "Octave-Band Microstrip DC Blocks (Short Papers)," IEEE Trans. Microwave Theory and Tech., Vol. 20, no. 8, pp. 555-556, Aug. 1972 .

[3] C. Y. Ho,“Analysis of DC Blocks Using Coupled Lines(Letters),”IEEE Trans. Microwave Theory and Techniques,Vol. 23,no. 9,pp. 773-774,Sep. 1975.[3] C. Y. Ho, "Analysis of DC Blocks Using Coupled Lines (Letters)," IEEE Trans. Microwave Theory and Techniques, Vol. 23, no. 9, pp. 773-774, Sep. 1975.

[4] G. L. Matthaei,L. Young and E. M. T. Jones,Microwave Filters,Impedanc-Matching Network,and Coupling Structures,Artech House,Debham,Mass.,1980.[4] G. L. Matthaei, L. Young and E. M. T. Jones, Microwave Filters, Impedanc-Matching Network, and Coupling Structures, Artech House, Debham, Mass., 1980.

[5] R. E. Collin,Foundations for Microwave Engineering,Second Edition,McGraw-Hill,N. Y.,1992.[5] R. E. Collin, Foundations for Microwave Engineering, Second Edition, McGraw-Hill, N. Y., 1992.

[6] J. S. Hong,M. J. Lancaster,Microstrip Filters for RF/Microwave Applications,Wiley,N. Y.,2001.[6] J. S. Hong, M. J. Lancaster, Microstrip Filters for RF/Microwave Applications, Wiley, N. Y., 2001.

[7] S. Sabaroff,“Impulse Excitation of a Cascade of Series Tuned Circuits,”Proceedings of the IRE,Vol. 32,no. 12,pp. 758-760,Dec. 1944.[7] S. Sabaroff, "Impulse Excitation of a Cascade of Series Tuned Circuits," Proceedings of the IRE, Vol. 32, no. 12, pp. 758-760, Dec. 1944.

[8] M. Fonseca da Silva,A. Cruz Serra,“Capacitance measurement method,”IEEE AFRICON 4th AFRICON,Vol. 1,pp. 247-250,Sept. 1996.[8] M. Fonseca da Silva, A. Cruz Serra, “Capacitance measurement method,” IEEE AFRICON 4th AFRICON, Vol. 1, pp. 247-250, Sept. 1996.

[9] P. Aronhime,G. Cecil,“A new method of capacitance measurement,”Proceedings of the 35th Midwest Symposium on Circuits and Systems,Vol. 1,pp. 718-721,Aug. 1992.[9] P. Aronhime, G. Cecil, "A new method of capacitance measurement," Proceedings of the 35th Midwest Symposium on Circuits and Systems, Vol. 1, pp. 718-721, Aug. 1992.

[10] M. A. Atmanand,V. J. Kumar,V. G. K. Murti,“Anovel method of measurement of L and C,”IEEE Transactions on Instrumentation and Measurement,Vol. 44,no. 4,pp. 898-903,Aug. 1995.[10] M. A. Atmanand, V. J. Kumar, V. G. K. Murti, “Anovel method of measurement of L and C,” IEEE Transactions on Instrumentation and Measurement, Vol. 44, no. 4, pp. 898-903, Aug. 1995.

[11] E. M. T. Jones,“Coupled-Strip-Transmission-Line Filters and Directional Couplers,”IEEE Trans. Microwave Theory and Tech.,vol. 4,pp. 75-81,Apr. 1956.[11] E. M. T. Jones, "Coupled-Strip-Transmission-Line Filters and Directional Couplers," IEEE Trans. Microwave Theory and Tech., vol. 4, pp. 75-81, Apr. 1956.

[12] G. I. Zysman and A. K. Johnson,“Coupled Transmission Line Networks in an Inhomogeneous Dielectric Medium,”IEEE Trans. Microwave Theory and Tech.,vol. 17,pp. 753-759,Oct. 1969.[12] G. I. Zysman and A. K. Johnson, "Coupled Transmission Line Networks in an Inhomogeneous Dielectric Medium," IEEE Trans. Microwave Theory and Tech., vol. 17, pp. 753-759, Oct. 1969.

[13] Pozar,D. M.,Microwave Engineering,Second Edition,New York:Wiley,1998.[13] Pozar, D. M., Microwave Engineering, Second Edition, New York: Wiley, 1998.

本發明之主要目的在於提供一種耦合線結構之高頻電容測試器及其測試方法,主要係利用平面電路結構與網路分析儀進行高頻電容值的量測,經過實際電路量測與模擬結果顯示,模擬值與量測值相當吻合,故可供產業充分大量應用於生產線上,因而具備結構簡單、方便設計、量測快速方便以及製作容易以大幅降低生產成本等特點。The main object of the present invention is to provide a high-frequency capacitance tester with a coupled line structure and a test method thereof, which mainly utilizes a planar circuit structure and a network analyzer to measure a high-frequency capacitance value, and after actual circuit measurement and simulation results It shows that the analog value is quite consistent with the measured value, so it can be used in the production line in the industry. Therefore, it has the characteristics of simple structure, convenient design, quick and convenient measurement, and easy production to greatly reduce production cost.

為達成上述功效,本發明所採用之技術手段於一基板上覆設一耦合線組,耦合線組由一直線延伸的第一耦合線及二位在基板且在同一直線上的第二耦合線所構成,第一耦合線之第一端為一訊號輸入端,其第二端為一訊號輸出端,每一第二耦合線之第一端分別接地,二個第二耦合線之第二端相對並具一供一待測之電容器電性搭接的空隙,俾能以一量測裝置來量測出高頻電容測試器的一散射參數,俾能由計算後得到與散射參數相應的待測電容值者。In order to achieve the above-mentioned effects, the technical means adopted by the present invention is to apply a coupling line group on a substrate, the coupling line group is a first coupling line extending in a straight line and two second coupling lines on the substrate and on the same line. The first end of the first coupling line is a signal input end, the second end of which is a signal output end, the first ends of each second coupling line are respectively grounded, and the second ends of the two second coupling lines are opposite And having a gap for electrically connecting the capacitor to be tested, and measuring a scattering parameter of the high-frequency capacitance tester by using a measuring device, and obtaining a test corresponding to the scattering parameter after calculation Capacitor value.

壹.本發明之技術概念壹. The technical concept of the present invention

請參看圖五及附件二所示,本發明主要係應用在高頻電容值測定的技術領域上,並且利用平面電路結構與網路分析儀達到高頻電容值的量測作業,並可透過由兩耦合線所串接組成的耦合線組(20)以供待測電容器C電性搭接,至於電路模擬則可透過耦合線(如參考文獻[11-12]所示)及奇偶模分析法進行分析(如參考文獻[13]),因而具備結構簡單、方便設計與製作等特點,而且經過實際電路量測與模擬結果顯示,模擬值與量測值相當吻合,故可供產業充分的大量應用。Referring to FIG. 5 and FIG. 2, the present invention is mainly applied to the technical field of high-frequency capacitance measurement, and uses a planar circuit structure and a network analyzer to achieve measurement of high-frequency capacitance values, and A coupling line group (20) composed of two coupled lines connected in series for electrically connecting the capacitor C to be tested, and the circuit simulation can be transmitted through the coupling line (as shown in Reference [11-12]) and the odd-even mode analysis method. The analysis (such as reference [13]) has the characteristics of simple structure, convenient design and production, and the actual circuit measurement and simulation results show that the simulated value and the measured value are quite consistent, so it can be used for a large number of industries. application.

貳.本發明之具體實施贰. The specific implementation of the present invention

2.1本發明之基本特徵2.1 Basic features of the invention

請參看圖五及附件二所示,本發明之基本技術特徵係於一基板(10)上覆設一耦合線組(20),且耦合線組(20)係由一直線延伸的第一耦合線(21)及二位在基板(10)且在同一直線上的第二耦合線(22)所構成,以供一待測電容器C電性搭接。Referring to FIG. 5 and FIG. 2, the basic technical feature of the present invention is that a coupling line group (20) is disposed on a substrate (10), and the coupling line group (20) is a first coupling line extending from a straight line. (21) and a second coupling line (22) on the substrate (10) and on the same straight line for electrically connecting a capacitor C to be tested.

藉一量測裝置螺接於訊號輸入端(210)及訊號輸出端(211)末所設具外螺牙的導電性螺柱(216)(217),以量測出散射參數,便可依據該散射參數計算出相應的該待測電容器C之電容值。A measuring stud is connected to the conductive studs (216) (217) provided with external threads at the signal input end (210) and the signal output end (211) to measure the scattering parameters. The scattering parameter calculates the corresponding capacitance value of the capacitor C to be tested.

為便於審查委員更具體了解本發明,茲將各組成元件等分別詳述如后。In order to facilitate the review of the present invention, the constituent elements and the like are respectively described in detail as follows.

2.2基板2.2 substrate

請參看圖五及附件二所示,本發明基板(10)主要係供耦合線組(20)覆設其上,以組成高頻電容測試器之本發明,於一種具體實施例中,耦合線組(20)係以印刷或蝕刻的方式成型於基板(10)上,而基板(10)所使用的板材為FR-4覆銅雙面板,基板(10)厚度為1.6mm,相對介電常數為4.3,基板(10)尺寸為5.784cm×0.402cm。Referring to FIG. 5 and FIG. 2, the substrate (10) of the present invention is mainly provided with a coupling line group (20) disposed thereon to form a high frequency capacitance tester. In a specific embodiment, the coupling line The group (20) is formed on the substrate (10) by printing or etching, and the board used for the substrate (10) is a FR-4 copper-clad double-sided panel, the substrate (10) has a thickness of 1.6 mm, and a relative dielectric constant. At 4.3, the substrate (10) has a size of 5.784 cm x 0.402 cm.

2.3耦合線組2.3 Coupling line group

請參看圖五及附件二所示,本發明耦合線組(20)包含呈直線延伸的一條第一耦合線(21)及二條第二耦合線(22),第一耦合線(21)與第二耦合線(22)分別具有第一端與第二端,其中第一耦合線(21)之第一端為一訊號輸入端(210),其第二端為一訊號輸出端(211)。此外,二條第二耦合線(22)係位於基板(10)的同一直線上,並與第一耦合線(21)保持平行且能產生耦合作用的位置上,每一第二耦合線(22)之第一端分別接地,且於二條第二耦合線(22)之第二端相對並具一空隙(220),此空隙(220)可供一待測之電容器C放置,並以此二條第二耦合線(22)之第二端分別供電容器C之二端做電性搭接之用,俾能以一量測裝置來量測出高頻電容測試器的一散射參數,依據散射參數經由計算後即可得到與散射參數相應的待測電容值。Referring to FIG. 5 and FIG. 2, the coupling line set (20) of the present invention comprises a first coupling line (21) and two second coupling lines (22) extending in a straight line, and the first coupling line (21) and the The two coupling lines (22) respectively have a first end and a second end, wherein the first end of the first coupling line (21) is a signal input end (210), and the second end is a signal output end (211). In addition, the two second coupling lines (22) are located on the same line of the substrate (10) and are parallel to the first coupling line (21) and can be coupled, and each second coupling line (22) The first ends are respectively grounded, and have a gap (220) opposite to the second ends of the two second coupling lines (22), and the gaps (220) can be placed for a capacitor C to be tested, and the two The second ends of the two coupling lines (22) are respectively electrically connected by the two ends of the power supply container C, and a scattering device can measure a scattering parameter of the high-frequency capacitance tester according to the scattering parameter. After calculation, the capacitance value to be measured corresponding to the scattering parameter can be obtained.

請參看圖五所示,為標準化耦合線組(20)尺寸以縮小基板(10)尺寸,並使耦合線組(20)之偶模阻抗為100歐姆,奇模阻抗為50歐姆,再使訊號輸入端(210)與訊號輸出端(211)的特性阻抗皆為50歐姆之目的,以提升量測精確度。Referring to FIG. 5, the size of the coupling group (20) is standardized to reduce the size of the substrate (10), and the coupling mode group (20) has an even mode impedance of 100 ohms, and the odd mode impedance is 50 ohms, and then the signal is made. The characteristic impedance of the input terminal (210) and the signal output terminal (211) are both 50 ohms to improve the measurement accuracy.

再者,本發明的實驗例中,耦合線組(20)之第一耦合線及第二耦合線的線寬度為1.36mm,該第一耦合線(21)與第二耦合線(22)的間距為0.43mm,該第一耦合線(21)與該第二耦合線(22)的長度分別為21.42mm,第二耦合線(22)之第二端的間距為1mm。而且,第一耦合線(21)之第一端及第二端分別具有一向外擴大的梯形段(212)(213),並於擴大的末端分別具有一矩形段(214)(215),其一矩形段(214)做為該訊號輸入端(210),另一矩形段(215)做為該訊號輸出端(211)。其中,每一梯形段(212)(213)的長度分別為2mm,每一矩形段(214)(215)的長度分別為5mm,且每一矩形段(214)(215)的線寬各為3.1mm。Furthermore, in the experimental example of the present invention, the line width of the first coupling line and the second coupling line of the coupling line group (20) is 1.36 mm, and the first coupling line (21) and the second coupling line (22) The pitch is 0.43 mm, the lengths of the first coupling line (21) and the second coupling line (22) are respectively 21.42 mm, and the spacing of the second ends of the second coupling line (22) is 1 mm. Moreover, the first end and the second end of the first coupling line (21) respectively have an outwardly enlarged trapezoidal section (212) (213) and a rectangular section (214) (215) at the enlarged end, respectively. A rectangular segment (214) is used as the signal input terminal (210), and another rectangular segment (215) is used as the signal output terminal (211). Wherein each trapezoidal segment (212) (213) has a length of 2 mm, each rectangular segment (214) (215) has a length of 5 mm, and each rectangular segment (214) (215) has a line width of 3.1mm.

2.4量測裝置2.4 Measuring device

本發明量測裝置之具體實施例係為一向量網路分析儀,由於量測裝置之向量網路分析儀係為非常普遍用來量測RF射頻及微波散射參數的量測工具,因此於本圖示例中未進一步的具體揭露。且本發明採用之向量網路分析儀包含一與訊號輸入端(210)插接訊號連通的輸出埠,及一與訊號輸出端(211)插接訊號連通的接收埠,向量網路分析儀由輸出埠輸出一量測之訊號經第一耦合線(21)而耦合至第二耦合線(22)中,並由接收埠接收訊號以量測出散射參數。The specific embodiment of the measuring device of the present invention is a vector network analyzer. Since the vector network analyzer of the measuring device is a measuring tool widely used for measuring RF radio frequency and microwave scattering parameters, No further specific disclosure is made in the illustrated example. The vector network analyzer used in the present invention comprises an output port connected to the signal input terminal (210), and a receiving port connected to the signal output terminal (211). The vector network analyzer consists of The output 埠 output is measured by a first coupling line (21) coupled to the second coupling line (22), and the receiving 埠 receives a signal to measure the scatter parameter.

並於向量網路分析儀係嵌入一電磁模擬軟體IE3D內含之LineGauge將耦合線組(20)各項阻抗及電氣長度(θ)進行微帶線結構尺寸計算。並以電磁模擬軟體IE3D進行電路模擬,電路模擬設定2GHz為中心頻率,並以最高測試頻率的四分之一波長來計算該耦合線組(20)的電氣長度(θ),且電氣長度(θ)為90度。In the vector network analyzer, a line Gauge embedded in an electromagnetic simulation software IE3D is used to calculate the impedance and electrical length (θ) of the coupled line group (20) for the microstrip line structure size. The circuit simulation is performed with the electromagnetic simulation software IE3D. The circuit simulation sets the center frequency of 2 GHz, and calculates the electrical length (θ) of the coupled line group (20) with a quarter wavelength of the highest test frequency, and the electrical length (θ ) is 90 degrees.

量測裝置係以該耦合線組(20)之阻抗矩陣與奇、偶模分析法來求取散射參數,耦合線組(20)之線寬與線距由偶模阻抗(Zoe)、奇模阻抗(Zoo)、該電路基板(10)相對介電係數決定,並可影響該訊號輸出端(211)的反射係數與該訊號輸入端(210)的訊號強度。The measuring device uses the impedance matrix of the coupled line group (20) and the odd and even mode analysis method to obtain the scattering parameter, and the line width and the line spacing of the coupled line group (20) are the even mode impedance (Zoe) and the odd mode. The impedance (Zoo) and the relative dielectric constant of the circuit substrate (10) are determined, and may affect the reflection coefficient of the signal output end (211) and the signal intensity of the signal input end (210).

參.電路結構之電氣特性分析Analysis of the electrical characteristics of the circuit structure

請參看圖一(a)、圖五所示,本發明之高頻電容測試器具有左右對稱特性,將電路直切即可進行奇、偶模分析,如圖一(b)、(c)所示。Zoo 、Zoe 為耦合線組(20)的奇模及偶模特性阻抗(Zoe =1/Yoe ,Zoo =1/Yoo ),θ為耦合線組(20)電氣長度,C為待測之電容器。Referring to FIG. 1(a) and FIG. 5, the high-frequency capacitance tester of the present invention has left-right symmetry characteristics, and the circuit can be directly cut to perform odd and even mode analysis, as shown in FIG. 1(b) and (c). Show. Z oo and Zoe are the odd and even mode impedances of the coupled line group (20) (Z oe =1/Y oe , Z oo =1/Y oo ), θ is the electrical length of the coupled line group (20), C For the capacitor to be tested.

首先分析偶模電路,如圖一(b)所示,利用耦合線阻抗矩陣,如式(1)所示,進行電路分析,可觀察出邊界條件為I3 =I4 =0與V1 =0First, analyze the even-mode circuit. As shown in Figure 1(b), using the coupled-line impedance matrix, as shown in equation (1), perform circuit analysis. The boundary conditions can be observed as I 3 = I 4 =0 and V 1 = 0

帶入邊界條件經過整理後,可得整體的偶模電路輸入阻抗如式(2)After entering the boundary conditions, the integrated input impedance of the even mode circuit is obtained. As in equation (2)

接著分析奇模電路,如圖一(c)所示,利用耦合線組(20)導納矩陣,如式(3)所示,進行電路分析[11-13],可觀察出邊界條件為V1 =V3 =0、Zc=1/Yc=1/jω2CThen analyze the odd-mode circuit, as shown in Figure 1 (c), using the coupling line group (20) admittance matrix, as shown in equation (3), perform circuit analysis [11-13], and observe that the boundary condition is V. 1 =V 3 =0, Zc=1/Yc=1/jω2C

帶入邊界條件經整理後,可得整體的奇模電路輸入阻抗如式(4)所示After entering the boundary conditions, the overall odd-mode circuit input impedance can be obtained. As shown in equation (4)

計算出奇模及偶模電路阻抗後,可分別導出奇偶模之反射係數Γo 及Γe 如下所示After calculating the odd-mode and even-mode circuit impedances, the reflection coefficients 奇偶o and Γ e of the odd-even mode can be derived separately as shown below.

再經過整理,可得奇偶模之反射係數Γo 及Γe 如式(5)、式(6)所示After finishing, the reflection coefficient Γ o and Γ e of the odd-even mode can be obtained as shown in equations (5) and (6).

由於反射係數轉換散射參數公式[13]如式(7)及式(8)Since the reflection coefficient conversion scattering parameter formula [13] is as shown in equations (7) and (8)

可得散射參數|S11 |與|S21 |表示式分別如式(9)、式(10)所示The available scattering parameters |S 11 | and |S 21 | are expressed as shown in equations (9) and (10), respectively.

其中阻抗矩陣的Z與導納矩陣Y公式如式(11)-(18)所示Wherein the Z of the impedance matrix and the admittance matrix Y formula are as shown in equations (11)-(18)

肆.電路特性模擬分析肆. Circuit characteristics simulation analysis

請參看如圖二(a)、(b)所示,首先以高頻模擬軟體Microwave Office進行模擬,設定電路中心頻率為2GHz,耦合線組(20)氣長度θ為90°,隨意給定電容值C為6.8pF,改變不同的奇、偶模特性阻抗Zoo 、Zoe ,觀察其變化情形,結果如圖二(a)、(b)所示。Zoo =25Ω、Zoe =100(菱形標誌),Zoo =50Ω、Zoe =100(方形標誌),Zoo =50Ω、Zoe =150(三角形標誌),Zoo =50Ω、Zoe =200(交叉標誌),並由圖中可觀察出,若給定的奇模特性阻抗Zoo 愈小,其|S21 |諧振頻率會往高頻移動;而給定的偶模特性阻抗Zoe 愈大,其|S21 |諧振頻率會往低頻移動。結果顯示更改奇、偶模特性阻抗Zoo 、Zoe 並不會對電路特性產生大幅的影響,故選定雕刻機較易實現之奇模特性阻抗Zoo =50Ω、偶模特性阻抗Zoe =100Ω。Please refer to Figure 2 (a), (b), first simulate with the high-frequency simulation software Microwave Office, set the circuit center frequency to 2GHz, the coupling line group (20) gas length θ is 90 °, freely given capacitance C is 6.8 pF value, to change the different odd and even mode characteristic impedance Z oo, Z oe, changes observed case, two results are shown in (a), (b) shown in FIG. Z oo =25Ω, Zoe =100 (diamond mark), Z oo =50Ω, Zoe =100 (square mark), Z oo =50Ω, Zoe =150 (triangle mark), Z oo =50Ω, Zoe = 200 (cross mark), and it can be observed from the figure that if the given odd model impedance Z oo is smaller, its |S 21 | resonance frequency will move to high frequency; and the given even model impedance Z oe The larger, the |S 21 | resonance frequency will move to the low frequency. The results show that changing the odd and even model impedances Z oo and Zoe does not have a significant impact on the circuit characteristics. Therefore, it is easier to select the odd model impedance of the engraving machine, Z oo = 50Ω, and the even model impedance, Zoe = 100Ω. .

由模擬結果可知此結構具有帶拒特性,故|S21 |需為0,由公式(8)可知,若|S21 |為0則Γe 需等於Γo ,且。可推導出下式It can be seen from the simulation results that the structure has a rejection characteristic, so |S 21 | needs to be 0. It can be known from equation (8) that if |S 21 | is 0, Γ e needs to be equal to Γ o , and . Derivation of the following

令耦合線電氣長度,帶入上式後經整理可得待測電容C與|S21 |諧振頻率點關係式,如式(19)所示。其中β為傳播常數(β=2π/λ,λ為波長),為耦合線組(20)實際長度,f 0f 分別為電路中心頻率與|S21 |諧振頻率點,m為比率值。Electrical length of the coupling line After finishing into the above equation can be obtained by the measured capacitance C | S 21 | resonant frequency relationship, formula (19) shown in FIG. Where β is the propagation constant (β=2π/λ, λ is the wavelength), For the actual length of the coupled line group (20), f 0 and f are the circuit center frequency and |S 21 | resonance frequency point, respectively, and m is the ratio value.

請參看圖三所示所示,設定電路中心頻率為2GHz,奇、偶模特性阻抗Zoo =50Ω、Zoe =100Ω及耦合線組(20)電氣長度θ為90°後,帶入上述推導之公式(19)後,運用數值分析軟體Matlab進行計算與繪圖,可繪出待測電容值與|S21 |諧振頻率點之關係圖,如。當待測電容值0pF時,|S21 |諧振頻率點為2GHz。頻率在1至2GHz時,呈較線性的變化;當頻率小於1GHz時,呈指數曲線變化,也就是當待測電容值大到一定程度後,對|S21 |諧振頻率點的變化影響也較小。並可觀察出當待測電容器C大,則|S21 |諧振頻率點愈往低頻移動;反之,待測電容器C小,則|S21 |諧振頻率點愈往高頻移動。Please refer to Figure 3, set the circuit center frequency to 2GHz, odd and even model impedance Z oo = 50Ω, Zoe = 100Ω and the coupling line group (20) electrical length θ is 90°, bring the above derivation After the formula (19), the numerical analysis software Matlab is used for calculation and drawing, and the relationship between the capacitance value to be measured and the |S 21 | resonance frequency point can be plotted, for example. When the capacitance value to be measured is 0 pF, the |S 21 | resonance frequency point is 2 GHz. When the frequency is 1 to 2 GHz, it changes linearly; when the frequency is less than 1 GHz, it changes exponentially, that is, when the value of the capacitor to be measured is large enough, the influence of the change of |S 21 | resonance frequency point is also better. small. It can be observed that when the capacitor C to be tested is large, the |S 21 | resonance frequency point moves to the low frequency; conversely, if the capacitor C to be tested is small, the |S 21 | resonance frequency point moves to the high frequency.

伍.模擬與實作結果Wu. Simulation and implementation results

請參看圖四(a)、(b)所示,本發明電路模擬係使用電磁模擬軟體IE3D進行,給定中心頻率為2GHz,奇、偶模特性阻抗Zoo =50Ω、Zoe =100Ω及耦合線電氣長度θ為90°,接著分別模擬不同待測電容值C為0.3pF(菱形標誌)、0.7pF(方形標誌)、1.5pF(三角標誌)、3pF(交叉標誌)與6.8pF(星形標誌)五個電容值,其變化情形如圖四(a)、(b)所示。可觀察出當電容值C為0.3、0.7、1.5、3及6.8pF時,其|S21 |諧振頻率分別為1.513、1.169、0.868、0.637及0.431GHz。Referring to FIG. 4(a) and (b), the circuit simulation of the present invention is performed using the electromagnetic simulation software IE3D, the given center frequency is 2 GHz, the odd and even model impedances Z oo = 50 Ω, Zo oe = 100 Ω, and coupling. The line electrical length θ is 90°, and then simulate different capacitance values C to be measured as 0.3pF (diamond mark), 0.7pF (square mark), 1.5pF (triangle mark), 3pF (cross mark) and 6.8pF (star). Mark) Five capacitance values, as shown in Figure 4 (a), (b). It can be observed that when the capacitance values C are 0.3, 0.7, 1.5, 3, and 6.8 pF, the |S 21 | resonance frequencies are 1.513, 1.169, 0.868, 0.637, and 0.431 GHz, respectively.

請參看圖五及附件二所示,電路實作使用之基板(10)材料為FR-4雙面板,基板(10)厚度為1.6mm,相對介電常數為4.3。將上述數值帶入電磁模擬軟體IE3D內含之Line Gauge,進行微帶線結構尺寸計算,可得W1 =3.1mm、W2 =1.36mm、W3 =0.43mm、L1 =5mm、L2 =2mm、L3 =21.42mm、L4 =1mm,輸入與輸出埠(31)之特性阻抗為50歐姆,線寬為W1 =3.1mm,任意給定長度L1 =5mm以方便製作。電路結構如圖五所示,實際電路如附件二所示,電路尺寸為5.784cm×0.402cm,並以向量網路分析儀Anritsu-37269D進行量測。Referring to Figure 5 and Figure 2, the substrate (10) used for the circuit is FR-4 double-sided. The substrate (10) has a thickness of 1.6 mm and a relative dielectric constant of 4.3. Bring the above values into the Line Gauge contained in the electromagnetic simulation software IE3D, and calculate the microstrip line structure size, and obtain W 1 =3.1mm, W 2 = 1.36mm, W 3 =0.43mm, L 1 =5mm, L 2 = 2 mm, L 3 = 21.42 mm, L 4 = 1 mm, the characteristic impedance of the input and output 埠 (31) is 50 ohms, the line width is W 1 = 3.1 mm, and any given length L 1 = 5 mm is convenient for fabrication. The circuit structure is shown in Figure 5. The actual circuit is shown in Annex 2. The circuit size is 5.784cm × 0.402cm and measured by the vector network analyzer Anritsu-37269D.

請參看圖六(a)與(b)所示,其中圖六(a)(b)分別為電路之散射參數|S11 |與|S21 |實際量測結果,分別量測不同待測電容值C為0.3pF(菱形標誌)、0.7pF(方形標誌)、1.5pF(三角標誌)、3pF(交叉標誌)與6.8pF(星形標誌)五個電容值。可觀察出當電容值C為0.3、0.7、1.5、3及6.8pF時,其|S21 |諧振頻率分別為1.388、1.086、0.833、0.621及0.416GHz。Please refer to Figure 6 (a) and (b), where Figure 6 (a) (b) is the scattering parameter |S 11 | and |S 21 | actual measurement results of the circuit, respectively, measuring different capacitances to be tested The value C is five capacitance values of 0.3 pF (diamond mark), 0.7 pF (square mark), 1.5 pF (triangle mark), 3 pF (cross mark), and 6.8 pF (star mark). It can be observed that when the capacitance values C are 0.3, 0.7, 1.5, 3, and 6.8 pF, the |S 21 | resonance frequencies are 1.388, 1.086, 0.833, 0.621, and 0.416 GHz, respectively.

請參看圖七所示,為改變不同電容值實際量測與IE3D模擬比較圖,可觀察出模擬與實測結果具有相當高的一致性。其數值比較如表一所示,當待測電容為0.3pF時,理論計算、IE3D模擬、實際量測的諧振頻率點分別為1.491、1.513、1.388GHz,模擬與實測、理論與實測的電容誤差分別為0.153、0.098pF(誤差百分比分別為0.51%、0.326%)。當待測電容為0.7pF時,理論計算、IE3D模擬、實際量測的諧振頻率點分別為1.165、1.169、1.086GHz,模擬與實測、理論與實測的電容誤差分別為0.194、0.153pF(誤差百分比分別為0.277%、0.218%)。當待測電容為1.5pF時,理論計算、IE3D模擬、實際量測的諧振頻率點分別為0.87、0.868、0.833GHz,模擬與實測、理論與實測的電容誤差分別為0.277、0.161pF(誤差百分比分別為0.185%、0.107%)。當待測電容為3pF時,理論計算、IE3D模擬、實際量測的諧振頻率點分別為0.641、0.637、0.621GHz,模擬與實測、理論與實測的電容誤差分別為0.208、0.221pF(誤差百分比分別為0.069%、0.074%)。當待測電容為6.8pF時,理論計算、IE3D模擬、實際量測的諧振頻率點分別為0.437、0.431、0.416GHz,模擬與實測、理論與實測的電容誤差分別為0.725、0.726pF(誤差百分比分別為0.106%、0.107%)。Please refer to Figure 7. In order to change the actual measurement of different capacitance values and the IE3D simulation comparison chart, it can be observed that the simulation and the measured results have a fairly high consistency. The numerical comparison is shown in Table 1. When the capacitance to be measured is 0.3pF, the resonant frequency points of theoretical calculation, IE3D simulation and actual measurement are 1.491, 1.513, 1.388GHz, respectively. The capacitance error between simulation and actual measurement, theory and actual measurement. They were 0.153 and 0.098 pF, respectively (the error percentages were 0.51% and 0.326%, respectively). When the capacitance to be measured is 0.7pF, the resonance frequency points of theoretical calculation, IE3D simulation and actual measurement are 1.165, 1.169, 1.086GHz, respectively. The capacitance errors of simulation and actual measurement, theoretical and actual measurement are 0.194 and 0.153pF respectively (error percentage They were 0.277% and 0.218%, respectively. When the capacitance to be measured is 1.5pF, the resonance frequency points of theoretical calculation, IE3D simulation and actual measurement are 0.87, 0.868, and 0.833GHz, respectively. The capacitance errors of simulation and actual measurement, theoretical and measured are 0.277 and 0.161pF, respectively. They are 0.185% and 0.107%, respectively. When the capacitance to be measured is 3pF, the resonance frequency points of theoretical calculation, IE3D simulation and actual measurement are 0.641, 0.637, and 0.621GHz, respectively. The capacitance errors of simulation and actual measurement, theoretical and measured are 0.208 and 0.221pF, respectively. It is 0.069%, 0.074%). When the capacitance to be measured is 6.8pF, the resonant frequency points of theoretical calculation, IE3D simulation and actual measurement are 0.437, 0.431, and 0.416GHz, respectively. The capacitance errors of simulation and actual measurement, theoretical and measured are 0.725 and 0.726pF, respectively. They are 0.106% and 0.107%, respectively.

陸.結論Conclusion

藉由上述技術特徵的建置,本發明確實可以利用平面電路結構與網路分析儀進行高頻電容值的量測,經過實際電路量測與模擬結果顯示,模擬值與量測值相當吻合,故可供產業充分大量應用於生產線上,因而具備結構簡單、方便設計、量測快速方便以及製作容易以大幅降低生產成本等特點。With the above technical features, the present invention can indeed measure the high-frequency capacitance value by using the planar circuit structure and the network analyzer. After the actual circuit measurement and simulation results show that the analog value and the measured value are quite consistent. Therefore, the industry can be fully applied to the production line, and thus has the characteristics of simple structure, convenient design, quick and convenient measurement, and easy production to greatly reduce production cost.

以上所述,僅為本發明之一可行實施例,並非用以限定本發明之專利範圍,凡舉依據下列申請專利範圍所述之內容、特徵以及其精神而為之其他變化的等效實施,皆應包含於本發明之專利範圍內。本發明所具體界定於申請專利範圍之結構特徵,未見於同類物品,且具實用性與進步性,已符合發明專利要件,爰依法具文提出申請,謹請 鈞局依法核予專利,以維護本申請人合法之權益。The above is only one of the possible embodiments of the present invention, and is not intended to limit the scope of the patents of the present invention, and the equivalents of other variations of the contents, the features and the spirit of the following claims. All should be included in the scope of the patent of the present invention. The invention is specifically defined in the structural features of the scope of the patent application, is not found in the same kind of articles, and has practicality and progress, has met the requirements of the invention patents, and has applied for the law according to law, and invites the bureau to approve the patents according to law to maintain The legal rights of the applicant.

(C)...電容器(C). . . Capacitor

(10)...基板(10). . . Substrate

(20)...耦合線組(20). . . Coupled line set

(21)...第一耦合線(twenty one). . . First coupling line

(210)...訊號輸入端(210). . . Signal input

(211)...訊號輸出端(211). . . Signal output

(212)(213)...梯形段(212) (213). . . Trapezoidal segment

(214)(215)...矩形段(214) (215). . . Rectangular segment

(216)(217)...螺柱(216) (217). . . Stud

(22)...第二耦合線(twenty two). . . Second coupling line

(220)...空隙(220). . . Void

圖一(a)係本發明電容測試器等效電路示意圖。Figure 1 (a) is a schematic diagram of an equivalent circuit of the capacitance tester of the present invention.

圖一(b)係本發明偶模電路示意圖。Figure 1 (b) is a schematic diagram of an even mode circuit of the present invention.

圖一(c)係本發明奇模電路示意圖Figure 1 (c) is a schematic diagram of the odd-mode circuit of the present invention

圖二(a)係本發明不同奇(Zoo )、偶(Zoe )模阻抗,MWO模擬之散射參數|S11 |關係圖。Figure 2 (a) is a graph of the different odd (Z oo ) and even (Z oe ) mode impedances of the present invention, and the scattering parameter |S 11 | of the MWO simulation.

圖二(b)係本發明不同奇(Zoo )、偶(Zoe )模阻抗,MWO模擬之散射參數關係圖。Fig. 2(b) is a graph showing the scattering parameters of the different odd (Z oo ) and even (Z oe ) mode impedances of the present invention and the MWO simulation.

圖三電容值與|S21 |諧振頻率點(0.5至2GHz)之關係圖。Figure 3 shows the relationship between the capacitance value and |S 21 | resonance frequency point (0.5 to 2 GHz).

圖四(a)係本發明不同電容值之IE3D模擬散射參數|S11 |關係圖。Figure 4 (a) is an IE3D simulated scattering parameter |S 11 | relationship diagram of different capacitance values of the present invention.

圖四(b)係本發明不同電容值之IE3D模擬散射參數|S21 |關係圖。Figure 4 (b) is an IE3D simulated scattering parameter |S 21 | relationship diagram of different capacitance values of the present invention.

圖五高頻電容測試器之電路結構示意圖。Figure 5 is a schematic diagram of the circuit structure of the high frequency capacitance tester.

圖六(a)係本發明不同電容值實際量測散射參數|S11 |關係圖。Figure 6 (a) is a graph showing the actual measurement of the scattering parameter |S 11 |

圖六(b)係本發明不同電容值實際量測散射參數|S21 |關係圖。Figure 6(b) is a graph showing the actual measurement of the scattering parameter |S 21 | of different capacitance values of the present invention.

圖七係本發明不同電容值實際量測與IE3D模擬比較示意圖。Figure 7 is a schematic diagram of actual measurement of different capacitance values and IE3D simulation of the present invention.

附件一電容差值與|S21 |諧振頻率點關係對照表。Annex 1 capacitance difference and |S 21 | resonance frequency point relationship table.

附件二高頻電容測試器之實作照片。Attachment 2 photo of the high frequency capacitance tester.

(C)...電容器(C). . . Capacitor

(10)...基板(10). . . Substrate

(20)...耦合線組(20). . . Coupled line set

(21)...第一耦合線(twenty one). . . First coupling line

(210)...訊號輸入端(210). . . Signal input

(211)...訊號輸出端(211). . . Signal output

(212)(213)...梯形段(212) (213). . . Trapezoidal segment

(214)(215)...矩形段(214) (215). . . Rectangular segment

(216)(217)...螺柱(216) (217). . . Stud

(22)...第二耦合線(twenty two). . . Second coupling line

(220)...空隙(220). . . Void

Claims (21)

一種耦合線結構之高頻電容測試器,其包括有一基板及一覆設在該基板上的耦合線組,而該耦合線組由以下元件構成:一直線延伸的第一耦合線,其具有一第一端及一第二端,該第一端為一訊號輸入端,該第二端為一訊號輸出端;及二位在該基板且在同一直線上,並與該第一耦合線平行且能產生耦合作用的第二耦合線,每一該第二耦合線分別具有一第一端及一第二端,每一該第二耦合線之該第一端分別接地,且二該第二耦合線之該第二端相對並具一空隙,該空隙供一待測之電容器放置,且二該第二耦合線之該第二端分別供該電容器之二端做電性搭接;據此得以一向量網路分析儀連接於該訊號輸入端及該訊號輸出端來量測出一散射參數資料,再由該散射參數資料的諧振頻率得到對應該待測電容器之電容值。 A high-frequency capacitance tester with a coupled line structure includes a substrate and a coupling line group disposed on the substrate, and the coupling line group is composed of the following components: a first coupling line extending in a straight line, having a first One end and a second end, the first end is a signal input end, the second end is a signal output end; and the two positions are on the substrate and on the same line, and are parallel to the first coupling line and can a second coupling line, wherein each of the second coupling lines has a first end and a second end, the first ends of each of the second coupling lines are respectively grounded, and the second coupling line is respectively The second end is opposite to each other and has a gap for the capacitor to be tested, and the second end of the second coupling line is electrically connected to the two ends of the capacitor respectively; A vector network analyzer is connected to the signal input end and the signal output end to measure a scattering parameter data, and then the capacitance value of the capacitor to be tested is obtained from the resonance frequency of the scattering parameter data. 如申請專利範圍第1項所述之高頻電容測試器,其中,該向量網路分析儀包含一與該訊號輸入端插接訊號連通的輸出埠,及一與該訊號輸出端插接訊號連通的接收埠,該向量網路分析儀由該輸出埠輸出一量測之訊號經該第一耦合線而耦合至該第二耦合線中,並由該接收埠接收該訊號以量測出該散射參數。 The high frequency capacitance tester of claim 1, wherein the vector network analyzer includes an output port connected to the signal input terminal, and a signal connected to the signal output terminal. Receiving, the vector network analyzer outputs a measured signal from the output port to the second coupled line via the first coupled line, and receives the signal from the receiving port to measure the scattering parameter. 如申請專利範圍第1項所述之高頻電容測試器,其中,該電路基板厚度為1.6mm,相對介電常數為4.3,並以該向量網路分析儀進行量測,再由嵌入於該向量網路分析儀之一電磁模擬軟體IE3D內含之LineGauge將該耦合線組各項阻抗及電氣長度(θ)進行微帶線結構尺 寸計算。 The high frequency capacitance tester according to claim 1, wherein the circuit substrate has a thickness of 1.6 mm and a relative dielectric constant of 4.3, and is measured by the vector network analyzer, and then embedded in the One of the vector network analyzers, the LineGauge included in the electromagnetic simulation software IE3D, performs the impedance and electrical length (θ) of the coupled line group on the microstrip line structure ruler. Inch calculation. 如申請專利範圍第3項所述之高頻電容測試器,其中,該向量網路分析儀係以該電磁模擬軟體IE3D進行電路模擬,該電路模擬設定2GHz為中心頻率,並以最高測試頻率的四分之一波長來計算該耦合線組的電氣長度(θ),且該電氣長度(θ)為90度。 The high frequency capacitance tester according to claim 3, wherein the vector network analyzer performs circuit simulation with the electromagnetic simulation software IE3D, and the circuit simulates setting a center frequency of 2 GHz and the highest test frequency. The electrical length (θ) of the coupled line group is calculated by a quarter wavelength, and the electrical length (θ) is 90 degrees. 如申請專利範圍第1項所述之高頻電容測試器,其中,該耦合線組之該第一耦合線及該第二耦合線的線寬分別為1.36mm,該第一耦合線與該第二耦合線的間距為0.43mm,該第一耦合線與該第二耦合線的長度分別為21.42mm,該二第二耦合線之該第二端的間距為1mm。 The high frequency capacitance tester of claim 1, wherein a line width of the first coupling line and the second coupling line of the coupling line group is 1.36 mm, respectively, the first coupling line and the first The spacing of the two coupling lines is 0.43 mm, the lengths of the first coupling lines and the second coupling lines are respectively 21.42 mm, and the spacing of the second ends of the second coupling lines is 1 mm. 如申請專利範圍第1項所述之高頻電容測試器,其中,該第一耦合線之該第一端及該第二端分別具有一向外擴大的梯形段,並於擴大的末端分別具有一矩形段,其一矩形段做為該訊號輸入端,另一矩形段做為該訊號輸出端。 The high frequency capacitance tester of claim 1, wherein the first end and the second end of the first coupling line respectively have an outwardly enlarged trapezoidal segment and have one at each of the enlarged ends A rectangular segment has a rectangular segment as the signal input end and another rectangular segment as the signal output terminal. 如申請專利範圍第6項所述之高頻電容測試器,其中,每一該梯形段的長度分別為2mm,每一該矩形段的長度分別為5mm,且每一該矩形段的線寬各為3.1mm。 The high frequency capacitance tester of claim 6, wherein each of the trapezoidal segments has a length of 2 mm, each of the rectangular segments has a length of 5 mm, and each of the rectangular segments has a line width of It is 3.1mm. 如申請專利範圍第1或6項所述之高頻電容測試器,其中,該訊號輸入端及該訊號輸出端末各接設一具外螺牙的導電性螺柱,以供該量測裝置螺接。 The high frequency capacitance tester according to claim 1 or 6, wherein the signal input end and the signal output end are respectively connected with a conductive stud with an external thread for the measuring device screw Pick up. 如申請專利範圍第1項所述之高頻電容測試器,其中,該量測裝置係以該耦合線之阻抗矩陣與奇、偶模分析法來求取該散射參數,該耦合線組之線寬與線距由偶模阻抗(Zoe)、奇模阻抗(Zoo)、該電路基 板相對介電係數決定,藉以調整該訊號輸出端的反射係數與該訊號輸入端的訊號強度。 The high frequency capacitance tester according to claim 1, wherein the measuring device obtains the scattering parameter by using an impedance matrix of the coupled line and an odd and even mode analysis method, and the line of the coupled line group Width and line spacing from even mode impedance (Zoe), odd mode impedance (Zoo), the circuit base The relative dielectric constant of the board is determined by adjusting the reflection coefficient of the signal output end and the signal intensity of the signal input end. 如申請專利範圍第9項所述之高頻電容測試器,其中,該偶模阻抗為100歐姆,該奇模阻抗為50歐姆,該訊號輸入端與該訊號輸出端的特性阻抗皆為50歐姆。 The high frequency capacitance tester according to claim 9, wherein the even mode impedance is 100 ohms, the odd mode impedance is 50 ohms, and the characteristic impedance of the signal input end and the signal output end are both 50 ohms. 如申請專利範圍第1項所述之高頻電容測試器,其中,該二耦合線係以印刷或蝕刻成型於該電路基板上。 The high frequency capacitance tester of claim 1, wherein the two coupling lines are formed on the circuit substrate by printing or etching. 一種耦合線結構之高頻電容測試方法,其包括以下步驟:提供一覆設一基板上的耦合線組,其一直線延伸的第一耦合線及二位在同一直線且與該第一耦合線平行且能產生耦合作用的第二耦合線所構成,其第一耦合線具有一第一端及一第二端,該第一端為一訊號輸入端,該第二端為一訊號輸出端,每一該第二耦合線分別具有一第一端及一第二端,每一該第二耦合線之該第一端分別接地,且二該第二耦合線之該第二端相對並具一空隙;將一待測之電容器放置於該空隙,且使該電容器二端分別與該二第二耦合線之該第二端做電性搭接;及將一向量網路分析儀連接於該訊號輸入端及該訊號輸出端以量測出一散射參數資料,再由該散射參數資料的諧振頻率得到對應該待測電容器之電容值。 A high frequency capacitance testing method for a coupled line structure, comprising the steps of: providing a coupling line group on a substrate, wherein a first coupling line extending in a straight line and two bits are in the same straight line and parallel to the first coupling line And a second coupling line capable of generating a coupling, the first coupling line has a first end and a second end, the first end is a signal input end, and the second end is a signal output end, each Each of the second coupling lines has a first end and a second end, the first ends of each of the second coupling lines are respectively grounded, and the second ends of the second coupling lines are opposite each other and have a gap Placing a capacitor to be tested in the gap, and electrically connecting the two ends of the capacitor to the second ends of the second coupling lines; and connecting a vector network analyzer to the signal input The end and the signal output end measure a scattering parameter data, and then obtain the capacitance value of the capacitor to be tested from the resonance frequency of the scattering parameter data. 如申請專利範圍第12項所述之高頻電容測試方法,其中,該向量網路分析儀包含一與該訊號輸入端插接訊號連通的輸出埠,及一與該訊號輸出端插接訊號連通的接收埠,該向量網路分析儀由該輸出埠 輸出一量測之訊號經該第一耦合線而耦合至該第二耦合線中,並由該接收埠接收該訊號以量測出該散射參數。 The high frequency capacitance test method of claim 12, wherein the vector network analyzer includes an output port connected to the signal input terminal, and a signal connected to the signal output terminal. Receiver, the vector network analyzer from the output埠 A signal for outputting a measurement is coupled to the second coupling line via the first coupling line, and the signal is received by the receiving port to measure the scattering parameter. 如申請專利範圍第12項所述之高頻電容測試方法,其中,該電路基板厚度為1.6mm,相對介電常數為4.3,並以該向量網路分析儀進行量測,再由嵌入於該向量網路分析儀之一電磁模擬軟體IE3D內含之LineGauge將該耦合線組各項阻抗及電氣長度(θ)進行微帶線結構尺寸計算。 The high frequency capacitance testing method according to claim 12, wherein the circuit substrate has a thickness of 1.6 mm and a relative dielectric constant of 4.3, and is measured by the vector network analyzer, and then embedded in the One of the vector network analyzers, the LineGauge included in the electromagnetic simulation software IE3D, calculates the impedance and electrical length (θ) of the coupled line group for the microstrip line structure size. 如申請專利範圍第14項所述之高頻電容測試方法,其中,該向量網路分析儀係以該電磁模擬軟體IE3D進行電路模擬,該電路模擬設定2GHz為中心頻率,並以最高測試頻率的四分之一波長來計算該耦合線組的電氣長度(θ),且該電氣長度(θ)為90度。 The method for testing a high frequency capacitor according to claim 14, wherein the vector network analyzer performs circuit simulation using the electromagnetic simulation software IE3D, and the circuit simulates setting a center frequency of 2 GHz and the highest test frequency. The electrical length (θ) of the coupled line group is calculated by a quarter wavelength, and the electrical length (θ) is 90 degrees. 如申請專利範圍第12項所述之高頻電容測試方法,其中,該耦合線組之該第一耦合線及該第二耦合線的線寬分別為1.36mm,該第一耦合線與該第二耦合線的間距為0.43mm,該第一耦合線與該第二耦合線的長度分別為21.42mm,該二第二耦合線之該第二端的間距為1mm。 The high frequency capacitance test method of claim 12, wherein a line width of the first coupling line and the second coupling line of the coupling line group is 1.36 mm, respectively, the first coupling line and the first The spacing of the two coupling lines is 0.43 mm, the lengths of the first coupling lines and the second coupling lines are respectively 21.42 mm, and the spacing of the second ends of the second coupling lines is 1 mm. 如申請專利範圍第12項所述之高頻電容測試方法,其中,該第一耦合線之該第一端及該第二端分別具有一向外擴大的梯形段,並於擴大的末端分別具有一矩形段,其一矩形段做為該訊號輸入端,另一矩形段做為該訊號輸出端。 The high frequency capacitance test method of claim 12, wherein the first end and the second end of the first coupling line respectively have an outwardly enlarged trapezoidal segment and have one at each of the enlarged ends A rectangular segment has a rectangular segment as the signal input end and another rectangular segment as the signal output terminal. 如申請專利範圍第17項所述之高頻電容測試方法,其中,每一該梯形段的長度分別為2mm,每一該矩形段的長度分別為5mm,且每一該矩形段的線寬各為3.1mm。The high frequency capacitance testing method of claim 17, wherein each of the trapezoidal segments has a length of 2 mm, each of the rectangular segments has a length of 5 mm, and each of the rectangular segments has a line width of It is 3.1mm. 如申請專利範圍第12或17項所述之高頻電容測試方法,其中,該訊號輸入端及該訊號輸出端末各接設一具外螺牙的導電性螺柱,以供該量測裝置螺接。The high frequency capacitance test method of claim 12 or 17, wherein the signal input end and the signal output end are respectively connected with a conductive stud with a external thread for the measuring device screw Pick up. 如申請專利範圍第12項所述之高頻電容測試方法,其中,該量測裝置係以該耦合線之阻抗矩陣與奇、偶模分析法來求取該散射參數,該耦合線組之線寬與線距由偶模阻抗(Zoe)、奇模阻抗(Zoo)、該電路基板相對介電係數決定,藉以調整該訊號輸出端的反射係數與該訊號輸入端的訊號強度。The high frequency capacitance testing method according to claim 12, wherein the measuring device determines the scattering parameter by using an impedance matrix of the coupled line and an odd and even mode analysis method, the line of the coupling line group The width and the line spacing are determined by the even mode impedance (Zoe), the odd mode impedance (Zoo), and the relative dielectric constant of the circuit board, thereby adjusting the reflection coefficient of the signal output end and the signal intensity of the signal input end. 如申請專利範圍第20項所述之高頻電容測試方法,其中,該偶模阻抗為100歐姆,該奇模阻抗為50歐姆,該訊號輸入端與該訊號輸出端的特性阻抗皆為50歐姆。The high frequency capacitance test method according to claim 20, wherein the even mode impedance is 100 ohms, the odd mode impedance is 50 ohms, and the characteristic impedance of the signal input end and the signal output end are both 50 ohms.
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