TWI387214B - Method and circuit for decoding an error correction code - Google Patents

Description

Error correction code decoding method and circuit

The present invention relates to error correcting codes, and more particularly to decoding of error correcting codes.

The error correction code is used to correct the error of the data. The data transmitted by the communication system is often encoded as an error correction code before being transmitted on the transmission side. When the receiving end receives the error correcting code data, even if the data is corrupted during transmission, a random error is generated, and the correct data can be recovered by decoding the error correcting code. Similarly, data storage systems often encode stored data as error correction codes before storing the data. When the data is corrupted during storage and a random error occurs, the correct error can also be recovered by decoding the error correction code. Common error correction codes such as BCH (Bose, Ray-Chaudhuri, and Hocquenghem code) and RS code (Reed-Solomon code). BCH codes are often used for the storage of flash memory data, while RS codes are often used for the storage of optical disc data.

When the data storage system wants to take out the stored data, the extracted error correcting code is taken. Therefore, the error correcting code must be decoded before the data is used to be restored to the original data. FIG. 1 is a flow diagram of a conventional method 100 of decoding an error correction code. Here, the BCH code is taken as an explanation of the error correction code for explanation. First, the decoding circuit receives a BCH code (step 102). Next, the decoding circuit calculates a symptom code based on the BCH code (step 104). Next, the decoding circuit checks if the symptom code is zero (step 106). If the symptom code is zero, it means that there is no error in the BCH code, so no further correction is needed. On the other hand, if the symptom code is not zero, it indicates that an error occurs in the BCH code, so the BCH code must be corrected.

First, the decoding circuit sequentially calculates a plurality of coefficients of an error-location polynomial according to the symptom code (step 108). The calculation of the coefficients of the error polynomial is sequentially generated from the low-order coefficient to the high-order coefficient in a loop manner. Therefore, it is necessary to continue the loop execution step 108 until the highest-order coefficient of the error polynomial is generated, and then the coefficient is calculated to obtain a complete error polynomial (step 110). Next, the decoding circuit performs a Chien search to find the root of the error polynomial (step 112). The root of the error polynomial indicates the location of the bit in the BCH code where the error occurred, so the decoding circuit can correct the BCH code based on the root of the error polynomial (step 114), resulting in an error-free BCH code.

Figure 2 shows a timing diagram of a conventional decoding error correction code. Starting from time t _a , the decoding circuit first calculates the symptom code of the error correction code in time period T ₁ (step 202). T _b from the start point, then the decoding circuit ₂ on the basis of the period T symptoms error correction code calculation of the coefficients of the polynomial of the code (step 204). Since the start time point t _c, Qin search followed by the decoding circuit to identify the root of the error polynomial in the period T _3, the obtained position of the error bit of an error correction code (step 206). Therefore, the entire time history of decoding the error correction code requires a time of (T ₁ + T ₂ + T ₃ ).

Since decoding the error correcting code is a necessary step for the receiving end of the communication system and the optical disk drive or the flash memory to read the data, if the decoding of the error correcting code is accelerated, the communication system, such as the optical disk drive or the flash memory, is greatly improved. The performance of the data storage system. However, since data errors occur randomly, the required times T ₁ , T ₂ , and T ₃ of steps 202, 204, and 206 of FIG. _{2 are} difficult to be greatly shortened. Therefore, there is a need for a method of accelerating the decoding of error correcting codes to improve the performance of communication systems and data storage systems for decoding error correcting codes.

In view of the above, it is an object of the present invention to provide a decoding method for an error correction code to solve the problems of the prior art. First, a symptom code (syndrome) is calculated based on the error correction code. Then, a plurality of coefficients of an error-location polynomial are sequentially calculated according to the symptom code. Whenever one of the coefficients is newly calculated, it is checked whether the newly generated coefficient is zero. When the new generation coefficient is zero, a hypothetical error polynomial is established based on the plurality of low order term coefficients that have been calculated and whose number is lower than the newly generated coefficient. Next, perform a Chien search to find the root of the assumed error polynomial. Finally, the error correcting code is modified in accordance with the root of the assumed error polynomial.

The present invention further provides a decoding method of an error correction code. First, a symptom code (syndrome) is calculated based on an error correction code. Then, a plurality of coefficients of an error-location polynomial are sequentially calculated according to the symptom code. When the coefficients of the error polynomial are still not calculated, a Chien search is performed to find the root of a hypothetical error polynomial, which is based on the calculated portion of the error polynomial. Determined by the coefficient. Finally, the error correcting code is modified in accordance with the root of the assumed error polynomial.

The present invention provides a decoding circuit for an error correction code. In one embodiment, the decoding circuit includes a symptom code calculation module, an error polynomial calculation module, a control module, and a Chien search module. The symptom code calculation module calculates a symptom code according to an error correction code. When the symptom code is not zero, the error polynomial calculation module sequentially calculates a plurality of coefficients of an error-location polynomial according to the symptom code. Whenever the error polynomial calculation module calculates one of the coefficients to generate a new generation coefficient, the control module checks whether the newly generated coefficient is zero, and when the new generation coefficient is zero, sends a start signal. When the start signal is received from the control module, the Qin search module establishes a hypothetical error polynomial according to the plurality of low-order coefficients calculated by the error polynomial calculation module and the number of times lower than the newly generated coefficient, and A Qin search is performed to find the root of the assumed error polynomial for error correction of the error correction code.

The above and other objects, features, and advantages of the present invention will become more apparent and understood.

Figure 3 is a block diagram of a decoding circuit 300 for an error correcting code in accordance with the present invention. In one embodiment, the decoding circuit 300 includes a symptom code calculation circuit 302, an error polynomial calculation module 304, a Qin search module 306, a control module 308, and an error correction module 310. Figure 4 is a flow diagram of a method 400 of decoding an error correcting code in accordance with the present invention. The decoding circuit 300 operates in accordance with the method 400 of FIG. 4 to decode the BCH error correcting code. In the following embodiments, the error correction codes are all based on the BCH code, but the method circuit of the present invention is equally applicable to the RS code. When the decoding circuit 300 operates according to the method 400, the time required for decoding the BCH error correction code can be greatly shortened, thereby improving the performance of the system applying the decoding circuit 300.

First, the symptom code calculation module 302 receives a BCH code (step 402). Next, the symptom code calculation module 302 calculates a symptom code according to the BCH code (step 404). Next, the symptom code calculation module 302 checks if the calculated symptom code is 0 (step 406). If the symptom code is 0, it means that there is no error in the BCH code, so there is no need to correct the BCH code. If the symptom code is not 0, it indicates that the BCH code has an error, and the BCH code needs to be corrected. Therefore, when the symptom code is not 0, the symptom code calculation module 302 delivers the calculated symptom code to the error polynomial calculation module 304 to perform an error-location polynomial calculation.

Next, the error polynomial calculation module 304 sequentially calculates a plurality of coefficients Λ ₁ , Λ ₂ , . . . , Λ _{t of the} error polynomial according to the symptom code (step 408). In one embodiment, the order of calculation of the equal coefficients by the error polynomial calculation module 304 is sequentially calculated to a highest order coefficient Λ _t according to the first term coefficient Λ ₁ and the quadratic coefficient Λ _{2 of the} error polynomial. Each time the error polynomial calculation module 304 performs a loop, an i-th order coefficient Λ _{i of the} error polynomial is generated. The error polynomial calculation module 304 will continue to operate until all coefficients Λ ₁ , Λ ₂ , ..., Λ _{t of the} error polynomial are calculated. Therefore, when the error polynomial calculation module 304 is calculated, an error polynomial of the following formula is obtained: 1 + Λ ₁ x + Λ ₂ x ² + ... + Λ _i x ⁱ +... + Λ _t x ^t .

In the conventional decoding method 100 of Figures 1 and 2, the error polynomial calculation module must calculate all the coefficients Λ ₁ , Λ ₂ , ..., Λ _{t of the} error polynomial before the Qin search is performed. Find the root of the error polynomial. However, in the decoding method 400 according to the present invention, it is not necessary to wait until the error polynomial calculation module 304 calculates all the coefficients Λ ₁ , Λ ₂ , ..., Λ _{t of the} error polynomial, and then performs the Qin search. To save the overall time of the decoding process.

First, each time the error polynomial calculation module 304 calculates an i-th order coefficient Λ _{i of the} error polynomial (i≧2), the control module 308 checks whether the calculated coefficient Λ _i is zero (step 410). If the calculated coefficient Λ _i is zero, the control module 308 sends a start signal to the Qin search module 306, so that the Qin search module 306 calculates the error polynomial calculated by the module 304 according to the current error polynomial. Part of the coefficient, the Qin style search. At this time, since the error polynomial calculation module 304 has not calculated the coefficients of the error polynomial, the overall time required for the decoding process can be reduced by performing the time of the Qin search in advance. If the calculated coefficient Λ _{i is} not zero, the control module 308 checks if the error polynomial calculation module 304 has calculated the highest order coefficient Λ _t of the error polynomial (step 412). If so, the control module 308 sends a start signal to the Qin search module 306, so that the Qin search module 306 performs a Qin search based on all coefficients of the error polynomial.

Then, when the Qin search module 306 receives the start signal from the control module 308, the Qin search module 306 establishes a hypothetical error polynomial based on the currently calculated coefficients (step 414). Since the error polynomial calculation module 304 calculates the order of the coefficients of the error polynomial according to the first term coefficient Λ ₁ and then successively calculates the highest order coefficient Λ _t , when the Qin search module 306 receives the start signal, the current error polynomial calculation The partial coefficients of the error polynomial calculated by the module 304 are Λ ₁ , Λ ₂ , . . . , Λ _i , . . . , Λ _k , and the hypothetical error polynomial established by the Qin search module 306 is as follows:

1+Λ ₁ x+Λ ₂ x ² +...+Λ _i x ⁱ +...+Λ _k x ^k .

Next, the Qin search module 306 performs a Chen search to find the root of the assumed error polynomial (step 416). At this time, the error polynomial calculation module 304 continues to calculate the high order term coefficients of the error polynomial, and the control module 308 continues to check whether the newly calculated high order term coefficients are zero. If the control module 308 finds that the error polynomial calculation module 304 subsequently has a non-zero higher order term coefficient that calculates the error polynomial (step 418), the control module 308 generates a reset signal. When the Qin search module 306 receives the reset signal, the Qin search module 306 establishes a second hypothetical error polynomial according to all the coefficients currently calculated by the error polynomial calculation module 304 (step 414), and executes one. Qin searches to find the root of the second hypothetical error polynomial (step 416). Finally, since it is assumed that the root of the error polynomial or the second hypothetical error polynomial indicates the location of the error bit in the BCH error correction code, the error correction module 310 corrects the BCH code according to the root of the assumed error polynomial (step 420). To get the correct BCH code.

Figure 5 is a schematic illustration of the operation of the decoding circuit 300 in accordance with the present invention. First, the symptom code calculation module 302 calculates a symptom code (step 502). Next, the error polynomial calculation module 304 successively calculates the primary term coefficient Λ ₁ (step 504), the quadratic coefficient Λ ₂ (step 504), and the cubic term coefficient Λ ₃ (step 508) of the error polynomial until the final calculation reaches the highest t. The secondary coefficient Λ _t (step 510). When the error polynomial calculation module 304 calculates the coefficient of the error polynomial, the control module 308 checks whether the i-term coefficient Λ _i calculated by the error polynomial calculation module 304 is 0 (i≧2), and thus indicates that Qin The search module 306 begins a Qin search (step 512). After the Qin search module 306 starts the Qin search, if the control module 308 finds that the error polynomial calculation module 304 newly calculates the non-zero higher-order coefficient 错误_j of the error polynomial (i<j≦t), the control mode Group 308 resets Qin's search module 306 and resumes performing the Qin search (step 512). Finally, if the Qin search module 306 cannot find the root, it indicates that the decoding is incorrect (step 514). If the Qin search module 306 successfully finds the root of the hypothetical error polynomial and the number of roots is the number of assumed error polynomials, then the decoding is successful (step 516).

Figure 6 is a schematic diagram of the probability of the number of error bits occurring in the error correction code data. As can be seen from the figure, the greater the number of error bits, the smaller the probability of occurrence. That is, most of the error correction code data has only a few error bits. Since the number of roots of the error polynomial, that is, the number of error polynomials, indicates the number of error bits of the error correction code data, when the error polynomial calculation module 304 calculates the coefficients of the error polynomial, the frequent high order term coefficients are all zero. In other words, in most cases, the conventional error correction code decoding method 200 wastes a lot of time performing the calculation of the high order term coefficients of the error polynomial. However, the decoding circuit 300 of the present invention starts the Qin search as soon as the zero coefficient of the error polynomial is calculated. In addition to the case where a small number of error bits occur, in most cases, the decoding circuit 300 of the present invention can effectively perform error correction of the error correction code and save the time required to decode the error correction code.

Figure 7 is a timing diagram of decoding an error correcting code in accordance with the present invention. Starting from time t _a , decoding circuit 300 first calculates the symptom code of the error correction code in time period T ₁ (step 702). Since the start time point t _b, then the coefficient decoding circuit 300 of the error correction code polynomials (step 704) in the period T ₂ is calculated in accordance with the symptoms code. However, starting from the time point t _e , the decoding circuit 300 facilitates the Qin search in the time period T ₃ to find the root of the assumed error polynomial, and obtains the error bit of the error correcting code, in the case where the coefficient of the error polynomial has not been calculated. The location (step 706) is for correcting the error correction code. Therefore, the entire time history of decoding the error correction code requires only (T ₁ + T ₂ + T ₅ ). Compared with the time (T ₁ + T ₂ + T ₃ ) required for the decoding of the conventional error correction code of Fig. ₂ , the time period T _{4 is} saved, and the performance of the improved decoding circuit is improved.

Although the present invention has been disclosed in the above preferred embodiments, it is not intended to limit the invention, and it is intended that the invention may be modified and modified without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims.

300. . . Decoding circuit

302. . . Symptom code calculation module

304. . . Error polynomial calculation module

308. . . Control module

306. . . Qin's search module

as well as

310. . . Error correction module

Figure 1 is a flow chart of a conventional method of decoding an error correcting code;

Figure 2 shows a timing diagram of a conventional decoding error correction code;

Figure 3 is a block diagram of a decoding circuit of an error correcting code according to the present invention;

Figure 4 is a flow chart showing a decoding method of an error correcting code according to the present invention;

Figure 5 is a schematic diagram showing the operation of the decoding circuit in accordance with the present invention;

Figure 6 is a schematic diagram of the probability of the number of error bits occurring in the error correction code data;

Figure 7 is a timing diagram of decoding an error correcting code in accordance with the present invention.

Claims (23)

An error correction code decoding method includes the following steps: calculating a symptom code according to an error correction code; calculating a plurality of coefficients of an error-location polynomial according to the symptom code Whenever one of the coefficients is newly calculated, it is checked whether the newly generated coefficient is zero; when the new generation coefficient is zero, based on the calculated and the number of times lower than the new generation coefficient The secondary coefficient establishes a hypothetical error polynomial; performs a Chien search to find the root of the assumed error polynomial; and corrects the error correcting code based on the root of the assumed error polynomial. The method for decoding an error correction code according to claim 1, wherein the method further comprises: when calculating that the number of the coefficients is higher than the plurality of higher order coefficients of the newly generated coefficient, checking the contour Whether the coefficient of the secondary term is zero; when one of the coefficients of the higher order term is not zero, a second assumed error polynomial is established according to the coefficient of the higher order term and the coefficient of the lower order term; performing a Qin search to find the first Assuming the root of the error polynomial; and correcting the error correcting code according to the root of the second assumed error polynomial. The method for decoding an error correcting code according to claim 1, wherein the method further comprises: checking each of the coefficients when calculating one of the coefficients Whether the number of times is the highest number of times of the error polynomial; when the number of times of the coefficients is the highest number of times of the error polynomial, the error polynomial is established according to the coefficients; performing a Qin search to find the error polynomial a root; and correcting the error correcting code based on the root of the error polynomial. The method for decoding an error correcting code according to claim 1, wherein the order of calculating the coefficients of the error polynomial is successively calculated to a highest order coefficient by a primary term coefficient. The method for decoding an error correcting code according to claim 1, wherein the assumed error polynomial is established according to the following formula: 1+Λ ₁ x +Λ ₂ x ² +...+Λ _i x ⁱ +...+Λ _k x ^k ; where Λ ₁ ~ Λ _k are the coefficients of the lower order terms. The method for decoding an error correcting code according to claim 1, wherein the method further comprises: after finding the root of the assumed error polynomial, checking whether the number of roots of the assumed error polynomial is equal to the assumed error polynomial The number of times; and when the number of roots of the error polynomial is equal to the number of times of the assumed error polynomial, the error correction code is corrected according to the root of the assumed error polynomial. The method for decoding an error correcting code according to claim 1, wherein the method further comprises: when the symptom code is calculated, checking whether the symptom code is zero; and when the symptom code is not zero, starting The calculation of the coefficients of the error polynomial. For example, the decoding method of the error correcting code described in claim 1 is The error correction code is a BCH code (Bose, Ray-Chaudhuri, and Hocquenghem code). The method for decoding an error correcting code according to claim 1, wherein the error correcting code is an RS code (Reed-Solomon code). An error correction code decoding method includes the following steps: calculating a symptom code according to an error correction code; calculating a plurality of coefficients of an error-location polynomial according to the symptom code When the coefficients of the error polynomial are still not calculated, a Chien search is performed simultaneously to find the root of a hypothetical error polynomial; the error correction code is corrected according to the root of the assumed error polynomial; When one of the error polynomials is calculated to have a new generation coefficient of zero, the assumed error polynomial is established based on the plurality of low order term coefficients that have been calculated and whose number is lower than the newly generated coefficient. The method for decoding an error correcting code according to claim 10, wherein the assumed error polynomial is established according to the following formula: 1+Λ ₁ x +Λ ₂ x ² +...+Λ _i x ⁱ +...+Λ _k x ^k ; where Λ ₁ ~ Λ _k are the coefficients of the lower order terms. The method for decoding an error correcting code according to claim 10, wherein the method further comprises: after finding the root of the assumed error polynomial, checking whether the number of roots of the assumed error polynomial is equal to the assumed error polynomial The number of times; and when the number of roots of the error polynomial is equal to the assumed error polynomial The number of times, the error correcting code is corrected according to the root of the assumed error polynomial. The method for decoding an error correcting code according to claim 10, wherein the error correcting code is a BCH code (Bose, Ray-Chaudhuri, and Hocquenghem code). The method for decoding an error correcting code according to claim 10, wherein the error correcting code is an RS code (Reed-Solomon code). An error correction code decoding circuit includes: a symptom code calculation module, calculating a symptom code according to an error correction code; an error polynomial calculation module, when the symptom code is not zero Calculating a plurality of coefficients of an error-location polynomial according to the symptom code; a control module, when calculating one of the newly generated coefficients, checking whether the newly generated coefficient is zero And sending a start signal when the new generation coefficient is zero; and a Chien search module, when the start signal is received from the control module, the calculation module is calculated according to the error polynomial A plurality of low order term coefficients obtained and less than the newly generated coefficient establish an assumed error polynomial, and a Qin search is performed to find the root of the assumed error polynomial for error correction of the error correcting code. The decoding circuit of the error correction code of claim 15, wherein the decoding circuit further comprises: an error correction module, and correcting the error correction code according to the root of the assumed error polynomial. The decoding circuit of the error correcting code according to claim 15, wherein when the error polynomial calculating module calculates that the number of the coefficients is higher than the plurality of higher order coefficients of the newly generated coefficient, the control mode The group checks whether the higher order term coefficients are zero, and when one of the higher order term coefficients is not zero, generates a reset signal; and when the Qin search module receives the reset signal The Qin search module establishes a second hypothetical error polynomial according to the higher order coefficient and the lower order coefficient, and performs a Qin search to find the root of the second assumed error polynomial for correcting the correction Wrong code. The decoding circuit of the error correction code of claim 15, wherein the control module checks whether the number of the coefficients is one of the errors when the error polynomial calculation module calculates the coefficients. The highest number of times of the polynomial, and when the number of times of the coefficients is the highest number of times of the error polynomial, the control module generates the start signal; when the Qin search module receives the start signal, the The Qin-style search module establishes the error polynomial according to the coefficients, and performs a Qin search to find the root of the error polynomial for correcting the error correction code. The decoding circuit of the error correcting code according to claim 15, wherein the error polynomial calculating module successively calculates one of the error polynomials and the highest order coefficient of the error polynomial. The decoding circuit of the error correcting code described in claim 15 wherein the Qin search module establishes the assumed error polynomial according to the following formula: 1+Λ ₁ x +Λ ₂ x ² +...+Λ _i x ⁱ +...+Λ _k x ^k ; where Λ ₁ ~ Λ _k are the coefficients of the lower order terms. The decoding circuit of the error correcting code described in claim 16, wherein the Qin search module checks the number of roots of the assumed error polynomial after the Qin search module finds the root of the assumed error polynomial Whether it is equal to the number of times of the assumed error polynomial, and when the number of roots of the error polynomial is equal to the number of times of the assumed error polynomial, the error correction module corrects the error correction code according to the root of the assumed error polynomial. The decoding circuit of the error correcting code according to claim 15, wherein the error correcting code is a BCH code (Bose, Ray-Chaudhuri, and Hocquenghem code). The decoding circuit of the error correcting code according to claim 15, wherein the error correcting code is an RS code (Reed-Solomon code).