CN101795140B - Method and circuit for encoding an error correction code - Google Patents
Method and circuit for encoding an error correction code Download PDFInfo
- Publication number
- CN101795140B CN101795140B CN 200910132840 CN200910132840A CN101795140B CN 101795140 B CN101795140 B CN 101795140B CN 200910132840 CN200910132840 CN 200910132840 CN 200910132840 A CN200910132840 A CN 200910132840A CN 101795140 B CN101795140 B CN 101795140B
- Authority
- CN
- China
- Prior art keywords
- polynomial
- coefficients
- wrong
- coefficient
- error correcting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Abstract
The invention provides a method for decoding an error correction code. First, an error syndrome of the error correction code is calculated. A plurality of coefficients of an error locator polynomial of the error correction code is then sequentially determined according to the error syndrome. When a new coefficient of the error locator polynomial is determined, it is also determined whether the new determined coefficient is equal to zero. When the new determined coefficient is equal to zero, a speculated error locator polynomial is built according to a plurality of low-order-term coefficients of the error locator polynomial, wherein the orders of the low-order-term coefficients are lower than that of the new determined coefficient. A Chien search is then performed to determine a plurality of roots of the speculated error locator polynomial. The error correction code is then corrected according to the roots of the speculated error locator polynomial.
Description
Technical field
The invention relates to error correcting code, particularly relevant for coding/decoding method and the circuit of error correcting code.
Background technology
Error correcting code (error correction code) is the mistake for the data of correction.The data that communication system is transmitted often is encoded as error correcting code in advance before transmission ends transmits.When receiving terminal is received the error correcting code data,, data produces random error even being damaged in transmission course, also can reply correct data by means of the decoding and error sign indicating number.Same, be error correcting code with stored data coding before data storage system also stores data through being everlasting.In storage process, damaged and when producing random error when data, also can borrow the decoding and error sign indicating number and reply correct data.Common error correcting code such as BCH code (Bose, Ray-Chaudhuri, andHocquenghem code) and RS sign indicating number (Reed-Solomon code).BCH code is usually used in the storage of flash memory data, and the RS sign indicating number is usually used in the storage of laser disc data.
When the data storage system desire was taken out its stored data, that takes out was the error correcting code behind the coding, therefore must elder generation before data is used with error correction decode, to be reduced to firsthand information.Fig. 1 is the flow chart of the existing method 100 of decoding and error sign indicating number.This sentences BCH code is that the example of error correcting code is to describe.At first, decoding circuit receives a BCH code (step 102).Then, decoding circuit calculates a syndrome code (syndrome) (step 104) according to this BCH code.Then, whether this syndrome code is zero (step 106) in the decoding circuit inspection.If syndrome code is zero, represent that this BCH code does not make a mistake, therefore do not need further correction.Otherwise if syndrome code is non-vanishing, therefore the wrong generation of expression BCH code must be revised BCH code.
At first, decoding circuit calculates a plurality of coefficients (step 108) of a wrong multinomial (error-locationpolynomial) successively according to this syndrome code.The calculating of the polynomial coefficient of this mistake is the mode with loop, produces one by one by low ordered coefficients up to high ordered coefficients.Therefore, must continue loop execution in step 108 and arrive till this mistake of generation the highest polynomial ordered coefficients, just coefficient calculations be finished, and obtain complete wrong multinomial (step 110).Then, decoding circuit is carried out a Qin Shi and is searched (Chien search) to find out this mistake root of polynomial (step 112).This mistake root of polynomial is just indicated the position of the bit that makes a mistake in the BCH code, so decoding circuit just can be according to this this BCH code (step 114) of mistake root of polynomial correction, and obtains faultless BCH code.
Fig. 2 shows the sequential chart of existing decoding and error sign indicating number.From time point t
aBeginning, decoding circuit is at first in period T
1The middle syndrome code (step 202) that calculates error correcting code.From time point t
bBeginning, decoding circuit is then in period T
2In according to the wrong polynomial coefficient (step 204) of syndrome code computing error correction sign indicating number.From time point t
cBeginning, decoding circuit is then in period T
3In carry out Qin Shi and search the root of polynomial that locates errors, and obtain the position (step 206) of the wrong bit of error correcting code.Therefore, the whole time-histories of decoding and error sign indicating number needs (T
1+ T
2+ T
3) time.
Since the decoding and error sign indicating number be communication system receiving terminal, and CD player or flash memory read the steps necessary of data, therefore if accelerate that the decoding of error correcting code can promote communication system greatly and as the usefulness of the data storage system of CD player or flash memory.Yet, because the data mistake is to take place at random, the step 202 of Fig. 2,204,206 need time T
1, T
2, T
3Be difficult to significantly shorten.Therefore, need a kind of method of accelerating the decoding of error correcting code, to promote communication system that error correcting code is decoded and the usefulness of data storage system.
Summary of the invention
In view of this, the object of the present invention is to provide the coding/decoding method of a kind of error correcting code (error correction code), to solve the problem that prior art exists.At first, calculate a syndrome code (syndrome) according to this error correcting code.Then, calculate a plurality of coefficients of a wrong multinomial (error-locationpolynomial) in regular turn according to this syndrome code.One new when producing coefficient in calculating these coefficients checks whether should newly produce coefficient be zero.When this new generation coefficient is zero, set up the wrong multinomial of a supposition according to a plurality of low order item coefficients that calculated and number of times is lower than this new generation coefficient.Then, carry out Qin Shi search (Chien search) and suppose wrong root of polynomial to find out this.At last, suppose wrong this error correcting code of root of polynomial correction according to this.
The present invention more provides the coding/decoding method of a kind of error correcting code (error correction code).At first, calculate a syndrome code (syndrome) according to an error correcting code.Then, calculate a plurality of coefficients of a wrong multinomial (error-location polynomial) in regular turn according to this syndrome code.When polynomial these coefficients of this mistake do not calculate when finishing yet, carry out a Qin Shi simultaneously and search (Chien search) to find out the wrong root of polynomial of a supposition, wherein the wrong multinomial of this supposition is to determine according to the polynomial part coefficient of this mistake that has calculated.At last, suppose wrong this error correcting code of root of polynomial correction according to this.
The invention provides the decoding circuit of a kind of error correcting code (error correction code).In an embodiment, this decoding circuit comprises that a syndrome code calculates module, a wrong polynomial computation module, a control module and a Qin Shi and searches (Chien search) module.This syndrome code calculates module and calculates a syndrome code (syndrome) according to an error correcting code.When this syndrome code was non-vanishing, this mistake polynomial computation module calculated a plurality of coefficients of a wrong multinomial (error-location polynomial) in regular turn according to this syndrome code.When this mistake polynomial computation module calculated that one in these coefficients are new to produce coefficient, whether this control module inspection should newly produce coefficient be zero, and when should new generation coefficient when being zero, sends an enabling signal.When this control module is received this enabling signal certainly, a plurality of low order item coefficients that this Qin Shi searches that module has calculated according to this mistake polynomial computation module and number of times is lower than this new generation coefficient are set up the wrong multinomial of a supposition, and carry out a Qin Shi and search to find out this and suppose wrong root of polynomial, for the error correction of this error correcting code.
Description of drawings
For above-mentioned purpose of the present invention, feature and advantage can be become apparent, below in conjunction with accompanying drawing the specific embodiment of the present invention is elaborated, wherein:
Fig. 1 is the flow chart of the existing method of decoding and error sign indicating number;
Fig. 2 shows the sequential chart of existing decoding and error sign indicating number;
Fig. 3 is the block diagram according to the decoding circuit of error correcting code of the present invention;
Fig. 4 is the flow chart according to the coding/decoding method of error correcting code of the present invention;
Fig. 5 is the schematic diagram according to decoding circuit running of the present invention;
Fig. 6 is the probability schematic diagram that occurs the number of wrong bit in the error correcting code data; And
Fig. 7 is the sequential chart according to decoding and error sign indicating number of the present invention.
The main element symbol description:
300～decoding circuit;
302～syndrome code calculates module;
304～mistake polynomial computation module;
308～control module;
306～Qin Shi searches module; And
310～error correction module.
Embodiment
Fig. 3 is the block diagram according to the decoding circuit 300 of error correcting code of the present invention.In an embodiment, decoding circuit 300 comprises syndrome code counting circuit 302, mistake polynomial computation module 304, Qin's formula search module 306, control module 308 and error correction module 310.Fig. 4 is the flow chart according to the coding/decoding method 400 of error correcting code of the present invention.Decoding circuit 300 is method 400 runnings according to Fig. 4, so that Bose-Chaudhuri Hocquenghem error correction codes is decoded.In follow-up embodiment, error correcting code all with BCH code for releasing example, but method circuit of the present invention is equally applicable to the RS sign indicating number.When decoding circuit 300 operates according to method 400, can shorten the decoding required time of Bose-Chaudhuri Hocquenghem error correction codes greatly, thereby promote the usefulness of the system of application decoder circuit 300.
At first, syndrome code calculates module 302 and receives a BCH code (step 402).Then, syndrome code calculates module 302 and calculates a syndrome code (syndrome) (step 404) according to this BCH code.Then, syndrome code calculates module 302 and checks that this syndrome code that whether calculates is 0 (step 406).If syndrome code is 0, represent that this BCH code does not make a mistake, therefore do not need BCH code is revised.If syndrome code is not 0, represent that this BCH code makes a mistake, and need revise BCH code.Therefore, when syndrome code was not 0, this syndrome code that syndrome code calculating module 302 will calculate was delivered to wrong polynomial computation module 304, to carry out the calculating of wrong multinomial (error-location polynomial).
Then, mistake polynomial computation module 304 is according to the polynomial a plurality of coefficient Λ of syndrome code mistake in computation in regular turn
1, Λ
2..., Λ
t(step 408).In an embodiment, mistake polynomial computation module 304 is according to the polynomial once coefficient Λ of mistake to the order of the calculating of these coefficients
1, quadratic term coefficient Λ
2, and then calculate high-order term coefficient Λ one by one
tWhenever wrong polynomial computation module 304 is carried out a loop, just can produce wrong polynomial i time coefficient Λ
iMistake polynomial computation module 304 will continue running, up to polynomial all the coefficient Λ of mistake
1, Λ
2..., Λ
tTill all calculating finishes.Therefore, finish when wrong polynomial computation module 304 calculates, can obtain as shown in the formula wrong multinomial:
1+Λ
1x+Λ
2x
2+…+Λ
ix
i+…+Λ
tx
t。
In the existing decoding process 100 of Fig. 1, Fig. 2, mistake polynomial computation module must be with polynomial all the coefficient Λ of mistake
1, Λ
2..., Λ
tAll calculating finishes, and just can carry out Qin's formula search, with the root of polynomial that locates errors.Yet, in according to coding/decoding method of the present invention 400 times, must not wait until that wrong polynomial computation module 304 is with polynomial all the coefficient Λ of mistake
1, Λ
2..., Λ
tAll calculating finishes, and just can carry out Qin's formula search, to save the whole time of decode procedure.
At first, whenever wrong polynomial computation module 304 calculates wrong polynomial i time coefficient Λ
iThe time (i 〉=2), control module 308 just checks calculating gained coefficient Λ
iWhether be zero (step 410).If calculate the coefficient Λ of gained
iBe zero, control module 308 is just searched module 306 to Qin Shi and is sent an enabling signal, so that Qin Shi searches module 306 according to the wrong polynomial part coefficient that present wrong polynomial computation module 304 has calculated, carries out Qin's formula search.At this moment, because wrong polynomial computation module 304 does not finish to the polynomial coefficient calculations of mistake as yet, by carrying out the time that Qin's formula is searched in advance, just can reduce the required whole time of decode procedure.If calculate the coefficient Λ of gained
iNon-vanishing, whether control module 308 checks just that wrong polynomial computation module 304 has calculated the polynomial high-order term coefficient Λ of this mistake
t(step 412).If so, control module 308 is just searched module 306 to Qin Shi and is sent an enabling signal, so that Qin Shi searches module 306 according to wrong polynomial all coefficients, carries out Qin's formula search.
Then, search module 306 automatic control molding groups 308 when Qin's formula and receive enabling signal, Qin Shi searches module 306 and just sets up a supposition wrong multinomial (step 414) according to the coefficient that calculates gained at present.Because the order of the polynomial coefficient of wrong polynomial computation module 304 mistake in computations is according to a coefficient Λ once
1And then calculate high-order term coefficient Λ one by one
t, therefore when Qin Shi search module 306 was received enabling signal, the wrong polynomial part coefficient that present wrong polynomial computation module 304 has calculated was Λ
1, Λ
2..., Λ
i..., Λ
k, then Qin Shi search supposition mistake multinomial that module 306 sets up as shown in the formula:
1+Λ
1 x+Λ2
x 2+…+Λ
ix
i+…+Λ
kx
k。
Then, Qin Shi searches module 306 and carries out Qin Shi search (Chein search), supposes wrong root of polynomial (step 416) to find out this.At this moment, mistake polynomial computation module 304 still continues the polynomial high-order term coefficient of mistake in computation, and-control module 308 continues still then to check that these high-order term coefficients that whether newly calculate are zero.If control module 308 is found the wrong polynomial computation module 304 follow-up wrong polynomial non-zero high-order term coefficients (step 418) that calculate, then control module 308 and produce replacement (reset) signal.And when Qin Shi search module 306 is received this reset signal, Qin Shi searches module 306 and sets up one second supposition wrong multinomial (step 414) according to wrong polynomial computation module 304 present all coefficients that calculate gained, and carries out a Qin Shi and search to find out this second supposition wrong root of polynomial (step 416).At last, because the wrong multinomial of supposition or the wrong root of polynomial of second supposition are all indicated the position of the bit that makes a mistake in the Bose-Chaudhuri Hocquenghem error correction codes, error correction module 310 is just supposed this BCH code (step 420) of wrong root of polynomial correction according to these, to obtain correct BCH code.
Fig. 5 is the schematic diagram according to decoding circuit 300 runnings of the present invention.At first, syndrome code calculates module 302 and calculates syndrome code (step 502).Then, mistake polynomial computation module 304 calculates a wrong polynomial once coefficient Λ one by one
1(step 504), quadratic term coefficient Λ
2(step 504), cubic term coefficient Λ
3(step 508) is up to finally calculating the highest t time coefficient Λ
t(step 510).When wrong polynomial computation module 304 calculated wrong polynomial coefficient, control module 308 checked i the item coefficient Λ whether wrong polynomial computation module 304 calculates
iWhether be 0 (i 〉=2), just indicate Qin Shi to search module 306 if so and begin to carry out Qin Shi search (step 512).After Qin Shi search module 306 begins to carry out the Qin Shi search, if control module 308 finds that wrong polynomial computation module 304 newly calculates the high ordered coefficients Λ of wrong polynomial non-zero
jThe time (i＜j≤t), control module 308 replacement Qin Shi search module 306 and also restart to carry out Qin Shi and search (step 512).At last, if searching module 306, Qin Shi can't find root, expression decoding wrong (step 514).Search module 306 as if Qin Shi and successfully find the wrong root of polynomial of supposition, and the number of root is then represented to decode successfully (step 516) for supposing wrong polynomial number of times.
Fig. 6 is the probability schematic diagram that occurs the number of wrong bit in the error correcting code data.As seen from the figure, heal greatly when the number of wrong bit, the probability of generation is littler.That is all only there is the wrong bit of minority in most error correcting code data.Because the number of wrong root of polynomial, that is wrong polynomial number of times are the wrong bit numbers of expression error correcting code data, therefore when the polynomial coefficient of wrong polynomial computation module 304 mistake in computations, often the high-order term coefficient all is zero.In other words, under most situation, the coding/decoding method 200 of existing error correcting code has been wasted many times and has been carried out the calculating of wrong polynomial high-order term coefficient.Yet decoding circuit 300 of the present invention needs only one and calculates wrong polynomial zero coefficient, just begins to carry out Qin Shi and searches.Except the situation that a plurality of wrong bit of minority takes place, under most situation, decoding circuit 300 of the present invention all can effectively carry out the error correction of error correcting code, and saves the required time of decoding and error sign indicating number.
Fig. 7 is the sequential chart according to decoding and error sign indicating number of the present invention.From time point t
aBeginning, decoding circuit 300 is at first in period T
1The middle syndrome code (step 702) that calculates error correcting code.From time point t
bBeginning, decoding circuit 300 is then in period T
2In according to the wrong polynomial coefficient (step 704) of syndrome code computing error correction sign indicating number.Yet, from time point t
eBeginning, decoding circuit 300 does not calculate under the situation about finishing as yet at the polynomial coefficient of mistake, is convenient to period T
3In carry out Qin Shi and search to find out the wrong root of polynomial of supposition, and obtain the position (step 706) of the wrong bit of error correcting code, for revising error correcting code.Therefore, the whole time-histories of decoding and error sign indicating number only needs (T
1+ T
2+ T
5) time.Time (the T required with the existing error correction decode of Fig. 2
1+ T
2+ T
3) compare, saved period T
4, and the usefulness of the decoding circuit that promotes.
Though the present invention discloses as above with preferred embodiment; right its is not in order to limiting the present invention, any those skilled in the art, without departing from the spirit and scope of the present invention; when can doing a little modification and perfect, so protection scope of the present invention is when with being as the criterion that claims were defined.
Claims (9)
1. the coding/decoding method of an error correcting code comprises the following steps:
Calculate a syndrome code according to an error correcting code;
According to this syndrome code, calculate wrong polynomial a plurality of coefficients according to coefficient once and then the order that calculates high-order term coefficient one by one;
One new when producing coefficient in calculating these coefficients checks whether should newly produce coefficient be zero;
When this new generation coefficient is zero, set up the wrong multinomial of a supposition according to a plurality of low order item coefficients that calculated and number of times is lower than this new generation coefficient;
Carrying out a Qin Shi searches to find out this and supposes wrong root of polynomial; And
Suppose wrong this error correcting code of root of polynomial correction according to this.
2. the coding/decoding method of error correcting code as claimed in claim 1 is characterized in that, this method more comprises:
When the number of times in calculating these coefficients is higher than a plurality of high-order term coefficient of this new generation coefficient, check whether these high-order term coefficients are zero;
When these high-order term coefficients one of them when non-vanishing, set up the wrong multinomial of one second supposition according to these high-order term coefficients and these low order item coefficients;
Carry out a Qin Shi and search to find out the wrong root of polynomial of this second supposition; And
According to wrong this error correcting code of root of polynomial correction of this second supposition.
3. the coding/decoding method of error correcting code as claimed in claim 1 is characterized in that, this method more comprises:
Whenever calculate these coefficients one of them the time, check whether the number of times of these coefficients is this mistake polynomial one high reps;
When one of them number of times of these coefficients is polynomial this high reps of this mistake, set up this mistake multinomial according to these coefficients;
Carry out a Qin Shi and search to find out this mistake root of polynomial; And
According to this this error correcting code of mistake root of polynomial correction.
4. the coding/decoding method of error correcting code as claimed in claim 1 is characterized in that, this method more comprises:
After finding out this and supposing wrong root of polynomial, check whether this number of supposing wrong root of polynomial equals this and suppose wrong polynomial number of times; And
Suppose that when this number of wrong root of polynomial equals this and supposes wrong polynomial number of times, suppose wrong this error correcting code of root of polynomial correction according to this.
5. the coding/decoding method of error correcting code as claimed in claim 1 is characterized in that, this method more comprises:
After calculating this syndrome code, check whether this syndrome code is zero; And
When this syndrome code is non-vanishing, start the calculating of polynomial these coefficients of this mistake.
6. the coding/decoding method of an error correcting code comprises the following steps:
Calculate a syndrome code according to an error correcting code;
According to this syndrome code, the order that arrive high-order term coefficient according to coefficient once one by one calculates the polynomial a plurality of coefficients of a mistake;
One new when producing coefficient in calculating these coefficients checks whether should newly produce coefficient be zero;
When this new generation coefficient is zero, set up the wrong multinomial of a supposition according to the polynomial part coefficient of this mistake that has calculated;
When polynomial these coefficients of this mistake do not calculate when finishing yet, carry out a Qin Shi simultaneously and search to find out the wrong root of polynomial of a supposition; And
Suppose wrong this error correcting code of root of polynomial correction according to this.
7. the decoding circuit of an error correcting code comprises:
One syndrome code calculates module, calculates a syndrome code according to an error correcting code;
One wrong polynomial computation module, when this syndrome code was non-vanishing, according to this syndrome code, the order that arrive high-order term coefficient according to coefficient once one by one calculated the polynomial a plurality of coefficients of a mistake;
One control module, new when producing coefficient in calculating these coefficients checks whether should newly produce coefficient be zero, and when should newly to produce coefficient be zero, sends an enabling signal; And
One Qin Shi searches module, when this control module is received this enabling signal certainly, set up the wrong multinomial of a supposition according to a plurality of low order item coefficients that this mistake polynomial computation module has calculated and number of times is lower than this new generation coefficient, and carry out a Qin Shi and search to find out this and suppose wrong root of polynomial, for the error correction of this error correcting code.
8. the decoding circuit of error correcting code as claimed in claim 7, it is characterized in that, when this mistake polynomial computation module calculates number of times in these coefficients when being higher than a plurality of high-order term coefficient of this new generation coefficient, this control module checks whether these high-order term coefficients are zero, and when these high-order term coefficients one of them when non-vanishing, produce a reset signal; And when this Qin Shi search module is received this reset signal, this Qin Shi searches module and sets up the wrong multinomial of one second supposition according to these high-order term coefficients and these low order item coefficients, and carry out a Qin Shi and search to find out the wrong root of polynomial of this second supposition, for revising this error correcting code.
9. the decoding circuit of error correcting code as claimed in claim 7, it is characterized in that, when this mistake polynomial computation module calculates these coefficients, this control module checks whether one of them number of times of these coefficients is this mistake polynomial one high reps, and when one of them number of times of these coefficients was polynomial this high reps of this mistake, this control module produced this enabling signal; When this Qin Shi search module was received this enabling signal, this Qin's formula was searched module and is set up this mistake multinomial according to these coefficients, and carries out a Qin Shi and search to find out this mistake root of polynomial, for revising this error correcting code.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US14937809P | 2009-02-03 | 2009-02-03 | |
| US61/149,378 | 2009-02-03 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101795140A CN101795140A (en) | 2010-08-04 |
| CN101795140B true CN101795140B (en) | 2013-08-21 |
Family
ID=42587587
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200910132840 Active CN101795140B (en) | 2009-02-03 | 2009-04-16 | Method and circuit for encoding an error correction code |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN101795140B (en) |
| TW (1) | TWI387214B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI566091B (en) * | 2015-09-10 | 2017-01-11 | 慧榮科技股份有限公司 | Method for decoding an error correction code, and associated decoding circuit |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4599722A (en) * | 1984-04-03 | 1986-07-08 | Canadian Patents And Development Limited-Societe Canadienne Des Brevets Et D'exploitation Limitee | Apparatus for encoding and decoding digital data to permit error correction |
| US4897839A (en) * | 1987-03-25 | 1990-01-30 | Mitsubishi Denki Kabushiki Kaisha | Coding and decoding method |
| CN1118540A (en) * | 1994-06-16 | 1996-03-13 | 株式会社东芝 | Apparatus and method for correcting fault |
| US20090031193A1 (en) * | 2007-07-27 | 2009-01-29 | Yao-Chung Chang | Syndrome-error mapping method for decoding linear and cyclic codes |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7028245B2 (en) * | 2001-08-21 | 2006-04-11 | Equator Technologies, Inc. | Even-load software Reed-Solomon decoder |
| TW566008B (en) * | 2001-11-28 | 2003-12-11 | Univ Nat Chiao Tung | Apparatus for solving key equation polynomials in decoding error correction codes |
| TW523996B (en) * | 2002-04-26 | 2003-03-11 | Univ Nat Chiao Tung | Method using error correction code to calculate syndrome polynomial at decoding |
-
2009
- 2009-04-09 TW TW98111798A patent/TWI387214B/en active
- 2009-04-16 CN CN 200910132840 patent/CN101795140B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4599722A (en) * | 1984-04-03 | 1986-07-08 | Canadian Patents And Development Limited-Societe Canadienne Des Brevets Et D'exploitation Limitee | Apparatus for encoding and decoding digital data to permit error correction |
| US4897839A (en) * | 1987-03-25 | 1990-01-30 | Mitsubishi Denki Kabushiki Kaisha | Coding and decoding method |
| CN1118540A (en) * | 1994-06-16 | 1996-03-13 | 株式会社东芝 | Apparatus and method for correcting fault |
| US20090031193A1 (en) * | 2007-07-27 | 2009-01-29 | Yao-Chung Chang | Syndrome-error mapping method for decoding linear and cyclic codes |
Also Published As
| Publication number | Publication date |
|---|---|
| TW201031127A (en) | 2010-08-16 |
| TWI387214B (en) | 2013-02-21 |
| CN101795140A (en) | 2010-08-04 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US8122328B2 (en) | Bose-Chaudhuri-Hocquenghem error correction method and circuit for checking error using error correction encoder | |
| CN102567134B (en) | Error check and correction system and error check and correction method for memory module | |
| CN101047388B (en) | Error correction apparatus | |
| CN102017425B (en) | System and method for performing concatenated error correction | |
| US8370727B2 (en) | Method and circuit for decoding an error correction code | |
| CN101882467B (en) | Memory control device with configurable ECC (Error Correction Code) parameter | |
| CN102938653A (en) | Parallel RS decoding method achieved through graphics processing unit (GPU) | |
| CN105634506B (en) | The soft-decision decoding method of quadratic residue code based on displacement searching algorithm | |
| US20110145677A1 (en) | Method and system for fast two bit error correction | |
| CN101938280B (en) | Coding and decoding method and codec of error correction code | |
| CN101288232A (en) | Methods and devices for decoding and encoding data | |
| CN102545914B (en) | BCH (Broadcast Channel) encoding and decoding method and device | |
| CN104716965A (en) | BCH soft decoding algorithm and implementation circuit thereof | |
| CN101442313B (en) | Coding method, decoding method, coding device and decoding device during digital communication process | |
| CN106708654A (en) | Circuit structure for BCH error correcting code of NAND flash | |
| CN101795140B (en) | Method and circuit for encoding an error correction code | |
| CN101847999A (en) | Method for performing parallel check by using cyclic redundancy check codes | |
| CN101803204B (en) | Bit string-error correcting method | |
| CN102801501B (en) | Identification method of code parameter of BCH (broadcast channel) shortened code | |
| KR100594002B1 (en) | Reed Solomon Decoder with Variable Pipeline Structure | |
| US9236890B1 (en) | Decoding a super-code using joint decoding of underlying component codes | |
| CN103870354B (en) | A kind of error checking and correction code decoder and interpretation method | |
| CN111224741B (en) | BCH code decoding method and decoder for satellite navigation and satellite navigation receiver | |
| CN101873143A (en) | Syndrome computing circuit in RS (Reed-Solomon) error correcting code decoder and computing method thereof | |
| KR101974301B1 (en) | A symmetric bc-bch decoder for error correction of flash memory, an error correcting method and system using the sbc-bch decoder |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |