TWI386051B - Analog dark average circuit and method for an image sensor - Google Patents
Analog dark average circuit and method for an image sensor Download PDFInfo
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Description
本發明係有關影像感測器之黑階(或暗階)校正,特別是關於影像感測器之類比黑階平均電路及方法。The present invention relates to black level (or dark level) correction of image sensors, and more particularly to analog black level averaging circuits and methods for image sensors.
半導體影像感測器(例如電荷耦合元件(CCD)或互補金屬氧化半導體(CMOS)感測器)普遍使用於照相機或攝影機中,用以將可見光之影像轉換為電子信號,便於後續之儲存、傳輸或顯示。Semiconductor image sensors, such as charge coupled devices (CCDs) or complementary metal oxide semiconductor (CMOS) sensors, are commonly used in cameras or cameras to convert visible light images into electrical signals for subsequent storage and transmission. Or display.
由於電子電路的非完美性質,使得影像感測器在未接收任何光線的情形下仍然會具有漏電流(或暗信號(dark signal))。此有害的暗信號會結合於有用的資料信號中,更糟的是,此暗信號無法區別於資料信號。此結合之暗信號會犧牲影像動態範圍,且會降低影像對比度,因而降低影像品質。為了避免或校正此暗信號,通常會施以黑階校準(BLC)。在黑階校準程序中,需要收集一或多個光遮(light-shielded)像素之暗信號作為黑階參考(black level reference),用以從積分信號中減除,因而得以增進影像品質。Due to the imperfect nature of the electronic circuitry, the image sensor will still have leakage current (or dark signal) without receiving any light. This harmful dark signal is combined with a useful data signal, and worse, this dark signal cannot be distinguished from the data signal. This combined dark signal sacrifices the dynamic range of the image and reduces image contrast, thus reducing image quality. To avoid or correct this dark signal, a black level calibration (BLC) is usually applied. In the black-order calibration procedure, it is necessary to collect one or more dark-lighted pixels as a black level reference for subtraction from the integrated signal, thereby improving image quality.
傳統影像感測器通常使用數位方式的黑階校正(BLC)。第一圖顯示傳統數位黑階校正系統。其中,光遮像素信號經可程式增益放大器(programmable gain amplifier,PGA)11放大後,經類比至數位轉換器(ADC)12轉換成數位格式。類比至數位轉換器(ADC)12的數位輸出經由一數位電路(例如數位信號處理器(DSP))14予以平均。此平均輸出再經由數位至類比轉換器(DAC)16轉換為類比格式後,用以補償可程式增益放大器(PGA)11。在傳統數位黑階校正系統中,在迴授黑階以進行校正之前,需要獲取黑階的統計值。由於數位領域黑階統計值之獲取需要耗費相當的時間,因此,會造成圖框率(frame rate)的限制及視訊播放率的下降。再者,若影像感測器具有故障像素點(fault pixel)(例如熱像素點(hot pixel))時,數位黑階校正的效能將會變得更差。Traditional image sensors typically use digital-based black-order correction (BLC). The first figure shows a conventional digital black level correction system. The photomasked pixel signal is amplified by a programmable gain amplifier (PGA) 11 and converted into a digital format by an analog to digital converter (ADC) 12. The digital output of analog to digital converter (ADC) 12 is averaged via a digital circuit, such as a digital signal processor (DSP) 14. This average output is then converted to an analog format by a digital to analog converter (DAC) 16 to compensate for the programmable gain amplifier (PGA) 11. In the conventional digital black-order correction system, it is necessary to obtain the statistical value of the black level before the black level is fed back for correction. Since the acquisition of the black-order statistical value in the digital domain takes a considerable amount of time, it causes a limitation of the frame rate and a decrease in the video playback rate. Furthermore, if the image sensor has a fault pixel (such as a hot pixel), the performance of the digital black level correction will become worse.
鑑於傳統黑階校正方法(特別是數位黑階校正)無法快速地校正影像感測器之黑階,因此亟需提出一種新穎機制,得以快速且有效地獲取黑階值,以進行黑階校正。Since the conventional black-order correction method (especially the digital black-order correction) cannot quickly correct the black level of the image sensor, it is urgent to propose a novel mechanism for obtaining the black-order value quickly and efficiently for the black-order correction.
鑑於上述,本發明的目的之一在於提出一種類比(領域)黑階平均電路及方法,用以快速且有效地獲取黑階值以進行黑階校正。本發明的另一目的在於降低故障像素點對於黑階校正的影響。In view of the above, one of the objects of the present invention is to provide an analogous (domain) black level averaging circuit and method for quickly and efficiently acquiring black level values for black level correction. Another object of the present invention is to reduce the impact of faulty pixel points on black level correction.
根據本發明的特徵之一,黑階平均電路的每一次電路自影像感測器之像素電路輸入信號。每一次電路包含一關聯雙重取樣(CDS)電路。次電路的電容藉由平均開關而耦接在一起,因而得以平均黑階像素間的重置信號及影像信號。According to one of the features of the present invention, each circuit of the black level averaging circuit inputs a signal from a pixel circuit of the image sensor. Each circuit contains an associated double sampling (CDS) circuit. The capacitances of the secondary circuits are coupled together by an average switch, thereby averaging the reset signals and image signals between the black-order pixels.
根據本發明的另一特徵,取樣並保持黑階像素之重置信號,且取樣並保持黑階像素之影像信號。接下來,平均黑階像素間所保持的重置信號,並平均黑階像素間所保持的影像信號。According to another feature of the invention, the reset signal of the black level pixel is sampled and held, and the image signal of the black level pixel is sampled and held. Next, the reset signals held between the black-order pixels are averaged, and the image signals held between the black-order pixels are averaged.
第二圖顯示本發明實施例之影像感測器的類比黑階平均電路10。為簡化起見,圖式中的電晶體(或開關)及其控制信號則使用相同的符號。第三A圖顯示第二圖相關信號的時序圖,而第三B圖則顯示本發明實施例之類比黑階校正方法的步驟。本實施例之類比黑階平均電路10可應用於數位影像處理裝置中,例如(但不限定為)照相機或攝影機。影像感測器可以是(但不限定為)電荷耦合元件(CCD)或互補金屬氧化半導體(CMOS)感測器,用以將可見光之影像轉換為電子信號。The second figure shows an analog black level averaging circuit 10 of an image sensor of an embodiment of the present invention. For the sake of simplicity, the transistors (or switches) and their control signals in the figures use the same symbols. The third A diagram shows the timing diagram of the correlation signal of the second diagram, and the third B diagram shows the steps of the analog black scale correction method of the embodiment of the present invention. The analog black level averaging circuit 10 of the present embodiment can be applied to a digital image processing device such as, but not limited to, a camera or a video camera. The image sensor can be, but is not limited to, a charge coupled device (CCD) or a complementary metal oxide semiconductor (CMOS) sensor for converting an image of visible light into an electrical signal.
類比黑階平均電路10包含多個次電路100(圖式中代表性地顯示三個次電路),每一次電路100從影像感測器的一個像素電路(pixel circuit)輸入信號。通常,在進入黑階平均電路10之前,信號會先經由行放大器(column amplifier,CA)予以放大。黑階平均電路10的輸出通常會再經由一放大器(例如可程式增益放大器(PGA))進行放大,再通過數位電路之處理,例如類比至數位轉換器(ADC)或數位信號處理器。由於信號在黑階平均電路10係於類比領域中作處理的,因此電路10又稱為“類比”黑階平均電路。The analog black level averaging circuit 10 includes a plurality of sub-circuits 100 (typically three sub-circuits are shown in the figure), and each time the circuit 100 inputs a signal from a pixel circuit of the image sensor. Typically, the signal is first amplified by a column amplifier (CA) before entering the black level averaging circuit 10. The output of the black-order averaging circuit 10 is typically amplified by an amplifier, such as a programmable gain amplifier (PGA), and processed by a digital circuit, such as an analog-to-digital converter (ADC) or a digital signal processor. Since the signal is processed in the analog domain in the black level averaging circuit 10, the circuit 10 is also referred to as an "analog" black level averaging circuit.
在本實施例中,每一次電路100包含一關聯雙重取樣(correlated double sampling,CDS)電路,其包含一取樣-保持-重置信號(sample-and-hold-reset_signal,SHR)開關,受控於SHR控制信號;及一取樣-保持-影像信號(sample-and-hold-image_signal,SHS)開關,受控於SHS控制信號。SHR開關及SHS開關分別耦接至SHR電容CSHR 及SHS電容CSHS 。類比黑階平均電路10的所有(或部分)次電路100之SHR電容CSHR 藉由平均開關DARK_AVG而電性耦接在一起,其中的平均開關DARK_AVG則是受控於黑階平均控制信號DARK_AVG。亦即,所有次電路100內的SHR開關和SHR電容CSHR 之接點(interconnecting node)係互相連通的。藉此,當這些平均開關DARK_AVG為閉合時,所有(或部分)次電路100之SHR電容CSHR 會電性耦接在一起。在本說明書中,所謂”電性耦接”一詞係指節點或元件之間係藉由導線而直接連接在一起,或者經由其他電子元件而間接連接在一起。類似的情形,類比黑階平均電路10的所有(或部分)次電路100之SHS電容CSHS 藉由平均開關DARK_AVG而電性耦接在一起,其中的平均開關DARK_AVG則是受控於黑階平均控制信號DARK_AVG。亦即,所有次電路100內的SHS開關和SHS電容CSHS 之接點係互相連通的。藉此,當這些平均開關DARK_AVG為閉合時,所有(或部分)次電路100之SHR電容CSHR 會電性耦接在一起。In this embodiment, each circuit 100 includes a correlated double sampling (CDS) circuit including a sample-and-hold-reset_signal (SHR) switch controlled by The SHR control signal; and a sample-and-hold-image_signal (SHS) switch controlled by the SHS control signal. The SHR switch and the SHS switch are respectively coupled to the SHR capacitor C SHR and the SHS capacitor C SHS . The SHR capacitance C SHR of all (or part of) sub-circuits 100 of the analog black level averaging circuit 10 is electrically coupled together by an average switch DARK_AVG, wherein the average switch DARK_AVG is controlled by the black level average control signal DARK_AVG. That is, the SHR switch in all of the secondary circuits 100 and the connecting nodes of the SHR capacitor C SHR are in communication with each other. Thereby, when the average switches DARK_AVG are closed, the SHR capacitors C SHR of all (or part of) the secondary circuits 100 are electrically coupled together. In the present specification, the term "electrically coupled" means that nodes or elements are directly connected together by wires or indirectly via other electronic components. Similarly, the SHS capacitor C SHS of all (or part of) the sub-circuit 100 of the analog black level averaging circuit 10 is electrically coupled together by the average switch DARK_AVG, wherein the average switch DARK_AVG is controlled by the black level average Control signal DARK_AVG. That is, the contacts of the SHS switch and the SHS capacitor C SHS in all of the secondary circuits 100 are in communication with each other. Thereby, when the average switches DARK_AVG are closed, the SHR capacitors C SHR of all (or part of) the secondary circuits 100 are electrically coupled together.
於進行黑階校正之操作時,當處於重置期間內(例如第三A圖之t1至t2),SHR開關為閉合,使得光遮像素之重置信號被取樣並保持於SHR電容CSHR (步驟31)。當處於積分期間內(例如第三A圖之t2至t3),SHS開關為閉合,使得光遮像素之影像信號被取樣並保持於SHS電容CSHS (步驟32)。實務上,主動SHR信號和主動SHS信號於t1至t2間會有一段重疊,其係為了防止耦合效應(coupling effect)。在另一實施例中,於t1至t2間的SHS開關係為開斷的。於完成重置及積分後,黑階平均控制信號DARK_AVG會將所有平均開關DARK_AVG予以閉合(步驟33),例如第三A圖的t4至t5間。藉此,所有次電路100之SHR電容CSHR 會電性耦接在一起,因而將儲存於SHR電容CSHR 的黑階像素重置信號予以平均。類似的情形,所有次電路100之SHS電容CSHS 會電性耦接在一起,因而將儲存於SHS電容CSHS 的黑階像素影像信號予以平均。During the operation of the black level correction, when in the reset period (for example, t1 to t2 of the third A picture), the SHR switch is closed, so that the reset signal of the light-shielding pixel is sampled and held at the SHR capacitance C SHR ( Step 31). While in the integration period (e.g., t2 to t3 of the third A-picture), the SHS switch is closed, so that the image signal of the light-shielding pixel is sampled and held at the SHS capacitor C SHS (step 32). In practice, the active SHR signal and the active SHS signal will overlap between t1 and t2 in order to prevent the coupling effect. In another embodiment, the SHS open relationship between t1 and t2 is open. After the reset and integration are completed, the black level average control signal DARK_AVG will close all of the average switches DARK_AVG (step 33), for example between t4 and t5 of the third A picture. Thereby, the SHR capacitors C SHR of all the sub-circuits 100 are electrically coupled together, thereby averaging the black-order pixel reset signals stored in the SHR capacitor C SHR . In a similar situation, the SHS capacitors C SHS of all the sub-circuits 100 are electrically coupled together, thereby averaging the black-order pixel image signals stored in the SHS capacitor C SHS .
根據本發明實施例,在類比領域中,在數個脈波週期當中即可獲得平均黑階值,遠較數位領域的作法快速。再者,藉由類比黑階平均電路10及方法,可以讓影像感測器之故障像素點(fault pixel)(例如熱像素點(hot pixel))對於黑階校正的影響減至最低。According to the embodiment of the present invention, in the analogy field, the average black level value can be obtained among several pulse period, which is much faster than the digital field. Moreover, by analogous black level averaging circuit 10 and method, the effect of fault pixels of the image sensor (eg, hot pixels) on black level correction can be minimized.
以上所述僅為本發明之較佳實施例而已,並非用以限定本發明之申請專利範圍;凡其它未脫離發明所揭示之精神下所完成之等效改變或修飾,均應包含在下述之申請專利範圍內。The above description is only the preferred embodiment of the present invention, and is not intended to limit the scope of the present invention; all other equivalent changes or modifications which are not departing from the spirit of the invention should be included in the following Within the scope of the patent application.
10...類比黑階平均電路10. . . Analog black level averaging circuit
11...可程式增益放大器(PGA)11. . . Programmable gain amplifier (PGA)
12...類比至數位轉換器(ADC)12. . . Analog to digital converter (ADC)
14...數位電路14. . . Digital circuit
16...數位至類比轉換器(DAC)16. . . Digital to analog converter (DAC)
31-33...黑階平均步驟31-33. . . Black level averaging step
100...平均電路之次電路100. . . Average circuit
SHR...取樣-保持-重置信號(SHR)開關SHR. . . Sample-and-hold-reset signal (SHR) switch
CSHR ...SHR電容C SHR . . . SHR capacitor
SHS...取樣-保持-影像信號(SHS)開關SHS. . . Sample-and-hold-image signal (SHS) switch
CSHS ...SHS電容C SHS . . . SHS capacitor
DARK_AVG...平均開關DARK_AVG. . . Average switch
t1-t5...時序信號的時間點T1-t5. . . Timing point of timing signal
第一圖顯示傳統數位黑階校正系統。The first figure shows a conventional digital black level correction system.
第二圖顯示本發明實施例之影像感測器的類比黑階平均電路。The second figure shows an analog black level averaging circuit of the image sensor of the embodiment of the present invention.
第三A圖顯示第二圖相關信號的時序圖。The third A diagram shows the timing diagram of the correlation signal of the second figure.
第三B圖顯示本發明實施例之類比黑階校正方法的步驟。The third B diagram shows the steps of the analog black level correction method of the embodiment of the present invention.
10...類比黑階平均電路10. . . Analog black level averaging circuit
100...平均電路之次電路100. . . Average circuit
SHR...取樣-保持-重置信號(SHR)開關SHR. . . Sample-and-hold-reset signal (SHR) switch
CSHR ...SHR電容C SHR . . . SHR capacitor
SHS...取樣-保持-影像信號(SHS)開關SHS. . . Sample-and-hold-image signal (SHS) switch
CSHS ...SHS電容C SHS . . . SHS capacitor
DARK_AVG...平均開關DARK_AVG. . . Average switch
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US20050195645A1 (en) * | 1998-03-09 | 2005-09-08 | Roger Panicacci | Readout circuit with gain and analog-to-digital conversion for image sensor |
US20070063128A1 (en) * | 2003-11-13 | 2007-03-22 | Alexander Krymski | Method and apparatus for pixel signal binning and interpolation in column circuits of a sensor circuit |
TW200721470A (en) * | 2005-09-01 | 2007-06-01 | Micron Technology Inc | Method and apparatus providing pixel array having automatic light control pixels and image capture pixels |
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US20050195645A1 (en) * | 1998-03-09 | 2005-09-08 | Roger Panicacci | Readout circuit with gain and analog-to-digital conversion for image sensor |
TW580828B (en) * | 2002-09-16 | 2004-03-21 | Pixart Imaging Inc | Signal readout circuit having on-sensor-chip two-dimensional interpolation |
US20070063128A1 (en) * | 2003-11-13 | 2007-03-22 | Alexander Krymski | Method and apparatus for pixel signal binning and interpolation in column circuits of a sensor circuit |
TW200721470A (en) * | 2005-09-01 | 2007-06-01 | Micron Technology Inc | Method and apparatus providing pixel array having automatic light control pixels and image capture pixels |
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