TWI384734B - Control device for a dc-dc converter and related dc-dc converter - Google Patents
Control device for a dc-dc converter and related dc-dc converter Download PDFInfo
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Description
本發明係指一種用於一直流轉換器之控制裝置及其相關直流轉換器,尤指一種透過降低直流轉換器之一輸出電壓,以減輕突波效應,進而正確關閉直流轉換器之控制裝置及其相關直流轉換器。The present invention relates to a control device for a DC-DC converter and its associated DC converter, and more particularly to a control device for properly closing a DC converter by reducing the output voltage of one of the DC converters to mitigate the surge effect and Its associated DC converter.
電子裝置通常包含有不同的元件,每一元件所需的操作電壓可能都不同。因此,在電子裝置中,需要透過直流對直流電壓轉換電路,達到電壓準位的調節(升壓或降壓),並使之穩定在所設定的電壓數值。依不同的電源需求,可延伸出許多不同型態的直流對直流電壓轉換器,但其皆源自於降壓式轉換器(Buck/Step Down Converter)及升壓式轉換器(Boost/Step Up Converter)。顧名思義,降壓式轉換器可將輸入端的直流電壓下降至一預設電壓準位,而升壓式轉換器則可提升輸入端的直流電壓。不論降壓式轉換器或升壓式轉換器,隨著電路技術的演進,兩者皆已演變出許多變化,以適用於不同的架構,或符合不同的需求。Electronic devices typically contain different components, each of which may require different operating voltages. Therefore, in an electronic device, it is necessary to pass a DC-to-DC voltage conversion circuit to achieve voltage level adjustment (boost or step-down) and stabilize it at a set voltage value. Many different types of DC-to-DC voltage converters can be extended depending on different power requirements, but they are derived from Buck/Step Down Converter and Boost/Step Up. Converter). As the name suggests, the buck converter reduces the DC voltage at the input to a predetermined voltage level, while the boost converter boosts the DC voltage at the input. Regardless of the buck converter or boost converter, as circuit technology evolves, both have evolved to accommodate different architectures or to meet different needs.
舉例來說,請參考第1A圖,第1A圖為習知一降壓轉換器10之示意圖。降壓轉換器10包含有一輸入端100、一低通模組110、一控制模組120、一開關模組130、一輸出端140及一輸出模組150。輸入端130用來接收一第一輸入電壓訊號VIN1。低通模組110係由一電感112及一電容114所組成,用來對第一輸入電壓訊號VIN1執行低通濾波,以產生一第二輸入電壓訊號VIN2。控制模組120為一脈衝寬度調變(Pulse Width Modulation,PWM)控制器,用來根據第二輸入電壓訊號VIN2,產生一控制訊號VCON至開關模組l30。開關模組130包含有一上橋開關電晶體132、一下橋開關電晶體134、一放大器136及一反相放大器138,用來根據控制訊號VCON(及其反相訊號),控制上橋開關電晶體132及下橋開關電晶體134之導通狀態,進而調整一節點N1之電流大小。輸出模組150耦接於節點N1,其係由一電容152及一電感154所組成,用來透過電感電容效應,產生輸出電壓訊號VOUT。簡單來說,控制模組120透過調整上橋開關電晶體132及下橋開關電晶體134之工作週期(duty cycle),調整輸出電壓訊號VOUT之值。For example, please refer to FIG. 1A. FIG. 1A is a schematic diagram of a conventional buck converter 10. The buck converter 10 includes an input terminal 100, a low-pass module 110, a control module 120, a switch module 130, an output terminal 140, and an output module 150. The input terminal 130 is configured to receive a first input voltage signal VIN1. The low-pass module 110 is composed of an inductor 112 and a capacitor 114 for performing low-pass filtering on the first input voltage signal VIN1 to generate a second input voltage signal VIN2. The control module 120 is a pulse width modulation (PWM) controller for generating a control signal VCON to the switch module l30 according to the second input voltage signal VIN2. The switch module 130 includes an upper bridge switch transistor 132, a lower bridge switch transistor 134, an amplifier 136 and an inverting amplifier 138 for controlling the upper bridge switching transistor according to the control signal VCON (and its inverted signal). The conduction state of 132 and the lower bridge switching transistor 134, thereby adjusting the current of a node N1. The output module 150 is coupled to the node N1, and is composed of a capacitor 152 and an inductor 154 for generating an output voltage signal VOUT through the inductor-capacitor effect. Briefly, the control module 120 adjusts the value of the output voltage signal VOUT by adjusting the duty cycle of the upper bridge switching transistor 132 and the lower bridge switching transistor 134.
為了正確控制直流轉換器10之開啟及關閉,控制模組120另將第二輸入電壓訊號VIN2與一預設之開關門檻電壓VTH比較。請參考第1B圖,第1B圖為降壓轉換器10關閉過程中第二輸入電壓訊號VIN2及通過電感112之一輸入電流iIN 之變化示意圖。當直流轉換器10被關閉時,第一輸入電壓訊號VIN1會降至0,使得第二輸入電壓訊號VIN2逐漸地下降。當第二輸入電壓訊號VIN2小於開關門檻電壓VTH時,控制模組120將直流轉換器10關閉。然而,在此情況下,因為流經感112之電流iIN 突然減少,第二輸入電壓訊號VIN2瞬間將比第一輸入電壓訊號VIN1高,以符合電感112之電流連續之性質。換言之,當直流轉換器10關機時,第二輸入電壓訊號VIN2會產生一突波,而突波可能會造成第二輸入電壓訊號VIN2大於開關門檻電壓VTH,造成本來應該關機的直流轉換器10錯誤地回到開機狀態。因此,直流轉換器10之關機方式實有改進之必要。In order to properly control the opening and closing of the DC converter 10, the control module 120 further compares the second input voltage signal VIN2 with a predetermined switching threshold voltage VTH. Please refer to FIG. 1B. FIG. 1B is a schematic diagram showing changes of the second input voltage signal VIN2 and the input current i IN through one of the inductors 112 during the shutdown of the buck converter 10. When the DC converter 10 is turned off, the first input voltage signal VIN1 will drop to 0, causing the second input voltage signal VIN2 to gradually decrease. When the second input voltage signal VIN2 is less than the switching threshold voltage VTH, the control module 120 turns off the DC converter 10. However, in this case, since the current i IN flowing through the sense 112 suddenly decreases, the second input voltage signal VIN2 will instantaneously be higher than the first input voltage signal VIN1 to conform to the continuous nature of the current of the inductor 112. In other words, when the DC converter 10 is turned off, the second input voltage signal VIN2 generates a glitch, and the spurt may cause the second input voltage signal VIN2 to be greater than the switching threshold voltage VTH, causing the DC converter 10 that should be turned off. Return to the power on state. Therefore, the shutdown mode of the DC converter 10 is necessary for improvement.
因此,本發明之主要目的即在於提供一種用於一直流轉換器之控制裝置及其相關直流轉換器。Accordingly, it is a primary object of the present invention to provide a control device for a DC converter and its associated DC converter.
本發明揭露一種用於一直流轉換器之控制裝置,包含有一延遲比較器,用來根據該直流轉換器之一輸入電壓訊號,產生一電路啟用重置訊號;一控制器,耦接於該延遲比較器,用來根據該電路啟用重置訊號,提供一參考電壓訊號;一第一比較器,耦接於該控制器,用來比較該參考電壓訊號與該直流轉換器之一回授電壓訊號,以產生一比較結果;一震盪器,用來產生一震盪電壓訊號;以及一第二比較器,耦接於該第一比較器及該震盪器,用來比較該比較結果及該震盪電壓訊號,以產生一控制訊號至該直流轉換器之一開關模組。The invention discloses a control device for a DC converter, comprising a delay comparator for generating a circuit enable reset signal according to one of the DC converter input voltage signals; a controller coupled to the delay a comparator for enabling a reset signal according to the circuit to provide a reference voltage signal; a first comparator coupled to the controller for comparing the reference voltage signal with one of the DC converters for returning a voltage signal To generate a comparison result, an oscillator for generating an oscillating voltage signal, and a second comparator coupled to the first comparator and the oscillator for comparing the comparison result and the oscillating voltage signal To generate a control signal to one of the switching modules of the DC converter.
本發明另揭露一種直流轉換器,包含有一輸入端,用來接收一輸入電壓訊號;一輸出端,用來輸出一輸出電壓訊號;一回授模組,耦接於該輸出端,用來根據該輸出電壓訊號,產生一回授電壓訊號;一開關模組,包含有一第一端,用來接收一控制訊號;一第二端;一上橋開關電晶體,耦接於該輸入端、該第一端及該第二端,用來根據該控制訊號,控制該輸入端至該第二端之導通狀態;以及一下橋開關電晶體,耦接於該第一端、該第二端及一地端,用來根據該控制訊號之一反相訊號,控制該第二端至該地端之導通狀態;一輸出模組,包含有一輸出電感,其一端耦接於該開關模組之該第二端,另一端耦接於該輸出端;一輸出電阻,耦接於該輸出端;以及一輸出電容,耦接於該輸出電阻與該地端之間;以及一控制裝置,包含有一延遲比較器,耦接於該輸入端,用來根據該輸入電壓訊號,產生一電路啟用重置訊號;一控制器,耦接於該延遲比較器,用來根據該電路啟用重置訊號,提供一參考電壓訊號;一第一比較器,耦接於該控制器及該回授模組,用來比較該參考電壓訊號與該回授電壓訊號,以產生一比較結果;一震盪器,用來產生一震盪電壓訊號;以及一第二比較器,耦接於該第一比較器、該震盪器及該開關模組之該第一端,用來比較該比較結果及該震盪電壓訊號,以產生該控制訊號至該開關模組。The present invention further discloses a DC converter including an input terminal for receiving an input voltage signal, an output terminal for outputting an output voltage signal, and a feedback module coupled to the output terminal for The output voltage signal generates a feedback voltage signal; a switch module includes a first end for receiving a control signal; a second end; an upper bridge switch transistor coupled to the input end, the The first end and the second end are configured to control the conduction state of the input end to the second end according to the control signal; and the lower bridge switch transistor is coupled to the first end, the second end, and a second end The ground end is configured to control the conduction state of the second end to the ground end according to one of the control signals; the output module includes an output inductor, and one end of the switch module is coupled to the switch module The second end is coupled to the output end; an output resistor coupled to the output end; and an output capacitor coupled between the output resistor and the ground end; and a control device including a delay comparison Coupled to the input The terminal is configured to generate a circuit enable reset signal according to the input voltage signal; a controller coupled to the delay comparator for enabling a reset signal according to the circuit to provide a reference voltage signal; a first comparison The controller is coupled to the controller and the feedback module for comparing the reference voltage signal with the feedback voltage signal to generate a comparison result; an oscillator for generating an oscillation voltage signal; and a first The first comparator is coupled to the first comparator, the oscillator, and the first end of the switch module for comparing the comparison result and the oscillating voltage signal to generate the control signal to the switch module.
請參考第2圖,第2圖為本發明實施例一直流轉換器20之示意圖。直流轉換器20包含有一低通模組210、一輸入端200、一輸出端240、一回授模組260、一開關模組230、一輸出模組250及一控制裝置22。低通模組210、開關模組230及輸出模組250之結構與運作方式與第1A圖中低通模組110、開關模組130及輸出模組150相似。亦即,低通模組210係由一電感212及一電容214所組成,用來對第一輸入電壓訊號VIN1執行低通濾波,以產生第二輸入電壓訊號VIN2。開關模組230包含有一上橋開關電晶體232、一下橋開關電晶體234、一放大器236及一反相放大器238,用來根據控制訊號VCON(及其反相訊號),控制上橋開關電晶體232及下橋開關電晶體234之導通狀態,進而調整一節點N2之電流大小。輸出模組250耦接於節點N2,其係由一電容252、一電感254及一電阻R1所組成,用來透過電感電容效應,產生輸出電壓訊號VOUT。另外,回授模組260係由電阻R2、R3所組成,用來根據輸出電壓訊號VOUT,產生一回授電壓訊號VFB。控制裝置22用來產生控制訊號VCON,其可避免關機時突波所造成的問題,詳細說明如下。Please refer to FIG. 2, which is a schematic diagram of the DC converter 20 according to an embodiment of the present invention. The DC converter 20 includes a low-pass module 210, an input terminal 200, an output terminal 240, a feedback module 260, a switch module 230, an output module 250, and a control device 22. The structure and operation mode of the low-pass module 210, the switch module 230, and the output module 250 are similar to those of the low-pass module 110, the switch module 130, and the output module 150 in FIG. That is, the low-pass module 210 is composed of an inductor 212 and a capacitor 214 for performing low-pass filtering on the first input voltage signal VIN1 to generate a second input voltage signal VIN2. The switch module 230 includes an upper bridge switch transistor 232, a lower bridge switch transistor 234, an amplifier 236 and an inverting amplifier 238 for controlling the upper bridge switching transistor according to the control signal VCON (and its inverted signal). The conduction state of 232 and the lower bridge switch transistor 234, thereby adjusting the current level of a node N2. The output module 250 is coupled to the node N2, and is composed of a capacitor 252, an inductor 254 and a resistor R1 for generating an output voltage signal VOUT through the inductor-capacitor effect. In addition, the feedback module 260 is composed of resistors R2 and R3 for generating a feedback voltage signal VFB according to the output voltage signal VOUT. The control device 22 is used to generate the control signal VCON, which avoids the problems caused by the glitch during shutdown, as described in detail below.
控制裝置22包含有一延遲比較器(delay comparator)220、一控制器222、一第一比較器224、一震盪器226及一第二比較器228。延遲比較器220用來根據第二輸入電壓訊號VIN2,產生一電路啟用重置訊號VPOR。控制器222用來根據電路啟用重置訊號VPOR,提供一參考電壓訊號VREF。第一比較器224用來比較參考電壓訊號VREF與回授電壓訊號VFB,以產生一比較結果VCMP。震盪器226用來產生一震盪電壓訊號VOSC。第二比較器228用來比較比較結果VCMP及震盪電壓訊號VOSC,以產生控制訊號VCON至開關模組229。The control device 22 includes a delay comparator 220, a controller 222, a first comparator 224, an oscillator 226, and a second comparator 228. The delay comparator 220 is configured to generate a circuit enable reset signal VPOR according to the second input voltage signal VIN2. The controller 222 is configured to provide a reference voltage signal VREF according to the circuit enable reset signal VPOR. The first comparator 224 is configured to compare the reference voltage signal VREF with the feedback voltage signal VFB to generate a comparison result VCMP. The oscillator 226 is used to generate an oscillating voltage signal VOSC. The second comparator 228 is configured to compare the comparison result VCMP and the oscillating voltage signal VOSC to generate the control signal VCON to the switch module 229.
簡單來說,本發明係透過電路啟用重置訊號VPOR指示控制器222是否開始降低參考電壓訊號VREF。參考電壓訊號VREF之降低會降低第一比較器224之比較結果VCMP,進而透過第二比較器228降低控制訊號VCON之工作週期(duty cycle),使得開關模組230之上橋開關電晶體232之工作週期降低且下橋開關電晶體234之工作週期增加,造成輸出電壓訊號VOUT降低。如此一來,輸出端240之一輸出電流iOUT 及輸入端200之一輸入電流iIN 將隨之降低,以降低第二輸入電壓訊號VIN2上所出現之突波。除此之外,透過回授模組260,回授電壓訊號VFB與輸出電壓訊號VOUT成正比:Briefly, the present invention instructs the controller 222 to begin lowering the reference voltage signal VREF through the circuit enable reset signal VPOR. The decrease of the reference voltage signal VREF reduces the comparison result VCMP of the first comparator 224, and further reduces the duty cycle of the control signal VCON through the second comparator 228, so that the switching module 230 is over the bridge switching transistor 232. The duty cycle is reduced and the duty cycle of the lower bridge switching transistor 234 is increased, causing the output voltage signal VOUT to decrease. As a result, the output current i OUT of one of the output terminals 240 and one of the input currents i IN of the input terminal 200 will be lowered to reduce the surge occurring on the second input voltage signal VIN2. In addition, through the feedback module 260, the feedback voltage signal VFB is proportional to the output voltage signal VOUT:
從上式可知,當參考電壓訊號VREF之下降造成輸出電壓訊號VOUT下降,回授電壓訊號VFB亦隨之下降。換言之,回授電壓訊號VFB之變化係跟隨於參考電壓訊號VREF。請參考第3圖,第3圖為直流轉換器20關閉過程中第二輸入電壓訊號VIN2及輸入電流iIN 之變化示意圖。比較第1B圖及第3圖可知,本發明係將輸入電流iIN 降低,使得第二輸入電壓訊號VIN2上出現之突波亦被降低,以避免直流轉換器錯誤地回到開機狀態。As can be seen from the above equation, when the output voltage signal VOUT drops due to the decrease of the reference voltage signal VREF, the feedback voltage signal VFB also decreases. In other words, the change of the feedback voltage signal VFB follows the reference voltage signal VREF. Please refer to FIG. 3, which is a schematic diagram showing changes of the second input voltage signal VIN2 and the input current i IN during the shutdown of the DC converter 20. Comparing FIGS. 1B and 3, the present invention reduces the input current i IN such that the glitch appearing on the second input voltage signal VIN2 is also reduced to prevent the DC converter from erroneously returning to the power-on state.
在此須注意的是,延遲比較器220係用來比較第二輸入電壓訊號VIN2與預先設定之一第一門檻電壓VTH1及一第二門檻電壓VTH2,以產生對應之電路啟用重置訊號VPOR,其運作方式係如第4圖所示。在第4圖中,當第二輸入電壓訊號VIN2由低位準提高到高於第一門檻電壓VTH1時,電路啟用重置訊號VPOR會從一低準位VL 切換至一高準位VH ,表示直流轉換器20已開機。相反地,當第二輸入電壓訊號VIN2由高位準減小到小於第二門檻電壓VTH2時,電路啟用重置訊號VPOR會從高準位VH 切換至低準位VL ,以指示控制器222開始降低參考電壓訊號VREF。It should be noted that the delay comparator 220 is configured to compare the second input voltage signal VIN2 with a preset first threshold voltage VTH1 and a second threshold voltage VTH2 to generate a corresponding circuit enable reset signal VPOR. It works as shown in Figure 4. In FIG. 4, when the second input voltage signal VIN2 is raised from the low level to be higher than the first threshold voltage VTH1, the circuit enable reset signal VPOR is switched from a low level V L to a high level V H , Indicates that the DC converter 20 is turned on. Conversely, when the second input voltage signal VIN2 is reduced from the high level to less than the second threshold voltage VTH2, the circuit enable reset signal VPOR is switched from the high level V H to the low level V L to instruct the controller 222 Start reducing the reference voltage signal VREF.
請繼續參考第5圖,第5圖為第2圖中控制器222之示意圖。控制器222包含有一柔性關閉電路500、一減法器502、一帶隙電壓產生器504、一多工器506及一微控制器508。柔性關閉電路500用來根據電路啟用重置訊號VPOR,產生一柔性關閉電壓訊號VSS。減法器502用來將柔性關閉電壓訊號VSS減去一差異電壓VD,並輸出一減法結果VSUB。帶隙電壓產生器504用來產生一帶隙電壓VBG。多工器506用來根據減法結果VSUB及帶隙電壓VBG,產生參考電壓訊號VREF。微控制器508用來根據減法結果VSUB及帶隙電壓VBG,選擇多工器506之輸入訊號源。Please continue to refer to FIG. 5, which is a schematic diagram of the controller 222 in FIG. The controller 222 includes a flexible shutdown circuit 500, a subtractor 502, a bandgap voltage generator 504, a multiplexer 506, and a microcontroller 508. The flexible shutdown circuit 500 is configured to generate a flexible off voltage signal VSS according to the circuit enable reset signal VPOR. The subtracter 502 is configured to subtract a differential voltage VD from the flexible off voltage signal VSS and output a subtraction result VSUB. The bandgap voltage generator 504 is used to generate a bandgap voltage VBG. The multiplexer 506 is configured to generate the reference voltage signal VREF according to the subtraction result VSUB and the bandgap voltage VBG. The microcontroller 508 is configured to select the input signal source of the multiplexer 506 based on the subtraction result VSUB and the bandgap voltage VBG.
簡單來說,當電路啟用重置訊號VPOR指示控制器222開始降低參考電壓訊號VREF時,柔性關閉電路500會降低柔性關閉電壓訊號VSS。接著,減法器502將柔性關閉電壓訊號VSS減去差異電壓VD。最後,多工器506將減法結果VSUB輸出為參考電壓訊號VREF。Briefly, when the circuit enable reset signal VPOR indicates that the controller 222 begins to lower the reference voltage signal VREF, the flexible shutdown circuit 500 reduces the flexible turn-off voltage signal VSS. Next, the subtractor 502 subtracts the differential voltage VD from the flexible off voltage signal VSS. Finally, the multiplexer 506 outputs the subtraction result VSUB as the reference voltage signal VREF.
請參考第6圖,第6圖為第5圖中柔性關閉電路500之示意圖。柔性關閉電路500包含有一第一電流源600、一電容602、一節點N3、一第一開關604、一第二電流源606及一第二開關608。當電路啟用重置訊號VPOR為高準位VH 時,第一開關604導通且第二開關608關閉;同時,第一電流源600對電容602充電,以增加節點N3上之柔性關閉電壓訊號VSS。相反地,當電路啟用重置訊號VPOR為低準位VL 時,第一開關604關閉且第二開關608導通;同時,電容602經由第二電流源606放電,以降低柔性關閉電壓訊號VSS。Please refer to FIG. 6. FIG. 6 is a schematic diagram of the flexible shutdown circuit 500 in FIG. The flexible shutdown circuit 500 includes a first current source 600, a capacitor 602, a node N3, a first switch 604, a second current source 606, and a second switch 608. When the circuit enable reset signal VPOR is at the high level V H , the first switch 604 is turned on and the second switch 608 is turned off; meanwhile, the first current source 600 charges the capacitor 602 to increase the flexible turn-off voltage signal VSS on the node N3. . Conversely, when the circuit enable reset signal VPOR is at the low level V L , the first switch 604 is turned off and the second switch 608 is turned on; at the same time, the capacitor 602 is discharged via the second current source 606 to lower the flexible turn-off voltage signal VSS.
在此須注意的是,多工器506之輸入訊號源隨著減法結果VSUB之不同而不同。在控制器222中,微控制器508根據減法結果VSUB,選擇多工器506之不同輸入訊號源,提供不同變化型態的參考電壓訊號VREF。更具體的說,當減法結果VSUB大於帶隙電壓VBG時,微控制器508選擇帶隙電壓VBG作為多工器506之輸入訊號源;當減法結果VSUB小於帶隙電壓VBG且大於一地電壓VGND時,微控制器508選擇相減結果VSUB作為多工器506之輸入訊號源;以及當減法結果VSUB小於地電壓VGND時,微控制器508選擇地電壓VGND作為多工器506之輸入訊號源。舉例來說,請參考第7A圖及第7B圖,第7A圖及第7B圖分別為直流轉換器20啟動及關閉時,參考電壓訊號VREF、相減結果VSUB及柔性關閉電壓訊號VSS時間變化之示意圖。從第7A圖及第7B圖可以得知,無論是直流轉換器20之開啟過程或關閉過程,參考電壓訊號VREF變化之斜率隨著相減結果VSUB與帶隙電壓VBG及地電壓VGND之大小關係不同而不同。在此須注意的是,在第7B圖中,當減法結果VSUB小於帶隙電壓VBG且大於地電壓VGND時,參考電壓訊號VREF為柔性關閉電壓訊號VSS減去差異電壓VD之相減結果VSUB,因此參考電壓訊號VREF之下降斜率與柔性關閉電壓訊號VSS之下降斜率相同。而柔性關閉電壓訊號VSS之下降斜率係由第二電流源606所汲取之一放電電流iDIS 除以電容602之電容值之一比值所決定。It should be noted here that the input signal source of the multiplexer 506 differs depending on the subtraction result VSUB. In the controller 222, the microcontroller 508 selects different input signal sources of the multiplexer 506 according to the subtraction result VSUB to provide different reference voltage signals VREF. More specifically, when the subtraction result VSUB is greater than the bandgap voltage VBG, the microcontroller 508 selects the bandgap voltage VBG as the input signal source of the multiplexer 506; when the subtraction result VSUB is smaller than the bandgap voltage VBG and greater than a ground voltage VGND When the microcontroller 508 selects the subtraction result VSUB as the input signal source of the multiplexer 506; and when the subtraction result VSUB is less than the ground voltage VGND, the microcontroller 508 selects the ground voltage VGND as the input signal source of the multiplexer 506. For example, please refer to FIG. 7A and FIG. 7B. FIG. 7A and FIG. 7B respectively show the time value of the reference voltage signal VREF, the subtraction result VSUB and the flexible off voltage signal VSS when the DC converter 20 is turned on and off. schematic diagram. It can be seen from FIG. 7A and FIG. 7B that, regardless of whether the DC converter 20 is turned on or off, the slope of the change of the reference voltage signal VREF is related to the magnitude of the subtraction result VSUB and the bandgap voltage VBG and the ground voltage VGND. Different and different. It should be noted that in FIG. 7B, when the subtraction result VSUB is smaller than the bandgap voltage VBG and greater than the ground voltage VGND, the reference voltage signal VREF is the subtraction result VSUB of the flexible off voltage signal VSS minus the difference voltage VD, Therefore, the falling slope of the reference voltage signal VREF is the same as the falling slope of the flexible off voltage signal VSS. The falling slope of the flexible off voltage signal VSS is determined by dividing one of the discharge currents i DIS drawn by the second current source 606 by the ratio of the capacitance of the capacitor 602.
在先前技術中,當使用者欲關閉直流轉換器時,第二輸入電壓訊號VIN2上產生之突波可能會造成第二輸入電壓訊號VIN2大於開關門檻電壓VTH,造成直流轉換器錯誤地回到開機狀態。相較之下,本發明透過控制裝置22,在直流轉換器20關機之前先降低輸出電壓訊號VOUT,以降低輸入電流iIN ,進而降低第二輸入電壓訊號VIN2上產生之突波。如此一來,本發明即可避免直流轉換器20錯誤地回到開機狀態。In the prior art, when the user wants to turn off the DC converter, the glitch generated on the second input voltage signal VIN2 may cause the second input voltage signal VIN2 to be greater than the switching threshold voltage VTH, causing the DC converter to erroneously return to the power-on. status. In contrast, the present invention reduces the output voltage signal VOUT through the control device 22 before the DC converter 20 is turned off to reduce the input current i IN , thereby reducing the surge generated on the second input voltage signal VIN2. In this way, the present invention can prevent the DC converter 20 from erroneously returning to the power-on state.
綜上所述,本發明根據關機前直流轉換器輸入電壓之變異,預先降低直流轉換器之輸出電壓,以減輕直流轉換器輸入端之突波效應,以正確地關閉直流轉換器。In summary, the present invention reduces the output voltage of the DC converter in advance according to the variation of the input voltage of the DC converter before shutdown to reduce the surge effect at the input end of the DC converter to properly turn off the DC converter.
以上所述僅為本發明之較佳實施例,凡依本發明申請專利範圍所做之均等變化與修飾,皆應屬本發明之涵蓋範圍。The above are only the preferred embodiments of the present invention, and all changes and modifications made to the scope of the present invention should be within the scope of the present invention.
10、20...直流轉換器10, 20. . . DC converter
22...控制裝置twenty two. . . Control device
120...控制模組120. . . Control module
100、200...輸入端100, 200. . . Input
110、210...低通模組110, 210. . . Low pass module
112、154、212、254...電感112, 154, 212, 254. . . inductance
114、152、214、252、602...電容114, 152, 214, 252, 602. . . capacitance
220...延遲比較器220. . . Delay comparator
224...第一比較器224. . . First comparator
228...第二比較器228. . . Second comparator
222...控制器222. . . Controller
226...震盪器226. . . Oscillator
130、230...開關模組130, 230. . . Switch module
132、232...上橋開關電晶體132, 232. . . Upper bridge switch transistor
134、234...下橋開關電晶體134, 234. . . Lower bridge switch transistor
136、236...放大器136, 236. . . Amplifier
138、238...反相放大器138, 238. . . Inverting amplifier
140、240...輸出端140, 240. . . Output
150、250...輸出模組150, 250. . . Output module
R1、R2、R3...電阻R1, R2, R3. . . resistance
260...回授模組260. . . Feedback module
500...柔性關閉電路500. . . Flexible shutdown circuit
502...減法器502. . . Subtractor
504...帶隙電壓產生器504. . . Bandgap voltage generator
506...多工器506. . . Multiplexer
508...微控制器508. . . Microcontroller
600...第一電流源600. . . First current source
604...第一開關604. . . First switch
606...第二電流源606. . . Second current source
608...第二開關608. . . Second switch
VBG...帶隙電壓VBG. . . Band gap voltage
VD...差異電壓VD. . . Differential voltage
VGND...地電壓VGND. . . Ground voltage
VIN1...第一輸入電壓訊號VIN1. . . First input voltage signal
VIN2...第二輸入電壓訊號VIN2. . . Second input voltage signal
VOUT...輸出電壓訊號VOUT. . . Output voltage signal
VCON...控制訊號VCON. . . Control signal
VFB...回授電壓訊號VFB. . . Feedback voltage signal
VCMP...比較結果VCMP. . . Comparing results
VREF...參考電壓訊號VREF. . . Reference voltage signal
VTH1...第一門檻電壓VTH1. . . First threshold voltage
VTH2...第二門檻電壓VTH2. . . Second threshold voltage
VPOR...電路啟用重置訊號VPOR. . . Circuit enable reset signal
VOSC...震盪電壓訊號VOSC. . . Oscillating voltage signal
VSUB...減法結果VSUB. . . Subtraction result
VSS...柔性關閉電壓訊號VSS. . . Flexible off voltage signal
VL ...低準位V L . . . Low level
VH ...高準位V H . . . High level
iDIS ...放電電流i DIS . . . Discharge current
iIN ...輸入電流i IN . . . Input Current
iOUT ...輸出電流i OUT . . . Output current
N1、N2、N3...節點N1, N2, N3. . . node
第1A圖為一習知降壓轉換器之示意圖。Figure 1A is a schematic diagram of a conventional buck converter.
第1B圖為習知降壓轉換器關閉過程中一輸入電壓及一輸入電流之變化示意圖。Figure 1B is a schematic diagram showing changes in an input voltage and an input current during a conventional buck converter shutdown process.
第2圖為本發明實施例一用於一直流轉換器之控制裝置之示意圖。FIG. 2 is a schematic diagram of a control device for a DC converter according to an embodiment of the present invention.
第3圖為本發明實施例直流轉換器關閉過程中一輸入電壓及一輸入電流之變化示意圖。FIG. 3 is a schematic diagram showing changes in an input voltage and an input current during a DC converter shutdown process according to an embodiment of the present invention.
第4圖為本發明實施例一延遲比較器之一輸入/輸出關係之示意圖。4 is a schematic diagram showing an input/output relationship of a delay comparator according to an embodiment of the present invention.
第5圖為本發明實施例一控制器之示意圖。FIG. 5 is a schematic diagram of a controller according to an embodiment of the present invention.
第6圖為本發明實施例一柔性關閉電路之示意圖。Figure 6 is a schematic diagram of a flexible shutdown circuit in accordance with an embodiment of the present invention.
第7A圖為本發明實施例直流轉換器啟動時,相關訊號之時間變化之示意圖。FIG. 7A is a schematic diagram showing temporal changes of related signals when the DC converter is started according to the embodiment of the present invention.
第7B圖為本發明實施例直流轉換器關閉時,相關訊號之時間變化之示意圖。FIG. 7B is a schematic diagram showing temporal changes of related signals when the DC converter is turned off according to an embodiment of the present invention.
20...直流轉換器20. . . DC converter
22...控制裝置twenty two. . . Control device
200...輸入端200. . . Input
210...低通模組210. . . Low pass module
212、254...電感212, 254. . . inductance
214、252...電容214, 252. . . capacitance
220...延遲比較器220. . . Delay comparator
224...第一比較器224. . . First comparator
228...第二比較器228. . . Second comparator
222...控制器222. . . Controller
226...震盪器226. . . Oscillator
230...開關模組230. . . Switch module
232...上橋開關電晶體232. . . Upper bridge switch transistor
234...下橋開關電晶體234. . . Lower bridge switch transistor
236...放大器236. . . Amplifier
238...反相放大器238. . . Inverting amplifier
240...輸出端240. . . Output
250...輸出模組250. . . Output module
R1、R2、R3...電阻R1, R2, R3. . . resistance
260...回授模組260. . . Feedback module
VIN1...第一輸入電壓訊號VIN1. . . First input voltage signal
VIN2...第二輸入電壓訊號VIN2. . . Second input voltage signal
VOUT...輸出電壓訊號VOUT. . . Output voltage signal
VCON...控制訊號VCON. . . Control signal
VFB...回授電壓訊號VFB. . . Feedback voltage signal
VCMP...比較結果VCMP. . . Comparing results
VREF...參考電壓訊號VREF. . . Reference voltage signal
VTH1...第一門檻電壓VTH1. . . First threshold voltage
VTH2...第二門檻電壓VTH2. . . Second threshold voltage
VPOR...電路啟用重置訊號VPOR. . . Circuit enable reset signal
VOSC...震盪電壓訊號VOSC. . . Oscillating voltage signal
i IN ...輸入電流 i IN . . . Input Current
i OUT ...輸出電流 i OUT . . . Output current
N2...節點N2. . . node
Claims (19)
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TW200505143A (en) * | 2003-07-31 | 2005-02-01 | Rohm Co Ltd | DC/DC converter |
TW200515701A (en) * | 2003-10-28 | 2005-05-01 | Intersil Inc | Startup circuit for a DC-DC converter |
EP1775826A1 (en) * | 2004-07-12 | 2007-04-18 | Murata Manufacturing Co., Ltd. | Dc-dc converter |
TW200746600A (en) * | 2006-04-05 | 2007-12-16 | Sanyo Electric Co | Switching control circuit |
US7453251B1 (en) * | 2005-01-18 | 2008-11-18 | Intersil Americas Inc. | Voltage tracking reference for a power regulator |
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TW200505143A (en) * | 2003-07-31 | 2005-02-01 | Rohm Co Ltd | DC/DC converter |
TW200515701A (en) * | 2003-10-28 | 2005-05-01 | Intersil Inc | Startup circuit for a DC-DC converter |
EP1775826A1 (en) * | 2004-07-12 | 2007-04-18 | Murata Manufacturing Co., Ltd. | Dc-dc converter |
US7453251B1 (en) * | 2005-01-18 | 2008-11-18 | Intersil Americas Inc. | Voltage tracking reference for a power regulator |
TW200746600A (en) * | 2006-04-05 | 2007-12-16 | Sanyo Electric Co | Switching control circuit |
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