TWI383229B - Pixel driving circuit structure with repair line - Google Patents
Pixel driving circuit structure with repair line Download PDFInfo
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- TWI383229B TWI383229B TW97148809A TW97148809A TWI383229B TW I383229 B TWI383229 B TW I383229B TW 97148809 A TW97148809 A TW 97148809A TW 97148809 A TW97148809 A TW 97148809A TW I383229 B TWI383229 B TW I383229B
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Description
本發明是有關於一種畫素驅動電路結構，特別是有關於一種具修補線之畫素驅動電路結構。 The present invention relates to a pixel driving circuit structure, and more particularly to a pixel driving circuit structure having a repair line.
目前，隨著電子產品的普及；許多人皆殫精竭慮於降低液晶面板之製造成本。其中，畫素驅動電路之雙閘極設計方式，因可減少驅動晶片的數量，而頗受垂青。相關之技術如美國專利20080079678所示；值得注意的是，雙閘極設計方式亦可減少資料線所需之佈局空間。 At present, with the popularity of electronic products, many people are eager to reduce the manufacturing cost of liquid crystal panels. Among them, the double gate design of the pixel driving circuit is quite popular because it can reduce the number of driving wafers. Related techniques are shown in U.S. Patent No. 20080079678; it is worth noting that the dual gate design also reduces the layout space required for the data lines.
請參考第1圖，其係為習知之畫素驅動電路結構之結構示意圖。為方便解釋，以第1圖之必要區域結構為例，畫素驅動電路結構10包含一第一閘極線11、一第二閘極線12、一第一資料線13、一第二資料線14、一第一薄膜電晶體15、一第二薄膜電晶體16、一第三薄膜電晶體17以及一第四薄膜電晶體18。其中，第二閘極線12係位於第一閘極線11下方，且平行於第一閘極線11。第一資料線13係垂直於第一閘極線11與第二閘極線12，而第二資料線14係位於第一資料線13右側，且平行於第一資料線13。第一薄膜電晶體15係位於第一資料線13之左側，且第一薄膜電晶體15之控制端係電性連接於第二閘極線12，而第一薄膜電晶體15之輸入端則電性連接於第一資料線13。第二薄膜電晶體16係位於第一資料線13之右側，且第二薄膜電晶體16之控制端係電性連接於第一閘極線11，而第二薄膜電晶體16之輸入端則電性連接於第一資 料線13。第三薄膜電晶體17係位於第二資料線14之左側，且第三薄膜電晶體17之控制端係電性連接於第二閘極線12，而第三薄膜電晶體17之輸入端則電性連接於第二資料線14。第四薄膜電晶體18係位於第二資料線14之右側，且第四薄膜電晶體18之控制端係電性連接於第一閘極線11，而第四薄膜電晶體18之輸入端則電性連接於第二資料線14。 Please refer to FIG. 1 , which is a schematic structural diagram of a conventional pixel driving circuit structure. For convenience of explanation, the pixel driving circuit structure 10 includes a first gate line 11, a second gate line 12, a first data line 13, and a second data line. 14. A first thin film transistor 15, a second thin film transistor 16, a third thin film transistor 17, and a fourth thin film transistor 18. The second gate line 12 is located below the first gate line 11 and parallel to the first gate line 11. The first data line 13 is perpendicular to the first gate line 11 and the second gate line 12, and the second data line 14 is located on the right side of the first data line 13 and parallel to the first data line 13. The first thin film transistor 15 is located on the left side of the first data line 13, and the control end of the first thin film transistor 15 is electrically connected to the second gate line 12, and the input end of the first thin film transistor 15 is electrically It is connected to the first data line 13. The second thin film transistor 16 is located on the right side of the first data line 13, and the control end of the second thin film transistor 16 is electrically connected to the first gate line 11, and the input end of the second thin film transistor 16 is electrically Sexual connection to the first capital Feed line 13. The third thin film transistor 17 is located on the left side of the second data line 14, and the control end of the third thin film transistor 17 is electrically connected to the second gate line 12, and the input end of the third thin film transistor 17 is electrically Connected to the second data line 14. The fourth thin film transistor 18 is located on the right side of the second data line 14, and the control end of the fourth thin film transistor 18 is electrically connected to the first gate line 11, and the input end of the fourth thin film transistor 18 is electrically Connected to the second data line 14.
承上所述，由第1圖可知悉，雙閘極設計方式較習知之佈局方式減少了一半資料線所需之佈局空間。換句話說，第一資料線13與第二資料線14之間出現了足以容納一條資料線的空間。此外，雙閘極薄膜電晶體因具有較佳的驅動能力、開/關電流比特性與頻率響應能力，而漸漸在平面顯示器的畫素驅動電路上嶄露頭角，並被研發人員嘗試著與上述之雙閘極設計方式進行整合。 As can be seen from Fig. 1, the double gate design method reduces the layout space required for half of the data lines compared with the conventional layout. In other words, a space between the first data line 13 and the second data line 14 is sufficient to accommodate one data line. In addition, the dual-gate thin film transistor has gradually emerged on the pixel drive circuit of the flat panel display due to its better driving ability, on/off current ratio characteristics and frequency response capability, and has been tried by the developers. The gate design is integrated.
有鑑於上述習知技藝之問題，本發明之目的就是在提供一種具修補線之畫素驅動電路結構，以充分利用雙閘極設計方式所衍生之空白佈局空間。 In view of the above problems in the prior art, the object of the present invention is to provide a pixel driving circuit structure with a repair line to fully utilize the blank layout space derived from the double gate design.
根據本發明之目的，提出一種具修補線之畫素驅動電路結構，係適用於一液晶顯示面板，其包含一第一閘極線、一第二閘極線、一第一資料線、一第二資料線、一第一薄膜電晶體、一第二薄膜電晶體、一第三薄膜電晶體、一第四薄膜電晶體以及一修補線。修補線包含一垂直線段、一第一水平線段與一第二水平線段。垂直線段係位於第一資料線與第二資料線之間；第一水平線段 係位於垂直線段之第一端，且第一水平線段之第一端係延伸至第一資料線之上；第二水平線段係位於垂直線段之第二端，且第二水平線段之第一端係延伸至第一資料線之上。藉此，本發明可於第一資料線發生缺陷時，導通第一資料線與第一水平線段之第一端，並導通第一資料線與第二水平線段之第一端；進而利用修補線來取代第一資料線。 According to the purpose of the present invention, a pixel driving circuit structure with a repaired line is provided, which is applicable to a liquid crystal display panel, and includes a first gate line, a second gate line, a first data line, and a first Two data lines, a first thin film transistor, a second thin film transistor, a third thin film transistor, a fourth thin film transistor, and a repair line. The repair line includes a vertical line segment, a first horizontal line segment and a second horizontal line segment. The vertical line segment is located between the first data line and the second data line; the first horizontal line segment Is located at a first end of the vertical line segment, and the first end of the first horizontal line segment extends above the first data line; the second horizontal line segment is located at the second end of the vertical line segment, and the first end of the second horizontal line segment The system extends above the first data line. Therefore, the first circuit of the first data line and the first horizontal line segment are turned on when the first data line is defective, and the first end of the first data line and the second horizontal line segment are turned on; To replace the first data line.
此外，第一水平線段之第二端更可延伸至第二資料線之上，且第二水平線段之第二端亦可延伸至第二資料線之上。藉此，當第一閘極線或第二閘極線發生缺陷時，可透過適當的開路修補程序與短路修補程序，以修補線取代有缺陷的閘極線。 In addition, the second end of the first horizontal line segment may extend above the second data line, and the second end of the second horizontal line segment may also extend above the second data line. Thereby, when the first gate line or the second gate line is defective, the defective gate line can be replaced by the repair line through a suitable open circuit repair procedure and a short circuit repair procedure.
承上所述，依本發明之具修補線之畫素驅動電路結構，其可充分利用雙閘極設計方式所衍生之空白佈局空間來安置修補線。然後透過適當的開路修補程序與短路修補程序，以修補線來取代有缺陷的資料線或閘極線。 According to the above invention, the pixel driving circuit structure with the repaired line can fully utilize the blank layout space derived from the double gate design to place the repair line. Then replace the defective data line or gate line with a repair line by using an appropriate open-circuit patch and short-circuit patch.
請參閱第2圖，其係為本發明之具修補線之畫素驅動電路結構之結構示意圖。圖中，具修補線之畫素驅動電路結構20包含一第一閘極線11、一第二閘極線12、一第一資料線13、一第二資料線14、一第一薄膜電晶體15、一第二薄膜電晶體16、一第三薄膜電晶體17、一第四薄膜電晶體18以及一修補線21。其中，第二閘極線12係位於第一閘極線11下方，且平行於第一閘極線11。第一資料線13係垂直於第一閘極線11與第二閘極線12，而第二 資料線14係位於第一資料線13右側，且平行於第一資料線13。第一薄膜電晶體15係位於第一資料線13之左側，且第一薄膜電晶體15之控制端係電性連接於第二閘極線12，而第一薄膜電晶體15之輸入端則電性連接於第一資料線13。第二薄膜電晶體16係位於第一資料線13之右側，且第二薄膜電晶體16之控制端係電性連接於第一閘極線11，而第二薄膜電晶體16之輸入端則電性連接於第一資料線13。第三薄膜電晶體17係位於第二資料線14之左側，且第三薄膜電晶體17之控制端係電性連接於第二閘極線12，而第三薄膜電晶體17之輸入端則電性連接於第二資料線14。第四薄膜電晶體18係位於第二資料線14之右側，且第四薄膜電晶體18之控制端係電性連接於第一閘極線11，而第四薄膜電晶體18之輸入端則電性連接於第二資料線14。 Please refer to FIG. 2 , which is a schematic structural diagram of a pixel driving circuit structure with a repaired line according to the present invention. In the figure, the patch line driving circuit structure 20 includes a first gate line 11, a second gate line 12, a first data line 13, a second data line 14, and a first thin film transistor. 15. A second thin film transistor 16, a third thin film transistor 17, a fourth thin film transistor 18, and a repair line 21. The second gate line 12 is located below the first gate line 11 and parallel to the first gate line 11. The first data line 13 is perpendicular to the first gate line 11 and the second gate line 12, and the second The data line 14 is located on the right side of the first data line 13 and is parallel to the first data line 13. The first thin film transistor 15 is located on the left side of the first data line 13, and the control end of the first thin film transistor 15 is electrically connected to the second gate line 12, and the input end of the first thin film transistor 15 is electrically It is connected to the first data line 13. The second thin film transistor 16 is located on the right side of the first data line 13, and the control end of the second thin film transistor 16 is electrically connected to the first gate line 11, and the input end of the second thin film transistor 16 is electrically It is connected to the first data line 13. The third thin film transistor 17 is located on the left side of the second data line 14, and the control end of the third thin film transistor 17 is electrically connected to the second gate line 12, and the input end of the third thin film transistor 17 is electrically Connected to the second data line 14. The fourth thin film transistor 18 is located on the right side of the second data line 14, and the control end of the fourth thin film transistor 18 is electrically connected to the first gate line 11, and the input end of the fourth thin film transistor 18 is electrically Connected to the second data line 14.
此外，修補線21包含一垂直線段22、一第一水平線段23以及一第二水平線段24。垂直線段22係位於第一資料線13與第二資料線14之間，亦即雙閘極設計方式所衍生之空白佈局空間，且垂直於第一閘極線11與第二閘極線12。第一水平線段23係位於垂直線段22之第一端，且平行於第一閘極線11與第二閘極線12；最重要的是，第一水平線段之第一端231需延伸至第一資料線13之上，以利日後利用短路修補程序來導通第一資料線13與第一水平線段23。第二水平線段24係位於垂直線段22之第二端，且平行於第一閘極線11與第二閘極線12；最重要的是，第二水平線段之第一端241需延伸至第一資料線13之上 ，以利日後利用短路修補程序來導通第一資料線13與第二水平線段24。 In addition, the repair line 21 includes a vertical line segment 22, a first horizontal line segment 23, and a second horizontal line segment 24. The vertical line segment 22 is located between the first data line 13 and the second data line 14, that is, the blank layout space derived from the double gate design, and is perpendicular to the first gate line 11 and the second gate line 12. The first horizontal line segment 23 is located at the first end of the vertical line segment 22 and is parallel to the first gate line 11 and the second gate line 12; most importantly, the first end 231 of the first horizontal line segment extends to the first Above the data line 13, the short-term patch is used to turn on the first data line 13 and the first horizontal line segment 23. The second horizontal line segment 24 is located at the second end of the vertical line segment 22 and is parallel to the first gate line 11 and the second gate line 12; most importantly, the first end 241 of the second horizontal line segment extends to the first Above a data line 13 In order to facilitate the conduction of the first data line 13 and the second horizontal line segment 24 by a short circuit patch.
承上所述，當第一資料線13之線路中某處，發生開路缺陷，而導致訊號無法順利傳遞到開路缺陷下方之各個畫素時；可進行一短路修補程序，使第一資料線13一端與第一水平線段之第一端231導通，並使第一資料線13另一端與第二水平線段之第一端241導通。藉此，原本需透過第一資料線13由上而下傳送至每一畫素的訊號，可改經修補線21由下而上傳送到位於開路缺陷下方之各個畫素。此外，當第一資料線13之線路中某處，發生短路缺陷，而導致第一資料線13與閘極線互相導通時；可先於第一資料線13與閘極線導通處的上下兩端進行一開路修補程序，使導通處與第一資料線13斷開，再利用一短路修補程序來導通第一資料線13之一端與第一水平線段之第一端231，以及第一資料線13之另一端與第二水平線段之第一端241。藉此，修補線21可取代第一資料線13，將訊號由下而上傳送到位於短路缺陷下方之各個畫素。 As described above, when an open circuit defect occurs in a certain line of the first data line 13, the signal cannot be smoothly transmitted to each pixel under the open defect; a short circuit repair procedure can be performed to make the first data line 13 One end is electrically connected to the first end 231 of the first horizontal line segment, and the other end of the first data line 13 is electrically connected to the first end 241 of the second horizontal line segment. Thereby, the signal originally transmitted from the top to the bottom through the first data line 13 to each pixel can be transferred from the repair line 21 to the respective pixels under the open defect. In addition, when a short-circuit defect occurs in a certain line of the first data line 13, and the first data line 13 and the gate line are electrically connected to each other, the upper and lower sides of the first data line 13 and the gate line may be turned on. An open circuit patch is performed to disconnect the conductive portion from the first data line 13, and a short circuit patch is used to turn on one end of the first data line 13 and the first end 231 of the first horizontal line segment, and the first data line. The other end of 13 and the first end 241 of the second horizontal line segment. Thereby, the repairing line 21 can replace the first data line 13, and the signal is transmitted from below to each pixel located under the short defect.
請參閱第3圖，其係為本發明一實施例之具修補線之畫素驅動電路結構之結構示意圖。圖中，第一水平線段之第二端232更可延伸至第二資料線14之上，且第二水平線段之第二端242亦可延伸至第二資料線14之上。藉此，當第一閘極線11或第二閘極線12發生缺陷時，可透過適當的開路修補程序與短路修補程序，以修補線21取代有缺陷的閘極線。 Please refer to FIG. 3, which is a structural diagram of a pixel driving circuit structure with a repaired line according to an embodiment of the present invention. In the figure, the second end 232 of the first horizontal line segment can extend over the second data line 14, and the second end 242 of the second horizontal line segment can also extend over the second data line 14. Thereby, when the first gate line 11 or the second gate line 12 is defective, the defective gate line can be replaced by the repair line 21 through a suitable open circuit repair procedure and a short circuit repair procedure.
請參閱第4圖，其係為本發明另一實施例之具修補線 之畫素驅動電路結構之結構示意圖。圖中，當第二資料線14之線路中某處，發生資料線開路缺陷30，而導致訊號無法順利傳遞到資料線開路缺陷30下方之各個畫素時；可進行一短路修補程序，使第二資料線14一端與第一水平線段之第一端231導通，並使第二資料線14另一端與第二水平線段之第一端241導通。藉此，原本需透過第二資料線14由上而下傳送至每一畫素的訊號，可改經修補線21，依序通過第一水平線段23、垂直線段22與第二水平線段24，由下而上傳送到位於資料線開路缺陷30下方之各個畫素。此外，為了使多條修補線不會互相干擾，在進行完短路修補程序後，較佳可進行開路修補程序31~34，使此處被使用後之修補線21獨立於其他修補線。 Please refer to FIG. 4 , which is a repairing line according to another embodiment of the present invention. Schematic diagram of the structure of the pixel drive circuit structure. In the figure, when the data line open defect 30 occurs somewhere in the line of the second data line 14, the signal cannot be smoothly transmitted to each pixel below the data line open defect 30; a short circuit patch can be performed to make the first One end of the second data line 14 is electrically connected to the first end 231 of the first horizontal line segment, and the other end of the second data line 14 is electrically connected to the first end 241 of the second horizontal line segment. Thereby, the signal that is originally transmitted from the top to the bottom through the second data line 14 to each pixel can be changed through the repair line 21, and sequentially passes through the first horizontal line segment 23, the vertical line segment 22 and the second horizontal line segment 24, It is uploaded to the respective pixels located below the data line open defect 30. In addition, in order to prevent the plurality of repair lines from interfering with each other, after the short-circuit repair is performed, it is preferable to perform the open-circuit patches 31 to 34 so that the repair line 21 used here is independent of the other repair lines.
請參閱第5圖，其係為本發明又一實施例之具修補線之畫素驅動電路結構之結構示意圖。圖中，當第二資料線14之線路中某處，發生資料線短路缺陷35，而導致第二資料線14與第二閘極線12互相導通時；可先於資料線短路缺陷35處的上下兩端進行開路修補程序36、37，使資料線短路缺陷35處與第二資料線14斷開，再利用短路修補程序來導通第二資料線14之一端與第一水平線段之第一端231，以及第二資料線14之另一端與第二水平線段之第一端241。藉此，修補線21可取代第二資料線14，將訊號由下而上傳送到位於資料線短路缺陷35處下方之各個畫素。 Please refer to FIG. 5, which is a structural diagram of a pixel driving circuit structure with a repaired line according to still another embodiment of the present invention. In the figure, when somewhere in the line of the second data line 14, the data line short defect 35 occurs, and the second data line 14 and the second gate line 12 are electrically connected to each other; the defect line 35 may be shorted before the data line The upper and lower ends perform open-circuit patches 36 and 37 to disconnect the data line short-circuit defect 35 from the second data line 14, and then use the short-circuit patch to turn on one end of the second data line 14 and the first end of the first horizontal line segment. 231, and the other end of the second data line 14 and the first end 241 of the second horizontal line segment. Thereby, the repairing line 21 can replace the second data line 14, and the signal is uploaded from below to each pixel located below the short-circuit defect 35 of the data line.
請參閱第6圖，其係為本發明再一實施例之具修補線之畫素驅動電路結構之結構示意圖。圖中，當第一閘極 線11發生閘極線開路缺陷38而導致驅動訊號無法順利傳遞時，本實施例可先於閘極線開路缺陷38處前後兩端，以一短路修補程序，將第一垂直線段221與第一閘極線11導通，並將第二垂直線段222與第一閘極線11導通。藉此，第一閘極線11之驅動訊號便可順利跳過閘極線開路缺陷38。當然，為了使此處之修補獨立於其他修補線，本實施例較佳可透過開路修補程序31~34，將閘極線開路缺陷38前後兩條修補線獨立出來。 Please refer to FIG. 6 , which is a structural diagram of a pixel driving circuit structure with a repaired line according to still another embodiment of the present invention. In the figure, when the first gate When the gate 11 has an open circuit defect 38 and the driving signal cannot be smoothly transmitted, the first and second ends of the first vertical line 221 and the first step can be used in the first and second ends of the open circuit defect 38 of the gate line. The gate line 11 is turned on, and the second vertical line segment 222 is electrically connected to the first gate line 11. Thereby, the driving signal of the first gate line 11 can smoothly skip the gate line open defect 38. Of course, in order to make the repair here independent of other repair lines, the present embodiment preferably separates the two repair lines before and after the gate open defect 38 through the open circuit patches 31-34.
最後，關於修補線的實際製程，第一閘極線與第二閘極線可位於一第一金屬層，而第一資料線與第二資料線可位於一第二金屬層，然後將修補線設在一第三金屬層。此外，亦可將修補線的垂直線段設在第二金屬層，而將第一水平線段與第二水平線段設在第一金屬層或第三金屬層。或是反過來將垂直線段設在第二金屬層，而將第一水平線段與第二水平線段設在第三金屬層或第一金屬層。更甚者，將第一閘極線與第二閘極線設於一第一金屬層，第一資料線與第二資料線設置於一第二金屬層，並將垂直線段設於一第三金屬層，而第一水平線段與該第二水平線段係設置於第一金屬層。當然，本實施例之薄膜電晶體依然以雙閘極薄膜電晶體為佳。 Finally, regarding the actual process of repairing the line, the first gate line and the second gate line may be located in a first metal layer, and the first data line and the second data line may be located in a second metal layer, and then the repair line is Set on a third metal layer. In addition, the vertical line segment of the repair line may be disposed on the second metal layer, and the first horizontal line segment and the second horizontal line segment may be disposed on the first metal layer or the third metal layer. Or, in turn, the vertical line segment is disposed on the second metal layer, and the first horizontal line segment and the second horizontal line segment are disposed on the third metal layer or the first metal layer. Moreover, the first gate line and the second gate line are disposed on a first metal layer, the first data line and the second data line are disposed on a second metal layer, and the vertical line segment is disposed in a third layer. a metal layer, and the first horizontal line segment and the second horizontal line segment are disposed on the first metal layer. Of course, the thin film transistor of the embodiment is still preferably a double gate thin film transistor.
以上所述僅為舉例性，而非為限制性者。任何未脫離本發明之精神與範疇，而對其進行之等效修改或變更，均應包含於後附之申請專利範圍中。 The above is intended to be illustrative only and not limiting. Any equivalent modifications or alterations to the spirit and scope of the invention are intended to be included in the scope of the appended claims.
10‧‧‧畫素驅動電路結構 10‧‧‧ pixel drive circuit structure
11‧‧‧第一閘極線 11‧‧‧First gate line
12‧‧‧第二閘極線 12‧‧‧second gate line
13‧‧‧第一資料線 13‧‧‧First data line
14‧‧‧第二資料線 14‧‧‧Second data line
15‧‧‧第一薄膜電晶體 15‧‧‧First film transistor
16‧‧‧第二薄膜電晶體 16‧‧‧Second thin film transistor
17‧‧‧第三薄膜電晶體 17‧‧‧ Third thin film transistor
18‧‧‧第四薄膜電晶體 18‧‧‧fourth thin film transistor
20‧‧‧具修補線之畫素驅動電路結構 20‧‧‧Piece line driver circuit structure
21‧‧‧修補線 21‧‧‧ repair line
22‧‧‧垂直線段 22‧‧‧ vertical line
221‧‧‧第一垂直線段 221‧‧‧first vertical line segment
222‧‧‧第二垂直線段 222‧‧‧second vertical line segment
23‧‧‧第一水平線段 23‧‧‧First horizontal line segment
231‧‧‧第一水平線段之第一端 231‧‧‧ First end of the first horizontal line
232‧‧‧第一水平線段之第二端 232‧‧‧The second end of the first horizontal line
24‧‧‧第二水平線段 24‧‧‧second horizontal line segment
241‧‧‧第二水平線段之第一端 241‧‧‧ the first end of the second horizontal line
242‧‧‧第二水平線段之第二端 242‧‧‧ second end of the second horizontal line
30‧‧‧資料線開路缺陷 30‧‧‧ data line open defect
31‧‧‧開路修補程序31 31‧‧‧Open Road Patch 31
32‧‧‧開路修補程序32 32‧‧‧Open Road Patch 32
33‧‧‧開路修補程序33 33‧‧‧Open Road Patch 33
34‧‧‧開路修補程序34 34‧‧‧Open Road Patch 34
35‧‧‧資料線短路缺陷 35‧‧‧ data line short circuit defect
36‧‧‧開路修補程序36 36‧‧‧Open Road Patch 36
37‧‧‧開路修補程序37 37‧‧‧Open circuit patch 37
38‧‧‧閘極線開路缺陷 38‧‧‧Bridge line open circuit defect
第1圖係為習知之畫素驅動電路結構之結構示意圖； 第2圖係為本發明之具修補線之畫素驅動電路結構之結構示意圖；第3圖係為本發明一實施例之具修補線之畫素驅動電路結構之結構示意圖；第4圖係為本發明另一實施例之具修補線之畫素驅動電路結構之結構示意圖；第5圖係為本發明又一實施例之具修補線之畫素驅動電路結構之結構示意圖；以及第6圖係為本發明再一實施例之具修補線之畫素驅動電路結構之結構示意圖。 Figure 1 is a schematic structural view of a conventional pixel driving circuit structure; 2 is a schematic structural view of a pixel driving circuit structure with a repaired line according to the present invention; FIG. 3 is a schematic structural view of a pixel driving circuit structure with a repaired line according to an embodiment of the present invention; FIG. 5 is a schematic structural diagram of a pixel driving circuit structure with a repaired line according to another embodiment of the present invention; and FIG. 6 is a structural diagram of a pixel driving circuit structure with a repaired line according to another embodiment of the present invention; A schematic structural diagram of a pixel drive circuit structure with a repaired line according to still another embodiment of the present invention.
11‧‧‧第一閘極線 11‧‧‧First gate line
12‧‧‧第二閘極線 12‧‧‧second gate line
13‧‧‧第一資料線 13‧‧‧First data line
14‧‧‧第二資料線 14‧‧‧Second data line
15‧‧‧第一薄膜電晶體 15‧‧‧First film transistor
16‧‧‧第二薄膜電晶體 16‧‧‧Second thin film transistor
17‧‧‧第三薄膜電晶體 17‧‧‧ Third thin film transistor
18‧‧‧第四薄膜電晶體 18‧‧‧fourth thin film transistor
20‧‧‧具修補線之畫素驅動電路結構 20‧‧‧Piece line driver circuit structure
21‧‧‧修補線 21‧‧‧ repair line
22‧‧‧垂直線段 22‧‧‧ vertical line
23‧‧‧第一水平線段 23‧‧‧First horizontal line segment
231‧‧‧第一水平線段之第一端 231‧‧‧ First end of the first horizontal line
24‧‧‧第二水平線段 24‧‧‧second horizontal line segment
241‧‧‧第二水平線段之第一端 241‧‧‧ the first end of the second horizontal line
Claims (8)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW97148809A TWI383229B (en) | 2008-12-15 | 2008-12-15 | Pixel driving circuit structure with repair line |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW97148809A TWI383229B (en) | 2008-12-15 | 2008-12-15 | Pixel driving circuit structure with repair line |
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| Publication Number | Publication Date |
|---|---|
| TW201022812A TW201022812A (en) | 2010-06-16 |
| TWI383229B true TWI383229B (en) | 2013-01-21 |
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| TW97148809A TWI383229B (en) | 2008-12-15 | 2008-12-15 | Pixel driving circuit structure with repair line |
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6111558A (en) * | 1997-05-30 | 2000-08-29 | Samsung Electronics Co., Ltd. | Liquid crystal displays including closed loop repair lines and methods of repairing same |
| TW490856B (en) * | 2001-03-27 | 2002-06-11 | Acer Display Tech Inc | Repairing method for data line of liquid crystal display |
| TW200416429A (en) * | 2003-02-18 | 2004-09-01 | Au Optronics Corp | Flat panel display with repairable defects for data lines and the repairing method |
| TW200622352A (en) * | 2004-12-22 | 2006-07-01 | Toppoly Optoelectronics Corp | Liquid crystal display and method for repairing the same |
| TWI282457B (en) * | 2000-04-06 | 2007-06-11 | Chi Mei Optoelectronics Corp | Liquid crystal display component with defect restore ability and restoring method of defect |
| US20080158127A1 (en) * | 2006-12-29 | 2008-07-03 | Innolux Display Corp. | Liquid crystal display panel having repair line |
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2008
- 2008-12-15 TW TW97148809A patent/TWI383229B/en active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6111558A (en) * | 1997-05-30 | 2000-08-29 | Samsung Electronics Co., Ltd. | Liquid crystal displays including closed loop repair lines and methods of repairing same |
| TWI282457B (en) * | 2000-04-06 | 2007-06-11 | Chi Mei Optoelectronics Corp | Liquid crystal display component with defect restore ability and restoring method of defect |
| TW490856B (en) * | 2001-03-27 | 2002-06-11 | Acer Display Tech Inc | Repairing method for data line of liquid crystal display |
| TW200416429A (en) * | 2003-02-18 | 2004-09-01 | Au Optronics Corp | Flat panel display with repairable defects for data lines and the repairing method |
| TW200622352A (en) * | 2004-12-22 | 2006-07-01 | Toppoly Optoelectronics Corp | Liquid crystal display and method for repairing the same |
| US20080158127A1 (en) * | 2006-12-29 | 2008-07-03 | Innolux Display Corp. | Liquid crystal display panel having repair line |
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| TW201022812A (en) | 2010-06-16 |
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