TWI380154B - Bandgap reference circuits - Google Patents
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/、、發明說明: 【發明所屬之技術領域】 本發明係有關於一種能隙(bandgap)參考電路,特別 疋有關於一種高壓且低靜止電流的能隙參考電路。 【先前技術】 電子電路,例如類比對數位轉換器、線性或切換電壓 穩壓器(regulator)等,通常需要使用到參考電壓來進行 壓’亦稱為能隙電壓。 正吊操作,其中參考電壓為不會受到溫度及供應電壓變化 衫響的-種穩電壓。—般而言’能隙參考電路為一種常 見的參考電路’其可提供與溫度及供應電壓無關之參考電 第1圖係顯示一種傳統之能隙參考電路100。能隙參考BACKGROUND OF THE INVENTION 1. Field of the Invention This invention relates to a bandgap reference circuit, and more particularly to a bandgap reference circuit for high voltage and low quiescent current. [Prior Art] Electronic circuits, such as analog-to-digital converters, linear or switching voltage regulators, etc., usually require the use of a reference voltage for voltage ‘also referred to as bandgap voltage. The hoisting operation, in which the reference voltage is a stable voltage that is not affected by temperature and supply voltage changes. As a general matter, the bandgap reference circuit is a common reference circuit which provides reference power independent of temperature and supply voltage. Figure 1 shows a conventional bandgap reference circuit 100. Energy gap reference
晶體Q3的基極對射極電壓(v (Vbe)有關。在第1圖中,電The base of crystal Q3 is related to the emitter voltage (v (Vbe). In Figure 1, the electricity
〜田〜a月類比電路需要一個穩定 大多數之高壓類比電路的能隙電壓容~ Tian ~ a month analog circuit needs a stable majority of the high voltage analog circuit's gap voltage capacity
之能隙電壓。然而, VISS004/0516-A41825twf 4 供應電壓的影響。因此’需要-種能提供高 用u及低靜止電流之能隙參考電路以供高壓類比電路使 【發明内容】 用以ίΓ:提供一種能隙參考電路,包括:-輸入節點, 接供應電壓;—輸出節點,用以提供-參考電壓; 第一電晶體,輕接於上述給·人 點之門η结輸即點以及上述輸出節 點之間,具有一第一控制端;一第—電 入節點以及上述第-㈣端之間;—第 、=輸 上述第一控制端,具有一第二 於 點;-第三電晶體 之間,具有-第三控制端一分壓=日曰=及一 f也端 根據上述第-電壓以及上差動放大f, 一信號至上述第三控制端。 、1壓差提供 狀再者’本發明提供另—種能隙參考電路,. 入即點’用以接收一供應電壓;0 别 參考電壓;一第一電日俨,^ 出即點,用以提供一 輪出節點之間,具:::極節點以及上述 入節點以及上述第—電晶 1,純於上述輪 極性接面電晶體,耦接於二之間;一第一 NPN型雙 基極嫩上述輸出節點曰體之閉極,具有-- NPN型雙極性接面電 —’ B日體,輕接於上述第 極;一分壓單元,根據上述一接地端之間’具有一閉 一第二電壓,·以及,—差動^考。電壓提供一第一㈣以及 VISS004/〇516-A41825twf 器根據上述第一電屢以Bandgap voltage. However, VISS004/0516-A41825twf 4 affects the supply voltage. Therefore, it is required to provide a high-capacity reference circuit for high-voltage u and low-quiescent current for high-voltage analog circuits. [Invention] For providing a gap reference circuit, including: - input node, supply voltage; - an output node for providing a - reference voltage; a first transistor, lightly connected to the gate of the above-mentioned human point, η junction, and the output node, having a first control terminal; Between the node and the above-mentioned (four) end; - the first control terminal has a second point; - the third transistor has a - third control terminal - a partial pressure = day = and A f is also amplified according to the first voltage and the upper differential, and a signal is sent to the third control terminal. 1, the pressure difference is provided again. 'The present invention provides another type of energy gap reference circuit, which is used to receive a supply voltage; 0 is a reference voltage; a first electric day, ^ is a point, with Providing a round out node, having a ::: pole node and the above-mentioned ingress node and the above-mentioned first-electrode crystal 1, pure to the above-mentioned wheel polarity junction transistor, coupled between two; a first NPN type double base Very close to the closed end of the output node body, having - NPN type bipolar junction electric - 'B day body, lightly connected to the above-mentioned first pole; one voltage dividing unit, according to the above one ground end 'has a closed A second voltage, ·, and - differential test. The voltage provides a first (four) and VISS004 / 〇 516-A41825twf device according to the above first
C 1380154 及上述第二電壓之間的一電壓差提供一信號至上述第二電 晶體之閘極,其中上述第一電晶體以及上述第二電晶體為 N型金氧半導體電蟲體,以及上述第一電晶體之崩潰電壓 係高於上述第二電晶體之崩潰電壓。 【實施方式】 為讓本發明之上述和其他目的、特徵、和優點能更明 顯易懂’下文特舉出較佳實施例,並配合所附圖式,作詳 細說明如下:a voltage difference between C 1380154 and the second voltage provides a signal to the gate of the second transistor, wherein the first transistor and the second transistor are N-type MOS semiconductor worms, and The breakdown voltage of the first transistor is higher than the breakdown voltage of the second transistor. The above and other objects, features and advantages of the present invention will become more <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt;
實施例: 對電源應用元件而言,雙極性(Bipolar)-互補金氧半 導體(Complementary Metal Oxide Semiconductor,CMOS) -雙擴散金屬氧化物半導體(Double diffused Metal OxideEmbodiments: Bipolar-Complementary Metal Oxide Semiconductor (CMOS) - Double diffused metal oxide semiconductor (Double diffused metal Oxide) for power application components
Semiconductor,DMOS )製程,亦簡稱為BCD製程,係一 種廣泛使用的半導體製程。藉由使用BCD製程,可同時在 一電路/元件内提供低壓金氧半導體電晶體、高壓金氧半導 籲# 體電晶體(DMOS)以及雙極性接面電晶體(bip〇larjuncti〇n transistor,BJT )( NPN 型及 pNp 型皆可)。BCD 製程的 優點之一是可使用高壓元件。此外,藉由BCD製程所提供 之NPN型雙極性接面電晶體,亦可達成好的元件匹配特 性’以便降低在差動放大器之輸入端上的偏移量。 第2圖係顯不根據本發明一實施例所述之能隙參考電 路200之方塊圖。能隙參考電路200可從輸入節點Nin接收 供應電壓VCC ’並於輸出郎點Nout提供參考電壓VREF。 能隙參考電路200包括電晶體μ 1、M2及Q1、電阻ri、 VISS004/0516-Α41825twf 6 1380154 ··The Semiconductor, DMOS process, also referred to as the BCD process, is a widely used semiconductor process. By using the BCD process, a low-voltage MOS transistor, a high-voltage MOS transistor, and a bipolar junction transistor (bip〇larjuncti〇n transistor) can be simultaneously provided in one circuit/element. BJT) (NPN type and pNp type are available). One of the advantages of the BCD process is the ability to use high voltage components. In addition, good component matching characteristics can be achieved by the NPN type bipolar junction transistor provided by the BCD process to reduce the offset at the input of the differential amplifier. Figure 2 is a block diagram showing a bandgap reference circuit 200 not according to an embodiment of the invention. The bandgap reference circuit 200 can receive the supply voltage VCC' from the input node Nin and provide the reference voltage VREF at the output point Nout. The bandgap reference circuit 200 includes transistors μ1, M2 and Q1, resistors ri, VISS004/0516-Α41825twf 6 1380154 ··
差動放大器210以及分壓單元220。分壓單元220包括三 電阻R2、R3及R4以及電晶體Q2。在此實施例中,電晶 體Ml及電晶體M2為N型金氧半導體電晶體。此外,電 晶體Q1為NPN型雙極性接面電晶體,而電晶體Q2為PNP 型雙極性接面電晶體。在能隙參考電路200内,電晶體Ml 係耦接於輸入節點Nin以及輸出節點Nout之間。電阻R1係 耦接於輸入節點Nin以及電晶體Ml的閘極之間。電晶體 Q1係耦接於電晶體Ml的閘極以及電晶體M2之間,其中 電晶體Q1的基極係耦接至輸出節點Ν_。電晶體M2係耦 接於電晶體Q1以及接地端GND之間,其中電晶體M2的 閘極係耦接至差動放大器210的輸出端。在分壓單元220 内,電阻R2係耦接於輸出節點Ν_以及電阻R3之間,而 電阻R4係耦接於電阻R3以及電晶體Q2之間,其中電晶 體Q2的基極係耦接至接地端GND。 參考第2圖,當電流流經分壓單元220時,分壓單元 220會產生參考電壓VREF、電壓VI以及電壓V2。此外, 跨在電阻R3上的電壓(即電壓VI與電壓V2之間的電壓 差)可藉由差動放大器210放大,以便產生信號AMPOUT 來控制電晶體M2,進而改變流過電晶體M2之電流的大 小。由於在電晶體M2上電流的改變,電阻R1上的跨壓亦 會隨著改變。電阻R1上跨壓的改變可調整電晶體Ml之閘 極對源極電壓,接著流經電晶體Ml的電流亦會跟著改變, 進而最後將參考電壓VREF穩壓於所想要的電壓值。值得 注意的是,電晶體Ml之崩潰電壓係高於電晶體M2以及差 動放大器210内電晶體之崩潰電壓。此外,雖然供應電壓 VISS004/0516-A41825twf 7 1380154 VCC會從低電壓位準改變至高電壓位準,然而藉由穩定電 晶體M2之汲極對源極電壓,電晶體Q1可對電晶體M2提 供保護。 第3圖係顯示根據本發明另一實施例所述之能隙參考 電路300之方塊圖。能隙參考電路300可從輸入節點Nin 接收供應電壓VCC,並於輸出節點Nout提供參考電壓 VREF。能隙參考電路300包括電晶體Ml、M2及Q1、電 阻IU、差動放大器310、分壓單元320以及啟動電路330。 差動放大器310包括電晶體M5-M8及Q3-Q6與電阻 R7-R9,其中電晶體M5及電晶體M6為P型金氧半導體電 晶體,而電晶體M7及電晶體M8為N型金氧半導體電晶 體,以及電晶體Q3-Q6為NPN型雙極性接面電晶體。如先 前所描述,分壓單元320包括三電阻R2、R3及R4以及電 晶體Q2。啟動電路330包括電阻R5和R6以及電晶體M3 和M4,其中電晶體M3和電晶體M4為N型金氧半導體電 晶體。值得注意的是,電晶體Ml之崩潰電壓係高於電晶 *· 體M2以及差動放大器310和啟動電路330内電晶體之崩 • 潰電壓。再者,電容C1係耦接於電晶體M2之閘極以及輸 出節點Nout之間。電容C1係作為補償,以便確認能隙參考 電路300為穩定狀態。 在啟始電路330中,電阻R6係耦接於電阻R5以及電 晶體M4之間。電晶體M4的閘極係耦接於電阻R5以及電 阻R6之間。電晶體M3係耦接於電晶體M2之閘極以及接 地端GND之間,其中電晶體M3之閘極係耦接於電阻R6 以及電晶體M4之間。在差動放大器310中,電阻R7、R8 VISS004/0516-A41825twf 8 9係分別轉接至輸出節點Nout。f晶體MM系輕接於電 至拉VI及電晶體⑽之間,其中電晶體M6之閘極係輕接 i端GND。電晶體M5係耦接於電阻R7以及電晶體 ]/'中電日日體M5之閘極係搞接至接地端gnd。 而外’曰電晶體Q6係賴接於電阻R9卩及接地端GND之間, 電曰曰體Q5係耦接於接地端GND以及一節點之間,其中 七述節點係位於電晶體q3和電晶體Q4之間。電晶體、Q3 柘耦接於上述節點以及電阻則之間,其中電晶體q3之基 =輪於電阻R3*電阻R4之間,並用以接收電壓v2。 :曰曰體Q4係耦接於上述節點以及電阻R7之間,其中電晶 體Q4之基極係耗接於電阻R2和電阻R3之間,並用以接 收電壓VI。 參考第3圖’首先,當供應電壓vcc從〇v開始爬升 時’能隙參考電路内的全部信號皆位於低電壓位準。 接著’電晶體M1的閘極會隨著供應電壓vcc而改變,因 此電晶體Ml之閘極對源極電壓會增加。當供應電壓獸 增加時’流經電晶體M1之電流亦會開始跟著增加,其中 上述電流會被供應至能隙參考電路3〇〇内耦接於電晶體The differential amplifier 210 and the voltage dividing unit 220. The voltage dividing unit 220 includes three resistors R2, R3, and R4 and a transistor Q2. In this embodiment, the electromorph M1 and the transistor M2 are N-type MOS transistors. Further, the transistor Q1 is an NPN type bipolar junction transistor, and the transistor Q2 is a PNP type bipolar junction transistor. In the band gap reference circuit 200, the transistor M1 is coupled between the input node Nin and the output node Nout. The resistor R1 is coupled between the input node Nin and the gate of the transistor M1. The transistor Q1 is coupled between the gate of the transistor M1 and the transistor M2, wherein the base of the transistor Q1 is coupled to the output node Ν_. The transistor M2 is coupled between the transistor Q1 and the ground GND, wherein the gate of the transistor M2 is coupled to the output of the differential amplifier 210. In the voltage dividing unit 220, the resistor R2 is coupled between the output node Ν_ and the resistor R3, and the resistor R4 is coupled between the resistor R3 and the transistor Q2, wherein the base of the transistor Q2 is coupled to Ground GND. Referring to Fig. 2, when a current flows through the voltage dividing unit 220, the voltage dividing unit 220 generates a reference voltage VREF, a voltage VI, and a voltage V2. In addition, the voltage across the resistor R3 (ie, the voltage difference between the voltage VI and the voltage V2) can be amplified by the differential amplifier 210 to generate a signal AMPOUT to control the transistor M2, thereby changing the current flowing through the transistor M2. the size of. Due to the change in current on transistor M2, the voltage across resistor R1 also changes. The change in the voltage across the resistor R1 adjusts the gate-to-source voltage of the transistor M1, and then the current flowing through the transistor M1 also changes, and finally the reference voltage VREF is regulated to the desired voltage value. It is worth noting that the breakdown voltage of the transistor M1 is higher than the breakdown voltage of the transistor M2 and the transistor in the differential amplifier 210. In addition, although the supply voltage VISS004/0516-A41825twf 7 1380154 VCC will change from the low voltage level to the high voltage level, the transistor Q1 can protect the transistor M2 by stabilizing the drain-to-source voltage of the transistor M2. . Figure 3 is a block diagram showing a bandgap reference circuit 300 in accordance with another embodiment of the present invention. The bandgap reference circuit 300 can receive the supply voltage VCC from the input node Nin and provide the reference voltage VREF at the output node Nout. The bandgap reference circuit 300 includes transistors M1, M2 and Q1, a resistor IU, a differential amplifier 310, a voltage dividing unit 320, and a starting circuit 330. The differential amplifier 310 includes transistors M5-M8 and Q3-Q6 and resistors R7-R9, wherein the transistor M5 and the transistor M6 are P-type MOS transistors, and the transistor M7 and the transistor M8 are N-type gold oxides. The semiconductor transistor, and the transistor Q3-Q6 are NPN type bipolar junction transistors. As described earlier, the voltage dividing unit 320 includes three resistors R2, R3, and R4 and a transistor Q2. The start-up circuit 330 includes resistors R5 and R6 and transistors M3 and M4, wherein the transistor M3 and the transistor M4 are N-type MOS transistors. It is worth noting that the breakdown voltage of the transistor M1 is higher than that of the transistor M2 and the breakdown voltage of the transistor in the differential amplifier 310 and the startup circuit 330. Furthermore, the capacitor C1 is coupled between the gate of the transistor M2 and the output node Nout. Capacitor C1 is used as a compensation to confirm that the bandgap reference circuit 300 is in a stable state. In the start circuit 330, the resistor R6 is coupled between the resistor R5 and the transistor M4. The gate of the transistor M4 is coupled between the resistor R5 and the resistor R6. The transistor M3 is coupled between the gate of the transistor M2 and the ground GND. The gate of the transistor M3 is coupled between the resistor R6 and the transistor M4. In the differential amplifier 310, the resistors R7, R8, VISS004/0516-A41825twf 8 9 are respectively transferred to the output node Nout. The f crystal MM is lightly connected between the pull-up VI and the transistor (10), wherein the gate of the transistor M6 is lightly connected to the i-side GND. The transistor M5 is coupled to the resistor R7 and the transistor [/], and the gate of the medium-voltage body M5 is connected to the ground terminal gnd. The external Q-system Q6 is connected between the resistor R9卩 and the ground GND, and the electric body Q5 is coupled between the ground GND and a node, wherein the seven nodes are located in the transistor q3 and the electricity. Between crystals Q4. The transistor, Q3 柘 is coupled between the node and the resistor, wherein the base of the transistor q3 is between the resistor R3* and the resistor R4, and is used to receive the voltage v2. The body Q4 is coupled between the node and the resistor R7. The base of the transistor Q4 is consumed between the resistor R2 and the resistor R3 and is used to receive the voltage VI. Referring to Figure 3, first, when the supply voltage vcc starts to climb from 〇v, all signals in the bandgap reference circuit are at a low voltage level. Then, the gate of the transistor M1 changes with the supply voltage vcc, so the gate-to-source voltage of the transistor M1 increases. When the supply voltage beast increases, the current flowing through the transistor M1 will also start to increase, and the above current will be supplied to the bandgap reference circuit 3〇〇 and coupled to the transistor.
Ml之王分支電路内。接著,當上述電流流經分壓單元 32二時’參考電壓VREF會開始攸升*電壓π和V2亦會 跟著產生。因此,電阻R3上的跨壓(即電壓νι和電壓 V2之間的電麗差)會跟著增加’並與參考電壓vref之上 升值成比例。 接著,電阻R3上的跨壓可改變差動放大器31〇内差動 對電晶體Q4和Q3之間電流的差異。在差動放大器31〇内, VISS004/0516-A41825twf Λ 1380154 電晶體Q3為電晶體Q4的N倍大,用以形成基極對射極電 壓差ΔνΒΕ,其為電晶體Q4之基極對射極電壓以及電晶體 Q3之基極對射極電壓之間的電壓差,其中流經電晶體^ 之電流係大於流經電晶體Q4之電流。當電阻r3之跨壓小 於基極對射極電壓差Δλ/βΕ時,基極對射極電壓差扯可 根據下列算式(1)而求得: AVBE=V,x\nN (工)Inside the branch circuit of Ml. Then, when the above current flows through the voltage dividing unit 32, the reference voltage VREF starts to rise. * The voltages π and V2 are also generated. Therefore, the voltage across the resistor R3 (i.e., the voltage difference between the voltage νι and the voltage V2) will increase by 'and be proportional to the rise above the reference voltage vref. Next, the voltage across the resistor R3 changes the difference in current between the differential amplifier 31 and the current between the transistors Q4 and Q3. In the differential amplifier 31〇, VISS004/0516-A41825twf Λ 1380154 transistor Q3 is N times larger than the transistor Q4 to form the base-to-emitter voltage difference ΔνΒΕ, which is the base-to-emitter of the transistor Q4. The voltage and the voltage difference between the base and emitter voltages of transistor Q3, wherein the current flowing through the transistor is greater than the current flowing through transistor Q4. When the voltage across the resistor r3 is less than the base-to-emitter voltage difference Δλ/βΕ, the base-to-emitter voltage difference can be obtained according to the following formula (1): AVBE=V, x\nN (工)
其中Vt為熱電壓(thermal voltage)。由於流經電晶體q3 之電流大於流經電晶體Q4之電流且電阻R7和電阻R8具 有相同的電阻值,電阻R8上的跨壓會大於電阻R7上的跨 麗。因此’流經電晶體M6之電流會小於流經電晶體 之電流,然後電晶體M8會將電晶體M2之閘極下拉,以便 將電晶體M2關閉。當沒有電流流經電晶體M2、電晶體 Q1以及電阻R1時’電晶體Μ1的閘極會隨著供應電壓vcc 持續增加。接著’參考電壓VREF會隨著供應電壓vcc增 加直到電阻R3上的跨壓稍微大於基極對射極電壓差 △Vbe ° 當電阻R3上的跨壓稍微大於基極對射極電麗差 時’流經電晶體Q4的電流會變的比流經電晶體q3的電流 還大。接著,電阻R7上的跨壓會大於電阻R8上的跨壓。 因此,流經電晶體M6的電流將會大於流經電晶體M5的電 流,然後電晶體M6會將電晶體M2之閘極上拉。接著,對 電晶體M2而言,閘極對源極電壓的增加將會得到更多的 電流,而電阻R1上的跨壓亦會隨著增加。電阻R1上跨壓 的增加意謂著電晶體Ml具有穩定之閘極對源極電壓,其 VISS004/0516-A41825twf 10 1380154 將使得流經電晶體Ml之電流變為穩定。當流經電晶體撾1 之電流沒有長時間的增加時,參考電壓VREF可根據下列 算式(2)而求得: vREF = vBEQ2+[3^yVxhiN ⑺ 其中VBEQ2為電晶體Q2之基極對射極電壓。基極對射極電 壓VBEQ2具有負溫度係數,而熱電壓Vt的倍數具有正溫度Where Vt is a thermal voltage. Since the current flowing through the transistor q3 is greater than the current flowing through the transistor Q4 and the resistor R7 and the resistor R8 have the same resistance value, the voltage across the resistor R8 will be greater than the cross-over at the resistor R7. Therefore, the current flowing through the transistor M6 will be less than the current flowing through the transistor, and then the transistor M8 will pull down the gate of the transistor M2 to turn off the transistor M2. When no current flows through the transistor M2, the transistor Q1, and the resistor R1, the gate of the transistor Μ1 continues to increase with the supply voltage vcc. Then 'the reference voltage VREF will increase with the supply voltage vcc until the voltage across the resistor R3 is slightly larger than the base-to-emitter voltage difference ΔVbe ° when the voltage across the resistor R3 is slightly larger than the base-to-electrode difference. The current flowing through the transistor Q4 becomes larger than the current flowing through the transistor q3. Then, the voltage across the resistor R7 will be greater than the voltage across the resistor R8. Therefore, the current flowing through the transistor M6 will be larger than the current flowing through the transistor M5, and then the transistor M6 will pull up the gate of the transistor M2. Next, for transistor M2, the increase in gate-to-source voltage will result in more current, and the voltage across resistor R1 will also increase. The increase in the voltage across the resistor R1 means that the transistor M1 has a stable gate-to-source voltage, and its VISS004/0516-A41825twf 10 1380154 will stabilize the current flowing through the transistor M1. When the current flowing through the transistor 1 does not increase for a long time, the reference voltage VREF can be obtained according to the following formula (2): vREF = vBEQ2+[3^yVxhiN (7) where VBEQ2 is the base-to-emitter of the transistor Q2. Voltage. The base-to-emitter voltage VBEQ2 has a negative temperature coefficient, and the multiple of the thermal voltage Vt has a positive temperature
係數。因此,算式(2)中參數之總和可使得能隙參考電路 300不會受到溫度及供應電壓影響。 在啟動狀態中,當參考電壓VREF小於傳統上導通之 雙極性接面電晶體的基極對射極電壓時,由於電晶體 之集極對射極電壓為低電壓,使得電晶體Q5之基極電流 會非常小。電晶體Q5之基極電流相同於流經電晶體q6及 電阻R9之電流。再者,由於電晶體q5是操作在飽和區, 因此電晶體Q5之集極電流會小於電晶體q6之集極電流。 相似地,電晶體Q3及電晶體Q4之集極對射極電壓亦為低 電壓’所以電晶體Q3及電晶體Q4皆操作在飽和區。此時, 由於差動放大器310為不工作,電晶體q3及電晶體q4 之間沒有電流差,因此電晶體M2的閘極將會被設定成任 意值。因為雜訊或元件不匹配的問題可能存在於能隙參考 電路300内’電晶體M2的閘極上的電壓可能會被拉高至 足以引進電流至電晶體M2内。因此,電阻ri上的跨壓會 增加,而流經電晶體Ml之電流會減少。如此,參考電壓 VREF將停止增加,並停留在低於想要電壓值之值。 當參考電壓VREF低於傳統上導通之雙極性接面電晶 VISS004/0516-A41825twf 1380154 體的基極對射極電壓時’啟動電路33〇會下拉電晶體M2 之閘極,以確保電流仍流經電晶體Ml。藉由將電晶體M2 關閉’電晶體Ml之閘極上的電壓會相等於供應電壓 VCC ’因而可提供電流至能隙參考電路300之全部分支 内。當參考電壓VREF達到傳統上導通之雙極性接面電晶 體的基極對射極電壓時,差動放大器31〇會開始工作,而 電晶體M3會被關閉。既然差動放大器31〇開始工作,則coefficient. Therefore, the sum of the parameters in equation (2) can cause the bandgap reference circuit 300 to be unaffected by temperature and supply voltage. In the startup state, when the reference voltage VREF is smaller than the base-to-emitter voltage of the conventionally turned-on bipolar junction transistor, the base of the transistor Q5 is caused by the collector-to-emitter voltage of the transistor being a low voltage. The current will be very small. The base current of transistor Q5 is the same as the current flowing through transistor q6 and resistor R9. Furthermore, since the transistor q5 is operated in the saturation region, the collector current of the transistor Q5 will be smaller than the collector current of the transistor q6. Similarly, the collector-to-emitter voltage of transistor Q3 and transistor Q4 is also low voltage' so that both transistor Q3 and transistor Q4 operate in the saturation region. At this time, since the differential amplifier 310 is inoperative, there is no current difference between the transistor q3 and the transistor q4, so the gate of the transistor M2 will be set to an arbitrary value. Since the problem of noise or component mismatch may exist in the bandgap reference circuit 300, the voltage on the gate of the transistor M2 may be pulled high enough to introduce current into the transistor M2. Therefore, the voltage across the resistor ri increases, and the current flowing through the transistor M1 decreases. Thus, the reference voltage VREF will stop increasing and stay below the desired voltage value. When the reference voltage VREF is lower than the base-to-emitter voltage of the conventionally turned-on bipolar junction transistor VISS004/0516-A41825twf 1380154 body, the start-up circuit 33〇 pulls down the gate of the transistor M2 to ensure that the current still flows. Via transistor Ml. The voltage on the gate of the transistor M1 by turning off the transistor M2 will be equal to the supply voltage VCC' so that current can be supplied to all branches of the bandgap reference circuit 300. When the reference voltage VREF reaches the base-to-emitter voltage of a conventionally turned-on bipolar junction transistor, the differential amplifier 31 will begin to operate and the transistor M3 will be turned off. Since the differential amplifier 31〇 starts to work,
參考電壓VREF會被穩定至上述算式⑵所得到之電壓值。 如先前所描述,對BCD製程而言,能隙參考電路為穩 定的電路。此外,能隙參考電路能提供高電壓以及低靜止 電流。再者,在各種電源供應電壓範圍内,能隙參考電路 能達到低參考電壓變並且具有低靜止電流。 本發明雖以較佳實施例揭露如上,然其並非用以 本發明的範® ’純熟習此項技藝者,在不脫離本 精神和範圍内’當可做些許的更動與潤飾,因此抑明: 保護範圍當視後附之申請專利範圍所界定者 x之 【圖式簡單說明】 平。 第1圖係顯示一種傳統之能隙參考電路;The reference voltage VREF is stabilized to the voltage value obtained by the above formula (2). As previously described, for a BCD process, the bandgap reference circuit is a stable circuit. In addition, the bandgap reference circuit provides high voltage and low quiescent current. Furthermore, the bandgap reference circuit can achieve low reference voltage variations and low quiescent current over a wide range of supply voltages. The present invention has been disclosed in the above preferred embodiments, but it is not intended to be used by those skilled in the art, and it is possible to make a few changes and refinements without departing from the spirit and scope of the present invention. : The scope of protection is defined as the “simplified description of the figure” defined by the scope of the patent application attached. Figure 1 shows a conventional bandgap reference circuit;
第2圖係顯示根據本發明—實施例所述之能 路之方塊圖;以及 〜考 施例所述之能隙參考 第3圖係顯示根據本發明另一實 電路之方塊圖。 【主要元件符號說明】 100、200、300〜能隙參考電路; 210、310〜差動放大器; VISS004/0516-A41825twf 12 1380154 220、320〜分壓單元; 330〜啟動電路; AMP OUT〜信號; C1〜電容; GND〜接地端; M1-M8、Q1-Q6〜電晶體; Nin〜輸入節點; N—〜輸出節點;2 is a block diagram showing an energy path according to the present invention - an embodiment; and a band gap reference described in the embodiment of the present invention. FIG. 3 is a block diagram showing another practical circuit according to the present invention. [Main component symbol description] 100, 200, 300 ~ band gap reference circuit; 210, 310 ~ differential amplifier; VISS004/0516-A41825twf 12 1380154 220, 320 ~ voltage dividing unit; 330 ~ start circuit; AMP OUT ~ signal; C1~capacitor; GND~ground; M1-M8, Q1-Q6~ transistor; Nin~ input node; N-~ output node;
R1-R9〜電阻; VCC〜供應電壓;以及 VREF〜參考電壓。 VISS004/0516-A41825twf 13R1-R9~ resistance; VCC~ supply voltage; and VREF~ reference voltage. VISS004/0516-A41825twf 13
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