TWI372588B - Method for fabricating a package substrate with a cavity - Google Patents
Method for fabricating a package substrate with a cavityInfo
- Publication number
- TWI372588B TWI372588B TW098103378A TW98103378A TWI372588B TW I372588 B TWI372588 B TW I372588B TW 098103378 A TW098103378 A TW 098103378A TW 98103378 A TW98103378 A TW 98103378A TW I372588 B TWI372588 B TW I372588B
- Authority
- TW
- Taiwan
- Prior art keywords
- fabricating
- cavity
- package substrate
- package
- substrate
- Prior art date
Links
- 239000000758 substrate Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW098103378A TWI372588B (en) | 2009-02-03 | 2009-02-03 | Method for fabricating a package substrate with a cavity |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW098103378A TWI372588B (en) | 2009-02-03 | 2009-02-03 | Method for fabricating a package substrate with a cavity |
Publications (2)
Publication Number | Publication Date |
---|---|
TW201031300A TW201031300A (en) | 2010-08-16 |
TWI372588B true TWI372588B (en) | 2012-09-11 |
Family
ID=44854448
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW098103378A TWI372588B (en) | 2009-02-03 | 2009-02-03 | Method for fabricating a package substrate with a cavity |
Country Status (1)
Country | Link |
---|---|
TW (1) | TWI372588B (en) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2012053728A1 (en) | 2010-10-20 | 2012-04-26 | Lg Innotek Co., Ltd. | Printed circuit board and method for manufacturing the same |
CN109587974A (en) * | 2017-09-28 | 2019-04-05 | 宏启胜精密电子(秦皇岛)有限公司 | The manufacturing method of flexible circuit board and the flexible circuit board |
TWI661759B (en) * | 2018-07-19 | 2019-06-01 | 欣興電子股份有限公司 | Substrate structure and manufacturing method thereof |
CN117747436A (en) * | 2022-09-15 | 2024-03-22 | 鹏鼎控股(深圳)股份有限公司 | Package substrate structure and method for manufacturing the same |
-
2009
- 2009-02-03 TW TW098103378A patent/TWI372588B/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
TW201031300A (en) | 2010-08-16 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |