TWI368293B - Method for fabricating a deep trench in a substrate - Google Patents
Method for fabricating a deep trench in a substrateInfo
- Publication number
- TWI368293B TWI368293B TW096144097A TW96144097A TWI368293B TW I368293 B TWI368293 B TW I368293B TW 096144097 A TW096144097 A TW 096144097A TW 96144097 A TW96144097 A TW 96144097A TW I368293 B TWI368293 B TW I368293B
- Authority
- TW
- Taiwan
- Prior art keywords
- fabricating
- substrate
- deep trench
- trench
- deep
- Prior art date
Links
- 239000000758 substrate Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
- H01L21/3083—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/3086—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/66181—Conductor-insulator-semiconductor capacitors, e.g. trench capacitors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/03—Making the capacitor or connections thereto
- H10B12/038—Making the capacitor or connections thereto the capacitor being in a trench in the substrate
- H10B12/0387—Making the trench
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Element Separation (AREA)
- Semiconductor Memories (AREA)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW096144097A TWI368293B (en) | 2007-11-21 | 2007-11-21 | Method for fabricating a deep trench in a substrate |
US12/035,443 US7666792B2 (en) | 2007-11-21 | 2008-02-22 | Method for fabricating a deep trench in a substrate |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW096144097A TWI368293B (en) | 2007-11-21 | 2007-11-21 | Method for fabricating a deep trench in a substrate |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200924108A TW200924108A (en) | 2009-06-01 |
TWI368293B true TWI368293B (en) | 2012-07-11 |
Family
ID=40642426
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW096144097A TWI368293B (en) | 2007-11-21 | 2007-11-21 | Method for fabricating a deep trench in a substrate |
Country Status (2)
Country | Link |
---|---|
US (1) | US7666792B2 (zh) |
TW (1) | TWI368293B (zh) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8860183B2 (en) | 2009-06-10 | 2014-10-14 | Seoul Viosys Co., Ltd. | Semiconductor substrate, semiconductor device, and manufacturing methods thereof |
US8481411B2 (en) * | 2009-06-10 | 2013-07-09 | Seoul Opto Device Co., Ltd. | Method of manufacturing a semiconductor substrate having a cavity |
JP5847083B2 (ja) | 2009-08-26 | 2016-01-20 | ソウル バイオシス カンパニー リミテッドSeoul Viosys Co.,Ltd. | 発光素子の製造方法 |
JP5570838B2 (ja) * | 2010-02-10 | 2014-08-13 | ソウル バイオシス カンパニー リミテッド | 半導体基板、その製造方法、半導体デバイス及びその製造方法 |
CN117293156B (zh) * | 2023-11-27 | 2024-02-20 | 合肥晶合集成电路股份有限公司 | 深沟槽的制备方法及图像传感器 |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6544855B1 (en) * | 2001-10-19 | 2003-04-08 | Infineon Technologies Ag | Process flow for sacrificial collar with polysilicon void |
-
2007
- 2007-11-21 TW TW096144097A patent/TWI368293B/zh active
-
2008
- 2008-02-22 US US12/035,443 patent/US7666792B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US20090130853A1 (en) | 2009-05-21 |
TW200924108A (en) | 2009-06-01 |
US7666792B2 (en) | 2010-02-23 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TWI365483B (en) | Method for forming a via in a substrate | |
PL2144296T3 (pl) | Sposób wytwarzania warstwy półprzewodnikowej | |
EP2036586A4 (en) | METHOD FOR PRODUCING A MICRONADEL | |
EP2274771A4 (en) | METHOD FOR MANUFACTURING THIN FILMS | |
TWI370516B (en) | Semiconductor device manufacturing method | |
EP1986218A4 (en) | METHOD FOR MANUFACTURING SOIL SUBSTRATE | |
SG136931A1 (en) | Method for producing a polished semiconductor | |
EP2149898A4 (en) | METHOD OF MANUFACTURING SOI PLATELETS | |
EP2190026A4 (en) | METHOD FOR PRODUCING PHOTOVOLTAIC ARRAYS | |
TWI366892B (en) | Method for fabricating semiconductor device | |
EP2171524A4 (en) | METHOD FOR PRODUCING GLASSES | |
EP1983553A4 (en) | METHOD FOR PRODUCING AN SOI SUBSTRATE | |
GB2455054B (en) | Method of manufacturing a finfet | |
EP2352164A4 (en) | SOI SUBSTRATE METHOD | |
EP2159826A4 (en) | PROCESS FOR PRODUCING SOI WAFERS | |
TWI348203B (en) | Method for fabricating a integrated circuit | |
EP2216803A4 (en) | METHOD FOR PRODUCING A COATED SUBSTRATE | |
SI2000316T1 (sl) | Postopek za izdelavo nosilca in nosilec | |
TWI368293B (en) | Method for fabricating a deep trench in a substrate | |
GB0724491D0 (en) | A method | |
EP2123477A4 (en) | METHOD OF GENERATING A MOSAIC | |
EP2122677A4 (en) | Trench Forming in a Semiconductor Material | |
TWI340413B (en) | Method for forming a semiconductor structure | |
TWI369586B (en) | Method for manufacturing a semiconductor device | |
GB0708381D0 (en) | Method for forming a semiconductor structure |