TWI368152B - Dynamic redundancy checker against fault injection - Google Patents

Dynamic redundancy checker against fault injection

Info

Publication number
TWI368152B
TWI368152B TW096125462A TW96125462A TWI368152B TW I368152 B TWI368152 B TW I368152B TW 096125462 A TW096125462 A TW 096125462A TW 96125462 A TW96125462 A TW 96125462A TW I368152 B TWI368152 B TW I368152B
Authority
TW
Taiwan
Prior art keywords
fault injection
dynamic redundancy
against fault
redundancy checker
checker against
Prior art date
Application number
TW096125462A
Other languages
Chinese (zh)
Other versions
TW200817966A (en
Inventor
Majid Kaabouch
Yves Fusella
Laurent Paris
Original Assignee
Inside Contactless S A
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Inside Contactless S A filed Critical Inside Contactless S A
Publication of TW200817966A publication Critical patent/TW200817966A/en
Application granted granted Critical
Publication of TWI368152B publication Critical patent/TWI368152B/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/50Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
    • G06F21/52Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems during program execution, e.g. stack integrity ; Preventing unwanted data erasure; Buffer overflow
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C2029/0409Online test

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Quality & Reliability (AREA)
  • Computer Hardware Design (AREA)
  • Storage Device Security (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
TW096125462A 2006-07-12 2007-07-12 Dynamic redundancy checker against fault injection TWI368152B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/486,232 US7774587B2 (en) 2006-07-12 2006-07-12 Dynamic redundancy checker against fault injection

Publications (2)

Publication Number Publication Date
TW200817966A TW200817966A (en) 2008-04-16
TWI368152B true TWI368152B (en) 2012-07-11

Family

ID=38924071

Family Applications (1)

Application Number Title Priority Date Filing Date
TW096125462A TWI368152B (en) 2006-07-12 2007-07-12 Dynamic redundancy checker against fault injection

Country Status (3)

Country Link
US (1) US7774587B2 (en)
TW (1) TWI368152B (en)
WO (1) WO2008008736A2 (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7774587B2 (en) 2006-07-12 2010-08-10 Atmel Corporation Dynamic redundancy checker against fault injection
WO2008053723A1 (en) * 2006-11-02 2008-05-08 Nec Corporation Semiconductor integrated circuit and method for detecting fault in operation unit
US8261130B2 (en) * 2007-03-02 2012-09-04 Infineon Technologies Ag Program code trace signature
US7904686B2 (en) * 2007-07-30 2011-03-08 Hewlett-Packard Development Company, L.P. Data security for use with a file system
US8006095B2 (en) * 2007-08-31 2011-08-23 Standard Microsystems Corporation Configurable signature for authenticating data or program code
CN107430533B (en) * 2015-09-30 2019-11-29 华为技术有限公司 A kind of data verification method and device
CN114392682B (en) * 2021-12-02 2023-01-13 崴思新材料泰州有限公司 Full-automatic glue preparation hybrid system

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5251304A (en) * 1990-09-28 1993-10-05 Motorola, Inc. Integrated circuit microcontroller with on-chip memory and external bus interface and programmable mechanism for securing the contents of on-chip memory
US5261058A (en) * 1990-11-09 1993-11-09 Conner Peripherals, Inc. Multiple microcontroller hard disk drive control architecture
WO1993010498A1 (en) * 1991-11-12 1993-05-27 Microchip Technology Inc. Security for on-chip microcontroller memory
US5860099A (en) * 1993-05-12 1999-01-12 Usar Systems, Inc. Stored program system with protected memory and secure signature extraction
US6247151B1 (en) * 1998-06-30 2001-06-12 Intel Corporation Method and apparatus for verifying that data stored in a memory has not been corrupted
US6505279B1 (en) * 1998-08-14 2003-01-07 Silicon Storage Technology, Inc. Microcontroller system having security circuitry to selectively lock portions of a program memory address space
US6981176B2 (en) * 1999-05-10 2005-12-27 Delphi Technologies, Inc. Secured microcontroller architecture
JP3606788B2 (en) * 2000-05-31 2005-01-05 松下電器産業株式会社 Semiconductor integrated circuit and inspection method for semiconductor integrated circuit
US6591385B1 (en) * 2000-09-11 2003-07-08 Agilent Technologies, Inc. Method and apparatus for inserting programmable latency between address and data information in a memory tester
US7774587B2 (en) 2006-07-12 2010-08-10 Atmel Corporation Dynamic redundancy checker against fault injection

Also Published As

Publication number Publication date
US7774587B2 (en) 2010-08-10
US20080034264A1 (en) 2008-02-07
WO2008008736A3 (en) 2008-11-06
TW200817966A (en) 2008-04-16
WO2008008736A2 (en) 2008-01-17

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees