1357292 九、發明說明： 【發明所屬之技術領域】 本發明係關於一種多層電路板結構及製造方法，特別是關於 一種具有内埋元件的多層電路板結構及製造方法。 【先前技術】 單一可攜式電子產品上運用了愈來愈多的被動元件》早期被 動元件以晶片型分離式元件p)iscrete Components)為發展重心。不 過，由於這一類的元件仍有其發展限制，例如元件的切割及相關 表面黏著設備之搭配，致像内埋元件電路板技術(Embedded Passive orIntergral Substrates)逐漸受到青睞。 内埋元件電路板技術能提高被動元件效能、.減少被動元件數 量，並且降低被動元件佔用的電路板面積。因此，利用内埋元件 電路板技術的構裝整合，可以用來取代傳統分離式被動元件，例 如電容器、電阻及電感等，其優點為減少分離式被動元件的使用 數量，進而降低產品的相關製作與檢測成本，減少被動元件的 點數目，提高產品構裝密度與可靠度等。 在内埋元件電路板技術中，為了增加佈線面積，多層電路板 用上了更多的導電層及埋設被動元件用的孔洞，例如導孔(via)、 埋孔(Buried vias)或盲孔(Blind vias)等。導孔通常打穿整個多層電 路板，因此可能會浪費一些導電層的線路空間。埋孔和盲孔技術 可以避免這個問題，因為它們只穿透其中幾個導電層。 圖1顯示一習知的多層電路板1〇〇,其包括一絕緣基板1〇2、 一個圖案化的内層線路1〇4及106、二圖案化的外層線路及 110,以及一内埋的被動元件112。製造多層電路板的流程係先製 作内層線路104及1〇6於絕緣基板1〇2上，此步驟包括前處理， 6 I357292 上光阻劑、曝光、顯影、侧及去光阻等細部程序，接著使用機 械或雷射鑽孔挖出-埋孔(未標號)貫穿二内層_ 1〇4及ι〇6及 絕緣基板102。然後’將被動元件112埋入埋孔中將 樹脂114及116壓合於二内層線路1〇4及1〇6及被動元件ιΐ2上。 接著，將兩外層線路108及110壓合於二絕緣樹脂ιΐ4及Μ上， 並使用機械或雷射鑽孔以導通内層線路1〇4及1〇6與外層線路ι〇8 及110之間或被動元件U2與外層線路1〇8之間。1357292 IX. Description of the Invention: [Technical Field] The present invention relates to a multilayer circuit board structure and a manufacturing method thereof, and more particularly to a multilayer circuit board structure and a manufacturing method having embedded components. [Prior Art] More and more passive components are used in a single portable electronic product. The early passive components are focused on the wafer-type discrete components p) iscrete Components. However, due to the development limitations of such components, such as the cutting of components and the matching of surface bonding equipment, the Embedded Passive or Intergral Substrates are gradually favored. Buried component board technology improves passive component performance, reduces passive component count, and reduces board area occupied by passive components. Therefore, the integration of the embedded component circuit board technology can be used to replace the traditional discrete passive components, such as capacitors, resistors and inductors, which have the advantages of reducing the number of separate passive components and reducing the related production of the products. And detection costs, reduce the number of points of passive components, improve product density and reliability. In the embedded component board technology, in order to increase the wiring area, the multilayer circuit board uses more conductive layers and holes for embedding passive components, such as vias, buried vias, or blind vias ( Blind vias) and so on. The via holes usually penetrate the entire multilayer circuit board, so some wiring space of the conductive layer may be wasted. Buried and blind via techniques can avoid this problem because they only penetrate several of the conductive layers. 1 shows a conventional multilayer circuit board 1A including an insulating substrate 1 〇 2, a patterned inner layer line 1 〇 4 and 106, two patterned outer layer lines and 110, and a buried passive Element 112. The process for manufacturing the multilayer circuit board is to first fabricate the inner layer lines 104 and 1 to the insulating substrate 1〇2. This step includes pre-processing, 6 I357292 photoresist, exposure, development, side and photoresist removal, etc. Subsequent mechanical or laser drilling is used to dig out - buried holes (not labeled) through the inner layers _ 1 〇 4 and ι 6 and the insulating substrate 102. Then, the passive component 112 is buried in the buried via to press the resistors 114 and 116 onto the two inner layers 1〇4 and 1〇6 and the passive component ι2. Next, the two outer layers 108 and 110 are pressed onto the two insulating resin ι 4 and the crucible, and mechanical or laser drilling is used to conduct the inner wiring lines 1 〇 4 and 1 〇 6 and the outer wiring lines ι 8 and 110 or Passive element U2 is between the outer layer line 1 and 8.
然而，圖1的埋孔貫穿了二個内廣線路1〇4及1〇6而犧牲了 部分的佈線面積。對於目前高密度的佈線需求，上勒埋元 路板技術仍有改良空間》 【發明内容】 芦2發目的在於提供—種多層電路板結構及製造方法以改 件電路板技術’其可增加更多的佈線面積或接地面積，或 更咼讼度的佈線，並改善内埋元件的散熱及防電磁干擾效果。 發:其他目的和優點可以從本發明、所揭露的技術特徵中 传到進一步的了解。 s ▲為達上述之一或部份或全部目的或是其他目的，本發明之一實 施態樣的多層電路板製造方法，包括提供—絕緣基板，其具有一上 表面及-下表面彼此相對m導電層於絕緣之上表 =，形成-第二導電層於絕緣基板之下表面；圖案化第一導電層及 第二導電層，以曝露絕緣基板之部分上表面或下表面；形成一凹穴 =絕緣基板之上表面之裸露部分，但未貫穿絕緣基板與第二導電 層；以及埋設一電子元件於凹穴中。 ,上述形成凹穴之步驟包括以雷射鑽孔技術或以機械鑽孔技術 ^成凹穴。另外，在埋設電子元件之前，可填充一黏著膠於凹穴之 ^面。較佳地，於凹穴之孔壁及底面鍍上一金屬層，並切割金屬層 "、複數個次金屬層’並使複數個次金屬層彼此電性隔離。 上述實施態樣可更進一步包括，形成一通孔於凹穴之一側，藉 1357292 導ίί:?電層電性連接於第二導電層;形成-第-介電層於 .ΐ第一第二介電層於第二導電層之上;形成 電層之步桃括以雙面電 當-ίίϊ之""實施態樣係提供多層電路板，包括—絕緣基板、-有-上矣:、—第二導電層、—金屬層及—電子元件。絕緣基板且 :;ΐί::::ί面t對於上表面及一凹穴，凹穴具有-底面凹 a板之上# 下表面不共平面。第—導電層覆蓋於絕緣 H電層覆蓋於位於絕緣基板之下表面，並與第 二導Ui連接。金屬層鋪設於凹穴之壁面。電子元件設於敎 中，並且被金屬層所包圍。 其較佳實施方式如下。金屬層電性連接於電子元件。子 ，為J主動元件’主動元件具有一接觸塾位於一主動表面上，主 表面係藉由接觸塾接觸第—導電層。電子元件亦可為-被動元件。 ^以機，鑽孔’則凹穴之孔徑係為3〜5mm。若以雷射鑽孔，則凹 穴之孔徑係為70〜100卿。第一導電層、第二導電層及金屬層 了銅層:金屬層包括複數個電性隔離的次金屬層以供電性連接電.子 兀件的複數個電極。另外，絕緣基板更包括一通孔 >電性連接於第二導電層。 乐导電層 【實施方式】 有關本發明之前述及其他技術内容、特點與功效，在以下配合 參考圖式之一較佳實施例的詳細說明中，將可清楚的呈現。以下^ ，例中所提到的方向用語，例如：上、下、左、右、前或後等，僅 是參考附加圖式的方向。因此，使用的方向用語是用來說 來限制本發明。 圖2的多層電路板2〇〇，包括一絕緣基板2〇2、一第一導電層 204、一第二導電層2〇6、一第三導電層2〇8、—第四導電層21〇二 一第一絕緣膠層212、一第二絕緣膠層214及一電子元件2"16。絕 緣基板202具有一上表面201、一與上表面2〇1相對的下表面2〇3 1357292 及一凹穴205。凹穴205凹陷於上表面2〇1以形成一底面207，凹 穴205之底面207與絕緣基板202之下表面203不共平面。 第一導電層204覆蓋於絕緣基也202之上表面20b第二導電 層206覆蓋於絕緣基板202之下表面203，並與第一導電層204電 性連接。電子元件216埋設於凹穴205中。第一絕緣膠層212被壓 合於第一導電層204之上，同時覆蓋住電子元件216 ^第二絕緣膠 層214被麗合於第二導電層206之上。第三導電層208與第一絕緣 膠層212黏著在一起’並與電子元件216電性連接。第四導電層 210則與第二絕緣膠層214黏筆在一起。上述絕緣膠層2丨2及214 可以其他具有黏著性的介電屠取代^ -® 上述乡層電路板的製造方法包招ί，義:供絕緣基板202 ;形 成第一導電層204於絕緣基板202之上表面201 ;形成第二導電層 206於絕緣基板202之下表面203 ;圖案化第一導電層204及第二 導電層206’以曝露絕緣基板202之部分上表面201或下表面203 ; 形成凹穴205於絕緣基板202之上表面201之裸露部分，但未貫穿 絕緣基板202與第二導電層206;以及埋設電子元件216於凹穴205 中。 凹穴205又稱為盲孔，可以用雷射鑽孔技術或以機械鑽孔技術 來製作。另外，在埋設電子元件216之前，可填充一層黏著膠218 φ 於凹穴216之底面2〇7。 上述方法可更進一步包括，形成一通孔220於凹穴205之一 側’藉由通孔220使第一導電層204電性連接於第二導電層206， 例如利用通孔電鑛(laser via plating);形成第一絕緣膠層212或介電 層於第一導電層204之上，以及形成第二絕緣膠層214或介電層於 第二導電層206之上；形成第三導電層208於第一絕緣膠層212之 上，以及形成第四導電層210於第二絕緣膠層214之上。特別地， 第三導電層208及第四導電層210可以用雙面電鍍技術同時形成。 圖3之多層電路板300大致具有與圖2相同之結構，但更包括 一金屬層302鋪設於凹六205之壁面。電子元件216設於凹穴205 中，並且被金屬層302所包圍以增加散熱及防電磁干擾效果，並增 9 1357292 大接地面積。電子元件216具有一主動表面217電性連接至第三導 電層208。 圖3之多層電路板製造方法，係在埋設電立元件216之前，或 是與形成第一導電層204之同時，形成金肩層3P2於凹穴205之壁 面及底面207上。金屬晷302可利用肓孔電錄技術製难y … 圖4 '多層電路板4QQ亦具備圖，2；冬基喪、㈣冓。與‘5¾比較、， 其金屬層402亦鋪設於凹穴205.之璧学Γ”且律享元件404設於凹穴 205 +，並且被金屬層402戶是苞圍1但與_ 3~不同的是，金屬層402 被分成複數個電g隔離的次各屬層402a A^02b以‘電性連接電子 元#406的複數個電極4Q6.及408。 本實施例之多層電路板400.製造方法，係於凹:穴205之孔壁及 底面2〇1鍍上佘屬層4〇2，,並切科金蜃層.4〇24.複鼓爽次金屬層 4〇2a及4〇2b.，並後複數，次金屬層4〇2a及4〇2b.妹此電性隔離。 如圖4所示，次金羼層4〇2a及4〇2b分别電:性镇蒸至第三導電界 208。 、 r a； • - · · .... ~ 在上述所有實施例中，.電子元件216.或.404%可辱:一主動元件， 例如：積體電路晶片（IC chip)。主為元件具有一接觸墊219位於主 動奏面221上’主動表面221係藉由接觸墊2丨9與導電層2〇8 ^性 連接。電子元件216或404亦可為一被動元件，例如1容、電感， 濾波器。若以機械鑽孔’則凹穴205之孔徑係為3〜5mm。若以雷 射鑽孔，則凹穴205之孔徑係為70〜lOOern。第一導電層2〇4、第 二導電層206、第三導電層208、第四導電層21〇及金屬-4'0·2皆可為銅層。 ^ 上述絕緣基板202之材料可為玻纖布、絕緣紙等如上含其樹 脂，例如：環氧樹脂、酚路樹脂、聚亞醯胺樹脂等。絕緣基 經裁片後再於單面或雙面附加銅箔，經過熱壓成型後，稱為鋼产 基板》 '白 完成電路製程後的多層電路板外層，再塗佈防焊油累、 免焊接電子元件時，銲錫溢流至相鄰線路造成短路，此$為严= 1357292 基被和空氣t的水氣及氧化作用，塗佈完防谭油秦後的電路板， -. 再作表面抗氧化處理，以加層抗氧化能力。 一綜上所述’本.發明之多.層電路板結構及製造方法可以改良内埋 兀件獅板_，增加更麵料商或接地赫，滅n蜜度钕 佈痒，並改善内埋元梦蚱散熱及:防電‘擾果卷::厂一： 厂缉以％_'，:轉辟明^However, the buried via of Fig. 1 penetrates the two inner wide lines 1〇4 and 1〇6 and sacrifices part of the wiring area. For the current high-density wiring requirements, there is still room for improvement in the technology of the Shanglu Buyuan board. [Inventive content] The purpose of the Lu 2 is to provide a multilayer circuit board structure and manufacturing method to modify the board technology. More wiring area or grounding area, or more reasonable wiring, and improve the heat dissipation and anti-electromagnetic interference effects of embedded components. The other objects and advantages can be further understood from the present invention and the disclosed technical features. s ▲ A method for manufacturing a multilayer circuit board according to an embodiment of the present invention, which comprises one or a part or all of the above or other objects, comprising providing an insulating substrate having an upper surface and a lower surface opposite to each other The conductive layer is on the insulation surface =, forming a second conductive layer on the lower surface of the insulating substrate; patterning the first conductive layer and the second conductive layer to expose a portion of the upper surface or the lower surface of the insulating substrate; forming a recess = bare portion of the upper surface of the insulating substrate, but not through the insulating substrate and the second conductive layer; and embedding an electronic component in the recess. The step of forming the recess includes forming a recess by a laser drilling technique or by a mechanical drilling technique. In addition, an adhesive can be filled on the face of the recess before embedding the electronic component. Preferably, a metal layer is plated on the hole wall and the bottom surface of the cavity, and the metal layer ", the plurality of secondary metal layers' is cut and the plurality of secondary metal layers are electrically isolated from each other. The embodiment may further include: forming a through hole on one side of the recess, electrically connecting the second conductive layer by a 1357292 conductive layer; forming a first-dielectric layer in the first and second layers The dielectric layer is on the second conductive layer; the step of forming the electric layer is to provide a multi-layer circuit board, including an insulating substrate, a --on-board: - a second conductive layer, a metal layer and - an electronic component. Insulating substrate and :; ΐί:::: ί face t for the upper surface and a recess, the recess has - the bottom surface is concave a plate above # lower surface is not coplanar. The first conductive layer covers the insulating H dielectric layer over the lower surface of the insulating substrate and is connected to the second conductive guide Ui. The metal layer is laid on the wall of the pocket. The electronic components are placed in 敎 and surrounded by a metal layer. The preferred embodiment thereof is as follows. The metal layer is electrically connected to the electronic component. The active component of the J active device has a contact pad on an active surface, and the main surface contacts the first conductive layer by the contact pad. The electronic component can also be a passive component. ^ Machine, drilled', the hole diameter of the recess is 3~5mm. If drilling with a laser, the aperture of the recess is 70 to 100 sec. The first conductive layer, the second conductive layer and the metal layer have a copper layer: the metal layer comprises a plurality of electrically isolated sub-metal layers for electrically connecting the plurality of electrodes of the electrical component. In addition, the insulating substrate further includes a through hole > electrically connected to the second conductive layer. The present invention and other technical contents, features and effects of the present invention will be apparent from the following detailed description of the preferred embodiments. The following directional terms, such as: up, down, left, right, front or back, are only used to refer to the direction of the additional schema. Therefore, the directional terminology used is intended to limit the invention. The multilayer circuit board 2 of FIG. 2 includes an insulating substrate 2, a first conductive layer 204, a second conductive layer 2〇6, a third conductive layer 2〇8, and a fourth conductive layer 21〇. A first insulating adhesive layer 212, a second insulating adhesive layer 214 and an electronic component 2" The insulating substrate 202 has an upper surface 201, a lower surface 2?3 1357292 opposite the upper surface 2?1, and a recess 205. The recess 205 is recessed in the upper surface 2〇1 to form a bottom surface 207, and the bottom surface 207 of the recess 205 is not coplanar with the lower surface 203 of the insulating substrate 202. The first conductive layer 204 covers the upper surface 20b of the insulating substrate 202. The second conductive layer 206 covers the lower surface 203 of the insulating substrate 202 and is electrically connected to the first conductive layer 204. The electronic component 216 is embedded in the recess 205. The first insulating adhesive layer 212 is pressed over the first conductive layer 204 while covering the electronic component 216. The second insulating adhesive layer 214 is bonded over the second conductive layer 206. The third conductive layer 208 is adhered to the first insulating layer 212 and electrically connected to the electronic component 216. The fourth conductive layer 210 is then adhered to the second insulating adhesive layer 214. The above-mentioned insulating adhesive layers 2丨2 and 214 may be replaced by other adhesive dielectric insulators. The manufacturing method of the above-mentioned rural circuit board is: for the insulating substrate 202; the first conductive layer 204 is formed on the insulating substrate. 202 a top surface 201; forming a second conductive layer 206 on the lower surface 203 of the insulating substrate 202; patterning the first conductive layer 204 and the second conductive layer 206' to expose a portion of the upper surface 201 or the lower surface 203 of the insulating substrate 202; The recess 205 is formed on the exposed portion of the upper surface 201 of the insulating substrate 202, but does not penetrate the insulating substrate 202 and the second conductive layer 206; and the electronic component 216 is embedded in the recess 205. The pocket 205, also known as a blind hole, can be fabricated using laser drilling techniques or by mechanical drilling techniques. In addition, before embedding the electronic component 216, a layer of adhesive 218 φ may be filled on the bottom surface 2〇7 of the recess 216. The method further includes forming a via 220 on one side of the recess 205 to electrically connect the first conductive layer 204 to the second conductive layer 206 via the via 220, for example, using via via plating Forming a first insulating adhesive layer 212 or a dielectric layer over the first conductive layer 204, and forming a second insulating adhesive layer 214 or a dielectric layer over the second conductive layer 206; forming a third conductive layer 208 Above the first insulating adhesive layer 212, and forming a fourth conductive layer 210 over the second insulating adhesive layer 214. In particular, the third conductive layer 208 and the fourth conductive layer 210 may be simultaneously formed by double-sided plating techniques. The multilayer circuit board 300 of Fig. 3 has substantially the same structure as that of Fig. 2, but further includes a metal layer 302 laid on the wall surface of the recess 205. The electronic component 216 is disposed in the recess 205 and is surrounded by the metal layer 302 to increase heat dissipation and electromagnetic interference prevention, and increase the ground contact area of 9 1357292. The electronic component 216 has an active surface 217 electrically coupled to the third conductive layer 208. The method of fabricating the multilayer circuit board of Fig. 3 is to form a gold shoulder layer 3P2 on the wall surface and bottom surface 207 of the recess 205 before embedding the electric standing element 216 or while forming the first conductive layer 204. The metal crucible 302 can be made difficult by using the boring electro-recording technique. Figure 4 'Multilayer circuit board 4QQ also has a picture, 2; winter base funeral, (four) 冓. Compared with '53⁄4, the metal layer 402 is also laid in the pocket 205. The rule element 404 is located in the pocket 205 +, and the metal layer 402 is the circumference 1 but different from the _ 3~ The metal layer 402 is divided into a plurality of electrically isolated g-layers 402a A 02b to electrically connect the plurality of electrodes 4Q6 and 408 of the electron cell #406. The multilayer circuit board 400 of the present embodiment is manufactured. The method is applied to the hole wall and the bottom surface of the concave hole 205, and the ruthenium layer 4〇2 is plated, and the cut metal layer is 4. 〇24. The complex drum metal layer 4〇2a and 4〇2b And then the plural, the secondary metal layer 4〇2a and 4〇2b. The sister is electrically isolated. As shown in Fig. 4, the secondary gold layer 4〇2a and 4〇2b respectively: the town is steamed to the third conductivity Boundary 208., ra; • - · · .... ~ In all of the above embodiments, the electronic component 216. or .404% can be abused: an active component, such as an integrated circuit chip (IC chip). The component has a contact pad 219 on the active surface 221. The active surface 221 is connected to the conductive layer 2〇 by the contact pad 2丨9. The electronic component 216 or 404 can also be a passive component, such as a capacitor. , inductance, filter. If the hole is mechanically drilled, the hole diameter of the recess 205 is 3 to 5 mm. If the hole is drilled by a laser, the hole diameter of the recess 205 is 70 to 100 ern. The first conductive layer 2 〇 4 and the second conductive layer 206 The third conductive layer 208, the fourth conductive layer 21, and the metal-4'0·2 may each be a copper layer. ^ The material of the insulating substrate 202 may be a fiberglass cloth, an insulating paper or the like containing the above resin, for example: Epoxy resin, phenolic resin, polyamidamine resin, etc. After the insulating substrate is cut into pieces, copper foil is added on one side or both sides, and after hot pressing, it is called steel substrate "White finish circuit process" The outer layer of the multi-layer circuit board is coated with solder-proof oil and solder-free electronic components. When the solder overflows to adjacent lines, it causes a short circuit. This is strictly = 1357292. The water and oxidation of the air and the air t, coating After the circuit board of Tan Oil Qin, the surface is treated with anti-oxidation to increase the oxidation resistance. In summary, the invention has many layers of circuit board structure and manufacturing method to improve the internal enthalpy. A lion board _, add more fabrics or grounding, destroy n honey degree 钕 itch, and improve the internal heat of the nightmare and: Electric 'scrambling a fruit roll :: plant: plant to Ji% _' ^ ,: turn out provision
定本發明實巧乏靼崮，即大凡依本發明:申請專利範園尽脊叼敦明j. 斧所;^乍$簡單吟等效孿化與修飾，.皆長屬$發日I:暑:利濟蓋i轉圍 ’内。另外本發明的任一'實施例或申 '請專利舂圍不_遂威未發明辧揭-露之全部目的或優點或特點。此外？摘要部分和標題僅是用來辅助 專利文件搜尋之用.’並非·甩來限制本齊明之權利範圍。_， 【圖式簡單埤明]， ::: 圖1為一習知的多層電路板示意圖。 圖2為依據本發明第一實施例之多層電路板的示意圖 圖3為依據本發明第二實施例之多層電路板的示意圖 圖4為依據本發明第三實施例之多層電释板的示意圖 t主要元<符號說明】： 100 多層電路板 102 絕緣基板 104 > 106 内層線路 108 、 110 外層線路 112 被動元件 114、116 絕緣樹脂~ ' 200 多層電路板 201 上表面 202 絕緣基板 Π 1357292 203 下表面 204 第一導電層 205 凹穴 206 第二導電層... 207 底面 208 第三導電層、: 210 第四導電層.... 212 第.一絕緣膠層 214 第二絕緣膠層 216 電子元件 217 主動表面 218 黏著膠:一 219 #觸墊ϋ 220 通孔：:: 221 主動表面 300 多層電路板 302 金屬層 400 多層電路板 402 金屬層 402a、 402b. 次金屬層 404 電子元件 406 電子元件 406、408 電極 ：The invention is inexperienced, that is, the majority of the invention according to the invention: the application for patent Fanyuan 尽 叼 叼 叼 . . . . . ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; : Liji Gai i turn around 'inside. In addition, any 'embodiment or claim' of the present invention does not disclose all of the objects or advantages or features of the invention. Also? The abstract sections and headings are only used to assist in the search for patent documents. 'It is not intended to limit the scope of BenQing's rights. _, [Simplified illustration], ::: Figure 1 is a schematic diagram of a conventional multilayer circuit board. 2 is a schematic view of a multilayer circuit board according to a first embodiment of the present invention. FIG. 3 is a schematic view of a multilayer circuit board according to a second embodiment of the present invention. FIG. 4 is a schematic view of a multilayer electrical release board according to a third embodiment of the present invention. Main element <symbol description]: 100 multilayer circuit board 102 insulating substrate 104 > 106 inner layer wiring 108, 110 outer layer 112 passive component 114, 116 insulating resin ~ '200 multilayer circuit board 201 upper surface 202 insulating substrate Π 1357292 203 Surface 204 first conductive layer 205 recess 206 second conductive layer... 207 bottom surface 208 third conductive layer,: 210 fourth conductive layer.... 212 first insulating layer 214 second insulating layer 216 electron Element 217 Active Surface 218 Adhesive: 219 #Touchpad 通 220 Through Hole::: 221 Active Surface 300 Multilayer Board 302 Metal Layer 400 Multilayer Board 402 Metal Layer 402a, 402b. Secondary Metal Layer 404 Electronic Component 406 Electronic Components 406, 408 electrodes: