TWI356099B - - Google Patents

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TWI356099B
TWI356099B TW94143682A TW94143682A TWI356099B TW I356099 B TWI356099 B TW I356099B TW 94143682 A TW94143682 A TW 94143682A TW 94143682 A TW94143682 A TW 94143682A TW I356099 B TWI356099 B TW I356099B
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Taiwan
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low
transparent substrate
refractive index
resistance
temperature
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TW94143682A
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Chinese (zh)
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TW200722540A (en
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Chien Min Weng
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Applied Vacuum Coating Technologies Co Ltd
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%、發明說明: [發明所屬之技術領域】 本發明係有關於一種低溫濺鍍高阻值ITO導電透明基 才構造及製造方法,主要係利用一層ITO混合金屬氧化物 5層配合多層交疊鑛層基材之構造。 【先前技術】 在光電原材料生產工業中’極為重要的原材料為高阻 值ITO導電層面板的生產及其生產控制方法,該工業也伴 10隨著光電產品要求產品良率提高、生產控制、成本降低、 快速生產等功能的要求而愈顯重要。高阻值ITO導電層觸 控面板生產工業的技術更與多種類光電工業相關,如電阻 式觸控面板、電容式觸控面板等。 如一般使用大眾所認知的,高阻值ΓΓΟ導電層面板生 15產相關技術是指從光電產業中作為基材之基礎原材料,有 些電阻式觸控面板製程會用到高阻值ITO來取代較低阻值 的導電玻璃或導電塑膠,而電容式觸控面板更是需要穩定 的高阻值的導電產品,高阻值ITO導電層面板與其它的電 子元件共同組裝於一個光學結構之中,成為一光學產品, 20以達成一特定設計功能。高阻值ITO導電層面板需求的功 能主要是高透光性及高阻值特性。 清參考苐·一 A圖與第一 C圖所不,第一 C圖之電阻式 觸控面板中之傳導層22a,其中觸控面板中之傳導層22&係 為利用藏鍍處理所形成’當使用單純高阻值ITO鍍膜處理 1356099 後’會有穩定性不佳的情況,但是對於高階高解析度產, 其特定阻值品質要求甚高且穩定性佳(觸控筆13a觸碰電阻 式螢幕12a時,即對座標分隔點26a附近施壓力上層之接 • 觸層34a的傳導層22a會壓到下層之玻璃層20a,並且分隔 5層30a會以連接器32a將電阻式觸控面板24a之位置信號傳 出),因此習知的高阻值金屬氧化物鍍膜方法不單只有穩定 性差’而且會有特定阻值不易達成之品質問題。 •请參考第一B圖與第一D圖所示,第一B圖為習知電 容式觸控面板。該電容式觸控面板是利用排列之透明電極 ίο與人體之間的靜電結合所產生之電容變化,從所產生之誘 導電流來檢測其座標。感應原理以電壓作用在電容式螢幕 14a感應區的四個角落並形成一固定電場,當手指21a觸碰 螢幕14a時,可令電場引發電流,藉由控制器測定,依電 流距四個角落比例的不同,即可計算出接觸位置。 15 第一 D圖為電容式觸控面板之剖面圖,其在玻璃基板 17a上鍍一層傳導層16a,再製作電極層18a ’最後在表層 • 覆蓋一層保護膜19a,即完成電容式觸控面板,其中15a為 防電磁波之導電層。然而,該電容式觸控面板在電路與結 構設計上較複雜,同時成本也高。 -2〇 所以有必要採用較為快速而立可靠的方法來生產低溫 濺鍍高阻值ΓΓΟ導電透明基材構造(一般為多層膜板材),尤 其是基礎材料為高分子材料如透明壓克力時(PMMA板材) 或是玻璃,來符合實際應用之要求。 因此’對現今市面上大部分需要高阻值功能高級面板之光 6 ⑧ 1356099 • . i:屋菜而言 【發明内容】 5 10 方便,又能使用穩定及生產 =導電透明基材構造及製:方二== (如電容式觸控面板等),可以提供低成本高 功效。 • 為了達紅述目的’本發明提供―種低溫賊高阻值 (如800-2500ohm/sq即之電阻式8〇〇〇hm/sq以上及電容式 1500ohm/sq以上並且阻值穩定,但先前技術穩定性不佳^ 法用在高阻質觸控面板中)ITO導電透明基材構造及製造方 I5法,主要係利用一層ΙΤΟ混合金屬氧化物層,再配合多層 交疊鍍層基材構造以形成高透光、抗反射特性,同時排定 # 連續式生產的流程,配合傳統生產製程及製程難度低的週 邊設備’將各製私步驟結合在一起而發展出本發明。 本發明方法步驟包含:提供一透明基材及將透明基材 .2〇施以混合電漿錢鐘處理,且該混合電聚為ΙΤΟ電漿與金屬 氧化物電漿所混合。(一般可為單層或2層以上之多層膜)。 本發明構造包含:透明基材;及至少一層ΙΤΟ材質與金屬 氧化物材質所混合之膜層形成於透明基材之上。 為了使能更進一步瞭解本發明之特徵及技術内容,請 1356099 f閱以下有關本發明之詳細說明與附圖,然而所附圖式僅 提供參考與說_,並非絲對本發明加以限制者。 【實施方式】 5 請參考第二圖、苐三A及第三B圖所示,其中以玻璃 為基材设置連續式生產,排定連續式生產的流程,配合傳 統生產製程及製程難度低的週邊設備,將各製程步驟結合 在起,再將透明基材10施以混合電漿4〇濺鍍處理。對 於一鬲阻值高級多層面板製程之步驟關係圖(如第二圖), 10其中起始狀態時該透明基材10進入進料步驟(第二圖最左 邊第1步驟)’然後將基材10濺鑛至少一層金屬氧化物20 或非金屬氧化物30之步驟(第二圖左邊第2及第3步驟) (步驟S103)’再將透明基材1〇施以混合電漿4〇濺鍍處理 (第一圖最左邊第4步驟),最後進行後製程處理300度(一 I5預疋溫度)以上30分(一預定範圍時間)的烘烤外加15〇度 〜200度(一預定低溫範圍)3〇分(一預定範圍回火時間)的回 火(第二圖左邊第5步驟)(步驟sl〇7),即可得到成品(第 二圖左邊第6步驟)。 /、中也有-種方式則為基材1G加熱和鍍膜過程加執%, the invention description: [Technical Field] The present invention relates to a low-temperature sputtering high-resistance ITO conductive transparent base structure and manufacturing method, mainly using a layer of ITO mixed metal oxide 5 layers with multi-layer overlapping ore The construction of the layer substrate. [Prior Art] In the photovoltaic raw material production industry, 'very important raw material is the production of high-resistance ITO conductive layer panel and its production control method. The industry is also accompanied by 10 products with improved yield, production control and cost. It is becoming more and more important to reduce the requirements of functions such as rapid production. High-resistance ITO conductive layer touch panel manufacturing industry technology is more related to a variety of optoelectronic industries, such as resistive touch panels, capacitive touch panels. As generally recognized by the public, the high-resistance ΓΓΟ conductive layer panel production technology refers to the basic raw materials used as the substrate from the optoelectronic industry. Some resistive touch panel processes will use high-resistance ITO instead. Low-resistance conductive glass or conductive plastic, and capacitive touch panels require stable high-resistance conductive products. High-resistance ITO conductive layer panels are assembled with other electronic components in an optical structure. An optical product, 20 to achieve a specific design function. The functions required for high-resistance ITO conductive layer panels are mainly high light transmission and high resistance characteristics. Referring to FIG. 1A and FIG. 1C, the conductive layer 22a in the resistive touch panel of the first C diagram, wherein the conductive layer 22& in the touch panel is formed by using a plating process When using 1356099 with a simple high-resistance ITO coating, there will be a case of poor stability, but for high-order and high-resolution production, the specific resistance quality is very high and the stability is good (the stylus 13a touches the resistive type). At the time of the screen 12a, the conductive layer 22a of the contact layer 34a is pressed against the coordinate separation layer 26a in the vicinity of the coordinate separation point 26a, and the conductive layer 22a of the contact layer 34a is pressed to the underlying glass layer 20a, and the barrier 5 layer 30a is used to connect the resistive touch panel 24a with the connector 32a. The position signal is transmitted), so the conventional high-resistance metal oxide coating method not only has poor stability, but also has a quality problem that is difficult to achieve with a specific resistance value. • Please refer to the first B diagram and the first D diagram. The first B diagram is a conventional capacitive touch panel. The capacitive touch panel detects the coordinates of the generated induced current by utilizing the capacitance change generated by the electrostatic combination between the arranged transparent electrodes ίο and the human body. The sensing principle applies a voltage to the four corners of the sensing area of the capacitive screen 14a and forms a fixed electric field. When the finger 21a touches the screen 14a, the electric field can induce a current, which is measured by the controller and is proportional to the current distance from the four corners. The difference in contact can be calculated. 15 is a cross-sectional view of the capacitive touch panel, which is coated with a conductive layer 16a on the glass substrate 17a, and then an electrode layer 18a is formed. Finally, the surface layer is covered with a protective film 19a, that is, the capacitive touch panel is completed. 15a is a conductive layer for preventing electromagnetic waves. However, the capacitive touch panel is complicated in circuit and structure design, and is also costly. -2〇 Therefore, it is necessary to use a relatively fast and reliable method to produce low-temperature sputtering high-resistance ΓΓΟ conductive transparent substrate structure (generally multi-layer film), especially when the base material is polymer material such as transparent acrylic ( PMMA sheet) or glass to meet the requirements of the actual application. Therefore, for most of today's high-performance panels that require high-resistance functions, 6 8 1356099 • . i: House food [invention] 5 10 Convenient, stable and productive = conductive transparent substrate construction and system : Fang 2 == (such as capacitive touch panels, etc.), can provide low cost and high efficiency. • In order to achieve the purpose of redeployment, the present invention provides a high resistance value of a low temperature thief (for example, 800-2500 ohm/sq or more of a resistive type of 8 〇〇〇 hm/sq or more than a capacitive type of 1500 ohm/sq and a stable resistance value, but previously Poor technical stability ^ method used in high-resistance touch panels) ITO conductive transparent substrate construction and manufacturing method I5, mainly using a layer of yttrium mixed metal oxide layer, and then with a multi-layer overlap coating substrate structure The invention is developed by forming a high light transmission and anti-reflection characteristic, and simultaneously scheduling the process of #continuous production, and combining the conventional manufacturing processes and peripheral devices having low process difficulty to combine the various private steps. The method step of the present invention comprises: providing a transparent substrate and treating the transparent substrate with a mixed plasma clock, and mixing the electropolymer into a cerium plasma mixed with a metal oxide plasma. (Generally it can be a single layer or a multilayer film of two or more layers). The structure of the present invention comprises: a transparent substrate; and at least one layer of a layer of tantalum material and a metal oxide material is formed on the transparent substrate. The detailed description of the present invention and the accompanying drawings are to be understood by the accompanying drawings. [Embodiment] 5 Please refer to the second figure, the third A and the third B, in which the continuous production is set on the glass substrate, the continuous production process is scheduled, and the traditional production process and the process are difficult. For the peripheral equipment, the various process steps are combined, and the transparent substrate 10 is subjected to a mixed plasma 4 〇 sputtering treatment. For a step-resistance diagram of a high-level multilayer panel process (such as the second figure), 10 wherein the transparent substrate 10 enters the feeding step (the first step of the leftmost step of the second figure) in the initial state, and then the substrate 10 the step of splashing at least one layer of metal oxide 20 or non-metal oxide 30 (the second and third steps on the left side of the second figure) (step S103) 'the transparent substrate 1 is further applied with mixed plasma 4 〇 sputtering Processing (the 4th step at the far left of the first figure), and finally performing post-process processing of 300 degrees (one I5 pre-temperature) above 30 minutes (a predetermined range of time) of baking plus 15 degrees ~ 200 degrees (a predetermined low temperature range The tempering of 3 minutes (a predetermined range of tempering time) (the fifth step on the left side of the second figure) (step sl7), the finished product is obtained (the sixth step on the left side of the second figure). /, there are also - the way is the substrate 1G heating and coating process plus

及一層ITO材質與 由本實施例中至少交錯濺鍍了一層矽; 為矽但是濺鍍過程會形成氧化物薄膜)及一 1356099 金屬氧化物(本案主要特徵物質,常用如Nb2〇5)材質所混合 之膜層24(混合導電層)(如第三a或B圖所示,一般可増 加3到5層總層數之多層膜)。本實施例說明基材對於傳統 濺鍍產品生產線安排上具有極為方便的特性。 5 第二A及第三B圖所示之膜層方面,可為高折射率22/ 低折射率32/高折射率22/低折射率32/ΓΓΟ混合鍍膜之相間 膜層,外加混合之導電層24(如第三A圖),或是高折射率 22/低折射率32/ITO混合鍍膜之相間膜層,外加混合之導電 層24 (如第三B圖)’其中該高折射率層22為金屬氧化杨 10電漿20所濺鍍之膜層,且該低折射率層32為非金屬氧化 物電漿30所濺錢之膜層。 本發明方法步驟包含(參考第四圖):提供一基材1〇 (步 驟sioi);進行多層化性能調整披覆流程(步驟sl〇3)及 將基材10施以混合電漿4〇濺鍍處理,且該混合電漿4〇為 is ITO電漿與金屬氧化物電漿(如Nb2〇5)所混合(步驟 S105),最後再進行性質穩定化加熱及回火流程(步驟 • S107)。 以下將詳述本發明之實施例細部變化:其中該混合電 漿40可為雙靶或是混合靶濺擊所形成(一濺鍍機台雙靶或 -2〇是單一混合靶),其中該透明基材10經過之鍍膜相關處理可 為一使用一工站連續相接之生產過程,使得透明基材1〇的 工站間延遲時間控制在一預定範圍之内;其中該透明基材 10可為咼分子材料或玻璃所構成;進一步可包含一步驟於 提供一透明基材之後,即是將透明基材濺鍍一層高折射率 9 ⑧ ^射率射(也可為多數個高折射率層2 2或低 成,且^把〃中該两折射率層22可為金屬氧化物所構 高折射Ϊ声”射率層32可為非金屬氧化物所構成;其中該 ;==?為Nb205或其它高折射率膜層所構成,且 二可為Sl〇2或其它低折射率膜層所構成; 材鑛膜相關製程可為維持在一定數值之潔 淨專級_之内(賴f要讀表面乾 2月構每包含··透明基材10;及至少一層IT0材質與金 屬氧化物材質収合之膜層24形成於透縣材1G之上。* 15 #本發明之特徵與方便之處在於,提供一種利於高級品 貝及生產控制,而能使用傳統濺鍍機台簡單組合改良,低 溫濺鍍高阻值(經實作使用Nb205混合IT0層之阻值可在 __25GGohm/Sq或以上之敎崎)ITQ導電透明基材構造 及製造方法(係用多層膜製程生產)(可以為Nb2〇5/si〇2/iT〇 或刪0撕02/觀05/_则,此為通常之兩種形式), 可以提供低成本高品質之穩定製程功效。 20 本發明有以下優點:1.ITO因加入Nb2〇5的量的不同 而產生了不同的穩定阻值,2. —樣可用IT〇混合Nb2〇5的 膜層跟其他的膜層調配出高穿透率之產品,3.阻值穩定行佳, 先前之單以ITO所形成之膜層穩定性不佳,4除了運用And a layer of ITO material is mixed with at least one layer of tantalum in this embodiment; 矽 but the oxide film is formed during the sputtering process) and a 1356099 metal oxide (the main characteristic substance of the case, commonly used as Nb2〇5) is mixed. The film layer 24 (mixed conductive layer) (as shown in the third a or B diagram, generally 3 to 5 layers of the multilayer film can be added). This embodiment illustrates the substrate having extremely convenient characteristics for conventional sputter product line arrangements. 5 The second layer and the third layer B show the phase layer of the high refractive index 22 / low refractive index 32 / high refractive index 22 / low refractive index 32 / ΓΓΟ mixed coating, plus mixed conductive Layer 24 (as in Figure AA), or an interphase film of a high refractive index 22/low refractive index 32/ITO hybrid coating, plus a mixed conductive layer 24 (as in Figure 3B) where the high refractive index layer 22 is a film layer sputtered by the metal oxide yang 10 plasma 20, and the low refractive index layer 32 is a film layer splashed by the non-metal oxide plasma 30. The method step of the present invention comprises (refer to the fourth figure): providing a substrate 1 〇 (step sioi); performing a multi-layer performance adjustment coating process (step s1 〇 3) and applying a mixed plasma to the substrate 10 The plating process is performed, and the mixed plasma is mixed with the metal oxide plasma (such as Nb2〇5) (step S105), and finally the property stabilization heating and tempering process is performed (step: S107) . The details of the embodiment of the present invention will be described in detail below, wherein the mixed plasma 40 can be formed by double target or mixed target splashing (a sputtering machine dual target or -2 〇 is a single mixed target), wherein The coating process related to the transparent substrate 10 can be a production process in which a station is continuously connected, so that the inter-station delay time of the transparent substrate is controlled within a predetermined range; wherein the transparent substrate 10 can be The composition is a molecular material or a glass; further comprising the step of providing a transparent substrate, that is, sputtering the transparent substrate with a high refractive index of 96 Å (which may also be a plurality of high refractive index layers) 2 2 or low, and the two refractive index layer 22 in the crucible may be a high refractive hum of the metal oxide. The radiance layer 32 may be composed of a non-metal oxide; wherein the ==? is Nb205 Or other high-refractive-index film layer, and the second layer may be composed of Sl2 or other low-refractive-index film layer; the material-mineral film-related process can be maintained within a certain level of clean level _ The surface is dried for 2 months, each containing a transparent substrate 10; and at least one layer of IT0 material and The film layer 24 which is an oxide material is formed on the 1G of the county material. * 15 # The invention is characterized in that it provides a high-quality product and production control, and can use a conventional sputtering machine. Simple combination improvement, low-temperature sputtering high resistance value (the implementation of Nb205 mixed IT0 layer resistance can be __25GGohm/Sq or above), ITQ conductive transparent substrate construction and manufacturing method (using multilayer film process production) ) (It can be Nb2〇5/si〇2/iT〇 or delete 0 tear 02/view 05/_, this is the usual two forms), which can provide low-cost and high-quality stable process efficiency. The following advantages: 1. ITO has different stability resistance due to the difference in the amount of Nb2〇5 added. 2. The film can be mixed with Nb2〇5 and the other layers can be blended with high transmittance. The product, 3. The resistance value is stable, and the previous layer formed by ITO has poor stability.

Nb205之不導電氧化物外,也可利用不導電之金屬氧化物或 是不導電之氧化物。 綜上所述,本發明貫為一不可多得之發明產品,極具 10 1356099 產業上,用性、新穎性及進步性,完全符合發明專利申請 要件,爰依專利法提出申請,敬請詳查並賜準本案專利, 以保障發明者之權益。 ' -5【圖式簡單說明】 第一A圖為習知技術電阻式觸控面板之立體圖; 第一B圖為習知技術電容式觸控面板之立體圖; 第一 C圖為習知技術電阻式觸控面板之剖面圖; • 第一D圖為習知技術電容式觸控面板之立體剖面圖; ίο第二圖為本發明實施例低溫濺鍍高阻值ITO導電透明基材 構造的生產線之示意圖; 第三A圖為本發明實施例低溫濺鍍高阻值IT〇導電透明基 材構造之示意圖(一); 第三Β圖為本發明實施例低溫滅鍍高阻值ιτο導電透明基 15 材構造之示意圖(二);及 第四圖為本發明生產流程圖。 【主要元件符號說明】 10 電阻式螢幕 12a 13a 電容式螢幕 14a 21a 傳導層 16a 17a 電極層 18a 19a 玻璃層 20a 22a 面板 24a 透明基材 20 觸控筆 手 玻璃基板 保護膜 傳導層 11 1356099 » · 座標分隔點 26a 分隔層 30a 連接器 32a 接觸層 34a 金屬氧化物電漿 20 高折射率層 22 ΙΤ0材質與金屬氧化物材質所混合之膜層 24 非金屬氧化物電漿 30 低折射率層 32 混合電漿 40 後製程 50 導電層 15aIn addition to the non-conductive oxide of Nb205, a non-conductive metal oxide or a non-conductive oxide may also be utilized. In summary, the present invention is a rare invention product, extremely 10 1356099 industrial, useful, novel and progressive, fully in line with the requirements of the invention patent application, filed according to the patent law, please be detailed Check and grant the patent in this case to protect the rights and interests of the inventor. ' -5 [Simple diagram of the drawing] The first A is a perspective view of a conventional resistive touch panel; the first B is a perspective view of a conventional capacitive touch panel; the first C is a conventional resistor A cross-sectional view of a touch panel of the present invention; • The first D is a perspective view of a conventional capacitive touch panel; and the second figure is a production line of a low-temperature sputtered high-resistance ITO conductive transparent substrate according to an embodiment of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 3 is a schematic view showing the structure of a high-resistance IT〇 conductive transparent substrate under low temperature sputtering according to an embodiment of the present invention; FIG. 3 is a schematic view showing a low-temperature extruding high-resistance ιτο conductive transparent base according to an embodiment of the present invention; The schematic diagram of the 15 material structure (2); and the fourth diagram is the production flow chart of the invention. [Main component symbol description] 10 Resistive screen 12a 13a Capacitive screen 14a 21a Conductive layer 16a 17a Electrode layer 18a 19a Glass layer 20a 22a Panel 24a Transparent substrate 20 Stylus pen glass substrate protective film Conductive layer 11 1356099 » · Coordinate Separation point 26a Separation layer 30a Connector 32a Contact layer 34a Metal oxide plasma 20 High refractive index layer 22 膜0 Material and metal oxide material mixed film layer 24 Non-metal oxide plasma 30 Low refractive index layer 32 Hybrid Pulp 40 post process 50 conductive layer 15a

Claims (1)

13560991356099 100年3月9日修正替換頁 十、申請專利範圍: 1、一種低溫濺鍍高阻值ITO導電透明基材構造之製造 方法,其步驟包含: 提供一透明基材; 5 將透明基材施以混合電漿濺鍍處理,且該混合電漿為 ITO電皲與金屬氧化物電渡所混合,且進一步包括一膜層穩 定輔助製程步驟, 一其中,該膜層穩定輔助製程步驟於該透明基材施以混 合電漿濺鍍處理之步驟之後進行,該膜層穩定辅助製程步 10驟係指經30(TC以上的烘烤後,再進行15〇。(:至2〇(rc 火。 2、如申凊專利範圍帛!項所示之低溫賤鑛高阻值⑽ ,電透明基㈣造之製造方法,其巾該混合賴為錄或 疋 > 昆合靶濺擊所形成。 15Modified on March 9th, 100. Patent application scope: 1. A method for manufacturing a low-temperature sputtering high-resistance ITO conductive transparent substrate structure, the steps comprising: providing a transparent substrate; 5 applying a transparent substrate Treated by mixed plasma sputtering, and the mixed plasma is mixed with the ITO electrode and the metal oxide electrode, and further includes a film stabilization auxiliary process step, wherein the film stabilization auxiliary process step is transparent After the substrate is subjected to the step of mixed plasma sputtering treatment, the film stabilization assisting process step 10 is performed after 30 (after baking of TC or more, 15 〇 is further performed. (: to 2 〇 (rc fire). 2. For example, the high-resistance value of the low-temperature antimony ore (10) and the electro-transparent base (4) are as shown in the application scope of the application, and the towel is formed by the mixed ray or the 昆> 20 3、如中請專職圍第丨項所示之低溫麟高阻值ιτ〇 =電透明基材構造之製造方法’其中該剌基材經過之鑛 明4目關處理為一使用一工站連續相接之生產過程,使得透 月基材的I站間延遲時間控制在—取範圍之内。 導番#日專糾&圍第1項所示之低溫錢鑛高阻值1Τ0 ^糊紐為高分子 5、如申請專利範圍第i項所 導電透明基材構造之製造方法,進含步= 13 135.6099 100年3月9日修正替換頁 明基材施以混合電毁賤鑛處理之前或後,即是將透明基材 濺鍍一層高折射率層或低折射率層。 土 6、如申請專利範圍第5項所示之低溫濺鍍高阻值IT〇 ^透明基㈣造之製造方法’其中該高折射率層為金屬 氧化物所構成,且邊低折射率層為非金屬氧化物所構成。 7如申明專利範圍第6項所示之低溫漱鍍高阻值π。 導電透明基材構造之製造方法,其中該高折射率層為 _ Nb2〇5或其它高折射率膜層所構成,且該低折射率層為 Si〇2或其它低折射率膜層所構成。 8、 如申請專利範圍第1項所示之低溫濺鍍高阻值IT〇 透明基㈣造之製造方法,其巾料明純鑛膜相關 ;裎為維持在一定數值之潔淨等級範圍之内。 9、 如申請專利範圍第丨項所示之低溫濺鍍高阻值汀〇 15導電透明基材構造之製造方法,其中該透明基材在於各鍍 5膜工站間係為以輸送帶或是自動推車輸送。 _ 1〇、如申請專利範圍第1項所示之低溫濺鍍高阻值ΙΤΟ 電透明基材構造之製造方法,進一步包括一步驟於所有 步驟之前,即提供一透明基材之步驟。 20萝、U、一種利用申請專利範圍第1項所述之製造方法所 ;成之低溫濺鍍高阻值ITO導電透明基材構造,其包含: 透明基材;及 至少一層1τ0材質與金屬氧化物材質所混合之膜層形 '於透明基材之上,其中該IT〇導電透明基材構造之阻值 i.356〇99 « ·20 3. For example, please refer to the manufacturing method of low-temperature Lin high-resistance ιτ〇=electric transparent substrate structure as shown in the full-scale 丨 丨 item, where the 剌 substrate is treated as a one-stop station. The continuous connection process makes the delay time between the I stations of the moon-permeable substrate controlled within the range. Guide ##日专纠& The high-temperature value of the low-temperature money mine shown in the first item is 1Τ0 ^ paste is a polymer 5, as in the manufacturing method of the conductive transparent substrate structure of the i-th patent application scope, = 13 135.6099 Correction of the replacement page on March 9, 100. The substrate is sputtered with a high refractive index layer or a low refractive index layer before or after the application of the mixed electrosurgical ore treatment. Soil 6, the low-temperature sputtering high-resistance IT 〇 transparent base (four) manufacturing method as shown in the fifth paragraph of the patent application, wherein the high refractive index layer is composed of a metal oxide, and the low refractive index layer is Made up of non-metal oxides. 7 The high temperature 漱 plating has a high resistance value π as shown in item 6 of the patent scope. A method of manufacturing a conductive transparent substrate structure, wherein the high refractive index layer is composed of _Nb2〇5 or another high refractive index film layer, and the low refractive index layer is composed of Si〇2 or other low refractive index film layers. 8. For the manufacturing method of low-temperature sputtering high-resistance IT〇 transparent base (4) as shown in item 1 of the patent application scope, the towel material is related to the pure mineral film; the crucible is maintained within a certain level of cleanliness. 9. The method for manufacturing a low-temperature sputtered high-resistance Tings 15 conductive transparent substrate structure as shown in the scope of the patent application, wherein the transparent substrate is a conveyor belt or Automatic cart transport. The manufacturing method of the low-temperature sputtered high-resistance ΙΤΟ electrically transparent substrate structure as shown in claim 1 of the patent application further includes the step of providing a transparent substrate before all the steps. 20, U, a manufacturing method according to the first aspect of the patent application; forming a low-temperature sputtering high-resistance ITO conductive transparent substrate structure comprising: a transparent substrate; and at least one layer of 1τ0 material and metal oxide The film layer shape of the material is mixed on the transparent substrate, wherein the resistance of the IT conductive transparent substrate structure is i.356〇99 « 係介於 800-2500ohm/sq。 12、如申請專利範圍第u ΓΓΟ導電透明基㈣造,所示之低溫驗高阻值 * Μ,、 細基材為高好材料或玻 璃所構成。 申請專利範圍第U項所示之低溫麵高阻值 ΙΤΟ導電透明基材構造,進—步包含—構造,較將透明基 材多設置一層高折射率層或低折射率層。 ίο 專利範,13項‘之低溫賴高阻值 ΙΤΟ導電透明基材構造,其中該高折射率層為金屬氧化物所 構成,且該低折射率層為非金屬氧化物所構成。 申請專利範圍第14項所示之低溫舰高阻值 ITO導電透明基材構造,其中該高折射率層為Nb2〇5或其 它高折射率膜層所構成’且該低折射率層為⑽或立它低 折射率膜層所構成。 …、一The system is between 800-2500 ohm/sq. 12. If the scope of the patent application is 第u ΓΓΟ conductive transparent base (4), the low temperature resistance value shown is * Μ, and the fine substrate is composed of high-quality materials or glass. The low-temperature surface high-resistance ΙΤΟ conductive transparent substrate structure shown in the U of the patent application scope, the step-by-step structure, is more than a high refractive index layer or a low refractive index layer. Ίο Patent Model, 13 items of 'low temperature 赖 high resistance ΙΤΟ conductive transparent substrate structure, wherein the high refractive index layer is composed of a metal oxide, and the low refractive index layer is composed of a non-metal oxide. The low-temperature ship high-resistance ITO conductive transparent substrate structure shown in claim 14 wherein the high refractive index layer is composed of Nb2〇5 or other high refractive index film layer and the low refractive index layer is (10) or It is composed of a low refractive index film layer. …,One
TW094143682A 2005-12-09 2005-12-09 Structure of low temperature sputtering high resistant ITO conductive transparent substrate and manufacturing method thereof TW200722540A (en)

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