1355719 九、發明說明： 【發明所屬之技術領域】 本發明係關於一種具層疊結構之絕緣板，尤指一種適 ' 用於封裝基板之承載層之絕緣板。 * 5 【先前技術】 隨著電子產業的蓬勃發展，電子產品亦逐漸進入多功 能、高性能的研發方向。為滿足半導體封裝件高積集度 ® (Integration)以及微型化（Miniaturization)的封裝要求，提供 10 多數主被動元件及線路連接之電路板，亦逐漸由單層板演 變成多層板，以使在有限的空間下，藉由層間連接技術 (Interlayer connection)擴大電路板上可利用的佈線面積，而 配合高電子密度之積體電路（Integrated circuit)需求。 在封裝基板的結構中，一般的做法係由一承載層開 15 始，經過鑽孔、鍍通孔金屬、塞孔、線路成型等製程完成 内層線路結構。再經由線路增層製程完成多層載板，如圖1 • 所示，係為增層式的多層板的結構。首先，提供一承載層 11，於此承載層的兩侧配置有線路增層結構12，經由電鍍 導通孔111將承載層兩側之線路增層結構電性導通。此線路 20 增層結構包含介電層121，層疊於介電層上之線路層122, 形成於介電層中之導電盲孔123。此外，於線路增層結構之 外側更形成一絕緣保護層13，此絕緣保護層具有絕緣保護 層開孔131，使得電性連接墊124可顯露出。且於絕緣保護 1355719 層開孔131形成有焊錫材料（圖未示），以將來能使此封裝基 板與外部的電子元件電性導通。 一般使用於封裝基板之承載層及增層結構的介電材料 多為 ABF(Ajinomoto Build-up Film)、雙順丁 酿二酸酿亞胺/ 5 三氮拼（Bismaleimide triazine ; BT)、聯二苯環丁二稀 (benzocylobutene ; BCB)、液晶聚合物（Liquid Crystal Polymer)、聚亞酿胺（Polyimide ; PI)、聚乙稀醚 (Poly(phenylene ether))、聚四 氟乙烯（Poly • (tetra-fluoroethylene))、芳香尼龍（Aramide)、環氧樹脂或玻 10 璃纖維等感光或非感光有機樹脂，或混合環氧樹脂與玻璃 纖維等材質。 其中，預浸材（Prepreg’ ； PP)介電材料係指中間層是玻 璃纖維或其他纖維，上下兩層是樹脂之材質；而ABF介電 材料係指添加有填充物之樹脂材料。由於PP材料之中間層 15 為玻璃纖維，於盲孔的製造過程中，常受限於玻纖材料與 機台的功能，因此無法製造出具有微小盲孔（<50 μπι)之封 > 裝基板。另一方面，ABF介電材料其揚氏係數（Y〇ung’s1355719 IX. Description of the Invention: [Technical Field] The present invention relates to an insulating board having a laminated structure, and more particularly to an insulating board suitable for a carrier layer for packaging a substrate. * 5 [Prior Art] With the rapid development of the electronics industry, electronic products have gradually entered the direction of multi-functional and high-performance research and development. In order to meet the packaging requirements of semiconductor package high integration and miniaturization, 10 circuit boards with most active and passive components and line connections are gradually evolved from single-layer boards to multi-layer boards. In a limited space, the area of the available wiring on the board is expanded by the interlayer connection technology to meet the requirements of the integrated circuit with high electron density. In the structure of the package substrate, the general practice is to start the inner layer circuit structure by a process such as drilling, plated through hole metal, plug hole, and line forming. The multilayer carrier is then completed by a line build-up process, as shown in Figure 1 •, which is a layered multi-layer board structure. First, a carrier layer 11 is provided. The line build-up structure 12 is disposed on both sides of the carrier layer, and the line build-up structure on both sides of the carrier layer is electrically connected through the plating via 111. The circuit 20 build-up structure comprises a dielectric layer 121, a circuit layer 122 laminated on the dielectric layer, and a conductive via hole 123 formed in the dielectric layer. In addition, an insulating protective layer 13 is formed on the outer side of the line build-up structure. The insulating protective layer has an insulating protective layer opening 131, so that the electrical connecting pad 124 can be exposed. Insulation protection 1355719 layer opening 131 is formed with a solder material (not shown) to electrically connect the package substrate to external electronic components in the future. Generally, the dielectric materials used for the carrier layer and the build-up structure of the package substrate are ABF (Ajinomoto Build-up Film), Bis, and Bismaleimide triazine (BT). Benzocylobutene (BCB), Liquid Crystal Polymer, Polyimide (PI), Poly(phenylene ether), Polytetrafluoroethylene (Poly • ( Photosensitive or non-photosensitive organic resin such as tetra-fluoroethylene), aromatic polyamide (Argamide), epoxy resin or glass fiberglass, or mixed epoxy resin and glass fiber. The prepreg (PP) dielectric material means that the intermediate layer is glass fiber or other fiber, and the upper and lower layers are made of resin; and the ABF dielectric material refers to the resin material to which the filler is added. Since the intermediate layer 15 of the PP material is a glass fiber, in the manufacturing process of the blind hole, it is often limited by the function of the glass fiber material and the machine, so that it is impossible to manufacture a seal with a small blind hole (<50 μπι)> Mount the substrate. On the other hand, the ABF dielectric material has a Young's modulus (Y〇ung’s
Modulus)為 3_5 Gpa，及熱膨服係數（Coefficient of Thermal Expansion ;CTE)為45 ppm/t ;由於ABF介電材料之楊氏係 20 數較大，因此使用於承載層或增層材料時易發生板彎翹現 象’且經劇烈的溫度變化（如熱衝擊測試），由於CTE較大而 半彎翹現象更趨明顯。因此無論是PP或ABF介電材料，皆 受限於無法製作出微小盲孔孔徑，進而無法應用於高線路 密度封裝基板產品中。 1355719 :’極f要尋找—㈣克服板料現象並能應用於 ==孔徑ί作之介電材料，以期能應用於高線路密度 到"裝基板產品令。 【發明内容】 本發明之主要目的係在提供—種用於封裝基板之絕緣 板，俾能減低絕緣板之物情形，且能應用於微小盲 程。 10 15 20 為達成上述目的，本發明提供一種具層叠結構之絕緣 至少包括—第—介電層；—第二介電層，其使用之 ;斗係為芳綸(aramid)，且該第二介電層係層疊於該第一介 電曰上’以及一第二介電層，其係層疊於該第二介電層上， 且使該第二介電層係位於該第一介電層與該第三介電層之 間三其中’該第-介電層與該第三介電層使用之材料是為 一芳香族聚矽氧橡膠系列。 其中’此芳香族聚矽氧橡膠系列可包括一如分子式^ 所示之芳香族聚矽氧橡膠： CH3 CH3 Π分子式i m係為1至40之整數；n係為50至250之整數；Modulus) is 3_5 Gpa, and the coefficient of thermal expansion (CTE) is 45 ppm/t; since the ABF dielectric material has a large number of Young's 20, it is easy to use in the load-bearing layer or build-up material. The occurrence of plate warping phenomenon and the severe temperature change (such as thermal shock test), the semi-bending phenomenon is more obvious due to the larger CTE. Therefore, neither PP nor ABF dielectric materials are limited to the inability to produce micro blind via apertures, and thus cannot be used in high line density package substrate products. 1355719: 'The extreme f is to be found—(4) to overcome the sheet phenomenon and can be applied to the dielectric material of == aperture, in order to be able to apply to high line density to " substrate product order. SUMMARY OF THE INVENTION The main object of the present invention is to provide an insulating board for packaging a substrate, which can reduce the situation of the insulating board and can be applied to a small blind process. 10 15 20 In order to achieve the above object, the present invention provides an insulation having a laminated structure comprising at least a first-dielectric layer; a second dielectric layer, which is used; the bucket is an aramid, and the second a dielectric layer is laminated on the first dielectric layer and a second dielectric layer is laminated on the second dielectric layer, and the second dielectric layer is located on the first dielectric layer The material used between the third dielectric layer and the third dielectric layer is an aromatic polyoxyethylene rubber series. Wherein the aromatic polyoxyxene rubber series may comprise an aromatic polyoxyxene rubber as shown in the formula: CH3 CH3 Π molecular formula i m is an integer from 1 to 40; n is an integer from 50 to 250;
Ar係為一 c^5芳基，且該芳基係經至少一官能基所取 代或未取代，而該至少一官能基係選自由齒素、Cw烷基、 以及CKe烯基所組成之群組。 7 1355719 本發明之另一目的係在提供一種使用上述之具層疊結 構之絕緣板所製造之封裝基板，其可包含：一承載層、一 第一絕緣板、以及第一線路層。其中，承載層之至少一表 面具有複數線路及複數電性連接墊。另外，第一絕緣板是 5 形成於承載層、複數線路、及複數電性連接墊之表面，且 第一絕緣板具有複數第一開孔以顯露電性連接墊之表面。 再者，第一線路層是設於第一絕緣板表面，且第一線路層 具有設於第一開孔中之第一導電盲孔以電性連接位於承載 > 層表面之電性連接墊。 10 其中，第一絕緣板所使用的材料可為ABF(AjinomotoAr is a c^5 aryl group, and the aryl group is substituted or unsubstituted with at least one functional group selected from the group consisting of dentate, Cw alkyl, and CKe alkenyl. group. 7 1355719 Another object of the present invention is to provide a package substrate manufactured using the above-described insulating board having a laminated structure, which may include: a carrier layer, a first insulating plate, and a first wiring layer. Wherein at least one surface of the carrying layer has a plurality of lines and a plurality of electrical connecting pads. In addition, the first insulating plate is formed on the surface of the carrier layer, the plurality of wires, and the plurality of electrical connection pads, and the first insulating plate has a plurality of first openings to expose the surface of the electrical connection pads. Furthermore, the first circuit layer is disposed on the surface of the first insulating plate, and the first circuit layer has a first conductive blind hole disposed in the first opening to electrically connect the electrical connection pad on the surface of the bearing layer . 10 Among them, the material used for the first insulating plate can be ABF (Ajinomoto)
Build-up Film)、雙順丁酿二酸酿亞胺/三氮畔（Bismaleimide triazine ; BT)、聯二笨環 丁二浠（benzocylobutene ; BCB)、 液晶聚合物（Liquid Crystal Polymer)、聚亞酿胺（Polyimide ; PI)、聚乙稀鰱（Poly(phenylene ether))、聚四氟乙稀（Poly 15 (tetra-fluoroethylene))、芳香尼龍（Aramide)、環氧樹脂或玻 璃纖維等感光或非感光有機樹脂，或混合環氧樹脂與玻璃 > 纖維等材質。較佳為上述之包含第一介電層、第二介電層、 以及第三介電層之具層疊結構之絕緣板。 因此，本發明之絕緣板之第二介電層所使用的芳綸， 20 其具有低熱膨脹係數（5〜-5 ppm/°C )及良好的对熱性與对化 性等特性。因此在封裝基板的製造過程中，因其具有低膨 脹係數及良好的耐熱性，故即使在溫度升高的情形下，第 二介電層仍具有良好的附著力；且因其具有良好的耐化 性，故使用如本發明之絕緣板，即使使用化學試劑去除經 8 1355719 曝光顯影之第-或第三介電層時，仍可保持第二介電層不 受化學試劑的侵蝕β 另方面，本發明之絕緣板之第一介電層與第三介電 層所使用的芳香族聚矽氧橡膠系列，是為一種可感光之熱 5固性材料，且具有低楊氏係數（<1 Gpa)的特性《因此在封裝 基板的製造過程中，因其具有低楊氏係數的特點，可吸收 來自熱膨脹係數不匹配時所產生之應力，故能有效防止板 彎翹現象發生；且因其具有感光顯影的特性’故能在使用 • 曝光及顯影等圖案方式形成圖案化線路時，可精確的控制 10線寬、線距及盲孔徑大小，進而製造出具有細線寬線距及 微小孔徑之封裝基板。 另外，本發明之具層疊結構之絕緣板所製造之封裝基 板封裝基板，更可包含一線路增層結構。此線路增層結構 係配置於上述之第一絕緣板、及第一線路層之表面。其中， 15此線路增層結構可包括至少一具有複數第二開孔之第二絕 緣板、設於第二絕緣板表面之第二線路層、及設於第二絕 • 緣板之第二開孔中的第二導電盲孔。在此，第二導電盲孔 是電性連接第一線路層。於線路增層結構之外層表面更可 具有一絕緣保護層、及絕緣保護層所覆蓋之電性接觸墊， 2〇 且此絕緣保護層具有絕緣保護層開孔以露出電性接觸墊。 其中，第二絕緣板所使用的材料可與第一絕緣板所使用的 材料相同或不同。 此外’於本發明之層疊結構之絕緣板中，其中第一介 電層及第三介電層之材料，更可包括一填充物以進一步降 9 1355719 低此絕緣板之熱膨服係數’使得第一介電層及第三介電層 與其他材料間的熱膨脹係數差異減低，增加產品穩定性。 於本發明之層疊結構之絕緣板之填充物所使用之材料 可選自於高分子材料、陶瓷材料、或陶瓷粉末填充之高分 5 子。較佳地’係為鈦酸鎖（Barium-tianate)、鈦酸錯錯 (Lead-ZirCOnate- tianate)及無定形氫化碳（Am〇rph〇us hydrogenated carbon)戶斤組成群組之其中一者。 於本發明之一實施態樣中，層疊結構之絕緣板之填充 • 物之粒徑可在10至10011〇1之範圍内’且較佳地在1〇至4〇nm 10 .之範圍内。此外，具有上述範圍粒徑大小之填充物，其在 第一介電層及第二介電層中重量百分比可為5至3〇%，較佳 為5至15 %。相較於先前技術所使用的填充物，由於粒徑較 小且在奈米範圍内，因此於進行曝光顯影等圖案化製程時 不會因填充物而造成光線折射或無法穿透，而導致線寬、 15 線距及盲孔大小無法達到預計的要求》 於本發明之另一實施態樣中，層疊結構之絕緣板之填 φ 充物之粒徑亦可在0.1至2 μηι之範圍内，且較佳地在〇1至1 μπι之範圍内，更佳地在〇丨至〇 5 μηι之範圍内。此外具有 上述範圍粒徑大小之填充物，其中，在第一介電層及第三 20介電層中重量百分比可為〇.1至〇.5 %，較佳為o.iio 3 %。 添加填充物之目的，係在減低第一介電層與第三介電 層之熱膨脹係數，但倘若所使用的填充物量過多時，易使 介電層之間結合性較差，且在利用芳香族聚石夕氧橡勝系列 1355719 之感光特性以曝光顯影方式形成圖案化線路時，亦會造成 前述解析度降低或無法達到預期之線寬線距標準等問題。 另外’本發明之絕緣板之製造方法可為浸沾式塗佈、 • 滚筒式塗佈、印刷、層壓、或旋轉式塗佈。 5 綜合以上所述，本發明之具層疊結構之絕緣板，係結 合芳綸及芳香族聚矽氧橡膠系列的優點。因此，利用本發 明之絕緣板所製成之封裝基板，因第一介電層與第三介電 層之芳香族聚矽氧橡膠系列其楊氏係數小於1 Gpa，使產品 ® 不致有板彎翹現象；同時，由於以第二介電層做為主層， 10因此利用第一介電層與第三介電層之感光特性，可使第二 介電層做為一阻絕層，於化學藥劑曝光顯影的過程中不受 侵蝕。故使用本發明之絕緣板，相較於以往蝕刻法製程， 使用曝光顯影方式更能精確掌控細線寬線距及微小孔徑之 精確度，故能應用於高線路密度的封裝基板產品中。 15 【實施方式】 • .以下係藉由特定的具體實施例說明本發明之實施方 式，熟習此技藝之人士可由本說明書所揭示之内容輕易地 了解本發明之其他優點與功效。本發明亦可藉由其他不同 2〇的具體實施例加以施行或應用，本說明書中的各項細節亦 可基於不同觀點與應用，在不悖離本發明之精神下進行各 種修飾與變更》 本發明之實施例中該等圖式均為簡化之示意圖。惟該 等圖式僅顯示與本發明有關之元件，其所顯示之元件非為 25貫際實施時之態樣，其實際實施時之元件數目、形狀等比 11 1355719 例為-選擇性之設計’且其轉佈局型態可能更複雜。 實施例1 請參考圖2,係本發明之具層疊結構之絕緣板之剖視圖。Build-up Film), Bisaleimide triazine (BT), benzocylobutene (BCB), Liquid Crystal Polymer, Poly Photosensitive or polyamine (Polyimide; PI), Poly(phenylene ether), Poly 15 (tetra-fluoroethylene), Aromatic (Aramide), Epoxy or Glass Non-photosensitive organic resin, or mixed epoxy resin and glass > fiber. Preferably, the insulating board having a laminated structure including the first dielectric layer, the second dielectric layer, and the third dielectric layer is used. Therefore, the aramid used in the second dielectric layer of the insulating sheet of the present invention has a low coefficient of thermal expansion (5 to -5 ppm/°C) and good properties such as heat and chemical properties. Therefore, in the manufacturing process of the package substrate, since the film has a low expansion coefficient and good heat resistance, the second dielectric layer has good adhesion even in the case of an increase in temperature; and because of its good resistance The use of an insulating plate according to the present invention maintains the second dielectric layer from chemical attack even when a chemical agent is used to remove the first or third dielectric layer exposed by 8 1355719. The series of aromatic polyoxyxene rubber used in the first dielectric layer and the third dielectric layer of the insulating plate of the present invention is a sensible heat 5 solid material and has a low Young's modulus (< 1 Gpa) "Therefore, in the manufacturing process of the package substrate, because of its low Young's modulus, it can absorb the stress generated when the thermal expansion coefficient is not matched, so it can effectively prevent the plate from being bent; It has the characteristics of photosensitive development, so it can accurately control the 10-line width, line spacing and blind aperture size when forming patterned lines using patterns such as exposure and development, and thus fabricating thin lines and lines. A package substrate with a small aperture. In addition, the package substrate package substrate manufactured by the insulating board with a laminated structure of the present invention may further comprise a line build-up structure. The line build-up structure is disposed on the surface of the first insulating plate and the first circuit layer. The line build-up structure may include at least one second insulating plate having a plurality of second openings, a second circuit layer disposed on the surface of the second insulating plate, and a second opening disposed on the second insulating edge plate a second conductive blind hole in the hole. Here, the second conductive blind via is electrically connected to the first wiring layer. The surface of the outer layer of the line build-up structure may further have an insulating protective layer and an electrical contact pad covered by the insulating protective layer, and the insulating protective layer has an insulating protective layer opening to expose the electrical contact pad. Wherein, the material used for the second insulating plate may be the same as or different from the material used for the first insulating plate. In addition, in the insulating board of the laminated structure of the present invention, the material of the first dielectric layer and the third dielectric layer may further include a filler to further reduce the thermal expansion coefficient of the insulating plate by 9 1355719. The difference in thermal expansion coefficient between the first dielectric layer and the third dielectric layer and other materials is reduced to increase product stability. The material used for the filler of the insulating sheet of the laminated structure of the present invention may be selected from a polymer material, a ceramic material, or a ceramic powder filled high score. Preferably, it is one of a group consisting of a barium-tianate, a lead-ZirCOnate- tianate, and an amorphous hydrogenated carbon (Am〇rph〇us hydrogenated carbon). In one embodiment of the present invention, the filler of the insulating structure of the laminated structure may have a particle diameter in the range of 10 to 10011 ’ 1 and preferably in the range of 1 〇 to 4 〇 nm 10 . Further, the filler having the particle size of the above range may have a weight percentage of 5 to 3 %, preferably 5 to 15 % in the first dielectric layer and the second dielectric layer. Compared with the filler used in the prior art, since the particle size is small and is in the nanometer range, the patterning process such as exposure and development does not cause light to be refracted or penetrated by the filler, resulting in a line. The width, the 15 line spacing and the blind hole size cannot meet the expected requirements. In another embodiment of the present invention, the particle size of the filling material of the insulating structure of the laminated structure may also be in the range of 0.1 to 2 μηι. And preferably in the range of 〇1 to 1 μπι, more preferably in the range of 〇丨 to 〇5 μηι. Further, the filler having a particle size in the above range may have a weight percentage of 〇.1 to 5.5%, preferably o.iio 3% in the first dielectric layer and the third dielectric layer. The purpose of adding the filler is to reduce the thermal expansion coefficient of the first dielectric layer and the third dielectric layer, but if the amount of the filler used is too large, the dielectric layer is easily poorly bonded, and the aromatic is utilized. When the photosensitive characteristics of the Jushixi Oxygen Rubber Series 1355719 are formed into a patterned circuit by exposure and development, the above-mentioned resolution may be lowered or the expected line width and line spacing standards may not be achieved. Further, the manufacturing method of the insulating sheet of the present invention may be dip coating, drum coating, printing, lamination, or rotary coating. 5 In summary, the insulating board with a laminated structure of the present invention combines the advantages of aramid and aromatic polyoxyethylene rubber series. Therefore, with the package substrate made of the insulating plate of the present invention, since the Young's coefficient of the first polysiloxane rubber of the first dielectric layer and the third dielectric layer is less than 1 Gpa, the product® does not have a plate bend. At the same time, since the second dielectric layer is used as the main layer, 10 the second dielectric layer can be used as a resistive layer by utilizing the photosensitive characteristics of the first dielectric layer and the third dielectric layer. The agent is not eroded during exposure and development. Therefore, by using the insulating plate of the present invention, the exposure and development method can more accurately control the accuracy of the fine line width and the small aperture compared with the conventional etching process, so that it can be applied to a package substrate product with high line density. [Embodiment] The following describes the embodiments of the present invention by way of specific embodiments, and those skilled in the art can readily understand other advantages and effects of the present invention from the disclosure of the present disclosure. The present invention may be embodied or applied in various other specific embodiments. The details of the present specification can also be modified and changed without departing from the spirit and scope of the invention. The drawings are simplified in the embodiments of the invention. However, the drawings only show the components related to the present invention, and the components shown therein are not in the form of a continuous implementation. The number of components and the shape ratio in actual implementation are 11 1355719. 'And its turn layout can be more complicated. Embodiment 1 Referring to Figure 2, there is shown a cross-sectional view of an insulating board having a laminated structure of the present invention.
10 1510 15
20 關於本發明之絕緣板之製作可採用浸沾式塗佈、滾筒 式塗佈、印刷、層壓、或旋轉式塗佈等方式。於本實施例 中，其絕緣板的製作係採用印刷法，將介電層一層一層層 壓製知而成《其中，絕緣板包含第一介電層2〇1、第二介電 層202、及第三介電層203，且第二介電層2〇2是位於第一介 電層201與第三介電層203之間。本實施例中之第二介電層 所使用的材料為芳綸（aramid)，其分子量在10,000至100,000 之間。且因第二介電層具有低熱膨脹係數，因此於製邋過 程中，即使溫度提高仍保有良好的平整度。 第一介電層與第三介電層可為一種芳香族聚矽氧橡膠 系列》於本實施例中，第一介電層與第三介電層所使用的 材料皆為如分子式1所示之芳香族聚梦氧橡膠： ch3 ch3 +Ar十言〇，节 ch3 ch3 分子式1 Ar係為一 c5_15芳基，且經至少一官能基所取代或未取 代’而至少一官能基係選自由鹵素、Ci.6烷基、以及Cw烯 基所組成之群組。因此，本實施例中所使用之芳香族聚矽 氧橡膠之分子量在1〇,〇〇〇至800,000之間。且因第一介電層 與第三介電層具有小於IGpa之楊氏係數並同時具有感光的 12 1355719 520 The insulating sheet of the present invention can be produced by dip coating, roll coating, printing, lamination, or rotary coating. In the present embodiment, the insulating plate is formed by a printing method, and the dielectric layer is formed by layer by layer. The insulating plate comprises a first dielectric layer 2, a second dielectric layer 202, and The third dielectric layer 203 is located between the first dielectric layer 201 and the third dielectric layer 203. The material used in the second dielectric layer in this embodiment is aramid having a molecular weight of between 10,000 and 100,000. Moreover, since the second dielectric layer has a low coefficient of thermal expansion, good flatness is maintained even during temperature increase during the manufacturing process. The first dielectric layer and the third dielectric layer may be an aromatic polyoxyethylene rubber series. In this embodiment, the materials used in the first dielectric layer and the third dielectric layer are as shown in the formula 1. Aromatic polyoxymethane rubber: ch3 ch3 + Ar 〇, ch ch3 ch3 Formula 1 Ar is a c5_15 aryl group, and is substituted or unsubstituted by at least one functional group and at least one functional group is selected from halogen a group consisting of Ci.6 alkyl, and Cw alkenyl. Therefore, the aromatic polyoxyxene rubber used in the present embodiment has a molecular weight of from 1 Torr to between 800,000. And because the first dielectric layer and the third dielectric layer have a Young's modulus smaller than IGpa and have sensitization at the same time 12 1355719 5
20 特性，故能防止板彎翹現象發生，且也可利用在曝光顯影 之圖案化製程中。 下面將敘述使用本實施例製成之絕緣板所製作出的封 裝基板，如圖3所示。首先，先提供一承載層301，其至少 一表面具有複數線路303及複數電性連接墊302 »而於承載 層301内部形成電鍍導通孔311，利用電鍍導通孔311可電性 連接位於承載層兩側表面之線路303及電性連接墊302。 接著，採用一般習知的增層製程，將第一絕緣板31形 成於承載層301、線路303、及電性連接墊302之表面。本發 明之線路增層用絕緣板亦可運用於無核心層之封裝基板之 線路增層用。 其中，第一絕緣板31所使用的材料可為上述之包含第 一介電層、第二介電層、以及第三介電層之具層疊結構之 絕緣板；或可為ABF、雙順丁醯二酸醯亞胺/三氣牌、聯二 苯環丁二烯、液晶聚合物、聚亞醯胺、聚乙烯醚、聚四氟 乙烯、芳香尼龍、環氧樹脂或玻璃纖維等感光或非感光有 機樹脂，或混合環氧樹脂與玻璃纖維等材質。於本實施例 中’第一絕緣板所使用的材料為上述之包含第一介電層、 第二介電層、以及第三介電層之層疊結構絕緣板。 此外’於本實施例封裝基板中，此第一絕緣板31具有 複數第一開礼322以顯露於承載層3〇1表面之電性連接墊 302。 13 1355719 接著，於第一絕緣板31表面形成第一線路層32。其中， 此第一線路層32具有設於第一開孔322中之第一導電盲孔 321以電性連接於承載層3〇1表面之電性連接墊。 再採用一般習知的增層製程，於本實施例封裝基板之 5第一絕緣板31、及第一線路層32之表面上，更形成一線路 增層結構37❶其中此線路增層結構37包括至少一具有複數 第二開孔342之第二絕緣板33、設於第二絕緣板33表面之第 二線路層34、及設於第二絕緣板33之第二開孔342中的第二 參 導電盲孔341。再此，第二導電盲孔341係電性連接第一線 10 路層32。 此外，於本實施例封裝基板中，線路增層結構37之外 層表面更具有一絕緣保護層3 5、及絕緣保護層3 5所覆蓋之 電性接觸墊36。而絕緣保護層35具有絕緣保護層開孔351以 露出電性接觸墊36。 15 在此，封裝基板之第二絕緣板33所使用的材料可與第 一絕緣板31所使用的材料相同或不同。於本實施例中，第 φ 二絕緣板33所使用的材料與第一絕緣板31所使用的材料相 同，即上述之包含第一介電層、第二介電層、以及第三介 電層之具層疊結構之絕緣板。 20 實施例2 如實施例1所述之具有層疊結構絕緣板之封裝基板，除 了該層疊結構之絕緣板第一介電層與第三介電層中添加有 填充物來降低其熱膨脹係數，且填充物的材料可選自由高 25 分子材料、陶瓷材料、陶瓷粉末填充之高分子、鈦酸鋇 1355719 (Barium-tianate)、鈦酸錯錯（Lead-Zirconate- tianate)及無定 形氫化碳（Amorphous hydrogenated carbon)所組成之群組。 另外，填克物之粒徑可在10至100 nm之範圍内，且第一介 電層及第三介電層t之填充物之重量百分比可佔5至30重 5 量百分比範圍内。 實施例3 如實施例2所述之具有層疊結構絕緣板之封裝基板，除 _ 了所添加之填充物之粒徑可在0.1至2μιη之範圍内，且第一 10 介電層及第三介電層中之填充物之重量百分比可佔0.1至5 重量百分比範圍内。 實施例4 如圖4所示之無核心層封裝基板，其第一絕緣板31、及 15 線路增層結構37之第二絕緣板33之材料，亦使用實施例1所 述之具有層疊結構絕緣板。 > 實施例5 如圖5所示之具主動元件38嵌埋之封裝基板，其第一絕 2〇 緣31、及線路增層結構37之第二絕緣板33之材料，亦使用 實施例1所述之具有層疊結構絕緣板。 實施例6 15 1355719 :如圖6所示之具單邊增層結構之封裝基板，其第-絕緣 31、及線路增層結構37之第二絕緣板33之材料，亦使用實 施例1所述之具有層疊結構絕緣板。 5 ，综合以上所述’本發明之具層疊結構之絕緣板，可同 _低楊氏魏及_脹係數，故在封裝基板的製程中， 可避免因溫度劇烈變化而產生的板彎趣情形。同時因第一 介電層與第二介電層係為一種具感光特性材料且第二介 φ t層具有良好的耐化性’可利用化學藥劑來進行剝除經曝 10光顯影之第-或第三介電層’並可將第二介電層做為化學 剝除阻絕層，因而能應用在細線寬、線距及微小盲孔孔徑 之製程中，製造出高線路密度之封裝基板產品。 上述實施例僅係為了方便說明而舉例而已，本發明所 主張之權利範圍自應以申請專利範圍所述為準，而非僅限 15 於上述實施例。 > 【圖式簡單說明】 圖1係本發明一習知之封裝基板結構剖視圖； 圖2係本發明之具層疊結構之絕緣板剖視圖； 20圖3係本發明實施例1之封裝基板結構剖視圖； 圖4係本發明實施例4之無核心層封裝基板結構剖視圖； 圖5係本發明實施例5之具主動元件嵌埋之封裝基板結構剖 視圖；以及 16 1355719 圖6係本發明實施例6之具單邊增層結構之封裝基板結構剖 視圖。 【主要元件符號說明】 11， 301 承載層 111,311 電鍍導通孔 12, 37 線路增層結構 121 介電層 122 線路層 123 導電盲孔 124, 302 電性連接墊 13, 35 絕緣保護層 131, 351 絕緣保護層開孔201 第一介電層 202 第二介電層 203 第三介電層 303 線路 31 第一絕緣板 32 第一線路層 321 第一導電盲孔 322 第一開孔 33 第二絕緣板 34 第二線路層 341 第二導電盲孔 342 第二開孔 36 電性接觸墊 38 主動元件20 characteristics, it can prevent the occurrence of plate warping, and can also be used in the patterning process of exposure development. Next, a package substrate produced by using the insulating sheet produced in this embodiment will be described, as shown in Fig. 3. First, a carrier layer 301 is provided. The at least one surface has a plurality of lines 303 and a plurality of electrical connection pads 302. The plating vias 311 are formed inside the carrier layer 301, and the plating vias 311 are electrically connected to the carrier layer. The line 303 of the side surface and the electrical connection pad 302. Next, the first insulating sheet 31 is formed on the surfaces of the carrier layer 301, the wiring 303, and the electrical connection pad 302 by a conventional build-up process. The insulating layer for line build-up of the present invention can also be used for line build-up of package substrates without core layers. The material used for the first insulating plate 31 may be the above-mentioned insulating plate with a laminated structure including the first dielectric layer, the second dielectric layer, and the third dielectric layer; or may be ABF or double-cis. Sensitized or non- succinimide/three gas brand, diphenylcyclobutadiene, liquid crystal polymer, polyamidamine, polyvinyl ether, polytetrafluoroethylene, aromatic nylon, epoxy resin or glass fiber Photosensitive organic resin, or mixed epoxy resin and glass fiber. In the present embodiment, the material used for the first insulating plate is the above-mentioned laminated structural insulating plate including the first dielectric layer, the second dielectric layer, and the third dielectric layer. In the package substrate of the embodiment, the first insulating plate 31 has a plurality of first opening 322 to expose the electrical connection pads 302 on the surface of the carrier layer 3〇1. 13 1355719 Next, a first wiring layer 32 is formed on the surface of the first insulating plate 31. The first circuit layer 32 has a first conductive via 321 disposed in the first opening 322 to electrically connect to the surface of the carrier layer 〇1. Further, a conventional build-up process is used to form a line build-up structure 37 on the surface of the first insulating board 31 and the first circuit layer 32 of the package substrate of the present embodiment, wherein the line build-up structure 37 includes a second insulating layer 33 having a plurality of second openings 342, a second circuit layer 34 disposed on the surface of the second insulating plate 33, and a second reference disposed in the second opening 342 of the second insulating plate 33 Conductive blind hole 341. Furthermore, the second conductive via 341 is electrically connected to the first line 10 layer 32. In addition, in the package substrate of the embodiment, the surface of the outer layer of the line build-up structure 37 further has an insulating contact layer 35 and an electrical contact pad 36 covered by the insulating protective layer 35. The insulating protective layer 35 has an insulating protective layer opening 351 to expose the electrical contact pads 36. Here, the material used for the second insulating sheet 33 of the package substrate may be the same as or different from the material used for the first insulating sheet 31. In the present embodiment, the material used for the φ second insulating plate 33 is the same as that used for the first insulating plate 31, that is, the first dielectric layer, the second dielectric layer, and the third dielectric layer are included. Insulating board with a laminated structure. 20 Embodiment 2: a package substrate having a laminated structural insulating plate according to Embodiment 1, except that a filler is added to the first dielectric layer and the third dielectric layer of the insulating plate of the laminated structure to reduce a thermal expansion coefficient thereof, and The material of the filler can be selected from high molecular material, ceramic material, ceramic powder filled polymer, barium titanate 1355719 (Barium-tianate), lead-Zirconate tianate and amorphous hydrogenated carbon (Amorphous). Group of hydrogenated carbon). In addition, the particle size of the filler may be in the range of 10 to 100 nm, and the weight percentage of the filler of the first dielectric layer and the third dielectric layer t may be in the range of 5 to 30 parts by weight. Embodiment 3 The package substrate having the laminated structure insulating plate according to Embodiment 2, wherein the particle size of the added filler may be in the range of 0.1 to 2 μm, and the first 10 dielectric layer and the third dielectric layer The weight percentage of the filler in the electrical layer may range from 0.1 to 5 weight percent. Embodiment 4 The material of the coreless package substrate shown in FIG. 4, the first insulating plate 31, and the second insulating plate 33 of the 15 circuit build-up structure 37 are also insulated with the laminated structure described in Embodiment 1. board. < Embodiment 5 As shown in FIG. 5, the package substrate with the active device 38 embedded therein, the material of the first insulating edge 31 and the second insulating plate 33 of the circuit build-up structure 37 are also used in Embodiment 1 The invention has a laminated structural insulation board. Embodiment 6 15 1355719: The package substrate with a unilateral build-up structure as shown in FIG. 6 , the material of the first insulation 31 and the second insulation plate 33 of the line build-up structure 37 are also described in Embodiment 1. It has a laminated structural insulation board. 5 . Combining the above-mentioned insulating board with a laminated structure of the present invention, the same as the low Yang's Wei and the _ expansion coefficient, so in the process of packaging the substrate, the plate bending phenomenon caused by the drastic temperature change can be avoided. . At the same time, since the first dielectric layer and the second dielectric layer are a photosensitive material and the second dielectric layer has good chemical resistance, the chemical can be used for stripping the exposed 10 light development- Or the third dielectric layer' and the second dielectric layer can be used as a chemical stripping barrier layer, so that it can be applied in a process of thin line width, line spacing and micro blind hole aperture to manufacture a high line density package substrate product. . The above-described embodiments are merely examples for the convenience of the description, and the scope of the claims is intended to be limited to the above embodiments. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a cross-sectional view of a conventional package substrate according to the present invention; FIG. 2 is a cross-sectional view of an insulating board having a laminated structure according to the present invention; FIG. 3 is a cross-sectional view showing a structure of a package substrate according to Embodiment 1 of the present invention; 4 is a cross-sectional view showing a structure of a package substrate of a coreless package of Embodiment 4 of the present invention; FIG. 5 is a cross-sectional view showing a structure of a package substrate with an active device embedded in Embodiment 5 of the present invention; and 16 1355719 FIG. 6 is a structure of Embodiment 6 of the present invention. A cross-sectional view of a package substrate structure of a unilateral buildup structure. [Main component symbol description] 11, 301 carrier layer 111, 311 plated via 12, 37 line build-up structure 121 dielectric layer 122 circuit layer 123 conductive blind hole 124, 302 electrical connection pad 13, 35 insulation protection layer 131, 351 insulation Protective layer opening 201 first dielectric layer 202 second dielectric layer 203 third dielectric layer 303 line 31 first insulating plate 32 first circuit layer 321 first conductive blind hole 322 first opening hole 33 second insulating plate 34 second circuit layer 341 second conductive blind hole 342 second opening 36 electrical contact pad 38 active component
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