TWI354853B - Active devices array substrate and repairing metho - Google Patents

Active devices array substrate and repairing metho Download PDF

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Publication number
TWI354853B
TWI354853B TW95121382A TW95121382A TWI354853B TW I354853 B TWI354853 B TW I354853B TW 95121382 A TW95121382 A TW 95121382A TW 95121382 A TW95121382 A TW 95121382A TW I354853 B TWI354853 B TW I354853B
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Taiwan
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layer
array substrate
active device
floating
electrically connected
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TW95121382A
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Chinese (zh)
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TW200801749A (en
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Wen Hsiung Liu
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Chunghwa Picture Tubes Ltd
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16596twf.doc/006 九、發明說明: 【發明所屬之技術領域】 本發明是有關於一種主動元件陣列基板及其修補方 法,且特別是有關於一種可防止漏光與避免遭受靜電放電 破壞之主動元件陣列基板以及修補此主動元件陣列基板的 方法。 【先前技術】 現今社會多媒體技術相當發達,其多半受惠於半導體 元件或顯示裝置的進步。就顯示裝置而言,具有高畫質、 空間利用效率佳、低消耗功率、無輻射等優越特性的液晶 顯示器已逐漸成為市場之主流。 液晶顯示器的主要製程包括有薄膜電晶體陣列(thin film transistor array,TFT Array)基板製程、彩色濾光片 (ColorFilter)製程、液晶顯示單元(Liquid Crystal Cell)製程 與液晶顯示模組組裝製程等。其中,液晶顯示單元製程是 指將下基板(薄膜電晶體陣列基板)及上基板(彩色濾光基 板)加以組合,並形成一液晶層於兩基板間。 請參考圖卜其綠示為習知之液晶顯示器的剖面示意BACKGROUND OF THE INVENTION 1. Field of the Invention This invention relates to an active device array substrate and a repair method thereof, and more particularly to an active device capable of preventing light leakage and avoiding electrostatic discharge damage. Array substrate and method of repairing the active device array substrate. [Prior Art] Today's social multimedia technology is quite developed, and most of them benefit from advances in semiconductor components or display devices. As for the display device, a liquid crystal display having superior characteristics such as high image quality, good space utilization efficiency, low power consumption, and no radiation has gradually become the mainstream of the market. The main processes of the liquid crystal display include a thin film transistor array (TFT Array) substrate process, a color filter (ColorFilter) process, a liquid crystal display cell (Liquid Crystal Cell) process, and a liquid crystal display module assembly process. The liquid crystal display unit process refers to combining a lower substrate (thin film transistor array substrate) and an upper substrate (color filter substrate) to form a liquid crystal layer between the two substrates. Please refer to the cross-section of the liquid crystal display shown in the figure.

圖,為I方便制,圖1僅繪示說明所需之構件。習知液 晶顯示器至少包括薄膜電晶體陣列基板UQ 板⑽、黑矩陣層122、框膠13〇、液晶層14〇、偏光板⑸土、 =及Λ框160。其中’黑矩陣層122係配置於彩色濾光 ^板^〇上’框膠13〇係配置於彩色濾光基板m與薄膜 電晶體陣列基板110之間,而液晶層14〇係配 ' 16596twf.doc/006 光基板120與薄膜電晶體陣列基板丨i〇與框膠所形成 的封閉空間中。 此外,偏光板152、154係個別配置在薄膜電晶體陣 列基板110與彩色濾光基板120之未配置液晶層14〇的另 一側表面上,而外框160則配置在偏光板152上。值得留 意的是’薄臈電晶體陣列基板110可分為顯示區10與周邊 線路區20 ’其中周邊線路區20内係配置有多條引線112 以作為顯示器傳輸訊號之用。 承接上述,傳統形成液晶層14〇的方式,係先由框勝 130於薄膜電晶體陣列基板11〇與彩色濾光基板12〇之間 圍出一封閉區域’之後再利用毛細管原理藉由外部的大氣 慢慢將液晶注入薄膜電晶體陣列基板11〇與彩色濾光基板 120所圍成的封閉區域内。由於此注入過程費時,為了因 應未來大尺寸液晶面板的量產需求,近來更提出一種液晶 滴下(One Drop Fill, ODF )的技術。所謂的液晶滴下技術 係先在薄膜電晶體陣列基板110或彩色濾光基板120上形 成框膠130 ’接著將液晶滴入框膠130所圍的區域中,然 後再將薄膜電晶體陣列基板110與彩色濾光基板120貼 合,並藉由紫外光的照射使框膠130硬化以黏合上下兩基 板。 然而,為了使框膠130均勻受到紫外光照射,以避免 因框膠130硬化不完全而污染部分的液晶140,所以通常 會將彩色濾光基板120上的黑矩陣層122朝面板中心内縮 一定距離,以使得黑矩陣層122與框膠130之間產生一可 16596twf.doc/006 能漏光之區域170。此外’更因為周邊線路區2〇中的引線 112之間亦無遮光之设計’所以背光模組所發出的光線1⑽ 便可能通過引線112間的間隙,而在外框ι6〇與薄膜電曰曰 體陣列基板110之交界處發生直視漏光或斜視漏光等 題。 ° 【發明内容】 有鑑於此,本發明的目的就是在提供一種主動元件陣 列基板’其具有防止位於周邊線路區之引線間漏光 計,以及防止靜電放電破壞之功能。 又 、本發明的再一目的是提供一種主動元件陣列基板之 修補方法,㈣於在本發明之絲元件㈣基板遭受 放電破壞時,對主動元件陣列基板進行修補。 本發明提出-種主動元件陣列基板了其包括一基板、 多數主動兀件、多條第-弓丨線、多條第二引線與一第 置遮光層。其中’基板具有—顯示區以及位於顯示區外圍 之-周邊線㈣,而主㈣件陣列排列於基板上 内,且各主就件包括_第—導體層㈣ 此外,第—⑽配置於基板上之周邊線路區内Τ而第I引 :引線配置於基板上之周邊線路區内,而第二引線二 導體層係彼此電性相軌為同 楚-㈣,ml 間’並部分地覆蓋住多條 、/子置遮光層未連接於任何電壓源,且 16596twf.doc/006 第一浮置遮光層是與第二導體層為同一膜層。 本發明之一較佳實施例之主動元件陣列基板,更包括 多數第一接墊,其係配置於基板上之周邊線路區内,其中 第一接塾分別連接於各第一引線,而第一浮置遮光層更配 置於兩相鄭之第一接墊之間。 本發明之一較佳實施例之主動元件陣列基板,例如更 包括多條第一擬引線,且第一擬引線與第一導體層係同一 膜層,而第一浮置遮光層是未與第一擬引線重疊。 本發明之一較佳實施例之主動元件陣列基板,例如更 包括一弟一浮置遮光層,配置於兩相鄰之第二引線之間, 並部分地與第二引線重疊,其中第二浮置遮光層未連接於 任何電壓源,且第二浮置遮光層是與第一導體層為同一膜 層。 本發明之一較佳實施例之主動元件陣列基板,例如更 包括多數第二接墊,其係配置於基板上之周邊線路區内。 其中第二接墊是分別連接於第二引線,而第二浮置遮光層 更配置於兩相鄰之第二接墊之間。 本發明之一較佳實施例之主動元件陣列基板,例如更 包括多條第二擬引線,且第二擬引線與第二導體層係同一 膜層,而第二浮置遮光層是未與第二擬引線重疊。。 本發明之一較佳實施例之主動元件陣列基板,其中主 動元件例如為薄膜電晶體。 、本發明之一較佳實施例之主動元件陣列基板,其中第 導體層例如係為閘極層,而第二導體層例如係為源極/ 16596twf.doc/〇〇6 汲極層。 本發明之一較佳實施例之主動元件陣列基板,其中第 :導體層例如為源極/汲極層,而第二導體層例如為閘極 本,明之一較佳實施例之主動元件陣列基板,例如更 包括一靜電故電保護電路,其係配置於基板上之顯示區與 層之間’且靜電放電保護電路與第遮 …本發明之一較佳實施例之主動元件陣列基板,其中 電放電保護電路例如包括多數保護環與一連接導線,复 由連接導娜連接,且第一浮置遮光層是养 由連接導線電性連接於保護環。 疋猎 ㈣之—較佳實施例之主動元件陣列基板,其中各 健㈣電性連接於對應之多條第—引線其中之—。中各 勺括本=之"'較佳實施例之主動元件陣列基板,例如更 ==_護電路與多數第-靜電導引元件。ί 遮光層是位於二-接墊’而第-浮置 -靜雷道HI - T 電保5蒦電與顯示區之間。此外,第 層之間,且:Π 電路與第-浮置遮光 之-及第-浮與對應之第-㈣其中 第- = 較佳實施例之主動元件陣列基板,其中各 極是電性連接於第—引線其中之一,而 16596twf.doc/006 第一浮置遮光層電性連接。 勺紅本ίΓί—較佳實施例之主動^件陣列基板,例如更 ^-靜電導引元件與第—浮置遮光層之間:二= 電導引元件電性連接。 一第静 包括^月,靜=實施例之主動元件陣列基板,例如更 = 元件,其係分別電性連接於對應之 墊〃中之一以及靜電散逸層與第一浮置遮光層之Fig. 1 is a convenient system, and Fig. 1 only shows the components required for the description. The conventional liquid crystal display includes at least a thin film transistor array substrate UQ board (10), a black matrix layer 122, a sealant 13 〇, a liquid crystal layer 14 〇, a polarizing plate (5), and a Λ frame 160. The 'black matrix layer 122 is disposed on the color filter board', and the frame glue 13 is disposed between the color filter substrate m and the thin film transistor array substrate 110, and the liquid crystal layer 14 is matched with '16596twf. Doc/006 The light substrate 120 and the thin film transistor array substrate 丨i〇 and the sealant formed in the closed space. Further, the polarizing plates 152 and 154 are disposed on the other surface of the thin film transistor array substrate 110 and the color filter substrate 120 where the liquid crystal layer 14 is not disposed, and the outer frame 160 is disposed on the polarizing plate 152. It is worth noting that the thin-film array substrate 110 can be divided into a display area 10 and a peripheral line area 20', wherein a plurality of leads 112 are disposed in the peripheral line area 20 for transmitting signals for the display. In the above, the conventional method of forming the liquid crystal layer 14 , is to first enclose a closed region between the thin film transistor array substrate 11 〇 and the color filter substrate 12 由 by the frame finder 130 and then use the capillary principle to externally The atmosphere slowly injects the liquid crystal into the closed region surrounded by the thin film transistor array substrate 11 and the color filter substrate 120. Since this injection process is time consuming, in order to meet the mass production demand of large-size liquid crystal panels in the future, a technology of One Drop Fill (ODF) has recently been proposed. The so-called liquid crystal dropping technique first forms a sealant 130 on the thin film transistor array substrate 110 or the color filter substrate 120. Then, the liquid crystal is dropped into a region surrounded by the sealant 130, and then the thin film transistor array substrate 110 is The color filter substrate 120 is bonded, and the sealant 130 is hardened by ultraviolet light to bond the upper and lower substrates. However, in order to uniformly irradiate the sealant 130 with ultraviolet light to avoid contamination of a portion of the liquid crystal 140 due to incomplete curing of the sealant 130, the black matrix layer 122 on the color filter substrate 120 is generally retracted toward the center of the panel. The distance is such that an area 170 of 16596 twf.doc/006 light leakage is generated between the black matrix layer 122 and the sealant 130. In addition, 'because there is no blackout between the leads 112 in the peripheral line area', the light 1(10) emitted by the backlight module may pass through the gap between the leads 112, and the outer frame ι6〇 and the thin film At the junction of the bulk array substrate 110, problems such as direct light leakage or squinting light leakage occur. SUMMARY OF THE INVENTION In view of the above, an object of the present invention is to provide an active device array substrate which has a function of preventing leakage between leads in a peripheral line region and preventing electrostatic discharge damage. Further, it is still another object of the present invention to provide a method of repairing an active device array substrate, and (4) repairing the active device array substrate when the substrate (4) of the present invention is subjected to discharge breakdown. The invention provides an active device array substrate comprising a substrate, a plurality of active elements, a plurality of first-bow lines, a plurality of second leads and a first light shielding layer. Wherein the 'substrate has a display area and a peripheral line (four) located at the periphery of the display area, and the main (four) piece array is arranged on the substrate, and each of the main parts includes a _--conductor layer (4). Further, the first (10) is disposed on the substrate. In the peripheral circuit area, the first lead: the lead is arranged in the peripheral circuit area on the substrate, and the second lead two conductor layers are electrically aligned with each other - (4), and between the ml's partially covered The strip/sub-shielding layer is not connected to any voltage source, and the 16596twf.doc/006 first floating light-shielding layer is the same film layer as the second conductor layer. The active device array substrate of the preferred embodiment of the present invention further includes a plurality of first pads disposed in the peripheral circuit region on the substrate, wherein the first contacts are respectively connected to the respective first leads, and the first The floating light shielding layer is further disposed between the first pads of the two phases Zheng. The active device array substrate of the preferred embodiment of the present invention further includes, for example, a plurality of first pseudo-leads, and the first pseudo-lead and the first conductor layer are the same film layer, and the first floating light-shielding layer is not A quasi-lead overlap. The active device array substrate of a preferred embodiment of the present invention further includes, for example, a floating-light shielding layer disposed between two adjacent second leads and partially overlapping the second leads, wherein the second floating The light shielding layer is not connected to any voltage source, and the second floating light shielding layer is the same film layer as the first conductor layer. The active device array substrate of a preferred embodiment of the present invention further includes, for example, a plurality of second pads disposed in a peripheral line region on the substrate. The second pads are respectively connected to the second leads, and the second floating light shielding layer is disposed between the two adjacent second pads. The active device array substrate of the preferred embodiment of the present invention further includes, for example, a plurality of second pseudo-leads, and the second pseudo-lead and the second conductor layer are the same film layer, and the second floating light-shielding layer is not The two pseudo-leads overlap. . An active device array substrate according to a preferred embodiment of the present invention, wherein the active element is, for example, a thin film transistor. In an active device array substrate according to a preferred embodiment of the present invention, the first conductor layer is, for example, a gate layer, and the second conductor layer is, for example, a source/16596 twf.doc/〇〇6 drain layer. In an active device array substrate according to a preferred embodiment of the present invention, the first conductor layer is, for example, a source/drain layer, and the second conductor layer is, for example, a gate, the active device array substrate of the preferred embodiment. For example, the present invention further includes an electrostatic protection circuit disposed between the display region and the layer on the substrate, and an electrostatic discharge protection circuit and a first embodiment of the present invention. The discharge protection circuit includes, for example, a plurality of guard rings and a connecting wire, and is connected by a connection guide, and the first floating light shielding layer is electrically connected to the protection ring by the connection wires. (4) The active device array substrate of the preferred embodiment, wherein each of the plurality (four) is electrically connected to the corresponding plurality of first leads. Each of the scoops includes the active device array substrate of the preferred embodiment, such as a more ==_ protection circuit and a plurality of first-electrostatic guiding elements. ί The light-shielding layer is located between the two-pad's and the first-floating-static track HI-T 电 蒦 蒦 与 与 与 与 与 与In addition, between the first layers, and: Π circuit and the first-floating shading-and-floating-corresponding-(four)--the preferred embodiment of the active device array substrate, wherein the poles are electrically connected One of the first leads, and the 16596twf.doc/006 first floating light shielding layer is electrically connected. The active device array substrate of the preferred embodiment, for example, between the electrostatic guiding element and the first floating light shielding layer: two = electrical connection elements are electrically connected. The first embodiment includes an active device array substrate, for example, an element, which is electrically connected to one of the corresponding pads and the static dissipation layer and the first floating light shielding layer.

I 〃本發明之-較佳實施例之主動元件陣列基板, 第二靜電導引元件例如為—電晶體,且電晶體之閘極 性連接於對應之多條第—齡射之—, 與及極是分_第-料絲層餅電散韻紐2極 本發明提出-種主動元件陣列基板之修補方法,盆適 於修補本發明之主動元件陣列基板,上述修補主動元件陣 列基板之侧方法包括#帛—祕與其麟應之靜電散逸 層間發生靜電破猶,將靜f散逸層遭受靜電破壞之部位 與靜電散逸層之其他部位電性隔離。 、本發明之一較佳實施例之主動元件陣列基板之修補 方法其中電性隔離之方法例如包括雷射切割。 综上所述,本發明之主動元件陣列基板具有第—浮置 遮光層配置於兩相鄰之第一引線之間,因此可避免於第一 引線間的間隙處發生漏光的現象。此外,由於第一浮置遮 光層是恆處於浮接(floating)狀態,也就是不與任何電壓源 1354853 16596twf.doc/006 第-導體層220a也可以是源極/沒極層,此時 220b則為閘極層。 一等篮層 此外’第一引線230配置於基板21〇上 B内,且其第-引線23。之一端更對應連接用以= 路接合的多個第一接墊230a,第一引線23〇的另一 與第-導體層22Ga電性相連且為同—膜層。 ' ^ 實施例之第-引線則物是與顯㈣A内之掃^ ^ line)電性連接,用以傳輸訊號至顯示區A内。另外,( 引線240配置於基板21〇上之周邊線路内,且 線240 -端更對應連㈣以與外界電路接合的 : 墊2他。此外,第二引線24〇的另一端則是 ^ 電广目連且為同一臈層。此處之第二引線_ 箱δίί戚至顯不區A内。 230 遮光層250配置於兩相鄰之第一引線 第一引線230。值得注意的是, 第一>予置戟層250未連接於任何輕源,且第 光層250是與第二導體層220b為同-膜層。換古之,在f 造主動元件陣列基板時,第二導體層 線 240與第-浮置遮光層250可一併形成。如此4:口! = = 250即可遮蔽第一引線23〇間的間隙,以防止 I線230間之間隙發生漏光的現象。此外,由 二未連接於任何電壓源,因此,本發明並 不會4耗額外㈣源,且不會餘動元件_基板2〇〇上 12 1354853 16596twf.doc/006 之電流產生相互干擾的問題,以維持液晶顯示器之顯示品 . 質。 . 請再參考圖2,一般來說在液晶顯示器的製程令,通 常會在形成第一引線230的同時形成多條第一擬引線23〇b 與第二擬引線240b,而這些第一擬引線23〇b與第二擬引 線240b實際上並未與顯示區a内的掃猫線及資料線電性 連接。值得一提的是,由於浮接(fl〇ating)的第一擬引線 230b/第二擬引線240b與其他導體層之間易產生靜電放電 :破壞,因此本實施例之第-浮置遮光層25〇是不與第一擬 引線230b重豐,以避免在第一擬引線以仙與第一浮置遮 . 光層250重疊處產生靜電放電破壞的現象。 ®4纟會示為本發明之第二浮置遮光層之局部剖面示意 圖。請同時參考® 2與圖4,除了以第一浮置遮光層25〇 遮蔽第一引線230間的間隙以外,本發明也可配置第二浮 置遮光層252於兩相鄰之第二引線24〇間的間隙,其中第 一浮置遮光層252是部分地與第二引線240重疊,而第二 • 浮置遮光層252未連接於任何電壓源,且第二浮置遮光層 • 252是與第一導體層22〇a為同一膜層(如圖4所示)。換 言之’在製造主動元件陣列基板2〇〇時,第一導體層22〇a、 第一引線230與第二浮置遮光層252可一併形成。當然, 第二浮置遮光層252亦不與第二擬引線24〇b重疊,以避免 在第二擬引線240b與第二浮置遮光層252重疊處產生靜電 放電破壞的現象。 在本發明之另一實施例中,上述之第一浮置遮光層 13 1354853 16596tw£doc/006 第-洋置遮光層250係藉由連接導線264電性連接於保護 環262。而且,每-保護環262係電性連接於對應之;;條 第一引線230。 ’、 、值得-提的是,這些保護環262例如是由電晶體所構 成,當電壓訊號輸入至第一引線23〇之後,隨之這些保護 環2/2將被開啟。此時,若在第一浮置遮光層25〇上有靜 電荷產生,此靜電荷即可從第一浮置遮光層25〇依序經由 連接導線264及保護環262而散逸。當然,在其他實施例 中,靜電放電保護電路260也可以是額外設計的電路,本 發明並未限定其為目前常見之内部防護環。 同樣地,第二浮置遮光層252也可以與一靜電放電保 護電路(未繪示)電性連接,以提供一散逸路徑給第二浮 置遮光層252上的靜電荷,進而避免在第二浮置遮光層252 與第一引線240之間產生靜電放電破壞的現象,而此靜電 放電保護電路例如是與上述之靜電放電保護電路相似,此 處不再資述。 第三實%^ 圖8繪示為本發明第三實施例之主動元件陣列基板示 意圖。請參考圖8,本實施例中之靜電放電保護電路270 電性連接於第一接墊230a,且第一浮置遮光層250是位於 靜電放電保護電路270與顯示區A之間。特別的是,本實 施例之主動元件陣列基板200更包括多個第一靜電導引元 件280 ’配置於靜電放電保護電路27〇與第一浮置遮光層In the active device array substrate of the preferred embodiment of the present invention, the second electrostatic guiding element is, for example, a transistor, and the gate of the transistor is connected to the corresponding plurality of first-aged-- and The invention relates to a method for repairing an active device array substrate, wherein the basin is suitable for repairing the active device array substrate of the present invention, and the method for repairing the active device array substrate includes #帛—The static electricity generated between the static dissipating layer and the lining of the lining of the lining is electrically isolated from the other parts of the static dissipative layer. A method of repairing an active device array substrate according to a preferred embodiment of the present invention, wherein the method of electrically isolating includes, for example, laser cutting. In summary, the active device array substrate of the present invention has a first floating light shielding layer disposed between two adjacent first leads, thereby avoiding light leakage at the gap between the first leads. In addition, since the first floating light shielding layer is always in a floating state, that is, without any voltage source 1354853 16596twf.doc/006, the first conductor layer 220a may also be a source/drain layer, at this time 220b Then it is the gate layer. The first lead 230 is disposed in the upper portion B of the substrate 21, and the first lead 23 thereof. One end is more correspondingly connected to the plurality of first pads 230a for the junction, and the other of the first leads 23A is electrically connected to the first conductor layer 22Ga and is the same film layer. The ^-lead of the embodiment is electrically connected to the scan line in the display (A) A for transmitting signals to the display area A. In addition, (the lead 240 is disposed in the peripheral line on the substrate 21A, and the line 240-end is further connected (4) to be engaged with the external circuit: the pad 2. In addition, the other end of the second lead 24〇 is ^ The wide mesh is connected to the same layer. Here, the second lead_box δ ίί戚 is displayed in the area A. 230 The light shielding layer 250 is disposed on the two adjacent first lead first leads 230. It is worth noting that the first &gt The predecessor layer 250 is not connected to any light source, and the photo layer 250 is the same as the second conductor layer 220b. In other words, when the active device array substrate is fabricated, the second conductor layer 240 The first floating contact layer 250 can be formed together. Thus 4: mouth! == 250, the gap between the first leads 23 can be shielded to prevent light leakage between the gaps of the I lines 230. It is not connected to any voltage source. Therefore, the present invention does not consume 4 additional sources, and does not cause mutual interference problems in the current of the current component _ substrate 2 12 12 1354853 16596 twf.doc/006 to maintain the liquid crystal. The display of the display. Quality. Please refer to Figure 2, generally in the LCD The process command generally forms a plurality of first dummy leads 23〇b and second pseudo leads 240b while forming the first lead 230, and the first pseudo leads 23〇b and the second pseudo leads 240b are not actually It is electrically connected with the sweeping cat line and the data line in the display area a. It is worth mentioning that the floating between the first pseudo lead 230b/the second pseudo lead 240b and other conductor layers is easy to generate. Electrostatic discharge: destruction, so the first floating contact layer 25A of the embodiment is not overlapped with the first dummy lead 230b, so as to avoid overlapping of the first dummy lead with the first floating cover layer 250 The phenomenon of electrostatic discharge damage occurs. ®4纟 will be a partial cross-sectional view of the second floating light-shielding layer of the present invention. Please refer to both ® 2 and Figure 4, except that the first lead is shielded by the first floating light-shielding layer 25 In addition to the gaps of 230, the present invention may also configure a gap between the second floating light shielding layer 252 and the two adjacent second leads 24, wherein the first floating light shielding layer 252 partially overlaps the second leads 240. And the second floating Shield 252 is not connected to any voltage source, and the second float The light shielding layer 252 is the same film layer as the first conductor layer 22A (as shown in FIG. 4). In other words, when the active device array substrate 2 is fabricated, the first conductor layer 22A, the first lead 230 The second floating light shielding layer 252 can be formed together with the second floating light shielding layer 252. Of course, the second floating light shielding layer 252 does not overlap with the second dummy wiring 24〇b to avoid the second dummy wiring 240b and the second floating light shielding layer 252. The phenomenon of electrostatic discharge destruction occurs in the overlap. In another embodiment of the present invention, the first floating light shielding layer 13 1354853 16596 tw/doc/006 is disposed by the connecting wire 264. In the guard ring 262. Moreover, each of the guard rings 262 is electrically connected to the corresponding; It is worth mentioning that these guard rings 262 are for example formed by transistors, and after the voltage signals are input to the first leads 23, these guard rings 2/2 will be turned on. At this time, if static charge is generated on the first floating light-shielding layer 25, the static charge can be dissipated from the first floating light-shielding layer 25 through the connecting wires 264 and the guard ring 262 in order. Of course, in other embodiments, the ESD protection circuit 260 may also be an additionally designed circuit, and the present invention is not limited to the conventional internal protection ring. Similarly, the second floating light shielding layer 252 can also be electrically connected to an electrostatic discharge protection circuit (not shown) to provide a dissipation path to the static charge on the second floating light shielding layer 252, thereby avoiding the second The electrostatic discharge protection phenomenon occurs between the floating light shielding layer 252 and the first lead 240, and the electrostatic discharge protection circuit is similar to the above-described electrostatic discharge protection circuit, and will not be described herein. Third Embodiment FIG. 8 is a schematic view showing an active device array substrate according to a third embodiment of the present invention. Referring to FIG. 8, the electrostatic discharge protection circuit 270 of the present embodiment is electrically connected to the first pad 230a, and the first floating light shielding layer 250 is located between the electrostatic discharge protection circuit 270 and the display area A. In particular, the active device array substrate 200 of the present embodiment further includes a plurality of first electrostatic guiding elements 280' disposed on the electrostatic discharge protection circuit 27 and the first floating light shielding layer.

15 1354853 16596twf.doc/006 250之間,且各第一靜電導引元件280是與對應之一第— 接墊230a及第一浮置遮光層250電性連接。 更詳細地說,本實施例之第一靜電導引元件28〇例如 為一電aa體,且各電晶體之閘極28〇g與汲極280(1是電性 „應之第-接墊23〇a,而電晶體之源極28〇s是與 第一浮置遮光層250電性連接。當靜電放電發生時,雖然 有部分之靜電荷可藉由靜電放電保護電路謂所提供之ς 徑而散逸,但仍會有部分之靜電荷朝向顯示區Α移動,此 時靜電荷在瞬間所產生的電壓便會開啟第一靜電導引元件 280之閘極28Gg,以使靜電荷依序由電晶體之沒極2⑽ 與源極施導引至第一浮置遮光層250上。如此一來,第 -接塾2施與第-浮置遮光層別將具有相同的電位,進 而使第-接墊23〇a與第一浮置遮光層25〇之間免於遭受靜 電放電破壞。此外,在上述開啟間極·的過程會消耗靜 電荷,因此其亦可達職護絲元⑽縣板200之目的。 立圖9繪不為本發明第三實施例之主動元件陣列基板的 。請參考圖9 ’為了加強主動元件陣列基板散 Ϊ靜電之功效’本實施例更例如在主航件陣列基板200 置一靜電散逸層282與多個第二靜電導引元件綱, :、靜^散逸層282係覆蓋於第一接塾23加的一部分上, ,位於第-靜電導引元件與第一浮置遮光層咖之 間’而與第-靜電導5丨元件28〇電性連接。 之第靜電導引树挪係分別電性連接於對應 以及靜電散逸層282與第-浮置遮光層 16 1354853 16596twf.d〇c/〇〇615 1354853 16596twf.doc/006 250, and each of the first electrostatic guiding elements 280 is electrically connected to the corresponding one of the first pads 230a and the first floating light shielding layer 250. In more detail, the first electrostatic guiding element 28 of the embodiment is, for example, an electrical aa body, and the gates 28 〇 g and the drains 280 of the respective transistors (1 is an electrical first-pad) 23〇a, and the source of the transistor 28〇s is electrically connected to the first floating light shielding layer 250. When electrostatic discharge occurs, although some static charge can be provided by the electrostatic discharge protection circuit. The path is dissipated, but there is still a part of the static charge moving toward the display area ,. At this time, the voltage generated by the static charge at an instant turns on the gate 28Gg of the first electrostatic guiding element 280, so that the static charge is sequentially The transistor 2 (10) and the source are guided to the first floating light shielding layer 250. Thus, the first interface 2 and the first floating light shielding layer will have the same potential, thereby enabling the first The pad 23〇a and the first floating light shielding layer 25〇 are protected from electrostatic discharge damage. In addition, the process of opening the interpole is consumed by static electricity, so that it can also reach the service wire element (10) county plate. The purpose of 200. Figure 9 is not the active device array substrate of the third embodiment of the present invention. Please refer to Figure 9. In order to enhance the effect of the electrostatic scattering of the active device array substrate, the present embodiment further covers, for example, a static dissipative layer 282 and a plurality of second electrostatic guiding elements in the main carrier array substrate 200, and the static dissipating layer 282 is covered. On a portion of the first interface 23, between the first electrostatic guiding element and the first floating light shielding layer, and electrically connected to the first electrostatic conducting 5 element 28. The tree is electrically connected to the corresponding and electrostatic dissipating layer 282 and the first floating opaque layer 16 1354853 16596twf.d〇c/〇〇6

250之間。其中,各第二靜電導引元件例如為一電晶 體且電B曰體之閘極284g是電性連接於對應之第一接墊 230a,而電晶體之源極284s與汲極28如是分別與第一浮 置,光層250與靜電散逸層282電性連接。如此二來,靜 電荷更可進一步被引入靜電散逸層282中,進而藉由第二 靜電導引元件284散逸至第-浮置遮光層,上。如此一 來々’不,可以使靜電荷的能量大幅衰減,而第-接塾230a /、第浮置遮光層250也會具有相同的電位,更可確保第 -接墊230a與第一浮置遮光層25〇免於遭受靜電放電破 壞。 、^然]在本實施例之主動元件陣列基板2〇〇中,也可 以在第二浮置遮光層252附近配置有如同上述之靜電放電 保護電,、第—靜電導引元件、靜電散逸層或第二靜電導 引元件等’以提供散逸路徑給在第二浮置遮光層252 —引線240上之靜電荷。Between 250. Wherein, each of the second electrostatic guiding elements is, for example, a transistor and the gate 284g of the electric B body is electrically connected to the corresponding first pad 230a, and the source 284s and the drain 28 of the transistor are respectively The first floating layer, the light layer 250 is electrically connected to the static dissipation layer 282. In this way, the static charge can be further introduced into the static dissipative layer 282, and then dissipated to the first floating anti-lighting layer by the second electrostatic guiding element 284. In this way, no, the energy of the static charge can be greatly attenuated, and the first interface 230a / the first floating light shielding layer 250 also have the same potential, and the first pad 230a and the first floating can be ensured. The light shielding layer 25 is protected from electrostatic discharge damage. In the active device array substrate 2 of the present embodiment, the electrostatic discharge protection device, the first electrostatic discharge device, and the static dissipation layer may be disposed in the vicinity of the second floating light shielding layer 252. Or a second electrostatic guiding element or the like 'to provide an escape path to the static charge on the second floating light-shielding layer 252 - the lead 240.

差四貫施仓丨 圖1〇繪示圖9中之第一引線與其所對應之靜 層間發生靜電破壞之示意目。圖示本發明之靜電散逸 層遭受靜電破壞之部位與靜電散逸層之其他部位電性隔離 ^不意圖°請參考圖10,當第一接墊230a與其所對岸之 靜電散逸層282間(例如是D處)發生靜電破壞時,:發 列基板200之修補方法例如是將靜電散逸 曰 4又靜電破壞之部位(例如是ϋ處)與靜電散逸層The difference between the first lead and the corresponding static layer in Fig. 9 is shown in Fig. 1 . The portion of the static dissipative layer of the present invention that is subjected to electrostatic damage is electrically isolated from other portions of the static dissipative layer. Referring to FIG. 10, when the first pad 230a is opposite to the electrostatic dissipating layer 282 of the opposite bank (for example, When electrostatic breakdown occurs at D), the repairing method of the emitting substrate 200 is, for example, a portion where the static electricity is dissipated and electrostatically destroyed (for example, a crucible) and an electrostatic dissipating layer.

17 1354853 16596twf.doc/006 282之其他雜電性_,如圖u所示。具、 隔離之方法例如是沿著虛線U L2以及L3_L4 D兄,電子 割。如此一來,若D處之靜電散逸層282因靜電切 而短路於第-接墊23〇a,亦不會對其他部分 響。換言之’此修補方法可避免因主動 列=成影 遭受靜電放電破壞而影響顯示器的顯示品質車板綱 至少槪㈣軸从修補方法 了、因本發明之主動元件陣列基板配置有浮 層’此子置遮光層可以遮蔽第一引線間之間隙,進: f先的現象發生,以維持液晶顯示器之顯示品質。而且 3 = 層不外接任何電壓源’所以不但可以降 流的ΓίΓ耗電量,更可以避免液晶顯示器發生過電 =第二靜電導引元件與靜電散逸層等等,因此 動讀陣列基板可免於遭受靜電放電的破壞。 在本發明具有靜電散逸層的主動元件陣列其 即使靜電散逸層遭受到靜電破壞,本發明亦可ς 使遭受靜電破壞之部位與靜電散逸層之其他ϊ °、進而維持主動元件陣列基板正常之功用。 本發明已以較佳實施例揭露如上,然其並非用以 限疋本發明’任何熟習此技藝者,在不脫離本發明之精神 18 16596twf.doc/006 和範圍内’當可作些許之更動與潤飾,因此本發明之保護 範圍當視後附之申請專利範圍所界定者為準。 ' 【圖式簡單說明】 圖1繪示為習知之液晶顯示器的剖面示意圖。 圖2緣不為本發明之第一 示意圖。 實施例之主動元件陣列基板 圖3繪示為本發明之第一實施例之主動元件陣列基 局部剖面示意圖。 1 圖4繪示為本發明之第二浮置遮光層之局部剖面示意 圖5繪示為本發明之另一 示意圖。 實施例之第一接墊處的上視 圖6繪示為本發明之另一 示意圖。 實施例之第二接墊處的上視 圖7繪示為本發明之第二實施例之主動元件 示意圖。 土 圖8繪示為本發明之第三實施例之主動元件陣列基板 示意圖。 -圖9繪示為本發明之第三實施例之主動元件陣列基板 的不意圖。 圖10繪示為圖9中之第一引線與其所對應之靜 逸層間發生靜電破壞之示意圖。 @ 圖11繪示為本發明之靜電散逸層遭受靜電破壞之部 位與靜電散逸層之其他部位電性隔離之示意圖。 1354853 16596twf.doc/006 【主要元件符號說明】 10、A :顯示區 20、B .周邊線路區 110 :薄膜電晶體陣列基板 120 :彩色濾光基板 122 :黑矩陣層 130 :框膠 140 :液晶層 152、154 :偏光板 160 :外框 200 :主動元件陣列基板 210 :基板 220 :主動元件 220a :第一導體層 220b :第二導體層 230 :第一引線 230a :第一接墊 230b :第一擬引線 240 :第二引線 240a :第二接墊 240b :第二擬引線 250 :第一浮置遮光層 252 :第二浮置遮光層 260、270 :靜電放電保護電路 20 1354853 16596twf.doc/006 262 :保護環 264 :連接導線 280 :第一靜電導引元件 280d、284d :汲極 280g、284g :閘極 280s、284s :源極 282 :靜電散逸層 284 :第二靜電導引元件 D:第一引線與其所對應之靜電散逸層間發生靜電破 壞處 L1-L2、L3-L4 :虛線17 1354853 16596twf.doc/006 282 Other miscellaneous properties _, as shown in Figure u. The method of isolation and isolation is, for example, along the dashed lines U L2 and L3_L4 D, electronic cutting. As a result, if the static dissipative layer 282 at the D is short-circuited to the first pad 23A due to electrostatic cutting, it will not ring to other portions. In other words, 'this repair method can avoid the display quality of the display caused by the active column=shadowing electrostatic discharge damage. At least the 四(4) axis is repaired. Since the active device array substrate of the present invention is provided with a floating layer' The light shielding layer can shield the gap between the first leads, and the phenomenon of f: first occurs to maintain the display quality of the liquid crystal display. And 3 = no external voltage source is connected to the layer' so that it can not only reduce the power consumption of the liquid crystal, but also avoid the over-current of the liquid crystal display = the second electrostatic guiding element and the electrostatic dissipating layer, etc., so the movable reading array substrate can be avoided. Suffering from the destruction of electrostatic discharge. In the active device array having the electrostatic dissipating layer of the present invention, even if the electrostatic dissipating layer is subjected to electrostatic damage, the present invention can also protect the portion suffering from electrostatic damage from the other portion of the electrostatic dissipating layer, thereby maintaining the function of the active device array substrate. . The present invention has been disclosed in the above preferred embodiments, but it is not intended to limit the invention to anyone skilled in the art, and may make some changes without departing from the spirit of the invention 18 16596 twf.doc/006. And the scope of the present invention is defined by the scope of the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a cross-sectional view showing a conventional liquid crystal display. Figure 2 is not the first schematic view of the present invention. Active element array substrate of the embodiment Fig. 3 is a partial cross-sectional view showing the active element array base of the first embodiment of the present invention. 1 is a partial cross-sectional view showing a second floating light shielding layer of the present invention. FIG. 5 is another schematic view of the present invention. Figure 6 of the first pad of the embodiment is another schematic view of the present invention. Figure 7 of the second pad of the embodiment is a schematic view of the active device of the second embodiment of the present invention. Figure 8 is a schematic view showing an active device array substrate according to a third embodiment of the present invention. - Figure 9 is a schematic view showing an active device array substrate according to a third embodiment of the present invention. Figure 10 is a schematic view showing electrostatic breakdown between the first lead of Figure 9 and its corresponding resting layer. @ Figure 11 is a schematic view showing the electrical isolation of the electrostatically dissipative layer of the present invention from the other portions of the electrostatic dissipation layer. 1354853 16596twf.doc/006 [Description of main component symbols] 10, A: display area 20, B. Peripheral line area 110: thin film transistor array substrate 120: color filter substrate 122: black matrix layer 130: sealant 140: liquid crystal Layers 152, 154: polarizing plate 160: outer frame 200: active device array substrate 210: substrate 220: active device 220a: first conductor layer 220b: second conductor layer 230: first lead 230a: first pad 230b: A dummy lead 240: a second lead 240a: a second pad 240b: a second dummy lead 250: a first floating light shielding layer 252: a second floating light shielding layer 260, 270: an electrostatic discharge protection circuit 20 1354853 16596twf.doc/ 006 262: protective ring 264: connecting wire 280: first electrostatic guiding element 280d, 284d: drain 280g, 284g: gate 280s, 284s: source 282: electrostatic dissipation layer 284: second electrostatic guiding element D: Electrostatic breakdown between the first lead and its corresponding electrostatic dissipation layer L1-L2, L3-L4: dashed line

Claims (1)

100-4-6 十、申請專利範圍: 種主動元件陣列基板,包括· 邊線路^,具有―顯稀以及位於貞親賴之-周 且各該ii::括陣:排基板上之該顯示區内, 多數條楚 導體層以及—第二導體層; 内,而該此第配置於該基板上之該周邊線路區 同-膜層丨線與該第—導體層係彼此電性相連且為 内,第二^線’配置於該基板上之該周邊線路區 同—膜層弓丨線與該第二導體層係彼此電性相連且為 -第-浮置遮光層,配置於兩相鄰 =分地覆蓋該些第-引線,其中該第4置= 層為同-膜層;以及 心…!第-導體 多數條第-擬引線,且該些第一擬引線與該第一導體 j同-膜層’而該第一浮置遮光層未與該些第一擬引線 2. 如申請專職圍第丨項所述之主動元件陣列基板, =包^多數第-接塾’配置於該基板上之該周邊線路區 ^ ’其中該些第—触分別連接該些第—引線而該第一 浮置遮光層更配置於兩相鄰之該些第一接墊之間。 3. 如申請專利範圍第i項所述之主動元件陣列基板, 100-4-6 更包括一第二浮置遮光層,配置於兩相鄰之該些第二引線 之間,並部分地與該些第二引線重疊,其中該第二浮置遮 光層未連接於任何電壓源,且該第二浮置遮光層是與該第 一導體層為同一膜層。 4.如申凊專利範圍第3項所述之主動元件陣列基板, ^括多數第二接塾’配置於該基板上之該周邊線路區 二、、</、中邊些第二接墊分別連接於該些第二引線,而該第 /手置遮光層更配置於兩相鄰之該些第二接墊之間。 更包申請專利範圍第3項所述之主動元件陣列基板, 體iv多數條第二擬引線,雌些第二擬引線與該第二導 弓丨iii—膜層’而該第二浮置遮光層是未能些第二擬 其中^如中請專利範圍第1項所述之主動元件陣列基板, 该些主動元件為薄膜電晶體。 其如[料·圍第6項所述之主動元件陣列基板, 及極乂第—導體層係為閘極層,而該第二導體層係為源極/ 其中^如冑請專利範圍第6項所述之主動元件陣列基板, 層。“第—導體層為源極/汲極層,而該第二導體層為閘極 包括二如„申請專利範圍第1項所述之主動元件陣列基板更 該第一靜電放電保護電路,配置於該基板上之該顯示區與 ^¥、&汙置遮光層之間,且該靜電放電保護電路與該第一 /罝遮光層電性連接。 23 1354853 100-4-6 10. 如申請專利範圍第9項所述之主動元件陣列基 板,其中該靜電放電保護電路包括多數保護環與一連接導 線,其中該些保護環藉由該連接導線電性連接,且該第一 浮置遮光層是藉由該連接導線電性連接於該些保護環。 11. 如申請專利範圍第10項所述之主動元件陣列基 板,其中各該保護環係電性連接於對應之該些第一引線其 中 〇 12. 如申請專利範圍第2項所述之主動元件陣列基 板,更包括: 一靜電放電保護電路,電性連接於該些第一接墊,其 中該第一浮置遮光層是位於該靜電放電保護電路與該顯示 區之間,以及 多數第一靜電導引元件,配置於該靜電放電保護電路 與該第一浮置遮光層之間,且各該第一靜電導引元件是與 對應之該些第一接墊其中之一及該第一浮置遮光層電性連 接。 13. 如申請專利範圍第12項所述之主動元件陣列基 板,其中各該第一靜電導引元件為一電晶體,且該電晶體 之閘極與汲極是電性連接於該些第一引線其中之一,而該 電晶體之源極是與該第一浮置遮光層電性連接。 14. 如申請專利範圍第12項所述之主動元件陣列基 板,更包括一靜電散逸層,覆蓋於該些第一接墊之部分上, 並位於該些第一靜電導引元件與該第一浮置遮光層之間, 而與該些第一靜電導引元件電性連接。 24 100-4-6 板,述之主動元件陣列基 之該些第-接塾其中該別電性連接於對應 遮光層。 W電政逸層以及該第一浮置 16. 如申請專利範圍 5 板,其中各該第二靜電導引元伴^14之主較件陣列基 之閘極是電性連接於# 為—電晶體’且該電晶體 接㈣之些第—接塾其令之-,而該 散Ϊ層電連接錄是分職該第—浮置遮光層與該靜電 17. —種主動元件陣列基^ ^ ^ 請專利範圍第15項所述之主動元件:二=如申 陣列基板之修射法包括: 車U .該主動元件 靜雷第—㈣與其所對紅㈣電散逸層間發生 時’ _靜電散逸層遭受靜f破壞之部位^該靜 電政逸層之其他部位電性隔離。 "、以 17項所述之主較件陣列基板 m其中電性隔離之方法包括雷射切割。 25100-4-6 X. Patent application scope: An active device array substrate, including an edge line ^, having a display area on the substrate of the ii:: array: Inside, a plurality of conductor layers and a second conductor layer; and the peripheral line region of the same portion disposed on the substrate is electrically connected to the first conductor layer and is internally The second line 'the peripheral line region disposed on the substrate is the same as the film layer bow line and the second conductor layer are electrically connected to each other and is a -first floating light layer, disposed adjacent to each other = Covering the first leads, wherein the fourth set = the same layer - and the heart...! The first conductor is a plurality of first-like leads, and the first pseudo-leads are the same as the first conductor j--the film layer' and the first floating light-shielding layer is not associated with the first pseudo-leads 2. The active device array substrate according to the above item, wherein the plurality of first-interfaces are disposed on the peripheral circuit region of the substrate, wherein the first contacts are respectively connected to the first leads and the first floating The light shielding layer is disposed between the two adjacent first pads. 3. The active device array substrate as described in claim i, the 100-4-6 further includes a second floating light shielding layer disposed between the two adjacent second leads, and partially The second leads overlap, wherein the second floating light shielding layer is not connected to any voltage source, and the second floating light shielding layer is the same film layer as the first conductive layer. 4. The active device array substrate according to claim 3, wherein a plurality of second interfaces are disposed on the substrate, the peripheral line region 2, </, the second side pads The second lead is respectively connected to the second lead, and the first/hand shading layer is disposed between the two adjacent second pads. Further, the active device array substrate according to item 3 of the patent application scope, the body iv, the plurality of second pseudo-leads, the female second pseudo-lead and the second guide bow iii-film layer, and the second floating shading The layer is an active device array substrate which is not described in the second aspect of the patent application, and the active devices are thin film transistors. The active device array substrate as described in Item 6 and the pole-first conductor layer is a gate layer, and the second conductor layer is a source electrode. The active device array substrate, layer. The first conductor layer is a source/drain layer, and the second conductor layer is a gate electrode including the active device array substrate according to the first aspect of the patent application. The display area on the substrate is between the smear and the opaque layer, and the ESD protection circuit is electrically connected to the first 罝 罝 layer. The active device array substrate according to claim 9, wherein the electrostatic discharge protection circuit comprises a plurality of protection rings and a connecting wire, wherein the protection rings are electrically connected by the connecting wires The first floating light shielding layer is electrically connected to the protection rings by the connecting wires. The active device array substrate according to claim 10, wherein each of the protection rings is electrically connected to the corresponding first leads, wherein the active component is as described in claim 2 The array substrate further includes: an electrostatic discharge protection circuit electrically connected to the first pads, wherein the first floating light shielding layer is located between the electrostatic discharge protection circuit and the display area, and a plurality of first static electricity a guiding component disposed between the ESD protection circuit and the first floating shielding layer, and each of the first electrostatic guiding components is associated with one of the first pads and the first floating The light shielding layer is electrically connected. 13. The active device array substrate according to claim 12, wherein each of the first electrostatic guiding elements is a transistor, and the gate and the drain of the transistor are electrically connected to the first One of the leads, and the source of the transistor is electrically connected to the first floating light shielding layer. 14. The active device array substrate of claim 12, further comprising a static dissipative layer covering a portion of the first pads and located at the first electrostatic guiding elements and the first The floating light shielding layers are electrically connected to the first electrostatic guiding elements. 24 100-4-6 boards, which are described in the array of active device arrays, wherein the other terminals are electrically connected to the corresponding light shielding layer. W electrical escaping layer and the first floating layer 16. As claimed in the patent panel 5, wherein each of the second electrostatic guiding element mate 14 is electrically connected to the gate of the array substrate is electrically connected The crystal 'and the transistor is connected to the fourth part of the fourth layer, and the dip layer is electrically connected to the first floating-light shielding layer and the static electricity. ^ Please refer to the active component described in item 15 of the patent scope: 2 = the method of repairing the substrate of the array includes: the vehicle U. The active element is statically--(d) and the red (four) electric dissipation layer occurs when it occurs. The layer is subjected to static f damage. The other parts of the electrostatic layer are electrically isolated. ", the method of electrically isolating the main array substrate m described in item 17 includes laser cutting. 25
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