TWI354425B - Current limit protection apparatus and method for - Google Patents

Current limit protection apparatus and method for Download PDF

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Publication number
TWI354425B
TWI354425B TW96128203A TW96128203A TWI354425B TW I354425 B TWI354425 B TW I354425B TW 96128203 A TW96128203 A TW 96128203A TW 96128203 A TW96128203 A TW 96128203A TW I354425 B TWI354425 B TW I354425B
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Taiwan
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current
current limiting
indication signal
limiting protection
signal
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TW96128203A
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Chinese (zh)
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TW200908498A (en
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Ping Ying Chu
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Nuvoton Technology Corp
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1354425 96-011 24092twf.doc/n 九、發明說明: 【發明所屬之技術領域】 本發明是有關於-種限流保護裝置及其方法,且特別 . $有關於—種具有多個電流臨限值之限流保護裝置及其方 法。 【先前技術】 圖1為電腦系統所採用之習知限流保護裳置的輕接示 φ 冑圖。請參照圖1,標示110繪示習知之限流保護裝置, 120繪示用以連結通用串列匯流排(universal serial bus,簡 稱USB)週邊裝置的連接崞,而m則繪示電腦系統中,與 限流保護裝置110相關的電路。在標示130中繪示有通用 串列匯流排控制器131及電阻132,還有電腦系統所供應 之電源電壓VDD1及VDD2。此外,在圖中所標示的GN; 則表不為共同電位。 此限流保護裝置110會去偵測其所輸出的電流是否有 超過額定的電流臨限值,一般設定為500mA。若沒有超過 • 額定的電流臨限值時,限流保護裝置110就正常輸出電壓 νουτ,而若超過額定的電流臨限值時,限流保護裝置11〇 就停止輸出電壓VOUT,並產生過載警告訊號〇c給通用 串列匯流排控制器131,以告訴電腦系統發生了過載的情 形。 限流保護裝置110主要包括有M〇S電晶體 (metal-oxide semiconductor transistor)lll、電流偵測單元 112、限流控制單元us及驅動單元114。電流偵測單元j 12 5 1354425 96-011 24092twf.doc/n 用以偵測MOS電晶體m之導通電流值,並據以產生偵 測結果DS。限流控制單元n3預設有上述之額定電流臨限 值’並判定偵測結果DS是否達到額定的電流臨限值,當 判定為是時便產生停止驅動訊號TS及過載警告訊號〇c。 驅動單元114依據致能訊號EN決定是否啟動’且當驅動 單兀114啟動時便輸出閘極驅動訊號gs,以導通MOS電 曰b體111 ’而當驅動單元114接收到停止驅動訊號ts時, 便停止輸出閘極驅動訊號GS。 雖然在習知的技術中,電腦系統透過限流保護裝置 110來限制輸出至USB週邊裝置之電流的最大值,然而由 於此限流保護裝置11〇僅具有一個電流臨限值,當電腦系 統處於睡眠模式(sleeping mode)時,其電源供應器僅提供 約5伏特(V)的電壓,以及2〜2.5安培㈧的電流,此時^ 果有多個聯结至電腦系統的USB週邊裝置沒有跟著進入 睡眠模式’仍然消耗大量的電力,便會使電源供應哭超載, 導致其輸出電壓下降。如此-來,電腦系統的必要週邊裝 置便無法獲得維持操作的基本電力,因而無法正常操作, 進而使電腦系統無法由睡眠模式回復為正常模 ' mode) ° 、 正常狀況下,如果每-個USB週邊裂置都按 來’其實是不會造成電源供應器在睡眠模式下超載的 是市面上還是流通-些 式下只能消耗2.5mA的USB規格限制,因此容^氏梹 腦系統無法甴睡眠模式回復為正常模式。 導致電 6 1354425 96-011 24092twf.doc/n 【發明内容】 本發明的目的就是提供一種限流保護裝置及其方 法,其可防止電源供應器在睡眠模式下超載,進而使/雷腦 系統能順利地由睡眠模式回復為正常模式。 本發明的另一目的是提供一種限流保護裝置及其方 法,其可依照電腦系統之預設省電模式種類來調整電流臨 限值。 机 本發明的再—目的是提供一種限流保護裝置,其預設 有多個電流臨限值,並可根據指示訊號來選擇上述電流臨 限值其中之一。 &amp; 基於上述及其他目的,本發明提出一種限流保護裝 置。此限流保護裝置包括M〇s電晶體、電流偵測單元及 限流電路。MOS電晶體之其中一源/汲極用以接收第一電 壓,另一源/汲極用以輸出第二電壓,而閘極則用以接收閘 極驅動訊號,據以決定導通電流的大小。電流偵測單元用 以偵測MOS電晶體之導通電流值,據以產生偵測結果。 限流電路預設有多個電流臨限值,並依據指示訊號選擇上 述電流臨限值其中之―,以及依據選定之電流臨限值與偵 測結果二者之差而產生閘極驅動訊號。 基於上述及其他目的,本發明提出一種限流保護方 法’適用於限制電腦系統供應至通用串列匯流排週邊裝置 ,電流大小’其中電腦系統具有預設省電模式。此限流保 5蒦方法包括下列步驟:首先,定義多個電流臨限值。接著, 依據指示訊號選擇上述電流臨限值其中之一,其中指示訊 7 1354425 96-011 24092twf.d〇c/n 號係用來指示電腦线是否處於上述預設省電模式其十之 -。然後,制供應至-串列匯流排週邊裝置的電济 大小。接著’判斷供應至上述通用串列匯流排週邊裝置ς 電流大小是否達到敎之電流臨限值;當_為是時,將 供應至通用$列匯流排週邊裝置的電流大小箝制在選定之 電流臨限值’當觸為科,正常供應電流至戦 流排週邊裝置。 ’ 本發明由於設定有多個電流臨限值,並可依照指示訊 號來對應選擇不同狀況之供應電流大小。若運用本發明於 USB連接埠時,便可依照電腦系統之操作模式來限制提供 至USB週邊裝置的電流大小,並防止電源供應器在睡眠模 式下超載’進而使電腦系統能順利地由睡眠模式回復為正 常模式。 ' 為讓本發明之上述和其他目的、特徵和優點能更明顯 易懂’下文待舉較佳實施例,並配合所附圖式,作詳細說 明如下。 【實施方式】 圖2為依照本發明一實施例之限流保護裝置之内部主 要電路的方塊圖。請參照圖2 ,此限流保護裝置21〇主要 包括有MOS電晶體211、電流憤測單元212及限流電路 213 ° MOS電晶體之其中一源/沒極用以接收電壓viN,另 一源/汲極用以輸出電壓VOUT’而閘極則用以接收閘極驅 動訊號GS,據以決定導通電流的大小。電流偵測單元212 用以偵測MOS電晶體211之導通電流值,據以產生偵測1354425 96-011 24092twf.doc/n IX. Description of the invention: [Technical field to which the invention pertains] The present invention relates to a current limiting protection device and a method thereof, and in particular, has a plurality of current thresholds Value limit current protection device and method thereof. [Prior Art] FIG. 1 is a light connection φ 胄 diagram of a conventional current limiting protection skirt used in a computer system. Referring to FIG. 1, reference numeral 110 shows a conventional current limiting protection device, 120 shows a connection port for connecting a peripheral device of a universal serial bus (USB), and m is a computer system. A circuit associated with current limiting protection device 110. In the designation 130, a universal serial bus controller 131 and a resistor 132 are shown, as well as power supply voltages VDD1 and VDD2 supplied by the computer system. In addition, the GN indicated in the figure is not a common potential. The current limiting protection device 110 detects whether the current output by the current exceeds the rated current threshold, and is generally set to 500 mA. If the current limit value is not exceeded, the current limiting protection device 110 outputs the normal voltage νουτ, and if the rated current threshold is exceeded, the current limiting protection device 11〇 stops the output voltage VOUT and generates an overload warning. The signal 〇c is given to the universal serial bus controller 131 to tell the computer system that an overload condition has occurred. The current limiting protection device 110 mainly includes a metal-oxide semiconductor transistor 111, a current detecting unit 112, a current limiting control unit us1, and a driving unit 114. The current detecting unit j 12 5 1354425 96-011 24092twf.doc/n is used to detect the on-current value of the MOS transistor m, and accordingly generates the detection result DS. The current limiting control unit n3 is pre-set with the above rated current threshold value and determines whether the detection result DS reaches the rated current threshold. When the determination is YES, the stop driving signal TS and the overload warning signal 〇c are generated. The driving unit 114 determines whether to activate according to the enable signal EN and outputs the gate driving signal gs when the driving unit 114 is activated to turn on the MOS battery b body 111'. When the driving unit 114 receives the stop driving signal ts, The output gate drive signal GS is stopped. Although in the prior art, the computer system limits the maximum value of the current output to the USB peripheral device through the current limiting protection device 110, since the current limiting protection device 11 has only one current threshold, when the computer system is in In the sleep mode, the power supply only supplies about 5 volts (V) and 2 to 2.5 amps (eight) of current. At this point, there are multiple USB peripherals connected to the computer system. Entering sleep mode still consumes a lot of power, which causes the power supply to cry and overload, causing its output voltage to drop. In this way, the necessary peripheral devices of the computer system cannot obtain the basic power for maintaining the operation, and thus cannot operate normally, and thus the computer system cannot be restored to the normal mode by the sleep mode. mode, under normal conditions, if every USB The peripheral cracks are pressed. 'In fact, it will not cause the power supply to be overloaded in the sleep mode. It is on the market or in circulation. Some of them can only consume the 2.5 mA USB specification limit, so the Rongji camphor system cannot sleep. The mode returns to normal mode. The invention aims to provide a current limiting protection device and a method thereof, which can prevent the power supply from being overloaded in a sleep mode, thereby enabling the / thunder brain system to Successfully returned from sleep mode to normal mode. Another object of the present invention is to provide a current limiting protection device and method thereof that can adjust the current threshold in accordance with the type of power saving mode of the computer system. A further object of the present invention is to provide a current limiting protection device that presets a plurality of current thresholds and can select one of the current thresholds based on the indication signal. &amp; Based on the above and other objects, the present invention provides a current limiting protection device. The current limiting protection device comprises an M〇s transistor, a current detecting unit and a current limiting circuit. One source/drain of the MOS transistor is used to receive the first voltage, the other source/drain is used to output the second voltage, and the gate is used to receive the gate driving signal to determine the amount of the conducting current. The current detecting unit is configured to detect the on current value of the MOS transistor to generate a detection result. The current limiting circuit is pre-set with a plurality of current thresholds, and selects one of the current thresholds according to the indication signal, and generates a gate driving signal according to the difference between the selected current threshold and the detection result. Based on the above and other objects, the present invention provides a current limiting protection method that is adapted to limit the supply of computer systems to peripheral devices of a universal serial bus, current size, wherein the computer system has a preset power saving mode. This method of limiting current flow includes the following steps: First, define multiple current thresholds. Then, one of the current thresholds is selected according to the indication signal, wherein the indication signal is used to indicate whether the computer line is in the preset power saving mode. Then, the size of the power supplied to the peripheral device of the tandem busbar is made. Then, 'determine whether the current supplied to the peripheral device of the universal serial busbar ς current reaches the current limit of 敎; when _ is YES, the current supplied to the peripheral device of the general-purpose column is clamped at the selected current The limit value 'when it is touched, the normal supply current to the peripheral device of the bus. In the present invention, since a plurality of current thresholds are set, the magnitude of the supply current of different conditions can be selected according to the indication signal. If the invention is applied to the USB port, the current supplied to the USB peripheral device can be limited according to the operating mode of the computer system, and the power supply can be prevented from being overloaded in the sleep mode, thereby enabling the computer system to smoothly pass the sleep mode. Revert to normal mode. The above and other objects, features and advantages of the present invention will become more <RTIgt; obvious</RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; [Embodiment] FIG. 2 is a block diagram showing an internal main circuit of a current limiting protection device according to an embodiment of the present invention. Referring to FIG. 2, the current limiting protection device 21 〇 mainly includes a MOS transistor 211, a current anger detecting unit 212, and a current limiting circuit 213 ° MOS transistor one of the source/no pole for receiving the voltage viN, another source The /pole is used to output the voltage VOUT' and the gate is used to receive the gate drive signal GS to determine the amount of conduction current. The current detecting unit 212 is configured to detect the on current value of the MOS transistor 211, thereby generating a detection

S 1354425 96-011 24092twf.doc/nS 1354425 96-011 24092twf.doc/n

結果DS。限流電路2n包括有限流控制單元213]及驅動 單兀213-2。限流控制單元213~1預設有多個電流臨限值, 並依據指示訊號SP選擇上述電流臨限值苴中之一,以及 依據選定之電流臨限值與偵測結果DS二者之差而產生控 制訊號CS。驅動單元213_2依據致能訊號EN歧是否啟 動’ ^依據控制訊戒CS纽閘極驅動訊號GS。由於電流 偵測單兀212係用以偵測MOS電晶體211之導通電流值, 因此此圖中之電流债測單元212的祕方式僅是用以舉 例,使用者可依照實際的需要而作變更。 此外,當限流控制單元213-1判斷债測結果Ds達到 選定之電·PMi時,限流控鄉元213_丨更對應輸出過 載警告訊號OC。當S ’使用者可依照實際上之需要而決 定是否採用此功能。The result is DS. The current limiting circuit 2n includes a finite current control unit 213] and a driving unit 213-2. The current limiting control unit 213~1 is pre-set with a plurality of current thresholds, and selects one of the current thresholds according to the indication signal SP, and according to the difference between the selected current threshold and the detection result DS. The control signal CS is generated. The driving unit 213_2 is based on whether the enable signal EN is activated or not according to the control signal CS gate driving signal GS. Since the current detecting unit 212 is used to detect the on-current value of the MOS transistor 211, the secret method of the current debt detecting unit 212 in this figure is only for example, and the user can change according to actual needs. . In addition, when the current limiting control unit 213-1 determines that the debt measurement result Ds reaches the selected power PMi, the current limiting control unit 213_丨 corresponds to the output overload warning signal OC. When the S' user can decide whether to adopt this function according to the actual needs.

由於上述之限流賴裝置·可設定多個電流臨限 值’並可依照指TF訊號SP來對應選擇這些電流臨限值其 中之- ’因此限流保護袭置210可以遵照指示訊號sp所 指示之不同狀況來限制供應之電流大小,適合使用於 依照不同狀況來限制供應電流大小的場合。以應用於電腦 系統之USB連接璋為例,則限流保護裝置21〇之 如圖3所示。 /圖3為依照本發明—實施例之限流保護裝置運用 腦系統中之USB相難置的耦接示意圖^請參照圖3,標 示210繪示圖2之限流保護裝置,32〇繪示用以連結 週邊農置的連接埠,而33G麟示電腦祕中,與限流保 9 1354425 96-011 24092twf.doc/n 護裝置21〇相關的電路。在標示33〇中綠示有通用串列匿 流排控制器33卜電阻332及進階配置及電源介面控制器 (advanced Conflgurati〇n and p〇wer ,簡稱 • ACPI)333,财㈣纟騎供應之t源1VDD卜VDD2 及VDD3。此外,此圖中所標示的GND,則表示為共同電 位。 假設限流控制單元213-1 設有二個電流臨限值,分 • 別為5〇0mA&amp; 2.5mA ’並假設於正常模式時,透過連接埠 320連結至電腦系統的USB週邊裝置(未繪示)不能消耗超 過500mA的電流,而於睡眠模式時,該USB週邊裝置亦 不旎消耗超過2.5mA的電流,那麼限流保護裝置21〇的操 作方式便可以用圖4來說明。 圖4為圖3之限流保護裝置210的操作流程圖。請同 時參照圖3及圖4。限流控制單元213-1依據指示訊號sp 來判斷電腦系統是否處於睡眠模式(如步驟401)。若電腦系 統並非處於睡眠模式,限流控制單元便選擇5〇〇mA •作為電流臨限值,並判斷偵測結果Ds(亦即輸出電流的大 小)是否達到500mA(如步驟402)。當偵測結果DS達到 500mA,使得選定之電流臨限值與偵測結果DS二者之差 為零,則限流控制單元213-1依據二者之差產生控制訊號 CS,讓驅動單元213-2可依據控制訊號cs產生閘極驅動 訊號GS,進而控制MOS電晶體211的導通程度,以將 M〇S電晶體211的導通電流大小箝制在5〇〇mA,並且限 流控制單元213-1更對應發出過載警告訊號〇C(如步驟 1354425 96-011 24092twf.doc/n 403) ;當限流控制單元213]判斷债測結果DS未達到 500mA ’則控制M0S電晶體211維持原本的導通程度, 以保持原導通電流的大小,進而正常供應輸出(如步驟 404) 。 相反地,若電腦系統處於睡眠模式,則限流控制單元 213-1選擇2.5mA作為電流臨限值,並判斷横測結果DS 是否達到2.5mA(如步驟405)。當偵測結果Ds達到 2.5inA,使得選定之電流臨限值與偵測結果DS二者之差為 零’則限流控制單元213-1依據二者之差產生控制訊號 CS,讓驅動單元213-2可依據控制訊號cs產生閘極驅動 訊號GS,進而控制MOS電晶體211的導通程度,以將 MOS電晶體211的導通電流大小箝制在2.5mA,並且限流 控制單元213-1更對應發出過載警告訊號oc(如步驟 406);當限流控制單元213-1判斷偵測結果DS未達到 2.5mA,則控制MOS電晶體211維持原本的導通程度,以 保持原導通電流的大小’進而正常供應輸出(如步驟4〇7)。 圖5為依照本發明另一實施例之限流保護裝置運用於 電腦系統中之USB相關裝置的輕接示意圖。請同時參照圖 3及圖5,經過比較之後應可發現,圖5中之限流保護裝置 510與圖3中之限流保護裝置210二者的電路架構幾乎_ 樣,二者的不同處僅在於限流控制單元513-1可同時依據 進階配置及電源介面控制器333所輸出的指示訊號 SP1〜SPN來選擇多種預設電流臨限值其中之一。 11 1354425 96-011 24092twf.doc/n 雖然在圖5所示的例子中,指示訊號皆來自進阼酉 及電源介面控制器333,但熟習此技藝者應知,=置 以反應出電腦系統所處的省電模式,使用者亦可指、定 系統中之其他電訊號作為指示訊號。此外,指示訊=亦= 限定為類比或是數位形式之訊號,使用者只需依據指°示'訊 號之形式來對應變更限流控制單元的設計即可。 ’、° 依照上述將限流保護裝置運用於電腦系統之一 USB 連接埠的實施例’可歸納出一種限流保護方法,如圖6所 示。圖6為依照本發明一實施例之限流保護方法的流程 ,。此限流保護方法包括下列步驟:首先,定義多個電 臨限值(如步驟601)。接著,依據指示訊號選擇該些電流臨 ,值其中之一,其中上述之指示訊號係用來指示電腦系統 是否處於多種預設省電模式其中之一(如步驟602)。然後, 偵測供應至通用串列匯流排週邊裝置的電流大小(如步驟 603)。接著,判斷供應至通用串列匯流排週邊裝置的電流 大小是否達到選定之電流臨限值(如步驟6〇4)。然後,當判 ,為是時’將供應至通用串列匯流排週邊裝置的電流大小 箝制在選定之電流臨限值;當判斷為否時,正常供應電流 至通用串列匯流排週邊裝置(如步驟605)。 以上所列舉的實施例皆是將限流保護裝置運用於電 腦系統中之USB相關裝置’這是為了說明之方便所致,然 而造樣的列舉方式並非用以限制本發明之限流保護裝置的 運用方式。 12 1354425 96-011 24092twf.doc/n 綜上所述’本發明由於設定有多個電流臨限值,並可 依照指示訊號來對應選擇不同狀況之供應電流大小。若運 用本發明於USB連接埠時’便可依照電腦系統之操作模式 來限制提供至USB週邊裝置的電流大小,並防止電源供應 益在睡眠模式下超載,進而使電腦系統能順利地由睡眠模 式回復為正常模式。 、 雖然本發明已以較佳實施例揭露如上,然其並非用以 • 限定本發明,任何熟習此技藝者,在不脫離未發明之精神 =範圍内,當可作些許之更動與潤飾,因此本發明之^護 1巳圍當視後附之申請專利範圍所界定者為準。 ” 【圖式簡單說明】 立圖1為電腦系統所採用之習知限流保護裝置的耦接八 意圖。 不 圖2為依照本發明一實施例之限流保護裝置之 要電路的方塊圖。 ° 鲁 《〃圖3為依照本發明一實施例之限流保護裝置運用於雷 腦系統中之USB相關裝置的耦接示意圖。 ; 圖4為圖3之限流保護裝置210的操作流程圖。 圖5為依照本發明另一實施例之限流保 電腦系統巾之USB侧裝置_接㈣圖。置運用於 圖。圖6為依照本發明一實施例之限流保護方法的流程 【主要元件符號說明】 110'210、510:限流保護裝置 13 1354425 96-011 24092twf.doc/n 111、 211 : MOS 電晶體 112、 212 :電流偵測單元 113、 213-1、513-1 :限流控制單元 114、 213-2 :驅動單元 120、320 :連接埠 130、 330 :標示 131、 331 :通用串列匯流排控制器 鲁 132、332 :電阻 213 :限流電路 333 :進階配置及電源介面控制器 401-407、601 〜605 :步驟 CS :控制訊號 DS :偵測結果 EN :致能訊號 GND :共同電位 GS :閘極驅動訊號 # VIN、VOUT:電壓 OC :過載警告訊號 SP、SP1-SPN :指示訊號 VDD卜VDD2、VDD3 :電源電壓 14Because of the above-mentioned limited flow device, a plurality of current thresholds can be set and the current thresholds can be selected according to the TF signal SP. - Therefore, the current limiting protection device 210 can be instructed according to the indication signal sp. Different conditions to limit the amount of current supplied, suitable for use in situations where the supply current is limited according to different conditions. Taking the USB port of the computer system as an example, the current limiting protection device 21 is as shown in FIG. FIG. 3 is a schematic diagram of the coupling of the USB phase in the brain system according to the embodiment of the present invention. Referring to FIG. 3, the indicator 210 shows the current limiting protection device of FIG. The connection port used to connect the surrounding farms, and 33G Lin shows the computer secret, and the circuit related to the current limit 9 1354425 96-011 24092twf.doc/n protection device 21〇. In the 33 〇 green, there is a universal serial bus controller 33, resistor 332 and advanced configuration and power interface controller (advanced Conflgurati〇n and p〇wer, ACPI) 333, Cai (four) 纟 供应 supply t source 1VDD Bu VDD2 and VDD3. In addition, the GND indicated in this figure is indicated as a common potential. It is assumed that the current limiting control unit 213-1 is provided with two current thresholds, which are 5 〇 0 mA &amp; 2.5 mA ' and is assumed to be connected to the USB peripheral device of the computer system through the connection 埠 320 in the normal mode (not drawn It can not consume more than 500mA current, and in the sleep mode, the USB peripheral device does not consume more than 2.5mA current, then the operation mode of the current limiting protection device 21〇 can be illustrated by FIG. 4. 4 is a flow chart showing the operation of the current limiting protection device 210 of FIG. Please refer to Figure 3 and Figure 4 at the same time. The current limiting control unit 213-1 determines whether the computer system is in the sleep mode according to the indication signal sp (step 401). If the computer system is not in sleep mode, the current limit control unit selects 5 mA • as the current threshold and determines if the detection result Ds (ie, the magnitude of the output current) reaches 500 mA (step 402). When the detection result DS reaches 500 mA, so that the difference between the selected current threshold and the detection result DS is zero, the current limiting control unit 213-1 generates the control signal CS according to the difference between the two, and causes the driving unit 213- 2, the gate driving signal GS can be generated according to the control signal cs, thereby controlling the conduction degree of the MOS transistor 211 to clamp the ON current of the M〇S transistor 211 to 5 mA, and the current limiting control unit 213-1 Corresponding to the overload warning signal 〇C (such as step 1354425 96-011 24092twf.doc/n 403); when the current limiting control unit 213] determines that the debt measurement result DS does not reach 500 mA', the control MOS transistor 211 maintains the original conduction level. , in order to maintain the original on-current, and then supply the output normally (as in step 404). Conversely, if the computer system is in the sleep mode, the current limiting control unit 213-1 selects 2.5 mA as the current threshold and determines whether the cross-test result DS reaches 2.5 mA (step 405). When the detection result Ds reaches 2.5 inA, so that the difference between the selected current threshold and the detection result DS is zero, the current limiting control unit 213-1 generates the control signal CS according to the difference between the two, and causes the driving unit 213 -2 can generate the gate driving signal GS according to the control signal cs, thereby controlling the conduction degree of the MOS transistor 211 to clamp the ON current of the MOS transistor 211 to 2.5 mA, and the current limiting control unit 213-1 is more correspondingly issued The overload warning signal oc (step 406); when the current limiting control unit 213-1 determines that the detection result DS does not reach 2.5 mA, the control MOS transistor 211 maintains the original conduction level to maintain the original conduction current' and thus normal Supply output (as in steps 4〇7). FIG. 5 is a schematic diagram of a light connection of a USB-related device used in a computer system in accordance with another embodiment of the present invention. Referring to FIG. 3 and FIG. 5 simultaneously, after comparison, it can be found that the circuit structure of the current limiting protection device 510 of FIG. 5 and the current limiting protection device 210 of FIG. 3 is almost the same, and the difference between the two is only The current limiting control unit 513-1 can simultaneously select one of a plurality of preset current thresholds according to the indication signals SP1 SPSPN output by the advanced configuration and power interface controller 333. 11 1354425 96-011 24092twf.doc/n Although in the example shown in Figure 5, the indication signals are from the inlet and power interface controller 333, those skilled in the art should know that = set to reflect the computer system In the power saving mode, the user can also refer to other electrical signals in the system as the indication signal. In addition, the indication signal = also = is limited to the analog or digital form of the signal, the user only needs to change the design of the current limiting control unit according to the form of the indication signal. The embodiment of the USB port in accordance with the above description of applying the current limiting protection device to a computer system can be summarized as a current limiting protection method, as shown in FIG. FIG. 6 is a flowchart of a current limiting protection method according to an embodiment of the invention. The current limiting protection method includes the following steps: First, define a plurality of electrical thresholds (e.g., step 601). Then, one of the currents is selected according to the indication signal, wherein the indication signal is used to indicate whether the computer system is in one of a plurality of preset power saving modes (step 602). Then, the magnitude of the current supplied to the peripheral device of the universal serial bus is detected (step 603). Next, it is determined whether the magnitude of the current supplied to the peripheral device of the universal serial busbar reaches the selected current threshold (step 6〇4). Then, when judged, YES, 'clamp the current supplied to the peripheral device of the universal serial busbar to the selected current threshold; when the judgment is no, the normal supply current to the peripheral device of the universal serial busbar (such as Step 605). The embodiments listed above all apply the current limiting protection device to the USB related device in the computer system'. This is for convenience of explanation, but the enumeration of the sample is not intended to limit the current limiting protection device of the present invention. Way of use. 12 1354425 96-011 24092twf.doc/n In summary, the present invention has a plurality of current thresholds, and can select a supply current of different conditions according to the indication signal. If the invention is applied to the USB port, the current supplied to the USB peripheral device can be limited according to the operating mode of the computer system, and the power supply is prevented from being overloaded in the sleep mode, thereby enabling the computer system to smoothly pass the sleep mode. Revert to normal mode. Although the present invention has been disclosed in the above preferred embodiments, it is not intended to limit the invention, and those skilled in the art can make some modifications and refinements without departing from the spirit of the invention. The invention is defined by the scope of the patent application. BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a block diagram of a conventional current limiting protection device used in a computer system. Figure 2 is a block diagram of a circuit of a current limiting protection device in accordance with an embodiment of the present invention. Figure 3 is a schematic diagram showing the coupling of a current-limiting protection device applied to a USB-related device in a lightning-brain system according to an embodiment of the present invention. Figure 4 is a flow chart showing the operation of the current-limiting protection device 210 of Figure 3. 5 is a diagram of a USB side device of the current limiting computer system towel according to another embodiment of the present invention. FIG. 6 is a diagram of a current limiting protection method according to an embodiment of the present invention. [Main components] DESCRIPTION OF SYMBOLS 110'210, 510: Current limiting protection device 13 1354425 96-011 24092twf.doc/n 111, 211: MOS transistor 112, 212: current detecting unit 113, 213-1, 513-1: current limiting Control unit 114, 213-2: drive unit 120, 320: port 130, 330: indicator 131, 331: universal serial bus controller ru 132, 332: resistor 213: current limiting circuit 333: advanced configuration and power supply Interface controllers 401-407, 601~605: Step CS: Control Message DS: detection result EN: enabling signal GND: the common potential GS: gate drive signals # VIN, VOUT: Voltage OC: overload warning signal SP, SP1-SPN: Bu indication signal VDD VDD2, VDD3: power supply voltage 14

Claims (1)

1354425 100-8-30 正麵頁 十、申請專利範圍: 1. 一種限流保護裝置,運用於一電腦系統,該電腦系 統具有多種預設省電模式,該限流保護裝置包括: 一 MOS電晶體,該MOS電晶體之其中一源/汲極用 以接收一第一電壓,另一源/汲極用以輸出一第二電壓,而 閘極則用以接收一閘極驅動訊號,據以決定導通電流的大 小; 一電流偵測單元,用以偵測該MOS電晶體之導通電 流值,據以產生一偵測結果;以及 一限流電路,預設有多個電流臨限值,並依據一第一 指示訊號選擇該些電流臨限值其中之一,以及依據選定之 電流臨限值與該偵測結果二者之差而產生該閘極驅動訊 號,其中該第一指示訊號係用來指示該電腦系統是否處於 該些預設省電模式其中之一。 2. 如申請專利範圍第1項所述之限流保護裝置,其中 該限流電路包括: 一限流控制單元,預設有多個電流臨限值,並依據該 第一指示訊號選擇該些電流臨限值其中之一,以及依據選 定之電流臨限值與該偵測結果二者之差而產生一控制訊 號;以及 一驅動單元,依據該控制訊號產生該閘極驅動訊號。 3. 如申請專利範圍第2項所述之限流保護裝置,其中 該第二電壓用以供應至一通用串列匯流排週邊裝置,且該 限流控制單元更耦接至一通用串列匯流排控制器,當該偵 15 測結果達到選定之 日佟JE替掻q 輸出-過鮮值時,該限流控制。 4L口破至該通用串列匯流排控制器。 节第二一4專利範圍第1項所述之限流保護裝置,1中 進階配置及電tir進階配置及電源介面控制器,該 晃源;I面控制器係設置於該電腦系統中。 、’如申睛專利範圍第4項所述之限流保護裳置, :限二控制單元更接收一第二指示訊號’並依據該第—指 不讯唬及該第二指示訊號選擇該些電流臨限值其中之—。曰 ▲ #6.如申請專利範圍第5項所述之限流保護裝置,其中 5亥第二指示訊號亦來自於該進階配置及電源介面控制器。 二7.如申請專利範圍第5項所述之限流保護裝置,&amp;中 遠第一指示訊號及該第二指示訊號可為類比或數位形式之 訊號。 8·如申請專利範圍第1項所述之限流保護裝置,其中 該第一指示訊號可為類比或數位形式之訊號。 9. 一種限流保護方法’適用於限制一電腦系統供應至 —通用串列匯流排週邊裝置的電流大小,其中該電腦^統 具有多種預設省電模式,該限流保護方法包括下列步驟: 定義多個電流臨限值; 依據一第一指示訊號選擇該些電流臨限值其中之 ―’其中該第一指示訊號係用來指示該電腦系統是否處於 該些預設省電模式其中之一; 偵測供應至一通用串列匯流排週邊裝置的電流大小. 16 判斷供應至該通用串列匯流排週邊裝置的電流大小 是否達到選定之電流臨限值;以及 當判斷為是時,將供應至該通用串列匯流排週邊裝置 的電流大小箝制在選定之電流臨限值,當判斷為否時,正 常供應電流至該通用串列匯流排週邊裝置。 10. 如申請專利範圍第9項所述之限流保護方法,其中 該第一指示訊號來自於一進階配置及電源介面控制器,且 該進階配置及電源介面控制器係設置於該電腦系統中。 11. 如申請專利範圍第9項所述之限流保護方法,其中 在依據該第一指示訊號選擇該些電流臨限值其中之一的步 驟中,更包括同時依據一第二指示訊號選擇該些電流臨限 值其中之一。 12. 如申請專利範圍第11項所述之限流保護方法,其 中該第二指示訊號亦來自於該進階配置及電源介面控制 器。 13. 如申請專利範圍第11項所述之限流保護方法,其 中該第一指示訊號及該第二指示訊號可為類比或數位形式 之訊號。 14. 如申請專利範圍第9項所述之限流保護方法,其中 該第一指示訊號可為類比或數位形式之訊號。 15. 如申請專利範圍第9項所述之限流保護方法,其中 當判斷供應至該通用串列匯流排週邊裝置的電流大小達到 選定之電流臨限值時,更對應產生一過載警告訊號至一通 用串列匯流排控制器。1354425 100-8-30 Front page X. Patent application scope: 1. A current limiting protection device is applied to a computer system. The computer system has a plurality of preset power saving modes, and the current limiting protection device comprises: a MOS battery a crystal, one of the source/drain of the MOS transistor is configured to receive a first voltage, the other source/drain is configured to output a second voltage, and the gate is configured to receive a gate driving signal Determining the magnitude of the on current; a current detecting unit for detecting the on current value of the MOS transistor to generate a detection result; and a current limiting circuit pre-configured with a plurality of current thresholds, and Selecting one of the current thresholds according to a first indication signal, and generating the gate driving signal according to a difference between the selected current threshold and the detection result, where the first indication signal is used To indicate whether the computer system is in one of the preset power saving modes. 2. The current limiting protection device of claim 1, wherein the current limiting circuit comprises: a current limiting control unit, a plurality of current thresholds are preset, and the first indicator signals are selected according to the first indication signal. One of the current thresholds, and a control signal generated according to the difference between the selected current threshold and the detection result; and a driving unit that generates the gate driving signal according to the control signal. 3. The current limiting protection device of claim 2, wherein the second voltage is supplied to a universal serial busbar peripheral device, and the current limiting control unit is further coupled to a universal serial bus The row controller controls the current limit when the detection result reaches the selected date 佟JE 掻q output-excessive value. The 4L port is broken to the universal serial bus controller. Section 2:4, the current limiting protection device described in item 1 of the patent scope, 1 advanced configuration and electrical tir advanced configuration and power interface controller, the shaking source; the I surface controller is set in the computer system . The current limit protection device described in item 4 of the scope of the patent application, the second control unit further receives a second indication signal and selects the second indication signal according to the first indication and the second indication signal. The current threshold is - ▲ ▲ #6. The current limiting protection device described in claim 5, wherein the 5th second indication signal is also derived from the advanced configuration and power interface controller. 2. The current limiting protection device described in claim 5, wherein the &lt;RTI ID=0.0&gt;&gt;&gt;&gt; 8. The current limiting protection device of claim 1, wherein the first indication signal is an analog or digital form signal. 9. A current limiting protection method is adapted to limit the current supplied by a computer system to a peripheral device of a universal serial bus, wherein the computer has a plurality of preset power saving modes, and the current limiting protection method comprises the following steps: Defining a plurality of current thresholds; selecting one of the current thresholds according to a first indication signal, wherein the first indication signal is used to indicate whether the computer system is in one of the preset power saving modes Detecting the magnitude of the current supplied to the peripheral device of the universal serial bus. 16 determining whether the current supplied to the peripheral device of the universal serial busbar reaches the selected current threshold; and when it is judged to be, it will be supplied The current to the peripheral device of the universal serial busbar is clamped to the selected current threshold. When the determination is negative, the current is normally supplied to the peripheral device of the universal serial busbar. 10. The current limiting protection method of claim 9, wherein the first indication signal is from an advanced configuration and power interface controller, and the advanced configuration and power interface controller is disposed on the computer In the system. 11. The method of limiting current protection according to claim 9, wherein in the step of selecting one of the current thresholds according to the first indication signal, the method further comprises: simultaneously selecting the second indication signal according to the second indication signal. Some of these current limits. 12. The current limiting protection method of claim 11, wherein the second indication signal is also derived from the advanced configuration and power interface controller. 13. The current limiting protection method of claim 11, wherein the first indication signal and the second indication signal are analog or digital form signals. 14. The current limiting protection method of claim 9, wherein the first indication signal can be an analog or digital form signal. 15. The current limiting protection method of claim 9, wherein when it is determined that the current supplied to the peripheral device of the universal serial busbar reaches a selected current threshold, an overload warning signal is generated correspondingly to A universal serial bus controller.
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