1353064 九、發明說明： 【發明所屬之技術領域】 本發明是有關於一種太陽能電池晶片（s〇lar cell)， 且特別是有關於一種具有多重蝕刻結構之太陽能電池晶片 及其製造方法。 【先前技術】 太陽能電池晶片的發展，最早可追溯自1954年由Bell 實驗室所發明出來，雖然當時太陽能電池晶片的效率只有 6%，但經過研究人員不斷地研究改良，如今單一電池^片 的最鬲效率已可達到25%左右，而能漸次邁入實用階段。 由於太陽能電池晶片的光電轉換效率，是影響太陽能 電池晶片應用價值的諸多因素中，最為重要因素之一，因 此，業界無不致力於太陽能電池晶片光電轉換效率的提 昇，以期能在日益蓬勃的太陽能電池晶片市場上，佔有一 席之地。而提昇太陽能電池晶片光電轉換效率的方法之 一，即是降低太陽光照射太陽能電池晶片的反射率。 過去，為了降低太陽光照射太陽能電池晶片的反射 率，夕半疋在太1%能電池晶片的表面進行一次姓刻處理， 以粗Μ化太陽能電池晶片的表面，藉以減少太陽光的反 射。例如，單晶矽基底通常會以強鹼溶液來蝕刻，而多晶 矽基底則以強酸溶液來蝕刻，以達成降低太陽光照射太= 能電池晶片的反射率之目的，惟其實際達成之反射率仍 持續加以改善的必要。 μ 5 1353064 . 於是，一種利用離子反應钱刻法（Reactive ion etching)，以在強驗或強酸溶液ϋ刻所產生之粗糙表面 ' 上，再次產生多數更細微之凹孔，藉以進一步改善其反射 • 率的製造方法，變成為再次提昇光電轉換效率之唯一選 _ 擇。惟，離子反應蝕刻機的價格十分昂貴，並不利於商業 化之應用。BACKGROUND OF THE INVENTION 1. Field of the Invention This invention relates to a solar cell wafer, and more particularly to a solar cell wafer having a multi-etch structure and a method of fabricating the same. [Prior Art] The development of solar cell wafers was first traced back to the invention by Bell Labs in 1954. Although the efficiency of solar cell wafers was only 6% at the time, it was continuously researched and improved by researchers, and now a single battery The most efficient efficiency has reached about 25%, and it can gradually enter the practical stage. Since the photoelectric conversion efficiency of solar cell wafers is one of the most important factors affecting the application value of solar cell wafers, the industry is committed to the improvement of the photoelectric conversion efficiency of solar cell wafers, in order to be able to grow in solar energy. In the battery chip market, it has a place. One of the methods for improving the photoelectric conversion efficiency of a solar cell wafer is to reduce the reflectance of the solar cell wafer irradiated by sunlight. In the past, in order to reduce the reflectivity of solar cells irradiated by sunlight, the surface of the solar cell wafer was subjected to a surname treatment to roughen the surface of the solar cell wafer, thereby reducing the reflection of sunlight. For example, a single crystal germanium substrate is usually etched with a strong alkali solution, and a polycrystalline germanium substrate is etched with a strong acid solution to achieve the purpose of reducing the solar radiation too light = the reflectivity of the battery wafer, but the actual reflectance continues. The need to improve. μ 5 1353064 . Thus, a Reactive ion etching is used to reproduce many more fine pits on the rough surface produced by the strong or strong acid solution engraving, thereby further improving the reflection. • The manufacturing method of the rate becomes the only option to increase the efficiency of photoelectric conversion again. However, ion-reactive etching machines are expensive and not suitable for commercial applications.
V 【發明内容】 • 有鑑於此，本發明之目的是提供一種具有多重蝕刻結 構之太陽能電池晶片及其製造方法，其可進一步降低太陽 光照射太陽能電池晶片的反射率，進而提昇太陽能電池晶 片的光電轉換效率。 本發明之另一目的是提供一種具有多重蝕刻結構之太 陽能電池晶片及其製造方法，其可在不過渡增加成本之情 形下，更進一步降低太陽光照射太陽能電池晶片的反射率。 為達上述及其他目的，本發明提供一種具有多重蝕刻 * 結構之太陽能電池晶片。此太陽能電池晶片包括：第一摻 - 雜型半導體基底；配置於第一摻雜型半導體基底上，表面 具有多數個微形山脈，且微形山脈上並具有多數個突起微 粒之第二摻雜型半導體層；以及分別連接第一摻雜型半導. 體基底與第二摻雜型半導體層，以作為輸出電力之多個電 極0 在一實施例中，此太陽能電池晶片之第一摻雜型半導 體基底為選自單晶矽、多晶矽或化合物中之其一的P型半 6 1353064 . 導體，而第二摻雜型半導體層則為摻雜之N型半導體。 在一實施例中，此太陽能電池晶片之第一摻雜型半導 * 體基底為選自單晶矽、多晶矽或化合物中之其一的N型半 ' 導體，而第二摻雜型半導體層則為摻雜之P型半導體。 . 在一實施例中，微形山脈上之突起微粒，係為尺寸介 於0.2微米至1微米間的錐形微粒。 在一實施例中，第二摻雜型半導體層之上，更配置有 一抗反射層，以進一步降低太陽光照射太陽能電池晶片的 鲁反射率。 本發明另提供一種具有多重蝕刻結構之太陽能電池晶 片的製造方法，包括下列步驟：提供第一摻雜型半導體基 底；使用等向性蝕刻溶液來蝕刻第一掺雜型半導體基底， 以在第一摻雜型半導體基底之表面上，形成多數個微形山 脈；使用非等向性蝕刻溶液來蝕刻第一摻雜型半導體基底 之表面，以在表面之微形山脈上，形成多數個突起微粒； 在第一摻雜型半導體基底上進行摻雜，以在第一摻雜型半 • 導體基底上，形成一第二摻雜型半導體層；以及形成分別 - 連接第一摻雜型半導體基底與第二摻雜型半導體層之多個 電極。 其中，使用之等向性#刻溶液係為酸性溶液，而使用 之非等向性蝕刻溶液係為鹼性溶液。 其中，當第一摻雜型半導體基底為P型半導體時，第 二摻雜型半導體層為N型半導體。而當第一摻雜型半導體 基底為N型半導體時，第二摻雜型半導體層為P型半導體。 7 1353064 . 其中，第一摻雜型半導體基底係使用單晶矽、多晶矽 與化合物中之其一掺雜而成。 ' 其中，係將突起微粒蝕刻成尺寸介於0.2微米至1微 * 米間的錐形微粒。 _ 其中，也可以更包括在第二摻雜型半導體層上形成一 抗反射層之步驟。 故知，本發明所提供之一種具有多重蝕刻結構之太陽 ' 能電池晶片及其製造方法，除了可在不過渡增加成本之情 • 形下，更進一步降低太陽光照射太陽能電池晶片的反射 率，進而提昇太陽能電池晶片的光電轉換效率外，其應用 多重蝕刻結構，來降低太陽光照射太陽能電池晶片反射率 的功效，亦不遜於應用離子反應蝕刻法之結構，而具有易 於商業化之有益效果。 為讓本發明之上述和其他目的、特徵、和優點能更明 顯易懂，下文特以較佳實施例，並配合所附圖式，作詳細 說明如下： • 【實施方式】 圖1A至圖1F係為根據本發明較佳實施例之一種具有 多重蝕刻結構之太陽能電池晶片10的製程剖面示意圖，以 下將參考圖1A至圖1F，來詳細說明根據本發明較佳實施 例之一種具有多重蝕刻結構之太陽能電池晶片10的製造' 方法，以及此製造方法所製造之太陽能電池晶片10的多重 蝕刻微結構（Texture)。需說明的是，為了能夠清楚顯示實 8 丄353064 施例中之太陽能電池晶片1〇的多重姓刻結構，目1A至圖 1F係繪示太陽能電池晶片1〇製程的部分剖面放大圖，以 利於清楚顯示太陽能電池晶片1〇的微米級微形山脈ιη與 微米級突起微粒112。 圖1A中，首先準備經標準清洗程序清洗之例如是p型 或N型的第一摻雜型半導體基底n，半導體基底u可以 是單晶碎、多晶石夕與化合物中之其一經摻雜而成。如圖所 :，半導體基底11的表面在顯微鏡下並非平整之表面，而 疋如圖中略有凹凸之不平整表面。雖然如此，然使用此一 半導體基底11所製成之太陽能電池晶#的反射率並不 佳，其反射率曲線如圖5中之曲線5〇1所示，而有再應用 姓刻製転來加以改善之必要。 如圖1B所示，係使用例如是酸性溶液之等向性蝕刻溶 液韻刻後之第-摻雜型半導體基底u。圖中顯示，第一換 雜型半導體基底1丨略有凹凸之不平整表面上，已被姓刻而 產生具有多數個微形山脈lu的飿刻結構。圖m中，雖缺 綠示為尺寸相同之規職形山脈⑴，但實際產生之微形、 二脈m’卻可能是不規則且大小略有不同之微形山脈 ⑴，如圖2中之顯微照片所示。如熟習此藝者所知，當使 用此-半導體基底u來製作太陽能電池晶 =如圖5中曲線502所示地仍有不足，而有進1加以= 善之必要。 因此，本實施例中，乃使用例如是驗性溶液 性钱刻溶液，來進一步银刻第一掺雜型半導體基底u之表 9 1353064 . 面，使半導體基底11表面之微形山脈111上，再經蝕刻而 產生如圖1C所示之多數個突起微粒112。為了能夠在不破 ' 壞微形山脈111之蝕刻結構的情況下，再次蝕刻而產生尺 ， 寸較佳地係介於0.2微米至1微米間的錐形（或稱金字塔 型Pyramid)突起微粒112，因此，宜使用濃度較低之驗性. 溶液，並於較低溫度下來進行其蝕刻程序，蝕刻完成之半 導體基底11表面的顯微照片如圖3及圖4所示，而應用此 " 一半導體基底11來製作太陽能電池晶片10的反射率則如 鲁 圖5中之曲線5 0 3所示。明顯地，曲線5 0 3所顯示之反射 率已獲得大幅度的改善，而得以大幅提昇太陽能電池晶片 10的光電轉換效率。 接著，便在第一摻雜型半導體基底11上進行摻雜，以 在第一摻雜型半導體基底11上，形成一第二摻雜型半導體 層12，如圖1D所示。此一步驟將依使用之半導體基底11 型式的不同而異，也就是說，當第一摻雜型半導體基底11 為P型半導體時，需使用例如是磷等五價之雜質原子來摻 * 雜，以在第一摻雜型半導體基底11上，形成N型之第二摻 - 雜型半導體層12。而當第一摻雜型半導體基底11為N型 半導體時，則使用例如是硼等三價之雜質原子來摻雜，以 在第一摻雜型半導體基底11上，形成P型之第二摻雜型半 導體層12。 為了可以更進一步降低反射率，本實施例在太陽能電 池晶片10上形成電極141、142前，也會在第二摻雜型半 導體層12上先形成一抗反射層13。抗反射層13的作用是' 1353064 知·南進入太IW能電池晶片10的光線比率，以更進一步增進 太I%·能電池晶片10的光電轉換效率。 之後，便在太1¾能電池晶片1〇上，形成分別連接至第 一摻雜型半導體基底11與第二摻雜型半導體層12之電極 141與142。電極141與142可用以連接應用此太陽能電池 晶片10之外部電路，以輸出光電轉換所產生之電力，據 便，成一種具有多重韻刻結構之太陽能電池晶片1〇。， 量測太陽能電池晶片10的反射率如圖5中之曲線503所 :，曲線503所顯示之反射率已獲得大幅度的改善，因而 得以大幅提昇太陽能電池晶片1G的光電轉換效率。 PF 本發明已以較佳實施例揭露如上’然其並非用以 和 明’任何熟習此技藝者，在不脫離本發明之精神 此，乍之各種更動與潤飾’亦屬本發明之範圍。因 J之保護範圍當視後附之t請專利範圍所界定者 11 1353064 【圖式簡單說明】 圖U至圖ip係顯示根據本發明較佳實施例之一種具 有多重餘刻結構之太陽能電池晶片的製程剖面示意圖。 圖2係顯示使用等向性蝕刻溶液蝕刻後之太陽能電池 晶片的顯微照片。 圖3係顯示圖2之太陽能電池晶片再經非等向性蝕刻 溶液餘刻後的顯微照片。 圖4係顯示圖3之太陽能電池晶片的再放大顯微照片。 圖5係顯示不同製程之太陽能電池晶片的反射率曲線 比較圖。 【主要元件符號說明】 10太陽能電池晶片 Π半導體基底 111微形山脈 112突起微粒 12第二摻雜型半導體層 13抗反射層 141、142 電極 501、502、503反射率曲線 12V [ SUMMARY OF THE INVENTION] In view of the above, an object of the present invention is to provide a solar cell wafer having a multi-etch structure and a method of fabricating the same, which can further reduce the reflectance of solar radiation of a solar cell wafer, thereby improving the solar cell wafer. Photoelectric conversion efficiency. Another object of the present invention is to provide a solar cell wafer having a plurality of etching structures and a method of manufacturing the same, which can further reduce the reflectance of the solar-irradiated solar cell wafer without increasing the cost of the transition. To achieve the above and other objects, the present invention provides a solar cell wafer having a multi-etch* structure. The solar cell wafer comprises: a first doped-type semiconductor substrate; disposed on the first doped semiconductor substrate, having a plurality of micro-shaped mountains on the surface, and having a second doping of a plurality of protruding particles on the micro-mountain mountain a semiconductor layer; and respectively connecting the first doped semiconductor substrate and the second doped semiconductor layer as a plurality of electrodes for outputting power. In one embodiment, the first doping of the solar cell wafer The type semiconductor substrate is a P-type half 6 1353064 selected from one of a single crystal germanium, a polycrystalline germanium or a compound, and the second doped semiconductor layer is a doped N-type semiconductor. In one embodiment, the first doped semiconductor substrate of the solar cell wafer is an N-type semi-conductor selected from one of a single crystal germanium, a polysilicon or a compound, and the second doped semiconductor layer Then it is a doped P-type semiconductor. In one embodiment, the raised particles on the micro-mountain are tapered particles having a size between 0.2 microns and 1 micron. In one embodiment, an anti-reflective layer is further disposed over the second doped semiconductor layer to further reduce the Lu reflectivity of the solar cell wafer. The present invention further provides a method of fabricating a solar cell wafer having multiple etching structures, comprising the steps of: providing a first doped semiconductor substrate; etching the first doped semiconductor substrate using an isotropic etching solution, in the first a plurality of micro-shaped mountains are formed on the surface of the doped semiconductor substrate; the surface of the first doped semiconductor substrate is etched using an anisotropic etching solution to form a plurality of protruding particles on the micro-mountain mountain surface; Doping on the first doped semiconductor substrate to form a second doped semiconductor layer on the first doped semiconductor substrate; and forming a first-doped first doped semiconductor substrate and A plurality of electrodes of the two doped semiconductor layers. Here, the isotropic solution used is an acidic solution, and the anisotropic etching solution used is an alkaline solution. Wherein, when the first doped semiconductor substrate is a P-type semiconductor, the second doped semiconductor layer is an N-type semiconductor. When the first doped semiconductor substrate is an N-type semiconductor, the second doped semiconductor layer is a P-type semiconductor. 7 1353064. The first doped semiconductor substrate is doped with one of a single crystal germanium, a polycrystalline germanium, and a compound. ' Among them, the protruding particles are etched into tapered particles having a size between 0.2 μm and 1 μm. Further, the step of forming an anti-reflection layer on the second doped semiconductor layer may be further included. It is to be understood that the present invention provides a solar cell array having a multi-etch structure and a method of manufacturing the same, which can further reduce the reflectivity of the solar cell wafer by the solar radiation without changing the cost. In addition to improving the photoelectric conversion efficiency of solar cell wafers, the application of multiple etching structures to reduce the reflectivity of sunlight to the solar cell wafer is not inferior to the structure of the ion-reaction etching method, and has the advantage of being easy to commercialize. The above and other objects, features and advantages of the present invention will become more <RTIgt; A schematic cross-sectional view of a process for fabricating a solar cell wafer 10 having multiple etched structures in accordance with a preferred embodiment of the present invention. A multi-etched structure in accordance with a preferred embodiment of the present invention will now be described in detail with reference to FIGS. 1A through 1F. The method of manufacturing the solar cell wafer 10, and the multiple etching microstructure of the solar cell wafer 10 manufactured by the manufacturing method. It should be noted that, in order to clearly show the multi-name structure of the solar cell wafer 1 in the example of the actual 丄 353 064, the first section of the solar cell wafer is shown in FIG. 1A to FIG. The micron-scale micro-shaped mountain ιη and the micro-scale protruding particles 112 of the solar cell wafer are clearly shown. In FIG. 1A, first, a first doped semiconductor substrate n such as a p-type or an N-type is cleaned by a standard cleaning process, and the semiconductor substrate u may be monocrystalline, polycrystalline, and doped with a compound. Made. As shown in the figure, the surface of the semiconductor substrate 11 is not a flat surface under the microscope, and the uneven surface is slightly uneven as shown in the figure. However, the reflectivity of the solar cell crystal # made using the semiconductor substrate 11 is not good, and the reflectance curve is as shown by the curve 5〇1 in FIG. 5, and the re-application of the surname is used. The need to improve. As shown in Fig. 1B, a first doped semiconductor substrate u after an isotropic etching solution such as an acidic solution is used. The figure shows that the first modified semiconductor substrate 1 has a slightly uneven surface on the uneven surface, and has been engraved to produce an engraved structure having a plurality of micro-shaped mountains lu. In Figure m, although the lack of green is shown as the same size mountain range (1), the actual micro-shaped, two-pulse m' may be irregular and slightly different in size (1), as shown in Figure 2. The photomicrograph is shown. As is known to those skilled in the art, when the semiconductor substrate u is used to fabricate a solar cell crystal = there is still a deficiency as shown by the curve 502 in Fig. 5, and there is a need for the addition of 1 to be good. Therefore, in the present embodiment, the surface of the first doped semiconductor substrate u is further silver-etched using, for example, an in-situ solution-like solution, so that the surface of the semiconductor substrate 11 is on the micro-mountain 111. Further etching produces a plurality of protruding particles 112 as shown in FIG. 1C. In order to be able to re-etch without causing the etched structure of the bad micro-mountain 111, the ruler is preferably a tapered (or pyramidal Pyramid) protruding particle 112 between 0.2 micrometers and 1 micrometer. Therefore, it is preferable to use a lower concentration of the test solution and perform the etching process at a lower temperature. The photomicrograph of the surface of the etched semiconductor substrate 11 is as shown in FIGS. 3 and 4, and this is applied. The reflectance of the semiconductor substrate 11 for fabricating the solar cell wafer 10 is as shown by the curve 503 in Figure 5. Obviously, the reflectance shown by the curve 503 has been greatly improved, and the photoelectric conversion efficiency of the solar cell wafer 10 can be greatly improved. Next, doping is performed on the first doped semiconductor substrate 11 to form a second doped semiconductor layer 12 on the first doped semiconductor substrate 11, as shown in Fig. 1D. This step will vary depending on the type of semiconductor substrate 11 used, that is, when the first doped semiconductor substrate 11 is a P-type semiconductor, it is necessary to use a pentavalent impurity atom such as phosphorus to dope. To form an N-type second doped-type semiconductor layer 12 on the first doped semiconductor substrate 11. When the first doped semiconductor substrate 11 is an N-type semiconductor, it is doped with a trivalent impurity atom such as boron to form a P-type second doping on the first doped semiconductor substrate 11. The impurity semiconductor layer 12. In order to further reduce the reflectance, the present embodiment also forms an anti-reflection layer 13 on the second doped semiconductor layer 12 before the electrodes 141, 142 are formed on the solar cell wafer 10. The function of the anti-reflection layer 13 is to "1353064" to enter the light ratio of the IW energy battery wafer 10 to further enhance the photoelectric conversion efficiency of the battery wafer 10. Thereafter, electrodes 141 and 142 which are respectively connected to the first doped semiconductor substrate 11 and the second doped semiconductor layer 12 are formed on the battery chip 1 . The electrodes 141 and 142 can be used to connect an external circuit to which the solar cell wafer 10 is applied to output electric power generated by photoelectric conversion, and it is possible to form a solar cell wafer having a multiple rhyme structure. The reflectance of the solar cell wafer 10 is measured as shown by the curve 503 in Fig. 5: the reflectance shown by the curve 503 has been greatly improved, so that the photoelectric conversion efficiency of the solar cell wafer 1G can be greatly improved. The present invention has been disclosed in its preferred embodiments, and it is intended that the invention not be construed as being limited by the scope of the invention. The scope of protection of J is defined as the scope of the patent. 11 1353064 [Simplified illustration of the drawings] Figures U to ip show a solar cell wafer having a multiple residual structure according to a preferred embodiment of the present invention. Schematic diagram of the process profile. Figure 2 is a photomicrograph showing a solar cell wafer after etching using an isotropic etching solution. Figure 3 is a photomicrograph showing the solar cell wafer of Figure 2 after a non-isotropic etching solution. Figure 4 is a re-enlargement photomicrograph showing the solar cell wafer of Figure 3. Fig. 5 is a graph showing a comparison of reflectance curves of solar cell wafers of different processes. [Major component symbol description] 10 solar cell wafer Π semiconductor substrate 111 micro-mountain mountain 112 protrusion particles 12 second doped semiconductor layer 13 anti-reflection layer 141, 142 electrode 501, 502, 503 reflectance curve 12