1352951 t 051093ITW 1817Itwf.doc/g 几、贊嗎說明·· 【發明所屬之技術領域】 本發明是有關於〜插该曰_。。 ，有共用電壓補償且特别是有關於、 【先前技術】 圖1繪示為習4d „ 路。請參照圖！，在示器之像素（p^ 極端m電性連接素電路中，薄膜電晶體113^電 至閘極配線⑼，岐極端丨 電性連^ 與像素電極109電性遥技、…#的儲存電容in 中，因顯示面板陣列\用電極1〇7 °在液晶顯示器 與共用電請之間雜因素’源極配線ΗΠ Ί q存在—寄生電容105。 特殊畫=:二=生=，在顯示—些 2上的電壓(以下稱為共用電壓)產生共用 =以是黑框、白框及其他灰階框等。以中，畫 圖2所示具有—黑框2G1之白晝面時“ ’在顯示 域202與2〇3之輝度會因寄生雷 ='，、、框加1兩側區 不會與區域204或205之輝度相@。生的轉合現象而 在顯示面板中若要改善因寄生電容 影響，習知的作衫由製程之改 ^^合現象之 但製程改變可能會影響噸+ 术~低寄生電容， 高。 ㈣板的其―，且成本也較 5 1352951 « 051093ITW !8171twf.doc/g 【發明内容】 有鑑於此，本發明 的共用電_償裝置、& 用於液晶顯示器 I 種/夜晶顯不器丨V U 你、六Β θχ:- 器驅動方法，來降低—面板中寄^及:種液Β曰顯示 顯示器的共用電塵的影響。 現象對液晶 示哭為其他目的’本發明提出-種液晶顯 知—影像訊號，此影像訊號包括—1352951 t 051093ITW 1817Itwf.doc/g A few words, like a description. [Technical Field of the Invention] The present invention relates to the insertion of the 曰_. . There is a common voltage compensation and it is especially relevant. [Prior Art] Figure 1 shows the 4d „ road. Please refer to the figure!, in the pixel of the display (p^ extreme m electrical connector circuit, thin film transistor 113^Electrical to gate wiring (9), 岐 extreme 丨 electrical connection ^ and pixel electrode 109 electrical telemetry, ... # storage capacitor in, due to display panel array \ with electrode 1 〇 7 ° on the liquid crystal display and shared electricity Please inter-factors 'source wiring ΗΠ Ί q exists - parasitic capacitance 105. Special drawing =: two = raw =, in the display - some 2 voltage (hereinafter referred to as the common voltage) to generate a common = to be black frame, white Box and other grayscale frames, etc. In the case of drawing 2, there is a black box 2G1 white plane" "The brightness in display fields 202 and 2〇3 will be due to parasitic lightning = ', The area will not be in phase with the brightness of the area 204 or 205. In order to improve the effect of parasitic capacitance in the display panel, the conventional blouse may be modified by the process, but the process may change. The impact of tons + surgery ~ low parasitic capacitance, high. (four) the board's - and the cost is also 5 1352951 « 051093I TW !8171twf.doc/g [Summary of the Invention] In view of the above, the shared power compensation device of the present invention, & is used for liquid crystal display I / night crystal display device U VU you, six Β θ χ: - device driving method , to reduce - the board in the ^ and: the liquid Β曰 shows the effect of the shared electric dust of the display. Phenomenon on the liquid crystal crying for other purposes 'The present invention proposes - a liquid crystal display - image signal, this image signal includes -
個像素_的水平線訊號，且這些像素資料中相鄰 兩像素貧料極性相反。 此液晶顯示器包括一時序控制器、一補償電路以及一 顯示面板，而此時序控制ϋ包括-查找表、-資料分析器 t及一極性選擇态。查找表内建多個共用電壓補償數值。 資料分析器針對水平線訊號之一灰階分佈進行分析，並根 據分析結果對照查找表提供一數值控制訊號，其中數值控 制訊號對應共用電壓補償數值的其中之一。極性選擇器根 據資料为析器之分析結果提供一極性控制訊號。補償電路 根據數值控制訊號及極性控制訊號以提供一共用電壓補償 訊號。顯示面板接收水平線訊號及共用電壓補償訊號，並 藉著共用電壓補償訊號補償共用電壓以顯示水平線訊號。 本發明另提出一種共用電壓補償裝置，適用於一液晶 顯示器之顯示面板，其係用以接收並顯示一影像訊號，其 中影像訊號包括一具有多個像素資料的水平線訊號，且這 些像素資料中相鄰兩像素資料極性相反。此共用電壓補償 裝置包括一查找表、一資料分析器、一極性選擇器以及一 1352951 051093ITW 丨 8 ] 71 twf.doc/g 補償電路。在-實關巾，當¥料分析器 佈係水平線訊號之奇數個像素資料中在—灰階值範=分 個數與水平線減之偶數個像素#财在 之 之個數二者相差大於Μ個且大於N倍時 ：’ 1貝八中1^與>1為正1數。而财心根據譬 板的水平解析度或顯示面板的大小來做調整。 、面 本發明又提出-種液晶顯示器驅動方法，此 器驅動方法先接收-影像訊號，其中影像 :員不 :個像素資料的水平線訊號’且這些像素資二相 =料極性城晝面。此液晶顯示器驅動方法再針對水ί 斷’根據灰階分佈之分析結果判 拉ΐΐ 找貞，以及在需進行共用電墨補償 夺，決疋補償之電壓極性以進行共用電壓補償。 正因為本發明可以在不需改變製程的條件下 t料分析關斷詞的灰階分佈後，再補償^ 所造成的麵合現象，進而改善此賴合現象 對旦面σ口質的影響。 為^㈣之上述和其他目的、碰和優點能更明顯 明如下 舉較佳實施例，並配合所附圖式，作詳細說 【實施方式】 =^示為依照本發明之-較佳實施例 顯不"之方塊圖。請參照圖3,液晶顯 7 1352951 051093ITW 18171 twf.doc/g 电壓補偵裝置301與顯示面板307。其中，共用電壓補償 裝置301包括時序控制器3〇3和補償電路3〇5，而顯示面 板307包括共用電極基板307a與陣列電路基板3〇7b。共 用電極基板307a接收一共用電壓訊號，陣列電路基板 307b 接收一影像訊號，且兩基板3〇7&與3〇7b之間的液晶分子 受到共用電壓訊號與影像訊號的電壓差所驅動。 補償電路3G5會依據時序控制器3()3輸出的數值控制 訊號和極性控制訊號，配合鎖存脈衝(latch pulse)訊號以提 供一共用電壓補償訊號到共用電極基板遍，其中鎖存脈 ，訊號係作為源極驅動器資料輸出的控制訊號，-般由時 ^控制器303提供。所以，共用電極基板遍除了接收共 ，L心虎外’還接收共用電I補償訊號以補償共用電極 ^化咖上的制電壓受寄生電容_合現象而產生電 粗八ί本實施例中，時序控制器303包括緩衝器_、資 找表313和極性選擇器315。緩衝器柳 =減^存影像訊號，其中影像訊號由連續的晝面所 具有面包鮮條水平線訊號，每—條水平線訊號 性相ΐ Λ ’且這些像素資料中相鄰兩像素資料極 =別對料贼㈣1水平線訊躲； 極性分別電性連接到查找表313、 極!生選擇心和補償電路3〇5。其中，資料分析器311 8 1352951The horizontal line signal of the pixel_, and the adjacent two pixels of the pixel data have opposite polarities. The liquid crystal display includes a timing controller, a compensation circuit, and a display panel, and the timing control includes a lookup table, a data analyzer t, and a polarity selection state. The lookup table has multiple built-in voltage compensation values. The data analyzer analyzes the gray scale distribution of one of the horizontal line signals, and provides a numerical control signal according to the analysis result according to the lookup table, wherein the numerical control signal corresponds to one of the shared voltage compensation values. The polarity selector provides a polarity control signal based on the analysis results of the analyzer. The compensation circuit provides a common voltage compensation signal based on the value control signal and the polarity control signal. The display panel receives the horizontal line signal and the shared voltage compensation signal, and compensates the common voltage by the shared voltage compensation signal to display the horizontal line signal. The present invention further provides a shared voltage compensation device, which is suitable for a display panel of a liquid crystal display, and is configured to receive and display an image signal, wherein the image signal includes a horizontal line signal having a plurality of pixel data, and the pixel data phase The adjacent two-pixel data has the opposite polarity. The shared voltage compensation device includes a lookup table, a data analyzer, a polarity selector, and a 1352951 051093ITW 丨 8 ] 71 twf.doc/g compensation circuit. In the real-cut towel, when the material analyzer is in the odd-numbered pixel data of the horizontal line signal, the difference between the gray-scale value nor the number of points and the horizontal line minus the even-numbered pixels. When it is greater than N times: '1 Bayi's 1^ and >1 are positive ones. And Caixin adjusts according to the horizontal resolution of the board or the size of the display panel. The present invention further proposes a liquid crystal display driving method. The driving method first receives an image signal, wherein the image is: a horizontal line signal of a pixel data and the pixels are two phases. The liquid crystal display driving method further determines the 根据 according to the analysis result of the gray scale distribution, and the shared electric ink compensation is performed, and the voltage polarity of the compensation is determined to perform the common voltage compensation. It is precisely because the present invention can analyze the gray-scale distribution of the shut-off words without changing the process conditions, and then compensate for the surface-closing phenomenon caused by ^, thereby improving the influence of the dependence on the s-quality of the surface σ. The above and other objects, advantages and advantages of the present invention will become more apparent from the following description of the preferred embodiments of the invention. Show no square block diagram. Referring to FIG. 3, the liquid crystal display 7 1352951 051093ITW 18171 twf.doc/g voltage compensation device 301 and display panel 307. The shared voltage compensating device 301 includes a timing controller 3〇3 and a compensating circuit 3〇5, and the display panel 307 includes a common electrode substrate 307a and an array circuit substrate 3〇7b. The common electrode substrate 307a receives a common voltage signal, and the array circuit substrate 307b receives an image signal, and the liquid crystal molecules between the two substrates 3〇7& and 3〇7b are driven by the voltage difference between the common voltage signal and the image signal. The compensation circuit 3G5 controls the signal and the polarity control signal according to the value outputted by the timing controller 3()3, and cooperates with the latch pulse signal to provide a common voltage compensation signal to the common electrode substrate, wherein the pulse and the signal are latched. The control signal outputted as the source driver data is generally provided by the controller 303. Therefore, in the embodiment, the common electrode substrate receives the common electric I compensation signal to compensate for the voltage on the common electrode, and the voltage is generated by the parasitic capacitance. The timing controller 303 includes a buffer_, a lookup table 313, and a polarity selector 315. The buffer image is reduced by the image signal, wherein the image signal has a horizontal line signal of the bread line from the continuous dough surface, and each horizontal line has a signal phase ΐ 且 and the adjacent two pixels of the pixel data are extremely different. The thief (four) 1 horizontal line information hiding; the polarity is electrically connected to the look-up table 313, the pole selection and the compensation circuit 3〇5. Among them, data analyzer 311 8 1352951
051093ITW 18171 twf.doc/g 會根據灰階分佈之分析結果與查找表313内建的多個共同 .=壓補償數值做比對，從查找表313内選擇一共同電壓補 • 償數值以輸出相應的數值控制訊號到補償電路3〇5。而資 . 料分析器311的灰階分佈之分析結果亦提供到極性選擇器 315做水平線訊號極性的選擇，再經由極性選擇器315輪 出相應的極性控制訊號到補償電路305。 因此，補償電路305所提供的共用電壓補償訊號之數 值與極性分別由時序控制器303輸出的數值控制訊號與極 _ 性控制訊號來決定，而其時序則是由鎖存脈衝訊號來決 定。一般而言，共用電壓補償訊號送出的時間在鎖存脈衝 訊號的下降緣。 眾所皆知地，一般顯示面板的驅動方式分為晝面反轉 (frame inversion)、行反轉(c〇iumn inversi〇n)、列反轉(r〇w inversion)及點反轉(dot inversion)。藉由改變驅動液晶分子 的電壓之極性，以防止液晶分子的特性變差造成畫面品質 變差。而本發明適用於採用譬如點反轉或行反轉驅動方式 的液晶顯不裔。 此外’ 一般顯示面板的驅動方式亦分為正常顯白 (normally white)以及正常顯黑（noraiaUy black)。對正常顯 白的顯示面板進行驅動時，施加於面板上之白信號與共用 電壓的電壓差較小，而黑信號與共用電壓的電壓差較大， 因此黑§孔號因為寄生電容的|禺合現象會對共用電壓造成較 大的影響。反之’對正常顯黑的顯示面板進行驅動時，白 訊號會對共用電壓造成較大的影響。下面將以正常顯白並 9 13529^1 051093JTW 丨 8 丨 7 丨 twf.doc/g 採點反轉驅動方式的顯示面彳 此技藝者當可輕易將本發==述本發明:凡熟悉 行反轉驅動方式_示面板。X H制在正常顯黑或 在_示面板上顯示—晝科《面的像素 a 廿山「 、 ΰ 0亥顯不面板係採點反轉驅動方 乂 ’、_ +」為正極性而「_」為負極性。請參照圖4所051093ITW 18171 twf.doc/g will compare the analysis results of the gray scale distribution with the multiple common == pressure compensation values built in the lookup table 313, and select a common voltage compensation value from the lookup table 313 to output the corresponding The value of the control signal to the compensation circuit 3〇5. The analysis result of the gray scale distribution of the resource analyzer 311 is also provided to the polarity selector 315 for the selection of the horizontal line signal polarity, and then the corresponding polarity control signal is rotated to the compensation circuit 305 via the polarity selector 315. Therefore, the value and polarity of the shared voltage compensation signal provided by the compensation circuit 305 are determined by the value control signal and the polarity control signal outputted by the timing controller 303, respectively, and the timing is determined by the latch pulse signal. In general, the time that the shared voltage compensation signal is sent is at the falling edge of the latch pulse signal. As is well known, the general display panel driving method is divided into frame inversion, line inversion (c〇iumn inversi〇n), column inversion (r〇w inversion) and dot inversion (dot). Inversion). The picture quality is deteriorated by changing the polarity of the voltage of the liquid crystal molecules to prevent deterioration of the characteristics of the liquid crystal molecules. The present invention is applicable to liquid crystal display persons using, for example, dot inversion or line inversion driving. In addition, the driving mode of the general display panel is also divided into normal white and noraia Uy black. When driving a normally white display panel, the voltage difference between the white signal applied to the panel and the common voltage is small, and the voltage difference between the black signal and the common voltage is large, so the black § hole number is due to the parasitic capacitance | The phenomenon of integration will have a greater impact on the sharing voltage. On the other hand, when the display panel that is normally black is driven, the white signal has a large influence on the common voltage. The following will be normal white and 9 13529 ^ 1 051093JTW 丨 8 丨 7 丨 twf.doc / g pick-up point driving mode display surface 彳 this artist can easily put this hair = = description of the invention: where familiar with Reverse drive mode _ display panel. The XH system is displayed in normal black or on the display panel. The pixel "a" of the surface of the H 「 「 、 亥 亥 亥 亥 亥 亥 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 It is negative polarity. Please refer to Figure 4
示之顯示雜，在顯示面板上奇數條源極配線依序標示為 綱、403'405、... ’偶數條源極配線依序標示為4〇2、4〇4、 406、…’而閘極配線依序標示為“〜如。其中，每一源極 配線401〜413和每一閘極配線41〜46交叉處即配置一像 素，此像素可以暫存並顯示一像素資料。為方便說明，定 義源極配線401和閘極配線41交又處所配置的像素暫存並 顯示之像素資料為P(4〇l，41)，源極配線402和閘極配線41 交叉處所配置的像素暫存並顯示之像素資料為 Ρ(402,41)，其它依此類推。 舉例來說’當以脈衝訊號致動閘極配線41時，透過源 極配線401〜413將一條水平線訊號送到像素中，其中這條 水平線訊號包括像素資料P(4〇l，41)、Ρ(402,41)、 Ρ(4〇3,41).....Ρ(413,41) ’且這些像素資料 Ρ(401，41)〜Ρ(413,41)相鄰兩像素資料極性相反。接著，當 閘極配線42被致動時，將另一條包括像素資料 Ρ(401,42)〜Ρ(413,42)的水平線訊號送到像素中，其中像素 資料Ρ(401，42)〜Ρ(413,42)相鄰兩像素資料極性相反，且像 素資料Ρ(401，42)〜Ρ(413,42)與相應位置的像素資料 1352951 05I093ITW 18l71twf.doc/g p(401，41)〜p(413,41)相鄰兩像素資料極性亦相反。因此， 逐條致動閘極配線41〜46並將相應的像素資料送到像素 中，以產生如圖4所示的像素資料之極性分佈。 ” 反，即「+」變為 此外，若圖4所示為目前晝面的像素資料之極性分 佈，則下一晝面的像素資料之極性分佈須與目前晝面相 變為 其中每一晝面 而The display shows that the odd-numbered source wirings are sequentially labeled as the outline, 403'405, ... 'the even-numbered source wirings are sequentially labeled as 4〇2, 4〇4, 406,...' The gate wirings are sequentially labeled as “~. For example, each of the source wirings 401 to 413 and each of the gate wirings 41 to 46 are disposed at a position where one pixel is disposed, and the pixel can temporarily store and display one pixel of data. It is to be noted that the pixel data in which the pixel disposed at the intersection of the source wiring 401 and the gate wiring 41 is temporarily stored and displayed is P(4〇1, 41), and the pixel disposed at the intersection of the source wiring 402 and the gate wiring 41 is temporarily suspended. The pixel data stored and displayed is Ρ(402,41), and so on. For example, when the gate wiring 41 is actuated by the pulse signal, a horizontal line signal is sent to the pixel through the source wirings 401 to 413. , wherein the horizontal line signal includes pixel data P(4〇l, 41), Ρ(402,41), Ρ(4〇3,41).....Ρ(413,41)' and these pixel dataΡ (401, 41) ~ Ρ (413, 41) the polarity of the adjacent two pixel data is opposite. Then, when the gate wiring 42 is actuated, the other one includes the pixel水平 (401, 42) ~ Ρ (413, 42) horizontal line signal is sent to the pixel, wherein the pixel data Ρ (401, 42) ~ Ρ (413, 42) adjacent two pixels of data polarity is opposite, and the pixel data Ρ ( 401, 42) ~ Ρ (413, 42) and corresponding position of the pixel data 1352951 05I093ITW 18l71twf.doc / gp (401, 41) ~ p (413, 41) adjacent two pixels data polarity is also opposite. Therefore, one by one The gate wirings 41 to 46 are driven and the corresponding pixel data is sent to the pixels to generate a polarity distribution of the pixel data as shown in FIG. 4. "Inverse, that is, "+" becomes additional, if FIG. 4 shows the current The polarity distribution of the pixel data of the facet, the polarity distribution of the pixel data of the next face must be changed to the face of each face.
的極性为佈之反轉由譬如圖3的極性選擇器31 $所提供的 極性POL決定。例如，當極性p〇L為正極性時，像^資 料P(401，41)為正極性而像素資料p(402,41)為負極性；'反 之，若極性POL為負極性時，像素資料p(4〇1,41)為負極 性而像素資料P(402,41)為正極性。 、 圖5緣示為圖3所示液晶顯示器300中相關訊號的時 序圖。請同時參照圖3、圖4與圖5 ,共用電壓補償裝置 30'提供一判斷機制來決定是否對共用電壓進行補償。此 判斷機制係由資料分析器311對影像訊號中的每一水平線 汛唬之奇數個像素資料中在一灰階值範圍内之個數與水平 =訊號之偶數個像素資料中在該灰階值範圍内之個數進行 刀析。其中，若以閘極配線41被致動時送入的水平線訊號 為例，此水平線訊號包括奇數個像素資料p(4〇l，41)、 (4〇3,41)、…、p(4i3,41)，以及偶數個像素資料p(4〇2,4i)、 P(404,41).....P(412,41)。 八再者，以8位元灰階(256色階）為例，且其灰階值從〇 全黑）到255 (全白）。由於採用正常顯白的顯示面板，黑訊 號對共用電1的影響較大’因此只統計奇數個（或偶數、個) 1352951 051093ITW 18171 twf.doc/g 像素f料中灰階值落在上述灰階值範圍内之 施例中，此灰階值範圍譬如為〇〜5〇。 在匕貝 當奇數個像素資料中在灰階值範 訊號之偶數個像素資料中在該灰階值範圍内之:數二:： 等時2於奇數個與偶數個像素資料極性相反而對共用電 歷的衫響互相抵消’因此不需要對共用電魏行補償。The polarity of the cloth is reversed by the polarity POL provided by the polarity selector 31 $ of Fig. 3. For example, when the polarity p〇L is positive, the data P(401, 41) is positive and the pixel data p(402, 41) is negative; 'or vice versa, if the polarity POL is negative, pixel data p(4〇1, 41) is a negative polarity and the pixel data P (402, 41) is a positive polarity. FIG. 5 is a timing diagram of related signals in the liquid crystal display 300 shown in FIG. Referring to FIG. 3, FIG. 4 and FIG. 5 simultaneously, the shared voltage compensating device 30' provides a judging mechanism to determine whether to compensate the common voltage. The judging mechanism is used by the data analyzer 311 for the number of grayscale values in an odd number of pixel data of each horizontal line in the image signal and the even number of pixel data of the level=signal in the grayscale value. The number in the range is analyzed. For example, if the horizontal line signal sent when the gate wiring 41 is actuated is taken as an example, the horizontal line signal includes an odd number of pixel data p(4〇l, 41), (4〇3, 41), ..., p(4i3). , 41), and an even number of pixel data p (4〇2, 4i), P(404, 41).....P(412, 41). Eight again, take the 8-bit grayscale (256 levels) as an example, and its grayscale value is from 〇 all black to 255 (all white). Due to the use of a normally white display panel, the black signal has a greater influence on the shared power 1. Therefore, only an odd number (or even number) is counted. 1352951 051093ITW 18171 twf.doc/g The gray scale value in the pixel f falls on the above gray In the example within the range of the order value, the range of the gray scale value is, for example, 〇~5〇. In the odd-numbered pixel data of the mussels, in the even-numbered pixel data of the gray-scale value of the signal, the number of the gray-scale values is: two:: isochronous 2 is opposite to the odd-numbered and even-numbered pixel data. The shirts of the electric calendars cancel each other out of the 'think of the need to compensate for the shared electricity.
當奇數個像素資料中在灰階值範圍内之個數盘水平線 訊號之偶數個像素資料中在該灰階值範圍内之個 差大於Μ個且大於N倍時，整條水平資料線會對制才電 壓造姑響。例如，若奇數個像素資料為負極性而偶數個 像素育料為正極性，則當極性P〇L為正極性5〇1且在鎖存 脈衝讯號的下降緣503時，產生降低的共用電壓5〇4，接 著，吾極性POL為負極性502且在鎖存脈衝訊號的下降緣 503時，產生升咼的共用電壓5〇5。因此補償電路根據 資料分析器311輸出的數值控制訊號決定輸出的共用電壓 補償訊號之大小，以及根據極性選擇器315輸出的極性控 制訊5虎决疋輸出的共用電麗補償訊號之極性，以產生適告 的共用電壓補償訊號對共用電壓進行補償。 再舉例來說，如果奇數個像素資料中在灰階值範圍内 之個數為1000而偶數個像素資料中在灰階值範圍内之個 數為600，則二者相差400 (=1000 - 600)個且相差！ 67 (=1000/600)倍。假使根據譬如顯示面板的水平解析度或顯 示面板的大小將Μ與N分別調整為300與2,則上述相差 12 1352951 051093ITW 18171twf.doc/g 4〇〇個(>M個)且相差！ 67倍(<N倍)之情形將不需要進行 共用電壓補償。 圖6為依照本發明之較佳實施例所繪示的液晶顯示器 驅動方法的流程圖。請同時參照圖3與圖6，首先，在步 驟S6(H 夜晶顯示器3〇〇接收一影像訊號，其中影像訊號 包括-具有彡個像素資㈣水平線訊號，且這些像素資料 中相鄰兩像素資料極性相反。在步驟·，資料分析器 311^針對影像訊號的—水平線訊號之灰階分佈進行分析。 接著/，在步驟S605根據灰階分佈之分析結果判斷是否需 要進仃共用電壓補償。若需要進行共用電壓補償，則在步 驟S607決定所需補償之電壓極性，在步驟s6〇9由補償電 路305產生具有適當大小與極性的共用電壓補償訊號，以 及在步驟S611將共用電壓補償訊號送至顯示面板3〇7。 絲上所述，本發明因採用一種共用電壓補償裝置針對 接收的影像訊號之每—水平線訊號進行灰階分佈之分析， "I以在不修改製程下，補償顯示面板的共用電壓受到寄生 電谷耦合現象的影響，進而改善畫面品質。 —雖然本發明已以較佳實施例揭露如上，然其並非用以 限f本發明，任何熟習此技藝者，在不脫離本發明之精神 =犯圍内’當可作些許之更動與潤飾，目此本發明之保 範圍當視後附之申請專利範圍所界定者為準。 【圖式簡單說明】 圖1繪示為習知的液晶顯示器之晝素電路。 圖2繪示為黑框兩側之輝度與其他區之差異示意圖。 13 1352951 0510931TW 18]71twf.doc/g 圖3為依照本發明之較佳實施例所繪示之液晶顯示器 . 的方塊圖。 圖4繪示在顯示面板上顯示一晝面時該晝面的像素資 料之極性分佈示意圖。 ' 圖5繪示為圖3所示液晶顯示器中相關訊號的時序圖。 圖6為依照本發明之較佳實施例所繪示之液晶顯示器 驅動方法的流程圖。 【主要元件符號說明】 φ 300:液晶顯示器 301 :共用電壓補償裝置 303 :時序控制器 305 :補償電路 307 :顯示面板 307a :共用電極基板 307b :陣列電路基板 309:緩衝器 I 311:資料分析器 313 :查找表 315 :極性選擇器 401〜413 :源極配線 41〜46 :開極配線 P(401,41)〜P(402,41):像素資料 501 :正極性 502 :負極性 14 1352951 051093ITW 18171twf.doc/g 503 :鎖存脈衝訊號的下降緣 504 :降低的共用電壓 505 :升高的共用電壓 S601〜S611 :流程圖步驟When the odd-numbered pixel data of the odd-numbered pixel data in the odd-numbered pixel data has a difference greater than Μ and greater than N times in the gray-scale value range, the entire horizontal data line will The system voltage is aroused. For example, if an odd number of pixel data is negative polarity and an even number of pixel feeds is positive polarity, then when the polarity P〇L is positive polarity 5〇1 and the falling edge 503 of the latch pulse signal is generated, a reduced common voltage is generated. 5〇4, then, when the polarity POL is the negative polarity 502 and the falling edge 503 of the latch pulse signal is generated, the boosted common voltage 5〇5 is generated. Therefore, the compensation circuit determines the magnitude of the shared voltage compensation signal outputted according to the value control signal outputted by the data analyzer 311, and the polarity of the common galvanic compensation signal outputted according to the polarity control output of the polarity selector 315 to generate The shared voltage compensation signal is compensated for the common voltage. For another example, if the number of grayscale values in an odd number of pixel data is 1000 and the number of grayscale values in an even number of pixel data is 600, the difference between the two is 400 (=1000 - 600) ) and the difference! 67 (=1000/600) times. If the Μ and N are adjusted to 300 and 2, respectively, according to the horizontal resolution of the display panel or the size of the display panel, the above difference 12 1352951 051093ITW 18171twf.doc/g 4 &(> M) and the difference! In the case of 67 times (<N times), sharing voltage compensation is not required. FIG. 6 is a flow chart showing a driving method of a liquid crystal display according to a preferred embodiment of the present invention. Please refer to FIG. 3 and FIG. 6 at the same time. First, in step S6 (H night crystal display 3 〇〇 receives an image signal, wherein the image signal includes - has one pixel (four) horizontal line signal, and adjacent pixels in the pixel data The data polarity is reversed. In step, the data analyzer 311 is analyzed for the gray scale distribution of the horizontal signal of the image signal. Then, in step S605, it is judged according to the analysis result of the gray scale distribution whether the sharing voltage compensation is required. If the sharing voltage compensation is required, the voltage polarity of the required compensation is determined in step S607, the common voltage compensation signal having the appropriate size and polarity is generated by the compensation circuit 305 in step s6〇9, and the common voltage compensation signal is sent to the step S611. The display panel 3〇7. As described above, the present invention uses a common voltage compensation device to perform gray scale distribution analysis on each horizontal line signal of the received image signal, "I to compensate the display panel without modifying the process The common voltage is affected by the parasitic electric valley coupling phenomenon, thereby improving the picture quality. - Although the present invention has been The preferred embodiment is disclosed above, but it is not intended to limit the invention, and any person skilled in the art can make some modifications and refinements without departing from the spirit of the invention. The scope is defined by the scope of the patent application attached. [Simplified illustration of the drawings] Figure 1 shows a pixel circuit of a conventional liquid crystal display. Figure 2 shows the luminance and other areas on both sides of the black frame. FIG. 3 is a block diagram of a liquid crystal display according to a preferred embodiment of the present invention. FIG. 4 is a block diagram showing a display on a display panel. FIG. 5 is a timing diagram of related signals in the liquid crystal display shown in FIG. 3. FIG. 6 is a flow chart of a liquid crystal display driving method according to a preferred embodiment of the present invention. Fig. [Description of main component symbols] φ 300: Liquid crystal display 301: Common voltage compensation device 303: Timing controller 305: Compensation circuit 307: Display panel 307a: Common electrode substrate 307b: Array circuit substrate 309: Buffer I 311: data analyzer 313: lookup table 315: polarity selectors 401 to 413: source wirings 41 to 46: open wirings P (401, 41) to P (402, 41): pixel data 501: positive polarity 502: Negative polarity 14 1352951 051093ITW 18171twf.doc/g 503 : falling edge of latch pulse signal 504 : reduced common voltage 505 : raised common voltage S601~S611 : flowchart step
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