TWI344746B - Driving circuit and power converter having the driving circuit - Google Patents
Driving circuit and power converter having the driving circuit Download PDFInfo
- Publication number
- TWI344746B TWI344746B TW97102001A TW97102001A TWI344746B TW I344746 B TWI344746 B TW I344746B TW 97102001 A TW97102001 A TW 97102001A TW 97102001 A TW97102001 A TW 97102001A TW I344746 B TWI344746 B TW I344746B
- Authority
- TW
- Taiwan
- Prior art keywords
- switch
- signal
- switching
- circuit
- turned
- Prior art date
Links
Landscapes
- Dc-Dc Converters (AREA)
Description
1344746 九、發明說明: 【發明所屬之技術領域】 本發明是有關於一種驅動電路及包含此驅動電路的電 源轉換器,特別是指一種主動修正式的驅動電路及包含此 駆動電路的電源轉換器。 【先前技術】 驅動之同步整流雷汲 參閱圖1,習知自我驅動之同步整流電源轉換器,包括 主變壓器71、一驅動開關72、一整流開關73、一環流開 關74、一電感75及一電容76。且該主變壓器71包括一第 一線圈711和一第二線圈712。 該第一線圈711的一第一端接收一輸入電源77,該驅 動開關72的一控制端接收一驅動信號,且一外接負載78 與該電容並聯。 當該驅動開關72受該驅動信號控制而導通,該第二線 圈712的第一端能透過該第一線圈711感應該輸入電源π ’而使該整流開關73呈現導通狀態。此時,該環流開關Μ 截止’-轉換電流從該第二線圈712的一第一端往該電感 75的方向流動,以對該電感75儲能,並進而透過該電容 76將能量傳遞到該外接負載78。 接著’畜該驅動開㈤72受該驅動信號控制而截止,該 整流開關73受該第二線圈712的第一端控制呈現截止狀能 。此時,該環流開關74導通,該轉換電流的電流方向為從 該電容76流向該電感75與該環流開關74,而該電感75進 5 1344746 行釋放能量。 直到該驅動開關72再次受該驅動信號控制而導通,該 整流開關73呈現導通狀態,且該環流開關74維持導通時 ,該轉換電流仍從該電容76流向該電感75,且該轉換電流 的絕對值逐漸減小。此時,部分轉換電流從該電感75透過 該環流開關74和該整流開關73流向該第二線圈712,而該 第一線圈711將感應一送回該輸入電源7 7的逆向電流,即 所謂逆流現象。 • 而當從該電容76流向該電感75的電流絕對值降為零 ’該環流開關74截止,並且電流方向改為從該第二線圈 712往該電感75時,便可再次傳遞能量到該外接負載78。 習知自我驅動之同步整流電源轉換器中,該驅動開關 72由截止狀態切換至導通狀態時,該環流開關74無法立即 同步切換到截止狀態,而導致逆流現象,也因而造成電力 損失使得功率轉換效率降低。 • 遭知以電流變壓器控制之同步整流電源韓換器 參閱圖2’參考中華民國專利證書號22〇〇84號,習知 以電流變壓器控制之同步整流電源轉換器,適用於非連續 電、作权式包含一開關晶體82、一触返(flyback)變壓 态81、一電流變壓器87、一控制電路84、—開關驅動單元 85、一同步整流開關83及一電容86。且該馳返變壓器81 包括一第一線圈811和一第二線圈812,該電流變壓器87 包括一第二線圈871和一第四線圈872。 δ亥第一線圈811的一第一端接收一輸入電源88,該開 6 關晶體82的控制端接收一驅動信號,而該電容86並聯 一外接負載89。 當該開關晶體82的一控制端接收一驅動信號時,透過 該胁返變壓态81,該電流變壓器87的第四線圈872能感應 到一相對應該輸入電源88的感應電壓。該控制電路84經 由該第四線圈872的兩端接收該感應電壓,以控制該開關 驅動單元85 ’來決定該同步整流開關83的導通狀態,進而 決定是否傳遞能量到該外接負載89。 當該第二線圈812感應到的電流方向反轉為從該電容 86流向該第二線圈812且該開關晶體82為導通狀態時,習 知以電流變壓器控敎同步|流電源轉換器能確保該同步 整流開關83處於截止狀態’不使電流回流到該輸入電源肫 而造成逆流現象。而該開關驅動單元85無法依據該同步整 流開關83的第-端來同步控制其控制端,所以,電路同步 情形不佳。 而上述電源轉換器在關於驅動能力、開關逆流和電路 同步等方面的問題,可透過一般驅動晶片來解決。但是, 驅動曰日片所費成本過高’同時導致電源轉換器的整體價格 相:提高。因&,如何提供一種在具有高驅動能力、避免 路同步下’仍具有低製造成本的電源轉換器是目 前一重要目標。 【發明内容】 種除了可以增加驅 同時降低電路成本 因此,本發明之目的,即在提供一 動此力防止逆流及提高電路同步性, 1344746 的驅動電路及包含此驅動電路的電源轉換器。 於是’本發明電源轉換器,適用於接收一輸入電源和 一具有二個穩態位準的驅動信號’並電連接一外接負載, 該電源轉換器包含一主開關、一主變壓器、—切換電路及 一驅動電路。 該主開關受該驅動信號控制以改變導通狀態。該主變 壓器具有一位於一次側的第一線圈和一位於二次側的第二1344746 IX. Description of the Invention: [Technical Field] The present invention relates to a driving circuit and a power converter including the same, and particularly to an active correction driving circuit and a power converter including the same . [Prior Art] Driving Synchronous Rectifier Thunder Referring to FIG. 1, a conventional self-driven synchronous rectification power converter includes a main transformer 71, a driving switch 72, a rectifying switch 73, a circulating current switch 74, an inductor 75 and a Capacitor 76. And the main transformer 71 includes a first coil 711 and a second coil 712. A first end of the first coil 711 receives an input power source 77. A control terminal of the driving switch 72 receives a driving signal, and an external load 78 is connected in parallel with the capacitor. When the driving switch 72 is controlled to be turned on by the driving signal, the first end of the second coil 712 can sense the input power π' through the first coil 711 to cause the rectifying switch 73 to be in an on state. At this time, the loop switch 截止 turns off the '-switching current flows from a first end of the second coil 712 toward the inductor 75 to store energy to the inductor 75, and further transmits energy to the capacitor 76. External load 78. Then, the animal drive switch (5) 72 is turned off by the drive signal control, and the rectifier switch 73 is controlled by the first end of the second coil 712 to exhibit a cutoff performance. At this time, the circulating current switch 74 is turned on, and the current direction of the switching current flows from the capacitor 76 to the inductor 75 and the circulating current switch 74, and the inductor 75 enters 5 1344746 rows to release energy. Until the driving switch 72 is again controlled by the driving signal, the rectifying switch 73 is in an on state, and when the circulating current switch 74 is kept on, the switching current still flows from the capacitor 76 to the inductor 75, and the absolute value of the switching current The value gradually decreases. At this time, a part of the switching current flows from the inductor 75 through the circulating current switch 74 and the rectifying switch 73 to the second coil 712, and the first coil 711 senses a reverse current that is sent back to the input power source 71, so-called countercurrent. phenomenon. • When the absolute value of the current flowing from the capacitor 76 to the inductor 75 drops to zero, the loop switch 74 is turned off, and the current direction is changed from the second coil 712 to the inductor 75, the energy can be transferred again to the external connection. Load 78. In the conventional self-driven synchronous rectification power converter, when the drive switch 72 is switched from the off state to the on state, the loop switch 74 cannot immediately switch to the off state synchronously, resulting in a reverse flow phenomenon, thereby causing power loss and power conversion. Reduced efficiency. • Known that the synchronous rectifier power supply controlled by current transformer is referred to Figure 2'. Refer to the Republic of China Patent No. 22〇〇84. It is known as a synchronous rectifier power converter controlled by current transformer. It is suitable for non-continuous power. The weight includes a switch crystal 82, a flyback variable pressure state 81, a current transformer 87, a control circuit 84, a switch drive unit 85, a synchronous rectification switch 83, and a capacitor 86. The flyback transformer 81 includes a first coil 811 and a second coil 812. The current transformer 87 includes a second coil 871 and a fourth coil 872. A first end of the delta first coil 811 receives an input power supply 88. The control terminal of the open crystal 82 receives a drive signal, and the capacitor 86 is connected in parallel with an external load 89. When a control terminal of the switch crystal 82 receives a drive signal, the fourth coil 872 of the current transformer 87 can sense an induced voltage corresponding to the input power source 88 through the retway voltage state 81. The control circuit 84 receives the induced voltage from both ends of the fourth coil 872 to control the switch driving unit 85' to determine the conduction state of the synchronous rectification switch 83, thereby determining whether to transfer energy to the external load 89. When the current direction sensed by the second coil 812 is reversed from the capacitor 86 to the second coil 812 and the switch crystal 82 is in an on state, it is conventional to use a current transformer to control the synchronous | current power converter to ensure the The synchronous rectification switch 83 is in an off state, which does not cause current to flow back to the input power source, causing a backflow phenomenon. The switch driving unit 85 cannot synchronously control its control terminal according to the first end of the synchronous rectifier switch 83, so the circuit synchronization situation is not good. The above problems with the power converter in terms of driving capability, switching reverse current, and circuit synchronization can be solved by a general driver chip. However, the cost of driving the Japanese film is too high, and at the same time, the overall price of the power converter is increased: Because of &, how to provide a power converter that has low driving cost while having high driving capability and avoiding road synchronization is an important goal at present. SUMMARY OF THE INVENTION In addition to increasing the cost of driving while reducing the cost of the circuit, it is an object of the present invention to provide a driving circuit for 1344746 and a power converter including the same, which provide a force to prevent backflow and improve circuit synchronism. Thus, the power converter of the present invention is adapted to receive an input power source and a driving signal having two steady-state levels and electrically connect an external load, the power converter comprising a main switch, a main transformer, and a switching circuit And a drive circuit. The main switch is controlled by the drive signal to change the conduction state. The main transformer has a first coil on the primary side and a second coil on the secondary side
線圈,該第一線圈與該主開關電連接且透過該主開關切換 地接收該輸入電源。 該切換電路電連接於該主變壓器的第二線圈和該外接 負載之間’且包括一開關,該開關可切換地改變導通狀態 以改變該外接負載的電源接收狀態,且該第二線圈和該切 換電路形成的迴路上輸出一同步信號。 該驅動電路包括:一死極時間控制器,具有一第二開 關和一第四開關,該第四開關受該同步信號控制,以控制a coil, the first coil being electrically connected to the main switch and receiving the input power via the main switch. The switching circuit is electrically connected between the second coil of the main transformer and the external load and includes a switch that switchably changes an on state to change a power receiving state of the external load, and the second coil and the A synchronization signal is output on the loop formed by the switching circuit. The driving circuit comprises: a dead time controller having a second switch and a fourth switch, the fourth switch being controlled by the synchronization signal to control
該第二開關的導通狀態;及一反相產生器,具有一第一開 關和一第五開關,該第一開關受該驅動信號控制,且該第 五開關受該第一開關和該第二開關的控制,以輸出一與該 驅動信號呈反相的切換信號來控制該切換電路之開關的導 通狀態。 當該驅動信號由高電位轉為低電位,且該同步信號降 壓到無法使該第二開關導通的低 ’使得該切換信號轉態至高電位 電位時,該第五開關導通 ’且該同步信號的下降緣 月b與該切換彳g號間保持一死極時間的間距 8 1344746 當該驅動信號由低電位轉為高電位,且該同步信號提 升到使該第二開關導通的高電位時,該第五開關戴止,使 得該切換信號轉態至低電位,且該同步信號的上升緣能與 該切換信號間保持一死極時間的間距β 本發明驅動電路’適用於控制一開關且接收—同步信 號與一驅動信號,包括:一死極時間控制器,具有—第二 開關和一第四開關,該第四開關受該同步信號控制,以控 制該第一開關的導通狀態;及一反相產生器,具有—第— 開關和-第五開關,該第一開關受該驅動信號控制,且該 第五開關受該第1關和該第二開關的控制,以輸出一與 該驅動信號呈反相的切換信號來控制該開關的導通狀態 當該驅動信冑由高電位轉為低電&,且該同步信號降 壓到無法使該第二開關導通的低電位時,該第五開關導通 ^吏得該切換信號轉態至高電位,且該同步信號的下降緣 能與該切換信號間保持一死極時間的間距。 :該驅動信號由低電位轉為高電位,且該同步信號提 Γ 第二開關導通的高電位時,該第五開關截止,使 侍該切換信號轉態至低 —丄i 且通问步k諕的上升緣能與 该切換信號間保持一死極時間的間距。 本發明驅動電路及包含此 4Α 匕3此驅動包路的電源轉換器能主 動修正該切換信號,使 極睥F…k 更川步仏唬和該切換信號保持一死 極時間的間距,以確保不發生 號使電路同步,並以节"’且配合該同步信 發明之功效。 ㈣電路㈣驅動能力’使達到本 9An on state of the second switch; and an inverting generator having a first switch and a fifth switch, the first switch being controlled by the driving signal, and the fifth switch being subjected to the first switch and the second The control of the switch controls a conduction state of the switch of the switching circuit by outputting a switching signal that is inverted with the driving signal. When the driving signal is turned from a high potential to a low potential, and the synchronization signal is stepped down to a low level that cannot turn on the second switch, the switching signal is turned to a high potential, the fifth switch is turned on and the synchronization signal is The distance between the falling edge b and the switching time 8g is maintained at a dead time 8 1344746 when the driving signal is turned from a low potential to a high potential, and the synchronization signal is raised to a high potential for turning the second switch on, The fifth switch is worn, so that the switching signal is turned to a low potential, and the rising edge of the synchronization signal can maintain a dead time interval β between the switching signals. The driving circuit of the present invention is adapted to control a switch and receive-synchronize The signal and a driving signal include: a dead-time controller having a second switch and a fourth switch, the fourth switch being controlled by the synchronization signal to control an on state of the first switch; and an inversion generation And having a first switch and a fifth switch, the first switch being controlled by the drive signal, and the fifth switch being controlled by the first switch and the second switch to output a switching signal that is inverted with the driving signal to control an on state of the switch. When the driving signal is turned from a high potential to a low power & and the synchronous signal is stepped down to a low potential that cannot be turned on by the second switch When the fifth switch is turned on, the switching signal is turned to a high potential, and the falling edge of the synchronization signal can maintain a dead time interval from the switching signal. When the driving signal is turned from a low level to a high level, and the synchronization signal is raised to a high level at which the second switch is turned on, the fifth switch is turned off, so that the switching signal is turned to a low-丄i and the path k is The rising edge of the chirp can maintain a dead time interval between the switching signals. The driving circuit of the invention and the power converter including the driving package of the driving circuit can actively correct the switching signal, so that the poles F...k and the switching signal maintain a dead time interval to ensure no The occurrence number synchronizes the circuit and uses the section "' and cooperates with the effect of the invention. (four) circuit (four) drive capability 'to achieve this 9
【實施方式】 有關本發明之 以下配合參考圖式 清楚的呈現。 前述及其他技術内容、特點與功效,在 之八個較佳實施例的詳細說明中,將可 :本發明被詳細描述之前,要注意的是,在以下的說 谷中’類似的兀件是以相同的編號來表示。 蓋二1較佳管放你丨 肩3’本發明電源轉換器之第-較佳實施例適用於 接收一輸人電源61 具有二個穩態位準的第―驅動信號d^vel ’並電連接一外接負载62,且在本較佳實施例中,該 信號為脈波寬度調變(pulse width mQdulatiQn,簡稱胃聯 號,但不以此為^本發明電源轉換器之第—較佳實施例 包含一輸入電路1、-主變壓器21、一驅動電路3、一第一 切換電路41及一第一輸出電路51。且該驅動電路3接收該 第-驅動信號ddvel和-同步信號啊,並送出—切換信 號。本實施例中’該切換信號是—第三驅動信號㈤仏 該輸入電路1接收且輸出該輸入電源61,並根據該第 一驅動信號drivel輸出一主控電壓。該輸入電路丨包括一 主開關11及一磁重置單元12,而該主開關u包括一第一 端、一第二端及一控制端。該主開關n的第二端接地,且 該主開關11的控制端能接收該第一驅動信號drivei,以決 定該主開關11之第一端的電壓,即主控電壓。當第—驅動 信號drivel為低電位狀態,主控電壓呈現高電位狀鲅。合 田 第一驅動信號drivel為高電位狀態,主控電壓呈現低電位 10 1344746 狀態。而該磁重置單元12電連接於該輸入電源61與該主 開關11的第一端間。[Embodiment] The following referenced drawings of the present invention are clearly shown. The foregoing and other technical contents, features and effects, in the detailed description of the eight preferred embodiments, will be: before the present invention is described in detail, it is noted that in the following description, a similar element is The same number is used to indicate. The cover 2 is preferably placed on the shoulder 3'. The first preferred embodiment of the power converter of the present invention is adapted to receive an input power signal 61 having two steady-state levels of the first drive signal d^vel 'and An external load 62 is connected, and in the preferred embodiment, the signal is pulse width modulation (pulse width mQdulatiQn, referred to as the stomach number, but not the first embodiment of the power converter of the present invention) The example includes an input circuit 1, a main transformer 21, a driving circuit 3, a first switching circuit 41, and a first output circuit 51. The driving circuit 3 receives the first driving signal ddvel and the - synchronization signal, and Sending-switching signal. In the present embodiment, the switching signal is a third driving signal (5), the input circuit 1 receives and outputs the input power source 61, and outputs a main control voltage according to the first driving signal drivel. The main switch u includes a first end, a second end and a control end. The second end of the main switch n is grounded, and the main switch 11 is The control terminal can receive the first driving signal drivei, Determining the voltage of the first end of the main switch 11, that is, the main control voltage. When the first driving signal drivel is in a low potential state, the main control voltage exhibits a high potential state. The first driving signal of the Hetian is driven to a high potential state, and the main control The voltage assumes a low potential of 10 1344746. The magnetic reset unit 12 is electrically coupled between the input power source 61 and the first end of the main switch 11.
該主變壓器21根據該主控電壓決定操作狀態。該主變 壓器21是一順向(forward)變壓器,包括一位於一次側的第 一線圈211及一位於二次側的第二線圈212。該第一線圈 211的第一端接收該輸入電源61,該第一線圈211的第二端 接收該主控電壓。當主控電壓為低電位狀態,該第二線圈 212的第一端能感應到一對應該輸入電源61的耦合信號。 §主控電壓為向電位狀態,則無法感應。The main transformer 21 determines an operating state based on the main control voltage. The main transformer 21 is a forward transformer including a first coil 211 on the primary side and a second coil 212 on the secondary side. The first end of the first coil 211 receives the input power source 61, and the second end of the first coil 211 receives the main control voltage. When the main control voltage is in a low potential state, the first end of the second coil 212 can sense a pair of coupling signals that should be input to the power source 61. § If the main control voltage is in the potential state, it cannot be sensed.
該第一切換電路41決定是否傳遞能量到該外接負載62 ,包括一檢波器411及一反相開關412。該檢波器411具有 一陽極及一陰極,該反相開關412具有一第一端、一第二 為及一控制端。該檢波器411的陽極電連接該第二線圈212 的第一端,該檢波器411的陰極電連接反相開關412的第一 端,並由此電連接處輸出該同步信號sync。且該反相開關 412的第二端接地。也就是說,該同步信號吁叫相當於該 反相開關4U @第一端與第二端間的跨壓。而該反相開關 412的控制端接收來自該驅動電路3的第三驅動信號办卜63 。本較佳實施例中,該檢波器411是一個二極體,且不以此 為限。 該第一輸出電路51包括一輸出電感511、一輸出電阻 5Π及-輸出電容512。該輸出電感511與該輸出電阻513 串聯於該反相開關412的第一端與第二端間, 容川、該輸出電阻513與-外接負載62彼此並/輸出電 11 、參閱圖4,該驅動電路3接收該第一驅動信號drivel, 並據以送出與该同步信號sync保持一死極時間(dead )的第一驅動^號drive3(如®1 5)。該驅動電路3包括一 隔離器31、一位準調整器32、一反相產生n 33、一死極時. 間控制器34及—加速單元35。 〜隔離器3 1使该第一驅動信號drive 1隔離雜訊後輸出 γ第一驅動信冑drive2。該位準調整器^能對該第三㈣ 信號dnve2進行直流偏壓隔離與電壓準位控制的處理,以 輸出一準位後信號adj—ve該反相產生器33接收該準位後 信號adj_v,以輸出一與該準位後信號呈反相的反相 信號irw。且該加速單元35依據該反相信號inv輸出該第三 驅動信號drive3 ’並加快該第—切換電路41的放電速度。 =死極時間控制器34能確保該同步信號_和該第三驅動 仏號drive3間存在一死極時間,達到零電壓切換 Voltage Switch ’簡稱ZVS)和零電流切換(Zer〇 Cu刪丈The first switching circuit 41 determines whether to transfer energy to the external load 62, including a detector 411 and an inverting switch 412. The detector 411 has an anode and a cathode. The inverter switch 412 has a first end, a second end and a control end. The anode of the detector 411 is electrically coupled to the first end of the second coil 212, the cathode of the detector 411 is electrically coupled to the first end of the inverting switch 412, and thereby the synchronization signal sync is output at the electrical connection. And the second end of the inverting switch 412 is grounded. That is to say, the synchronization signal is called to correspond to the cross voltage between the first end and the second end of the inverting switch 4U @. The control terminal of the inverting switch 412 receives the third driving signal from the driving circuit 3. In the preferred embodiment, the detector 411 is a diode and is not limited thereto. The first output circuit 51 includes an output inductor 511, an output resistor 5Π, and an output capacitor 512. The output inductor 511 and the output resistor 513 are connected in series between the first end and the second end of the inverting switch 412, and the output resistor 513 and the external load 62 are mutually connected/output 11 , see FIG. 4 , The driving circuit 3 receives the first driving signal drive1, and accordingly sends a first driving number drive3 (such as ®1 5) that maintains a dead time (dead) with the synchronization signal sync. The driving circuit 3 includes an isolator 31, a one-bit regulator 32, an inversion generating n 33, a dead-time controller 34, and an accelerating unit 35. The isolator 3 1 causes the first drive signal drive 1 to isolate the noise and output the γ first drive signal drive2. The level adjuster ^ can perform DC bias isolation and voltage level control processing on the third (four) signal dnve2 to output a level after signal adj_ve, the inverting generator 33 receives the level after signal adj_v To output an inverted signal irw that is inverted from the level-after signal. The acceleration unit 35 outputs the third drive signal drive3' according to the inverted signal inv and speeds up the discharge speed of the first switching circuit 41. The dead time controller 34 can ensure that there is a dead time between the synchronization signal _ and the third drive nickname drive3, reaching zero voltage switching. Voltage Switch ‘ZVS for short and zero current switching (Zer〇 Cu
Switch,簡稱 ZCS)。 該隔離器31用以避免雜訊,且具有一第一隔離線圈 311及第一隔離線圈312。該第一隔離線圈311的第一端 接收該第驅動h號drive 1,而該第二隔離線圈312的第一 端輸出該第二驅動信號drive2。且該第一和第二隔離線圈 311、312的第二端分別接地。本較佳實施例中,該隔離器 31為一變壓器,但也可以是一光耦合器,且不以此為限。 該位準調整器32能對該第二驅動信號drive2進行直流 偏壓隔離與電壓準位控制的處理。該位準調整器32具有一 12 1344746 第一電容ci、— 第一電谷C2、一第一電阻R1、一第二電 阻R2及一第一 -b* —極體D1。該第一電容Cl接收該第二驅動 信號drive2,且諱笙 ^ ^ ^第一電谷C1、該第一電阻Ri與該第二電 阻R2依序串聯於筮_ 於第—隔離線圈312的第一端和第二端間。 該第二電容C2蛊哕Μ』 〜第—電阻R2並聯’而該第一二極體D1Switch, referred to as ZCS). The isolator 31 is used to avoid noise and has a first isolation coil 311 and a first isolation coil 312. The first end of the first isolation coil 311 receives the first drive h drive 1, and the first end of the second isolation coil 312 outputs the second drive signal drive2. And the second ends of the first and second isolation coils 311, 312 are respectively grounded. In the preferred embodiment, the isolator 31 is a transformer, but may be an optical coupler, and is not limited thereto. The level adjuster 32 can perform DC bias isolation and voltage level control processing on the second drive signal drive2. The level adjuster 32 has a first capacitor ci, a first valley C2, a first resistor R1, a second resistor R2, and a first -b*-pole D1. The first capacitor C1 receives the second driving signal drive2, and the first resistor valley C1, the first resistor Ri and the second resistor R2 are sequentially connected in series to the first isolation coil 312. Between one end and the second end. The second capacitor C2 蛊哕Μ ~ the first resistor R2 is connected in parallel and the first diode D1
的陽極接地,該第__is: a*… L 弟一極體D1的陰極電連接於該第一電阻 R Ά第一電阻R2 Μ ’並由此輸出該準位後信號adj_v。 〆反相產生器33接收—直流電源DC與該準位後信號The anode is grounded, and the cathode of the first __is: a*... L body D1 is electrically connected to the first resistor R Ά the first resistor R2 Μ ' and thereby outputs the level post signal adj_v. 〆Inverting generator 33 receives - DC power supply DC and the post-level signal
询-V,以輸出與該準位後信號adj一v呈反相的反相信號inv 。該反相產生器33且右_ 八有第一開關Q1、一第五開關Q5、 一第三電阻R3、_# 第四電阻R4、一第二二極體D2及一第 -極體D3 H開關Q1的控制端接收該準位後信號 j-而第開關Q1的第二端接地。該第一開關Q1的第 -端電連接該第三二極體D3的陰極和該第五開關Q5的控Query -V to output an inverted signal inv which is inverted from the level signal adj-v. The inverting generator 33 and the right_eight have a first switch Q1, a fifth switch Q5, a third resistor R3, a fourth resistor R4, a second diode D2, and a first pole D3H. The control terminal of the switch Q1 receives the level signal j- and the second terminal of the switch Q1 is grounded. The first end of the first switch Q1 is electrically connected to the cathode of the third diode D3 and the control of the fifth switch Q5
制端。且該第三電阻R3與該第四電阻R4依序串聯於該第 五開關Q5的控制端與第一端間。而該第二二極體d2的陰 極電連接於該第二電阻R3和第四電阻R4間,該第二二極 體的陽極接收該直流電源DC,並由該第三二極體之 陽極與該$五_ Q5之第二端的電連接處輸出該反相信號 而在本較佳實施例中,該直流電源DC即為傳送到該 外接負載62的電壓,但也可是一外界電源。 〇死極時間控制器34能依據同步信號sync使第三驅動 信號ddVe3的上升緣(rising edge)和下降緣(faUing edge)皆 和同步信號Syne保持—死極時間,不使此二信號同時處於 13 兩電位狀態而發♦祕4 Λ 第二開關Q2、-第二:。該死極時間控制器34具有- ㈣一第七電=7 Γ:第五電"5、一第六電 第八電阻R8、一第四二極體D4 及一第五二極體D5。 該第五電阻R5、該第丄 該第七電阻幻依序㈣It 極體D4和 n忒苐一開關Q2的第一端電連接 項第一開關Q1的筮——_ ^ 該第五電阻㈣今第丄雷^開關以的控制端電連接 二端接地。、電 間,且該第二開關Q2的第 b 〃⑸開關Q4的控制端電連接該第四二極體 D4 :極’該第四開關Q4的第一端電連接該第四二極體 4且該第四開關Q4的第二端電連接於該第五電 5和該第七電阻R7間並接地。該第八電阻以電連接於 =四開關Q4的控制端與該第五二極體D5的陰極間。且 以五二極體D5的陽極接收來自該第一切換電路41的同 步信號sync。 °亥加速早兀35能加快該第一切換電路41的放電速度 。具有-第三開關Q3、一第九電阻R9及一第六二極體⑽ 該第九電阻R9電連接於該第三開關Q3的一控制端與一 ,:端間’該第六二極體D6的陰極電連接該第三開關Q3 的第一端。且由該第六二極體D6㈣極與該第三開關 Q3的控制端之電連接處接收該反相信號而該第三開 關Q3的第一端輸出該第三驅動信號drive3,該第三開關 Q3的第二端接地。 田第二驅動信號drive3切到低電位時,第三開關Q3導 14 1344746 =,此時反相開關412的-寄生電容能經由第三開放 电,以加快反相開關412進入截止狀熊。 以下針對該第一驅動信號drivel的四種電位轉換狀雜 ’來說明驅動電路3的作動情形。也就是,高電位、由: 電位轉為低電位、低電位以及由低電位轉為高電位。问System end. The third resistor R3 and the fourth resistor R4 are sequentially connected in series between the control end of the fifth switch Q5 and the first end. The cathode of the second diode d2 is electrically connected between the second resistor R3 and the fourth resistor R4. The anode of the second diode receives the DC power source DC and is connected to the anode of the third diode. In the preferred embodiment, the DC power source DC is the voltage transmitted to the external load 62, but may also be an external power source. The dead-end time controller 34 can maintain the rising edge and the falling edge (faUing edge) of the third driving signal ddVe3 with the synchronization signal Syne according to the synchronization signal sync, and the dead-time is not allowed to be simultaneously 13 two potential state and ♦ secret 4 Λ second switch Q2, - second:. The dead time controller 34 has - (four) - seventh electric = 7 Γ: fifth electric " 5, a sixth electric eighth resistor R8, a fourth diode D4 and a fifth diode D5. The fifth resistor R5, the third resistor, the seventh resistor, and the first terminal of the switch Q2 are electrically connected to the first switch Q1. The fifth resistor (four) The control terminal of the Dijon Thunder switch is electrically connected to the two ends. And the second terminal of the second switch Q2 is electrically connected to the fourth diode D4: the first end of the fourth switch Q4 is electrically connected to the fourth diode 4 The second end of the fourth switch Q4 is electrically connected between the fifth power 5 and the seventh resistor R7 and grounded. The eighth resistor is electrically connected between the control terminal of the =four switch Q4 and the cathode of the fifth diode D5. And the synchronization signal sync from the first switching circuit 41 is received by the anode of the fifth diode D5. The temperature acceleration of the first switching circuit 41 can be accelerated by the acceleration of the temperature. Having a third switch Q3, a ninth resistor R9, and a sixth diode (10), the ninth resistor R9 is electrically connected to a control terminal of the third switch Q3, and the second terminal body The cathode of D6 is electrically connected to the first end of the third switch Q3. Receiving the inverted signal from an electrical connection between the sixth diode D6 (four) pole and the control terminal of the third switch Q3, and the first terminal of the third switch Q3 outputs the third driving signal drive3, the third switch The second end of Q3 is grounded. When the second driving signal drive3 is cut to a low potential, the third switch Q3 leads 14 1344746 =, at which time the parasitic capacitance of the inverting switch 412 can be turned on via the third open power to speed up the inverting switch 412 into the cut-off bear. The operation of the drive circuit 3 will be described below with respect to the four potential conversion patterns of the first drive signal drive1. That is, the high potential is changed from: the potential to the low potential, the low potential, and the low potential to the high potential. ask
=4和圖5’當該第一驅動信號_處於高電位 時’該同步信號s声的高電位能使該第二開關Q2導通, 而準位後信號adj—v的高電位使第_開關qi導通,此時, 第四開關Q4戴止’而該第三二極體〇3和該第三開關Q3 導通,且第五開關Q5截止,使得第三驅動信號㈣ 低電位。=4 and FIG. 5 'When the first driving signal _ is at a high potential', the high potential of the synchronization signal s can turn on the second switch Q2, and the high potential of the signal adj_v after the level makes the _th switch When the qi is turned on, at this time, the fourth switch Q4 is turned on and the third diode 〇3 and the third switch Q3 are turned on, and the fifth switch Q5 is turned off, so that the third driving signal (4) is low.
驅動㈣drivel由高電位轉為低電位’且同 步信號咖降壓到(即下降緣)無法使該第二開_如導通的 低電位,而準位後信號adj_v也下降到無法使第—開關qi 導通的低電位時,第四開關Q4導通,該第五開關Q5和該 第六二極體D6導通’第三開關Q3截止,使得第三驅動传 號d-3轉態至高電位。因此,同步錢_的下降緣能 與第二驅動信E dHve3 m呆持一死極時間的間距,也就是 可達到零電壓切換。 當該第一驅動信號drivel處於低電位時,該同步信號 sync的低電位無法使該第二開關q2導通,而準位後信號 adj_v的低電位無法使第一_ φ導通,此時,第四開: Q4導通,該第五開關Q5和該第六二極體〇6導通,第三開 關Q3截止,使得第三驅動信號心丨^3位於高電位。 15 1344746 當該第-驅動信號drivel由低電位轉為高電位,且同 步信號sync升壓到(即上升緣)足以使該第二開_奴導通的 兩電位’而準位後信號坤_¥提升到能使第一開_屮導通 的高電位時’第四開關q4截止’而該第三二極體和該 第三開關Q3導通,且第五開關Q5載止,使得第三驅動^ 號dHVe3轉態至低電位。因此,該第一驅動信號和⑽開 始轉態(上升緣)-小段時間後,該同步信號_才進行^ 態(上升緣),所以該同步信號sync的上升緣能與第三驅動 信號ddve3間保持—死極時間的間距,也就是可達到 流切換。 由以上四種電位轉換狀態的分析,可得知唯有當該同 步信號SynC處於低電位時,第三驅動信號drive3才會處於 高電位。也就是,二信號不會同時處於高電位狀態,能確 實達到零電壓切換和零電流切換。 參閱圖3和® 5,在此,以下列四個時間區間來說明本 較佳實施例的作動情形。 在時間t〇到時間u中,該第一驅動信號drivel為高電 位狀態’該主開關U導通,該驅動電路3產生低電位的第 二驅動信號drive3。該反相開關412受該第三驅動信號 dnve3控制而截止。此時,該轉換電流由該第二線圈sc的 第一端流向該輸出電感511,並對該輸出電感511儲能以 傳遞能量到該外接負載62。 在時間tl到時間q中,該第一驅動信號drivei從高電 位狀L轉為低電位狀態,同步信號也轉至低電位,並 16 1344746 與將轉為高電位的第三驅動信號drive3保持一死極時間(零 電壓切換)。此時,該主開關11截止,該第-線圈211開始 對該磁重置單元12釋放能量。而該反相開關412截止,且 該轉換電流繼續對該輸出電感511儲能,以傳遞能量到該外 接負載62。Drive (four) drivel from high potential to low potential 'and the synchronous signal is stepped down to the (ie, falling edge) can not make the second open _ such as the low level of conduction, and the level signal adj_v also drops to the first switch qi When the low level is turned on, the fourth switch Q4 is turned on, and the fifth switch Q5 and the sixth diode D6 are turned on, and the third switch Q3 is turned off, so that the third driving signal d-3 is turned to a high potential. Therefore, the falling edge of the sync money_ can be held at a distance from the second drive letter E dHve3 m for a dead time, that is, zero voltage switching can be achieved. When the first driving signal drive1 is at a low potential, the low potential of the synchronization signal sync cannot turn on the second switch q2, and the low potential of the signal adj_v after the level cannot make the first _ φ turn on, at this time, the fourth On: Q4 is turned on, the fifth switch Q5 and the sixth diode 〇6 are turned on, and the third switch Q3 is turned off, so that the third driving signal 丨3 is at a high potential. 15 1344746 When the first-drive signal drivel is turned from a low potential to a high potential, and the synchronization signal sync is boosted to (ie, the rising edge) is sufficient to make the second open_none turn on the two potentials' and the level is after the signal 坤_¥ When the high potential of the first turn-on is turned on, the 'fourth switch q4 is turned off' and the third diode and the third switch Q3 are turned on, and the fifth switch Q5 is stopped, so that the third drive is dHVe3 transitions to a low potential. Therefore, the first driving signal and (10) start the transition state (rising edge) - after a short period of time, the synchronization signal _ is in a state (rising edge), so the rising edge of the synchronization signal sync and the third driving signal ddve3 Keep - the distance between dead time, that is, the flow switching can be achieved. From the analysis of the above four potential conversion states, it can be known that the third drive signal drive3 is at a high potential only when the synchronization signal SynC is at a low potential. That is, the two signals are not in a high potential state at the same time, and it is possible to achieve zero voltage switching and zero current switching. Referring to Figures 3 and 5, the operation of the preferred embodiment will now be described in the following four time intervals. In the time t 〇 to the time u, the first drive signal drive1 is in the high potential state 'the main switch U is turned on, and the drive circuit 3 generates the second drive signal drive3 which is low. The inverting switch 412 is turned off by the third driving signal dnve3. At this time, the switching current flows from the first end of the second coil sc to the output inductor 511, and the output inductor 511 is stored to transfer energy to the external load 62. In time t1 to time q, the first drive signal drivei is switched from the high potential L to the low state, the synchronization signal is also turned to the low level, and 16 1344746 is kept dead with the third drive signal drive3 which will turn to the high potential. Extreme time (zero voltage switching). At this time, the main switch 11 is turned off, and the first coil 211 starts to release energy to the magnetic reset unit 12. The inverting switch 412 is turned off, and the switching current continues to store energy to the output inductor 511 to transfer energy to the external load 62.
在時間t2到時間t3中,該第一驅動信號心泠“為低電 位H該主開關11截止’該驅動電路3產生高電位的第 驅H drive3。該反相開關412受該第三驅動信號 ―3控制而導通。此時,該第-線圈211對該磁重置單元 12釋放能量,而該輸出電感511對該反相開關412釋放能 量。In the time t2 to the time t3, the first driving signal is "lower potential H, the main switch 11 is turned off", the driving circuit 3 generates a high potential first drive H drive 3. The reverse driving switch 412 is subjected to the third driving signal The -3 control is turned on. At this time, the first coil 211 releases energy to the magnetic reset unit 12, and the output inductor 511 releases energy to the inverter switch 412.
在時間。到時間t4中,該第一驅動信號_開始轉 態(上升緣)一小段時間後,該同步信號sync也進行轉態(上 升緣)’並與將轉為低電位的第三驅動錢ddVe3保持-死 極時間(零電流切換)。此時,該主開關U進人導通狀態, 該第二驅動信號drive3㈣地切換為低電位,該反相開關 =因而迅速截止’使得該轉換電流再次對該輸出電感川 儲月b,並傳遞能量到該外接負載62。 第二較佳實施例 參閱圖6,本發明電源轉換 + 态之第一較佳實施例包含一 輸入電路1 一主變壓器22—驅動電路3、 路41及一第一輸出電路5 第 刀換電 ,,. 。〜驅動電路3接收該第一驅 動仏唬dnvel和一同步信號叮如, 實施例中,該切換信號是一第 :出-切換信號。本 疋弟一 動U—心而該驅動 17 電路3與該第一較佳實施例相似在此不予贅述。 。亥輸入電路1比第一較佳實施例省略該磁重置開關12 ,其餘元件和作動情形均相似,故不予贅述。 該主樂愿哭 Ο Λ &全盗22根據該主控電壓決定操作狀態。該主變 壓态22疋一馳返變壓器,包括一第一線圈221及一第二線 n該第—線_ 221的第—端接收該輸人電源61,該 ’·良圈221的第二端接收該主控電壓。當主控電壓為低At the time. After the first driving signal_starts the transition state (rising edge) for a short period of time, the synchronization signal sync also undergoes a transition state (rising edge) and remains with the third driving money ddVe3 that will turn to a low potential. - Dead time (zero current switching). At this time, the main switch U enters a conducting state, and the second driving signal drive3 (4) is switched to a low potential, and the inverting switch = thus rapidly cuts off, so that the switching current again stores the monthly b for the output inductor and transmits energy. To the external load 62. Second Preferred Embodiment Referring to FIG. 6, a first preferred embodiment of the power conversion + state of the present invention comprises an input circuit 1 a main transformer 22 - a driving circuit 3, a path 41 and a first output circuit 5 ,,. The drive circuit 3 receives the first drive 仏唬dnvel and a synchronization signal. For example, in the embodiment, the switching signal is a first-out-switching signal. The driving circuit 17 is similar to the first preferred embodiment, and will not be described herein. . The black input circuit 1 omits the magnetic reset switch 12 from the first preferred embodiment, and the remaining components and actuation conditions are similar, and thus will not be described again. The Lord is willing to cry Ο amp & thieves 22 according to the main control voltage to determine the operating state. The main transformer state 22 is returned to the transformer, and includes a first coil 221 and a second line n. The first end of the first line _221 receives the input power source 61, and the second of the 'good circle 221 The terminal receives the main control voltage. When the main control voltage is low
電位狀&肖第―線圈222的第二端能感應到-對應該輸 入電源61的叙合位# 、 σ彳5號。當主控電壓為高電位狀態,則無法 感應。 該第#換電路41決定是否傳遞能量到該外接負載62 。該第-:換電路41包括一同相開關413,且該同相開關 、有第端、一第二端及一控制端。該同相開關413 的第二端接地’該同相„ 413㈣—端電連接該第二線The second end of the potential & xiao-coil 222 can sense - the corresponding combination ##, σ彳5 of the input power source 61. When the main control voltage is high, it cannot be sensed. The ## change circuit 41 determines whether or not to transfer energy to the external load 62. The first-:-switch circuit 41 includes an in-phase switch 413, and the in-phase switch has a first end, a second end, and a control end. The second end of the non-inverting switch 413 is grounded to the same phase 413 (four) - the end is electrically connected to the second line
圈二2的第一端’並由此處送出一相等於該耦合信號的同 步信號啊。也就是說’該同步信&咖相當於該同相開 關413的第端與第二端間的跨壓。而該同相開關化的 控制端接收來自該驅動電路3的坌__ 十 初电峪的弟二驅動信號ddve3。 該第-輸出電路51包括一輸出電阻513及一輸出電容 512。該輸出電阻513電連接於該第二線圈222的第-端與 該同相開關413的第二端間,且該輸出電容川、該輸出電 阻513與一外接負載62彼此並聯。 參閱圖5和圖6,在此,丁, 下列四個時間區間來說明本 較佳實施例的作動情形。 18 1344746 在時門t〇到時間U中’該第一驅動信號drivel為高電 位狀態’該驅動電路3產生低電位的第三驅動信號ddVe3。 該主開關11導强兮P*! 等通該同相開關413受該第三驅動信號 dnve3控制而截止。此時’該第二線圈瓜進行儲能。 在時間到時間t2中,該第一驅動信號妃〜從高電 位狀4轉為低電位狀態,同步信號s,也轉至低電位,並 與將轉為间電位的第三驅動信號心^3保持一死極時間(零The first end of circle 2 is 'and a sync signal equal to the coupled signal is sent therefrom. That is to say, the sync signal & coffee corresponds to the crossover between the first end and the second end of the in-phase switch 413. The non-inverting switching control terminal receives the second driving signal ddve3 from the first circuit of the driving circuit 3. The first output circuit 51 includes an output resistor 513 and an output capacitor 512. The output resistor 513 is electrically connected between the first end of the second coil 222 and the second end of the in-phase switch 413, and the output capacitor, the output resistor 513 and an external load 62 are connected in parallel with each other. Referring to Figures 5 and 6, here, the following four time intervals are used to illustrate the operation of the preferred embodiment. 18 1344746 The drive circuit 3 generates a low potential third drive signal ddVe3 when the time gate t 〇 to the time U 'the first drive signal drivel is in a high potential state'. The main switch 11 is turned on, and the in-phase switch 413 is turned off by the third drive signal dnve3. At this time, the second coil melon is stored. In time t2, the first drive signal 妃~ is switched from the high potential state 4 to the low potential state, and the synchronization signal s is also turned to the low potential, and the third drive signal core 3 that will be converted to the metapotential Keep a dead time (zero
電壓切換)°此時’該主開關u截止,該同相開關化截止 ,且該第二線圈222繼續進行儲能。 在時間t2到時間t3巾’該第一驅動信號drivel為低電 位狀_ ’該主開關U截止’該驅動電路3產生高電位的第 三驅動信㉟driVe3。該同相開Μ 413受該第三驅動信號 —控制而導通。此時,該第二線圈222的能量傳遞到該 外接負載62。Voltage switching) ° At this time, the main switch u is turned off, the in-phase switching is turned off, and the second coil 222 continues to store energy. At time t2 to time t3, the first drive signal drive1 is in a low potential state _ 'the main switch U is turned off'. The drive circuit 3 generates a third drive signal 35driVe3 of a high potential. The in-phase opening 413 is turned on by the third driving signal. At this time, the energy of the second coil 222 is transferred to the external load 62.
在時間t3到時間t4中,該第一驅動信號drivel開始轉 態(上升緣)一小段時間後,該同步信號sync才進行轉態(上 升緣)’並與受第一開關Q1導通影響而將轉為低電位的第 三驅動信號drive3保持一死極時間(零電流切換)。此時,該 主開關U進入導通狀態’該第三驅動信號_很快地切 換為低電位,該同相開關413因而迅速截止,且該第二線 圈222再次進行儲能。 篇三較佳實施例 參閱圖7,本發明電源轉換器之第三較佳實施例包含一 輸入電路i、一主變壓器21、一驅動電路3、—第一切換電 19 1344746 路41及一第一輸出電路51。且該驅動電路3接收該第一驅 動信號drivel和一同步信號sync,送出一切換信號。本實 施例中’該切換仏號具有一第二驅動信號drive2和—第三 驅動信號drive3。除了該第一切換電路41外,其餘元件與 該第一較佳實施例相似,在此不予贅述。 該第一切換電路41決定是否傳遞能量到該外接負載62 。該第一切換電路41包括一同相開關413及一反相開關 412 ’且該同相開關413與該反相開關412分別具有一第一 端、一第二端及一控制端。該同相開關413的第一端電連 接該第二線圈212的第二端,且該同相開關413的第二端 與該反相開關412的第二端分別接地,而該反相開關412 的第一端電連接該第二線圈212的第一端,並由此電連接 處輸出一相等於該耦合信號的同步信號sync。也就是說, 該同步信號sync相當於該反相開關412的第一端與第二端 間的跨壓。而該同相開關413的控制端接收該第二驅動信 號drive2’該反相開關412的控制端接收該第三驅動信號 drive3。 參閱圖5和圖7 ’在此’以下列四個時間區間來說明本 較佳實施例的作動情形。 在h間tO到時間tl中’該第一驅動信號drivel為高電 位狀態’該主開關11導通,該驅動電路3產生高電位的第 二驅動信號drive2與低電位的第三驅動信號drive3。此時 ’該同相開關413導通而該反相開關412戴止,該轉換電 流由該第二線圈212的第一端流向該輸出電感511,並對該 20 1344746 輸出電感511儲能,以傳遞能量到該輸出電容512與該外接 負載62。 在時間ti到時間t2中,該第一驅動信號dHvel從高電 位狀態轉為低電位狀態,同步信號sync和第二驅動信號 drive2也轉至低電位,並與將轉為高電位的第三驅動信號 drive3保持一死極時間(零電壓切換此時,該主開關“ 截止,該第一線圈211開始對該磁重置單元12釋放能量, 該同相開關413與該反相開關412截止,由該輸出電容512 提供能量給該外接負載62。 在時間t2到時間t3中,該第一驅動信號為低電 位狀態,該主變壓器21無法感應,該驅動電路3產生低電 位的第二驅動信號drive2與高電位的第三驅動信號ddve3 。該同相開關413受該第二驅動信號drive2控制而截止, 該反相開關412受該第三驅動信號drive3控制而導通。此 時,該主開關11截止,該第一線圈211對該磁重置單元12 釋放能量,而該輸出電感511對該反相開關412釋放能量。 在時間t3到時間η中,該第一驅動信號ddvel開始轉 態(上升緣)一小段時間後,該同步信號sync也進行轉態(上 升緣),並與將轉為低電位的第三驅動信號drive3保持一死 極時間(零電流切換)。此時,主開關u與同相開關413進 入導通狀態,該反相開關412迅速截止,且該轉換電流再 次對該輸出電感5 11儲能,並傳遞能量到該輸出電容512與 該外接負載62 ° 第四较毯實施例 21 參閱圖8,本發明電源轉換器之 輸入電路i、一主變厭,、 ㈣A例包含— 路41 — 變壓益21' -驅動電路3、一第一切換電 -第二切換電路42、一第一 輪出電路52。 岭Μ及弟一 :二入電路i、該驅動電路3、該第一切換電路41和 電路51與第—較佳實施例相似,且該第二切換In time t3 to time t4, after the first driving signal drivel starts to transition (rising edge) for a short period of time, the synchronization signal sync undergoes a transition state (rising edge) and is affected by the conduction of the first switch Q1. The third drive signal drive3, which is turned to a low level, maintains a dead time (zero current switching). At this time, the main switch U enters an on state. The third drive signal _ is quickly switched to a low potential, the in-phase switch 413 is thus quickly turned off, and the second coil 222 performs energy storage again. Referring to FIG. 7, a third preferred embodiment of the power converter of the present invention comprises an input circuit i, a main transformer 21, a driving circuit 3, a first switching power 19 1344746, a 41 and a first An output circuit 51. And the driving circuit 3 receives the first driving signal drivel and a synchronization signal sync, and sends a switching signal. In the embodiment, the switching symbol has a second driving signal drive2 and a third driving signal drive3. Except for the first switching circuit 41, the remaining components are similar to the first preferred embodiment, and are not described herein. The first switching circuit 41 determines whether or not to transfer energy to the external load 62. The first switching circuit 41 includes an in-phase switch 413 and an inverting switch 412', and the in-phase switch 413 and the inverting switch 412 respectively have a first end, a second end and a control end. The first end of the in-phase switch 413 is electrically connected to the second end of the second coil 212, and the second end of the in-phase switch 413 and the second end of the inverting switch 412 are respectively grounded, and the One end electrically connects the first end of the second coil 212, and thereby outputs a synchronization signal sync equal to the coupling signal at the electrical connection. That is, the sync signal sync corresponds to the voltage across the first end and the second end of the inverting switch 412. The control terminal of the in-phase switch 413 receives the second driving signal drive2'. The control terminal of the inverting switch 412 receives the third driving signal drive3. The operation of the preferred embodiment will be described with reference to Figures 5 and 7 'herein' in the following four time intervals. The main switch 11 is turned on during the period t0 to t1, and the first drive signal drive1 is in the high-level state. The drive circuit 3 generates the second drive signal drive2 of the high potential and the third drive signal drive3 of the low potential. At this time, the in-phase switch 413 is turned on and the inverting switch 412 is turned on. The switching current flows from the first end of the second coil 212 to the output inductor 511, and the 20 1344746 output inductor 511 is stored to transfer energy. The output capacitor 512 is connected to the external load 62. During the time ti to the time t2, the first driving signal dHvel is switched from the high potential state to the low potential state, the synchronization signal sync and the second driving signal drive2 are also turned to the low potential, and the third driving will be turned to the high potential. The signal drive3 maintains a dead time (zero voltage switching at this time, the main switch is "off", the first coil 211 starts to release energy to the magnetic reset unit 12, and the in-phase switch 413 and the inverting switch 412 are turned off by the output. The capacitor 512 supplies energy to the external load 62. During the time t2 to the time t3, the first driving signal is in a low potential state, the main transformer 21 cannot sense, and the driving circuit 3 generates a low potential second driving signal drive2 and high. a third driving signal ddve3 of the potential. The in-phase switch 413 is turned off by the second driving signal drive2, and the inverting switch 412 is turned on by the third driving signal drive3. At this time, the main switch 11 is turned off, the first A coil 211 releases energy to the magnetic reset unit 12, and the output inductor 511 releases energy to the inverting switch 412. In time t3 to time η, the first drive signal ddvel opens After a short period of time (rising edge), the synchronization signal sync also undergoes a transition state (rising edge) and maintains a dead time (zero current switching) with the third driving signal drive3 that will be turned to a low potential. The main switch u and the non-inverting switch 413 enter an on state, the inverting switch 412 is quickly turned off, and the switching current again stores energy to the output inductor 51, and transfers energy to the output capacitor 512 and the external load 62°. Blanket embodiment 21 Referring to FIG. 8, the input circuit i of the power converter of the present invention, a main transformer, (4) A example includes a path 41 - a variable voltage 21' - a driving circuit 3, a first switching power - a second switching The circuit 42 and a first round-out circuit 52. The first switch circuit i, the drive circuit 3, the first switch circuit 41 and the circuit 51 are similar to the first preferred embodiment, and the second switch
該第—於與该第一切換電路41相似,該第二輸出電路52與 ^ 輪出電路51相似,在此不予贅述。 、—该主變壓器21是—順向變壓器,包括-第-線圈211 二弟二線圈212及一第三線圈213。該第二線圈M2的兩 =第#換電路41電連接,該第三線圈⑴的兩端與 。第二切換電路42電連接。 本較佳實施例的作動情形與第一較佳實施例相似,且 發明所屬技術領域中具有通常知識者能推論而得,故在 此不予贅述。 隹實施彻The first output circuit 52 is similar to the first switch circuit 41, and is not described herein. The main transformer 21 is a forward transformer including a first coil 211 a second coil 212 and a third coil 213. The two =## change circuits 41 of the second coil M2 are electrically connected, and both ends of the third coil (1) are connected. The second switching circuit 42 is electrically connected. The operation of the preferred embodiment is similar to that of the first preferred embodiment, and those of ordinary skill in the art can delineate it, and thus will not be described herein.隹 implementation
參閱圖9,本發明電源轉換器之第五較佳實施例包含一 輪入電路1' 一主變壓器21、一驅動電路3、一第一切換電 路 4 ]、_墙 ' 一弟一切換電路42、一第一輸出電路51及一第二 輸出電路52。 示了該主邊壓器21、第二切換電路42與第二輸出電路Referring to FIG. 9, a fifth preferred embodiment of the power converter of the present invention includes a turn-in circuit 1', a main transformer 21, a driving circuit 3, a first switching circuit 4, a wall, a brother-switching circuit 42, A first output circuit 51 and a second output circuit 52. The main voltage regulator 21, the second switching circuit 42 and the second output circuit are shown
52夕K ,其餘元件與前面的實施例相似,在此不予贅述。 該主變壓器21中,該第二線圈212的兩端與該第一切 換電路41電連接,且該第二線圈212的第一端電連接該第 22 二線圈213的第二端。而該第三線圈213 该第二切換電路42之檢波器421的陽極。 農A較佳實放例 參閱圖10,本發明電源轉換器之第六較佳實施例包含 -輸入電路i、一主變壓器21、一驅動電路3、一第一切換 電路41、一第二切換電路42、一第—輸出電路η及—第 二輸出電路52。52 K K, the remaining components are similar to the previous embodiment, and will not be described here. In the main transformer 21, both ends of the second coil 212 are electrically connected to the first switching circuit 41, and the first end of the second coil 212 is electrically connected to the second end of the 22nd coil 213. The third coil 213 is the anode of the detector 421 of the second switching circuit 42. Referring to FIG. 10, a sixth preferred embodiment of the power converter of the present invention includes an input circuit i, a main transformer 21, a driving circuit 3, a first switching circuit 41, and a second switching. The circuit 42, a first output circuit η and a second output circuit 52.
奋除了該主變壓器21的連接方式外,其餘元件與第四較 佳實施例相似,在此不予贅述。 該主變㈣21中,該第二線圈212的兩端與該第一切 換電路電連接。該第三線圈213的第一端電連接該第二 切換電路42之檢波器421的陽極,而該第三線圈213的第 二端電連接該第一切換電路41之檢波器411的陰極。 本較佳實施例的作動情形與第五較佳實施例相似,除Except for the connection mode of the main transformer 21, the remaining components are similar to the fourth preferred embodiment and will not be described herein. In the main transformer (four) 21, both ends of the second coil 212 are electrically connected to the first switching circuit. The first end of the third coil 213 is electrically connected to the anode of the detector 421 of the second switching circuit 42, and the second end of the third coil 213 is electrically connected to the cathode of the detector 411 of the first switching circuit 41. The operation of the preferred embodiment is similar to that of the fifth preferred embodiment except
的第一端電連接 了該第三線圈213是透過第—切換電路41之檢波器4ιι與 第二線圈212堆疊。 JLk較佳會施你丨 參閱圖U,本發明電源轉換器之第七較佳實施例包含 一輸入電路卜一主變壓器22、-驅動電路3、一第一切換 電路41、—第二切換電路42、—第—輸出電路51及-第 二輸出電路52。 該輸入電路1、該驅動電路3、該第一切換電路41禾 該第-輸出祕51與第二較佳實施例相似,且該第二切指 電路42與該第-切換電路41相似,該第二輸出電路^ 23 1344746 該第一輸出電路51相似,在此不予贅述。 、—該主變壓11 22是一驰返變麼器,包括-第-線圈221 第線圈222及一第三線圈223。該第二線圈的兩 ” 5一乂第城屯路41電連接’該第三線圈223的兩端與 ^第:切換电路42電連接。而該第二線圈⑵的第二端與 °亥第二線圈223的第-娃合t·八c丨丨戌由 61— 刀別感應到-對應該輸入電源 本較佳實施例的作動情形與第二較佳實施例相似,且 發明所屬技術領域中具有通常知識者能推論而得 此不予贅述。 實施你丨 —參閱圖12,本發明電源轉換器之第八較佳實施例包含 —輸入電路卜-主變壓器21、-驅動電路3、一第一切換 電路41、-第二切換電路42、—第_輸出電路^及―第 一輸出電路52。 該輪人電路!、該驅動電路3、該第—㈣電路Μ和 =輪出電路51與第二較佳實施例相似,且該第二切換 2 42與該第—切換電路41相似,該第二輸出電路^與 “—輸出電路51相似,在此不予贅述。 —該主變壓器21是一順向變壓器’包括一第一線圈211 端^ΓΓ212及—第三線圈213。該第二線圈2Π的兩 Μ該第-切換電路41電連接,該第三線圈213的兩端與 ^ -切換電路42電連接4該第二線圈212的第一端盘 4三線® 213的第一端能分別感應到一對應該輸入電源 24 61的耦合信號。 本較佳實施例的作動情形與第三較佳實施例相似,且 本發明所屬技術領域中具有通常知識者能推論而得,故在 此不予贅述。 值得注意的是,在以上較佳實施例中,該第一線圈21 i 、221與該第二線圈212、222的線圈閘數比為1 : i,該第 一線圈211、221與該第三線圈213、223的線圈閘數比為i .1,而該第一隔離線圈311與該第二隔離線圈312的線圈 閘數比為1 : 1,且不以此為限。 且值得注意的是,在以上較佳實施例中’該主開關u 、反相開關412、422與同相開關413、423是N型電晶體 ,且不以此為限。且該驅動電路3的該第一開關Q1與該第 二開關Q2是N型電晶體,該第三開關Q3與該第四開關 Q4是PNP雙載子接面電晶體(bip〇lar juncU〇n的—_,簡 稱BJT),該第五開關q5是NpN B JT,且不以此為限。 且值得注意的是,以上實施例中的驅動電路3可獨立 出於本發明電源轉換器。 综上所述,該驅動電路3能主動修正該同步信號叮此 和該第三驅動信號drive3的相對關係,以確保不發生逆流 現象,並配合該同步信號sync使電路同步。而該驅動電路 3的加速單元35有助於該第三驅動信號所驅動的開 關之放電速度,可有效提升驅動能力。此外,+需如同習 知採用驅動晶片’本發明即能達到上述要求,大幅降低電 路成本,故確實能達成本發明之目的。 25 1344746 准以上所述者,僅為本發明之私/i — ^ 私月之較佳貫施例而已,當不 月匕以此限定本發明實施之範圊 〜 乾圍即大凡依本發明申請專利 乾圍及發明說明内容所作之節 吓卜<間早的等效變化與修飾,皆仍 屬本發明專利涵蓋之範圍内。 【圖式簡單說明】 圖1是一習知自我驅動之间牛 圖; 同V整bIL電源轉換器的電路 圖2是一習知以電流變懕哭妖 w 雙厘益控制之同步整流電源轉換 盗的電路圖, 圖3是一本發明電源轉拖, 圖; 将谀益之第一較佳實施例的電路 施例之主要信號的 圖4是一第一較佳實施例之驅動電路的電路圖; 圖5是一時序圖,說明第一較 相對關係; ㈣ 圖; 圖6是—本發明電源轉換器之第二較佳實施例的電 路 圖; 圖; 圖7是―本發明電源轉換器之第三較佳實施例的電路 圖8是-本發明電源轉換器之第四較佳實_的電路 圖; .圖9是一本發明電源轉換器之第五較佳實施例的電路 圖 圖; 10是一本發明電源轉換器之第六較佳實 施例的電路 26 1344746The first end electrically connected to the third coil 213 is stacked through the detector 4 of the first switching circuit 41 and the second coil 212. Preferably, the seventh preferred embodiment of the power converter of the present invention comprises an input circuit, a main transformer 22, a drive circuit 3, a first switching circuit 41, and a second switching circuit. 42. A first output circuit 51 and a second output circuit 52. The input circuit 1, the driving circuit 3, the first switching circuit 41, and the first output terminal 51 are similar to the second preferred embodiment, and the second finger circuit 42 is similar to the first switching circuit 41. The second output circuit ^ 23 1344746 is similar to the first output circuit 51 and will not be described herein. The main transformer 11 22 is a reciprocating device comprising a first coil 222 and a third coil 223. The two ends of the second coil are electrically connected to each other. The two ends of the third coil 223 are electrically connected to the switching circuit 42. The second end of the second coil (2) is opposite to the second phase. The second-coil 223 of the second coil 223 is detected by the 61-knife-corresponding to the input power source. The operation of the preferred embodiment is similar to that of the second preferred embodiment, and the technical field of the invention Those who have ordinary knowledge can infer this and do not repeat them. Implementations - Referring to Figure 12, an eighth preferred embodiment of the power converter of the present invention comprises - an input circuit - a main transformer 21, a drive circuit 3, a first a switching circuit 41, a second switching circuit 42, a _output circuit ^ and a first output circuit 52. The wheel circuit!, the driving circuit 3, the (4)th circuit Μ and the wheel circuit 51 and The second preferred embodiment is similar, and the second switch 2 42 is similar to the first switching circuit 41. The second output circuit is similar to the "-output circuit 51" and will not be described herein. - The main transformer 21 is a forward transformer 'including a first coil 211 end 212 and a third coil 213. The second coil 2 is electrically connected to the first switching circuit 41. The two ends of the third coil 213 are electrically connected to the switching circuit 42. The first end of the second coil 212 is the third end of the third coil. One end can sense a pair of coupled signals that should be input to the power source 24 61, respectively. The operation of the preferred embodiment is similar to that of the third preferred embodiment, and those of ordinary skill in the art to which the present invention pertains can be inferred, and thus will not be described herein. It should be noted that, in the above preferred embodiment, the ratio of the turns of the first coil 21 i , 221 and the second coil 212 , 222 is 1: i, the first coil 211, 221 and the third The coil gate ratio of the coils 213 and 223 is i.1, and the ratio of the turns of the first isolation coil 311 and the second isolation coil 312 is 1:1, and is not limited thereto. It should be noted that, in the above preferred embodiment, the main switch u, the inverting switches 412 and 422, and the in-phase switches 413 and 423 are N-type transistors, and are not limited thereto. The first switch Q1 and the second switch Q2 of the driving circuit 3 are N-type transistors, and the third switch Q3 and the fourth switch Q4 are PNP dual-carrier junction transistors (bip〇lar juncU〇n) -_, abbreviated as BJT), the fifth switch q5 is NpN B JT, and is not limited thereto. It is also worth noting that the drive circuit 3 in the above embodiment can be independent of the power converter of the present invention. In summary, the driving circuit 3 can actively correct the relative relationship between the synchronization signal and the third driving signal drive3 to ensure that no backflow phenomenon occurs, and synchronize the circuit with the synchronization signal sync. The accelerating unit 35 of the driving circuit 3 contributes to the discharge speed of the switch driven by the third driving signal, and the driving capability can be effectively improved. Further, + needs to use a driving chip as in the prior art. The present invention can achieve the above requirements and greatly reduce the cost of the circuit, so that the object of the present invention can be achieved. 25 1344746 The above is only the preferred embodiment of the private/i-^ private month of the present invention, and is not limited to the embodiment of the present invention. The patents and the content of the invention are intimidating and the equivalent changes and modifications are still within the scope of the invention. [Simple diagram of the diagram] Figure 1 is a conventional self-driving between the cattle map; the circuit with the V whole bIL power converter Figure 2 is a conventional synchronous rectification power conversion thief with current change 懕 妖 w 3 is a circuit diagram of a driving circuit of a first preferred embodiment; FIG. 3 is a circuit diagram of a driving circuit of a first preferred embodiment; 5 is a timing diagram illustrating a first comparative relationship; (4) FIG. 6 is a circuit diagram of a second preferred embodiment of the power converter of the present invention; FIG. 7 is a third comparison of the power converter of the present invention. Figure 8 is a circuit diagram of a fourth preferred embodiment of the power converter of the present invention; Figure 9 is a circuit diagram of a fifth preferred embodiment of the power converter of the present invention; Circuit 26 of the sixth preferred embodiment of the converter 1344746
圖11是一本發明電源轉換器之第七較佳實施例的電路 圖;及 圖12是一本發明電源轉換器之第八較佳實施例的電路 圖。 27 1344746Figure 11 is a circuit diagram of a seventh preferred embodiment of a power converter of the present invention; and Figure 12 is a circuit diagram of an eighth preferred embodiment of a power converter of the present invention. 27 1344746
【主要元件符號說明】 1 輸入電路 422 反相開關 11 主開關 423 同相開關 12 磁重置單元 51 第一輸出電路 21 主變壓器 511 輸出電感 211 第一線圈 512 輸出電容 212 第二線圈 513 輸出電阻 22 主變壓器 52 第二輸出電路 221 第一線圈 521 輸出電感 222 第二線圈 522 輸出電容 3 驅動電路 523 輸出電阻 31 隔離器 61 輸入電源 311 第一隔離線圈 62 外接負載 312 苐-一隔離線圈 63 外接負載 32 位準調整器 adj_v 準位後信號 33 反相產生器 inv 反相信號 34 死極時間控制器 drivel 第一驅動信號 35 加速單元 drive2 第二驅動信號 41 第一切換電路 drive3 第三驅動信號 411 檢波器 sync 同步信號 412 反相開關 Cl 第一電容 413 同相開關 C2 第二電容 42 第二切換電路 D1 第一二極體 421 檢波器 D2 第二二極體 28 1344746[Main component symbol description] 1 Input circuit 422 Inverting switch 11 Main switch 423 Non-inverting switch 12 Magnetic reset unit 51 First output circuit 21 Main transformer 511 Output inductance 211 First coil 512 Output capacitor 212 Second coil 513 Output resistance 22 Main transformer 52 second output circuit 221 first coil 521 output inductor 222 second coil 522 output capacitor 3 drive circuit 523 output resistor 31 isolator 61 input power supply 311 first isolation coil 62 external load 312 苐 - an isolation coil 63 external load 32-bit quasi-adjuster adj_v post-level signal 33 inverting generator inv inverting signal 34 dead-time controller drel first drive signal 35 acceleration unit drive2 second drive signal 41 first switching circuit drive3 third drive signal 411 detection Sync sync signal 412 inverting switch Cl first capacitor 413 non-inverting switch C2 second capacitor 42 second switching circuit D1 first diode 421 detector D2 second diode 28 1344746
D3 第三二極體 D4 第四二極體 D5 第五二極體 D6 第六二極體 DC 直流電源 Q1 第一開關 Q2 第二開關 Q3 第三開關 Q4 第四開關 Q5 第五開關 R1 第一電阻 R2 第二電阻 R3 第三電阻 R4 第四電阻 R5 第五電阻 R6 第六電阻 R7 第七電阻 R8 第八電阻 R9 第九電阻D3 third diode D4 fourth diode D5 fifth diode D6 sixth diode DC power supply Q1 first switch Q2 second switch Q3 third switch Q4 fourth switch Q5 fifth switch R1 first Resistor R2 second resistor R3 third resistor R4 fourth resistor R5 fifth resistor R6 sixth resistor R7 seventh resistor R8 eighth resistor R9 ninth resistor
2929
Claims (1)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW97102001A TWI344746B (en) | 2008-01-18 | 2008-01-18 | Driving circuit and power converter having the driving circuit |
JP2008188308A JP4642096B2 (en) | 2008-01-18 | 2008-07-22 | Drive circuit and power converter incorporating the drive circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW97102001A TWI344746B (en) | 2008-01-18 | 2008-01-18 | Driving circuit and power converter having the driving circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200934076A TW200934076A (en) | 2009-08-01 |
TWI344746B true TWI344746B (en) | 2011-07-01 |
Family
ID=40972359
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW97102001A TWI344746B (en) | 2008-01-18 | 2008-01-18 | Driving circuit and power converter having the driving circuit |
Country Status (2)
Country | Link |
---|---|
JP (1) | JP4642096B2 (en) |
TW (1) | TWI344746B (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI427909B (en) * | 2010-06-21 | 2014-02-21 | Niko Semiconductor Co Ltd | Flyback power converter with multi-output and a secondary side post regulator thereof |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH09285116A (en) * | 1996-04-08 | 1997-10-31 | Nec Corp | Power supply circuit |
JP3478328B2 (en) * | 1999-03-05 | 2003-12-15 | デンセイ・ラムダ株式会社 | Drive circuit for single rectifier type forward converter |
-
2008
- 2008-01-18 TW TW97102001A patent/TWI344746B/en not_active IP Right Cessation
- 2008-07-22 JP JP2008188308A patent/JP4642096B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
TW200934076A (en) | 2009-08-01 |
JP2009171827A (en) | 2009-07-30 |
JP4642096B2 (en) | 2011-03-02 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US8693223B2 (en) | Power converter with zero voltage switching and related control method thereof | |
JP4835087B2 (en) | DC-DC converter | |
CN101632216B (en) | Clamp diode reset in a power converter and power outage detection in a switched mode power supply | |
TWI326963B (en) | Resonant converter and synchronous rectification driving circuit thereof | |
CN102047542B (en) | For providing initial bias and the method and apparatus for enabling signal for power inverter | |
JP5034568B2 (en) | Switching power supply | |
TW201212498A (en) | Regulating controller for controlled self-oscillating converters using Bipolar Junction Transistors | |
TW200937157A (en) | Synchronous regulation power converters, synchronous regulation circuits, and synchronous regulation methods | |
TW200917637A (en) | Synchronous rectifying method and apparatus | |
TWI220084B (en) | Synchronous rectifying power converter controlled by current transformer | |
TWI462448B (en) | Power converter and control method of power converter | |
WO2021179900A1 (en) | Switching power supply circuit, and secondary side control circuit and method for switching power supply circuit | |
JP2006288195A (en) | Dc voltage converter of two or more voltages | |
US7548436B1 (en) | Driving circuit and a power converter incorporating the same | |
TWI334260B (en) | Flyback converter with synchronous rectifier | |
TWI253667B (en) | Driving apparatus of electromagnet apparatus | |
US6744642B2 (en) | Circuitry for resetting magnetic field of transformer | |
TWI344746B (en) | Driving circuit and power converter having the driving circuit | |
JP2004096812A (en) | Switching power supply apparatus | |
JP3949390B2 (en) | Synchronous rectifier circuit | |
TW200919921A (en) | Synchronous self-driven power converter | |
CN106961218B (en) | Gate-controlled bidirectional double-rail series resonant converter power supply | |
JP4172569B2 (en) | Switching power supply | |
JP2007104881A (en) | Switching power supply unit | |
JP3572400B2 (en) | Drive device for current control type device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |