TWI340552B - All digital phase-locked loop with widely locked frequency - Google Patents
All digital phase-locked loop with widely locked frequencyInfo
- Publication number
- TWI340552B TWI340552B TW096147306A TW96147306A TWI340552B TW I340552 B TWI340552 B TW I340552B TW 096147306 A TW096147306 A TW 096147306A TW 96147306 A TW96147306 A TW 96147306A TW I340552 B TWI340552 B TW I340552B
- Authority
- TW
- Taiwan
- Prior art keywords
- locked
- widely
- digital phase
- frequency
- locked loop
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/091—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector using a sampling device
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
- H03L7/0991—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
- H03L7/101—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using an additional control signal to the controlled loop oscillator derived from a signal generated in the loop
- H03L7/102—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using an additional control signal to the controlled loop oscillator derived from a signal generated in the loop the additional signal being directly applied to the controlled loop oscillator
- H03L7/103—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using an additional control signal to the controlled loop oscillator derived from a signal generated in the loop the additional signal being directly applied to the controlled loop oscillator the additional signal being a digital signal
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L2207/00—Indexing scheme relating to automatic control of frequency or phase and to synchronisation
- H03L2207/06—Phase locked loops with a controlled oscillator having at least two frequency control terminals
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L2207/00—Indexing scheme relating to automatic control of frequency or phase and to synchronisation
- H03L2207/50—All digital phase-locked loop
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW096147306A TWI340552B (en) | 2007-12-11 | 2007-12-11 | All digital phase-locked loop with widely locked frequency |
US12/170,742 US8050376B2 (en) | 2007-12-11 | 2008-07-10 | All digital phase-locked loop with widely locked frequency |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW096147306A TWI340552B (en) | 2007-12-11 | 2007-12-11 | All digital phase-locked loop with widely locked frequency |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200926606A TW200926606A (en) | 2009-06-16 |
TWI340552B true TWI340552B (en) | 2011-04-11 |
Family
ID=40721669
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW096147306A TWI340552B (en) | 2007-12-11 | 2007-12-11 | All digital phase-locked loop with widely locked frequency |
Country Status (2)
Country | Link |
---|---|
US (1) | US8050376B2 (zh) |
TW (1) | TWI340552B (zh) |
Families Citing this family (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8115525B2 (en) * | 2008-12-02 | 2012-02-14 | Electronics And Telecommunications Research Institute | Frequency synthesizer |
US8344774B2 (en) * | 2009-03-06 | 2013-01-01 | Texas Instruments Incorporated | Frequency synthesizer with immunity from oscillator pulling |
KR101591338B1 (ko) * | 2009-03-30 | 2016-02-19 | 삼성전자주식회사 | 롱 텀 지터를 최소화 한 클럭발생기 |
GB2469473A (en) * | 2009-04-14 | 2010-10-20 | Cambridge Silicon Radio Ltd | Digital phase locked loop |
US8502581B1 (en) * | 2010-02-06 | 2013-08-06 | Ion E. Opris | Multi-phase digital phase-locked loop device for pixel clock reconstruction |
US8193963B2 (en) | 2010-09-02 | 2012-06-05 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method and system for time to digital conversion with calibration and correction loops |
US8471614B2 (en) * | 2011-06-14 | 2013-06-25 | Globalfoundries Singapore Pte. Ltd. | Digital phase locked loop system and method |
US8791733B2 (en) * | 2012-10-05 | 2014-07-29 | Intel Mobile Communications GmbH | Non-linear-error correction in fractional-N digital PLL frequency synthesizer |
TWI520495B (zh) | 2013-06-06 | 2016-02-01 | 財團法人工業技術研究院 | 非石英時脈產生器及其運作方法 |
KR102123901B1 (ko) * | 2013-07-12 | 2020-06-17 | 에스케이하이닉스 주식회사 | 완전 디지털 위상 고정 루프 회로, 반도체 장치 및 휴대 정보 기기 |
GB2520716A (en) | 2013-11-28 | 2015-06-03 | Ibm | Clock recovery method and apparatus |
US9647674B2 (en) * | 2015-04-08 | 2017-05-09 | Microsemi Semiconductor Ulc | Apparatus for generating clock signals having a PLL part and synthesizer part with programmable output dividers |
US9654116B1 (en) * | 2015-10-27 | 2017-05-16 | Mediatek Inc. | Clock generator using resistive components to generate sub-gate delays and/or using common-mode voltage based frequency-locked loop circuit for frequency offset reduction |
CN107911115B (zh) * | 2017-12-08 | 2021-07-06 | 中国电子科技集团公司第五十八研究所 | 一种用于锁相环的快速频带锁定电路 |
US10651861B2 (en) * | 2018-10-15 | 2020-05-12 | Analog Devices, Inc. | Filterless digital phase-locked loop |
US11002764B2 (en) * | 2019-02-12 | 2021-05-11 | Tektronix, Inc. | Systems and methods for synchronizing multiple test and measurement instruments |
CN112019166B (zh) * | 2020-09-04 | 2023-06-27 | 北京中科芯蕊科技有限公司 | 一种亚阈值单周期时钟降频控制电路 |
CN112910412B (zh) * | 2021-01-15 | 2022-05-10 | 广州大学 | 一种环形振荡器频率调制电路 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW451558B (en) | 1999-06-29 | 2001-08-21 | Ind Tech Res Inst | Digitally controlled oscillator circuit of digital phase lock loop |
US6414555B2 (en) | 2000-03-02 | 2002-07-02 | Texas Instruments Incorporated | Frequency synthesizer |
JP3565271B2 (ja) * | 2001-11-19 | 2004-09-15 | 日産自動車株式会社 | 組電池及びその製造方法 |
US6798296B2 (en) | 2002-03-28 | 2004-09-28 | Texas Instruments Incorporated | Wide band, wide operation range, general purpose digital phase locked loop architecture |
US7127022B1 (en) * | 2003-03-21 | 2006-10-24 | Xilinx, Inc. | Clock and data recovery circuits utilizing digital delay lines and digitally controlled oscillators |
TWI279085B (en) | 2004-03-22 | 2007-04-11 | Realtek Semiconductor Corp | All-digital phase-locked loop |
US7177611B2 (en) * | 2004-07-07 | 2007-02-13 | Texas Instruments Incorporated | Hybrid control of phase locked loops |
US7385539B2 (en) | 2006-02-15 | 2008-06-10 | Texas Instruments Deutschland Gmbh | All-digital phase locked loop (ADPLL) system |
US7715515B2 (en) * | 2006-10-19 | 2010-05-11 | Telefonaktiebolaget Lm Ericsson (Publ) | Method and apparatus for reducing non-montonic regions in a digitally controlled oscillator |
US7859343B2 (en) * | 2006-11-13 | 2010-12-28 | Industrial Technology Research Institute | High-resolution varactors, single-edge triggered digitally controlled oscillators, and all-digital phase-locked loops using the same |
-
2007
- 2007-12-11 TW TW096147306A patent/TWI340552B/zh not_active IP Right Cessation
-
2008
- 2008-07-10 US US12/170,742 patent/US8050376B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US20090147902A1 (en) | 2009-06-11 |
US8050376B2 (en) | 2011-11-01 |
TW200926606A (en) | 2009-06-16 |
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Legal Events
Date | Code | Title | Description |
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MM4A | Annulment or lapse of patent due to non-payment of fees |