TWI339503B - A control method and apparatus of soft-start use in rsonant and pwm type controller - Google Patents

A control method and apparatus of soft-start use in rsonant and pwm type controller Download PDF

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TWI339503B
TWI339503B TW96138603A TW96138603A TWI339503B TW I339503 B TWI339503 B TW I339503B TW 96138603 A TW96138603 A TW 96138603A TW 96138603 A TW96138603 A TW 96138603A TW I339503 B TWI339503 B TW I339503B
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output
voltage
operational amplifier
soft
negative
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TW96138603A
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Chinese (zh)
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TW200919969A (en
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Ta Kuang Liu
Yu Chiao Lee
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Champion Microelectronic Corp
Apollo Energy Technology Co Ltd
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1339503 九、發明說明: 【發明所屬之技術領域】 本發明係有關於祕共振與脈波寬度調變 啟動之控制裝置,制是-種在任何負祕件下,均可 ”出電壓之士升,間(rise_time)與無輸出電壓過衝 ΪΪΧί0。"0之 升時負載變重造成輸出電壓產生負斜 【先前技術】 由於切換式電源產品的普及化’相關翻於切換式電源產σ 之控制用之積體電路陸續被開發出來,例如功率因素修正('p〇w= Factor Correction,PRC)用的控制 IC、直流轉直流(D(y 波寬度調變_)控制IC、直流轉直流之變頻控制IC、直流轉直 ^之PFM控制1C等等不勝枚舉。因此目前所有的電源產品利用現 有的控制1C所設計出來的產品都會依據電源產品之負載要求下, 輸出電壓過衝(Overshoot)不可超出規格,輸出電壓上升時間的要 求不可超過規格,輸出電壓上升時不可有輸出發生負斜率的現象 之要求下’大多數的控制ic都内含軟起動之設計或可以外加軟啟 動電路以使知·電源產品之設計工程師能設計出符合 之,源產品。以下將介紹目前具軟起動_之交換式電源供= 及其相闞控制器所使用之習知技術。 第1圖為習知固定頻率之脈波寬度調變器(Pulse Width1339503 IX. Description of the invention: [Technical field to which the invention pertains] The present invention relates to a control device for the activation of a secret resonance and a pulse width modulation, which is a kind of , (rise_time) and no output voltage overshoot ΪΪΧ 0 0. " 0 rises when the load becomes heavy, causing the output voltage to produce a negative slope [Prior Art] Due to the popularity of switched power products, the relevant turn over the switching power supply σ Control integrated circuits have been developed, such as power factor correction ('p〇w= Factor Correction, PRC) control IC, DC to DC (D (y-wave width modulation) control IC, DC to DC The inverter control IC, DC to direct PFM control 1C, etc. are numerous. Therefore, all current power products use the existing control 1C design products will be based on the load requirements of the power supply, the output voltage overshoot (Overshoot ) The specification must not exceed the specification. The output voltage rise time requirement cannot exceed the specification. When the output voltage rises, there is no requirement that the output has a negative slope. Most of the control ic The soft start design may be added or a soft start circuit may be added to enable the design engineer of the knowing power supply product to design a conforming source product. The following will introduce the current switching power supply with soft start _ and its relative controller The conventional technique used. Fig. 1 is a conventional fixed frequency pulse width modulator (Pulse Width)

Modulator,PWM)控制ic誤差放大器之輸出電壓上升波形及輸出 之脈波寬度之波形圖。振盪器(Oscillator,0SC)在電流模式之 PWM 1C申為切換開關之電流波形1〇2之頻率為固定時,輸出電壓 上升波形104與振盪波形102之電壓比較,控制酬之脈波寬声 波形106由窄至寬。 又 第2圖為習知變頻之脈波寬度調變器控制IC誤差放大器/電 壓控制之輪出電壓上升波形及輸出之脈波寬度之波形圖。振盪器 之振盈波形202之頻率由高漸低時,輸出電壓上升波形2〇4與振 5 電壓比較,控制PWM之脈波寬度波形2G6由窄至寬, 在石及第2圖中所表示之波形都是單剛驅動之波形, 與方式與第1圖及第2圖相同,惟最大之 電路圖⑴顯示外部加起動 宽产娜哭寬度調^ie之軟啟動方式之方塊圖。脈波 30fi,T& L括運算放大器抑4,其負輸入接至分壓電路 比較雷7^厭1電壓(Μ ’ —般約為2· 5V,運算放大器304 輸出Ϊί'ΐ ϋΓ6之電壓與參考電壓而輸出—爬升(R_) 輸出^。接至脈波寬度調變邏輯電路(PWM1〇Sic) 二%/!〇之正輸入比較器310之負輸入接至振盪器312。 之輸出亦經由二極體314接至啟動電路316。比較 ϋΐ nn as _ e8°及振盪器312之輸出而輸出寬度調變之脈波。第3 啟#不^部加起動電路之固定頻率脈波寬度調變器IC之軟 方塊圖。脈波寬度調變器322包括運算放大器304,其 雪'^4Ϊ電壓(Vref) 3G8,一般約為2‘5V,運算放大器3°4之 6充電於電容器Css,經緩衝器(buffer) 328之 I入形成I。之輸出為一爬升(Ramp)輸出電壓Vea。,其 ϊΐ 脈波寬度調變邏輯電路之運算放大器310之正輸入, i之負輸入接至振盈器312。比較器310比較L及振盈 丄予,輸出而輸出寬度調變之脈波。第3® (C)顯示另一種内 3 π,,,路之固定頻率脈波寬度調變器IC之軟啟動方式之方塊 度調變器334與第3圖⑻之差異在於電流源326充 ^/電广态CsS,電容器Css之一端經二極體332連於運算放大器 m輸ΐ以控制軟啟動。第3圖⑻顯示—種内部加起動電路 —$之八振式IC之軟啟動方式之方塊圖。電流源326充電於電 ,電容器Css之一端經二極體344連於電壓控制振盪器 (oltage Control 〇sciiiator,vc〇) 34〇 以控制軟啟動。電壓 1339503 ,制振盈H之振細㈣峨少,以控繼波寬度機邏輯1(:之 =波寬度。第3圖⑻顯示-種外部加起動電路之變頻之共振式 之動方式之方塊圖。與第3 ®(D)之差異在於運算放大器 輸出經二極體354連於電容器Css之一端,而以參考電壓(Vre『〕 308連於正輸入與負輸入之外部分壓電路比較。 第4圖為習知控制積體電路之軟啟動之時序圖。第4圖(A) 同負載下運算放大器304之輸出電壓L與振盈器312之 ,出電壓Vco之比,即Veao/Vco。啟動時,電源I。4〇2由〇爬升至 Vc^參考電麗獅於t。時固定為l,WVc〇自t。線性·肢升,Modulator, PWM) Controls the waveform of the output voltage rise waveform of the ic error amplifier and the pulse width of the output. The oscillator (Oscillator, 0SC) compares the voltage of the output voltage rising waveform 104 with the voltage of the oscillating waveform 102 when the frequency of the current mode PWM 1C is determined to be the current waveform of the switching switch 1 〇 2, and controls the pulse wave wide acoustic waveform. 106 is narrow to wide. Fig. 2 is a waveform diagram of the pulse-wave width modulator of the conventional variable frequency pulse width modulator control IC error amplifier/voltage control and the output pulse width. When the frequency of the oscillation waveform 202 of the oscillator is high and low, the output voltage rise waveform 2〇4 is compared with the voltage of the vibration 5, and the pulse width waveform 2G6 of the control PWM is narrow to wide, which is represented in the stone and the second figure. The waveforms are all single-drive waveforms, and the method is the same as that of the first and second figures. However, the largest circuit diagram (1) shows the block diagram of the soft start mode of the external plus start-up wide-width crying width adjustment. Pulse 30fi, T& L includes an operational amplifier 4, and its negative input is connected to the voltage divider circuit to compare the voltage of the 7 ^ ^ 1 Μ — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — Output with the reference voltage - climb (R_) output ^. Connect to the pulse width modulation logic circuit (PWM1 〇 Sic) 2% /! 〇 The input of the positive input comparator 310 is connected to the oscillator 312. The output is also It is connected to the starting circuit 316 via the diode 314. The output of the width modulation is outputted by comparing the output of ϋΐ nn as _ e8° and the oscillator 312. The third frequency is not fixed to the fixed frequency pulse width of the starting circuit. A soft block diagram of the transformer IC. The pulse width modulator 322 includes an operational amplifier 304 having a snow voltage of 4 volts (Vref) 3G8, typically about 2'5 volts, and an operational amplifier 3 deg 4 -6 charged to the capacitor Css. The I input through the buffer 328 forms I. The output is a ramp output voltage Vea, the positive input of the operational amplifier 310 of the pulse width modulation logic circuit, and the negative input of the i is connected to the oscillator. The gainer 312. The comparator 310 compares the L and the vibration, and outputs the pulse wave of the width modulation. 3® (C) shows another type of internal π,,, fixed-frequency pulse width modulator IC soft-start mode, the square-degree modulator 334 differs from the third figure (8) in that the current source 326 is charged. ^ / electric wide state CsS, one end of the capacitor Css is connected to the operational amplifier m through the diode 332 to control the soft start. Figure 3 (8) shows the internal soft start mode of the eight-vibration IC Block diagram: Current source 326 is charged to electricity, and one end of capacitor Css is connected to voltage controlled oscillator (oltage control 〇sciiiator, vc〇) 34〇 via diode 344 to control soft start. Voltage 1339503, system vibrating H The vibration (4) is reduced to control the width of the pulse width machine 1 (: = wave width. Figure 3 (8) shows a block diagram of the dynamic mode of the externally added start circuit of the resonant type. With the 3 ® (D The difference is that the operational amplifier output is connected to one end of the capacitor Css via the diode 354, and is compared with the partial voltage circuit of the positive input and the negative input with the reference voltage (Vre) 308. Fig. 4 is a conventional control Timing diagram of soft start of integrated circuit. Figure 4 (A) Operational amplification under load The ratio of the output voltage L of 304 to the output voltage Vco of the vibrator 312, that is, Veao/Vco. When starting, the power supply I.4〇2 is climbed to Vc^ and the reference electric lion is fixed at l. WVc〇 from t. Linear·limb,

2”,如曲線414所示,注意於時間Tr丨,發生過衝(〇觀hoot) =象412。負輸重時’如曲線424所示,發生過衝之現象212。 ,(B)顯示在輕負載下運算放大器3〇4之輸出電壓Vga。。注 思於時間Τη ’發生過衝之現象412,而造成負斜率之現象,上升 為Trl。第4圖(C)顯示在較重負載下運算放大器3〇4之輸出 電壓Vea。。注意於時間TrZ,發生過衝之現象412,造成負斜率之現 象,上升時間為Τβ。第4圖(D)顯示在負載有變動時運算放大 304之輸出電壓Vea。430。注意在負載有變動時發生過衝之現 ’負載變輕後斜率減少如曲線432所示,上升時間為L,又 過衝433 ’皆造成負斜率之現象。因此,在不同負載時,輸出上 升時間不同,且輸出上升時發生過衝自杭線性爬升造成負 現象’皆影響脈波寬度調變之穩定。 、 上述之軟啟動方式,都是利用限制運算放大器的輸出, ,、振式以限制VC0的控制電壓。此種方式,完全不考慮輸出的 小,所以軟啟動時,一切由限制的元件來設計軟 但是這種與輸出無關之方式,是一種開迴路之方式啟 ^生輸出上升時間隨負載而變動,同時有輸出電壓過 ^>vershoot)之現象,甚而在上升時,負載變動造成負斜率之 象。負載而變動幾種現象,對切換式電源供應器而言,、是非常不 好的。 1339503 乃針對先前技術之缺點,提出—種設計合理且有 效改。上述缺失之軟啟動之轉換控制方法及裝置。 【發明内容】 提供-種新式的軟啟動的方式適·各種脈 來進行軟啟動以改善切換式電源輸出= ΐΐϊΐϊΐ同時在不同貞載1"可以敎輸出電壓上升時間並且 改善輸出電壓上升因負倾化時產生㈣率之現象。 之f—目的在提供-種新式陳啟_方式,結合共 ^ >兩者方式之軟啟動,在軟啟動過程,PWM由窄變寬,同 ==低’應用在半橋式與全橋架構下,可以避免切換開 於丘的及其他目的,本發明之第一觀點教導-種用 皮ΐ度調變控制器之閉迴路軟啟動之控制裝置,利用 輸出經補償電路回授至運算放大器之負輸入端而形 使輸出電壓於上升時不發生 動時,在不同負載下,穩定輸出上升時間,並^ 升時負載變動時造成負斜率之現象,包含:第-運算放 雷牧·Π^!Γη31 Amolifier,0PA),其負輸入接至電源之分壓 壓;參考電壓,由—個由電流源充電於電容 來老盗之電壓經緩衝器(Buffer)輸出該參考電壓,該 門、回該第Ί運算放大器之正輸人端;補償電路;控制 〇第一運算放大器之輸出經該補償電路回授至運算放 二笛負脈波宽度調變邏輯電路⑽lc)gic),包括由 至兮笛了ΐίϊΑ器及振m器形成,該第—運算放大器之輸出接 器之正輸入’該第二運算放大器之負輸入接至 出寬度調變之脈波。第二運算放大器之輸出為單PWM 铷出。輸出最大之工作週期為50%。 本發明之第二觀_導—種祕共振與脈波寬度調變控制器2", as shown by the curve 414, pay attention to the time Tr 丨, an overshoot occurs (〇 hoot) = like 412. When the negative load is heavy, as shown by the curve 424, an overshoot phenomenon 212 occurs. (B) shows The output voltage Vga of the operational amplifier 3〇4 under light load. Note that the phenomenon of overshooting 412 occurs at time Τη, causing a negative slope phenomenon, rising to Tr1. Figure 4 (C) shows the heavier load The output voltage Vea of the lower operational amplifier 3〇4. Note that at time TrZ, an overshoot phenomenon 412 occurs, causing a negative slope phenomenon, and the rise time is Τβ. Fig. 4(D) shows that the operation amplification 304 is performed when the load changes. The output voltage Vea. 430. Note that when the load changes, the overshoot occurs. 'The load becomes lighter and the slope decreases as shown by the curve 432. The rise time is L, and the overshoot 433' causes a negative slope. Therefore, When the load is different, the output rise time is different, and the overshoot occurs when the output rises. The negative phenomenon is caused by the negative phenomenon. The soft start mode is used to limit the output of the operational amplifier. , ,, vibrating Limit the control voltage of VC0. In this way, the output is not considered at all, so when soft-start, everything is designed by the limited components, but this way of output-independent is an open-loop way to increase the output. The time varies with the load, and there is a phenomenon that the output voltage exceeds ^>vershoot). Even when rising, the load changes cause a negative slope. The load changes several phenomena. For the switched power supply, Very bad. 1339503 is a reasonable and effective design for the shortcomings of the prior art. The above-mentioned missing soft start conversion control method and device. [Summary of the Invention] A new type of soft start is provided. Pulse to soft start to improve the switching power supply output = ΐΐϊΐϊΐ at the same time in different load 1 " can 敎 output voltage rise time and improve the output voltage rise due to negative tilting when the phenomenon occurs (four) rate. The new style of Chen Qi _ way, combined with a total of ^ > soft start of the two ways, in the soft start process, PWM is narrowed by the width, the same == low 'application Under the half-bridge and full-bridge architecture, it is possible to avoid switching between the hills and other purposes. The first aspect of the present invention teaches a closed-loop soft-start control device using a skin temperature modulation controller, which is compensated by the output. The circuit is fed back to the negative input terminal of the operational amplifier, and when the output voltage does not move when rising, the output rise time is stabilized under different loads, and the negative slope occurs when the load changes, including: Operation Lei Leimu·Π^!Γη31 Amolifier, 0PA), its negative input is connected to the power supply voltage; reference voltage, by a current source charged to the capacitor to the thief voltage through the buffer (Buffer) output The reference voltage, the gate, the positive input terminal of the third operational amplifier; the compensation circuit; the output of the control 〇 first operational amplifier is fed back to the operational amplifier and the negative pulse width modulation logic circuit (10) lc) Gic), which is formed by the ϊΑ ϊΑ ϊΑ ϊΑ 及 及 及 及 及 及 及 及 , , , , , , 正 正 正 正 正 正 正 正 正 正 正 正 正 正 正 正 正 正 正 正 正 正 正 正 正 正 。 The output of the second operational amplifier is a single PWM output. The maximum duty cycle of the output is 50%. The second aspect of the present invention - the guided resonance and the pulse width modulation controller

J 8 1339503 之f迴路f雌,纖置,_運魏之触經補償電路 回授至運舁放大器之負輸入端而形成控制閉迴路,使輸出 上升時不發生過衝之現象,可控制軟啟動時,在不同負穩 定輸出上升時間,並改善輸出上升時負載變動時造成負斜 象,結合共振式與PWM兩者互補方式,在軟啟動過程,pwftf由 寬,頻率由高變低,應用在半橋式與全橋架構下, =短路之問題,包含:第一運算放大器,其負二 为壓電路,正輸人接至參考電壓;參考電壓,由—個由電 ίΓϊίίί蔽ΐ容器之電壓經緩衝器⑽fer)輸出該參考 ,該,考電壓連接至該第—運算放大器之正輸人端;補償電 巧制閉迴路,將該第-運算放大器之輸出經該補償電路回 至運舁放大II之負輸人端;電壓控制振盈器⑽tage c〇ntr〇i ^cillator’ VCO),該VC0之輸入端接至該第一運算放大器之輸出 私山1二運算放大器’該第二運算放大器之正輸入接至該VC0之 算ί大器之輸出接至脈波寬度調變邏輯電路 (PW^l〇glc) 528之輸入;第三運算放大器,該第三運算放大器 該第―,算放大器之輸*端’正輸人接至該參考- 電路至該)第2算放大器之負輸人;脈波寬度調變邏輯 ,路^PWM 1,),輸出端輸出寬度調變之脈波。第二運算放大 :之輸出為單PWM輸出或互補PWM輸出。 作週期為100%。 刊】取入心工 眘明之以上及其他目的及優點參考以下之參照圖示及最佳 實施例之說明而更易完全瞭解。 【實施方式】 第5圖。第5關示依據本發明之實補之内部加起動 寬度調魅IC之閉迴路軟啟動方式之方顧。第5圖⑴ 〜、、式内部加起動f:路之g)定辦脈波寬度觀S 1(:之閉迴路 1339503 軟啟動方式之方塊圖。脈波寬度調變器500包括運算放大器 (Operational Amplifier, OPA)或運算變導放大器(Operati〇nal Trans-conductance Amplifier, OTA) 504,其負輸入接至電源之 分壓電路506,正輸入參考電壓Vref,一般為〇V至約2. 5V,Vref由 電流源526充電於電容器Css產生,由〇V線性上升至約2. 5V,電 容器Css之電壓經緩衝器(Buffer) 507之輸出即為vref。運算放大 器504比較分壓電路506之電壓與參考電壓而輸出一爬升(Ramp) 輸出電壓Vea。,運算放大器504之輸出亦經補償電路5〇8接至運算 放大器504之負輸入端而形成閉迴路,於爬升過程中,係比較 輸出電壓Veao與參考電壓,故不產生過衝現象。且因參考電壓if 上升,斜率及上升時間皆固定,不受負載之影響,故la。之上升時 間固疋。運算放大器504之輸出^。接至脈波寬度調變邏輯電路 m。)509之運算放大器510之正輸入,運算放大器51〇 =輸=至振盪器512而於輸出端516輸出寬度調變之脈波。 ,5圖⑻為内部加起動電路之共振式與剛 方式之方塊圖。脈波寬度上變= Μ十圖(人差異在於第一運算放大器或運算變導放大器 (Operational Trans-conductance Amplifier, OTA) 504 (y〇ltage control 0 c /〇0r4^f νω 52G之輸出接至第二運算放大讀ϋ :輸入寬度調變邏輯電路⑽㈣。)528 & # 一運异放大器524之輸出接至第二運算放大器ώ 與振盪器512之輸出電愿v、fy運异放大盗504之輸出電 ^ V. 6〇2 , 1339503 時升至—定值(約2.5v)如曲線_所示。 之現象。倉都金?壓升疋值,未發生過衝(ον—) 負載更重時’如曲線_所示’亦未發生過衝之現象。 ί時間W參考㈣Vref之上升_決定。因未 圖⑻時負載變動造成負斜率之現象得以改善。第6 i載下運算放大㈣4之輸出電壓κι。⑹2。 _壓U未發生過衝之現象,未造成負斜率J 8 1339503 f circuit f female, fiber set, _ Yun Wei's touch compensation circuit is fed back to the negative input terminal of the operation amplifier to form a control closed loop, so that the output does not rise when overshoot, can control soft At startup, the negative slanting is caused by different negative stable output rise times and the load variation when the output rises. Combined with the complementary mode of resonance and PWM, in the soft start process, pwftf is wide and the frequency is changed from high to low. Under the half-bridge and full-bridge architecture, the problem of = short circuit includes: the first operational amplifier, the negative two is the voltage circuit, the positive input is connected to the reference voltage; the reference voltage is covered by the electricity ίΓϊίίί The voltage is outputted by the buffer (10)fer), and the test voltage is connected to the positive input terminal of the first operational amplifier; the compensation circuit is closed, and the output of the first operational amplifier is returned to the operation through the compensation circuit.舁Amplification II's negative input terminal; voltage control oscillator (10)tage c〇ntr〇i ^cillator' VCO), the input end of the VC0 is connected to the output of the first operational amplifier, the private amplifier 1 second operational amplifier 'the second Operational amplification The output of the positive input to the VC0 is connected to the input of the pulse width modulation logic circuit (PW^l〇glc) 528; the third operational amplifier, the third operational amplifier, the first, the operational amplifier The output of the * terminal 'input is connected to the reference - the circuit to the second amplifier's negative input; the pulse width modulation logic, the path ^PWM 1,), the output end of the output width modulation pulse. Second operational amplification: The output is a single PWM output or a complementary PWM output. The cycle is 100%. The above and other objects and advantages of the invention are more fully understood by reference to the following drawings and description of the preferred embodiments. Embodiments Fig. 5 is a view. The fifth aspect shows the method of the closed loop soft start mode of the internal plus start width adjustment IC according to the invention. Fig. 5 (1) 〜, , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , 5V, 〇V to about 2. 5V, the input voltage Vref, the input voltage Vref, the current input voltage Vref, generally 〇V to about 2. 5V Vref is generated by the current source 526 being charged by the capacitor Css, and is linearly increased from 〇V to about 2. 5V, and the voltage of the capacitor Css is vref through the output of the buffer 507. The operational amplifier 504 compares the voltage dividing circuit 506. The voltage and the reference voltage output a ramp output voltage Vea. The output of the operational amplifier 504 is also connected to the negative input terminal of the operational amplifier 504 via the compensation circuit 5〇8 to form a closed loop, and during the climb, the output is compared. Since the voltage Veao and the reference voltage, the overshoot phenomenon does not occur, and since the reference voltage if rises, the slope and the rise time are fixed, and are not affected by the load, so the rise time of la is fixed. The output of the operational amplifier 504 is ^. Connected to the positive input of the operational amplifier 510 of the pulse width modulation logic circuit m.) 509, the operational amplifier 51 〇 = output = to the oscillator 512 and the output 516 outputs the pulse of the width modulation. 5 (8) is a block diagram of the resonant and rigid modes of the internal start-up circuit. The pulse width is changed to Μ10 (the difference is that the first operational amplifier or operational transconductance amplifier (OTA) 504 (y〇ltage control 0 c /〇0r4^f νω 52G output is connected to The second operational amplification read ϋ: input width modulation logic circuit (10) (four).) 528 &# The output of the amplifier 524 is connected to the second operational amplifier ώ and the output of the oscillator 512 is willing to v, fy different amplification thief 504 The output voltage ^ V. 6〇2, 1339503 rises to - the fixed value (about 2.5v) as shown in the curve _. The phenomenon. The warehouse is gold? The pressure rises and falls, no overshoot occurs (ον—) The load is more When the weight is 'as shown by the curve _', there is no overshoot. ί Time W Reference (4) The rise of Vref _ is determined. The phenomenon of negative slope caused by the load variation is not improved when the figure (8) is not shown. The operation is amplified by the 6th i (4) 4 The output voltage κι. (6) 2. _pressure U does not overshoot, does not cause a negative slope

放大5| Trl=Tr。第6圖(C)顯示在較重負載下運算 v = 輸出電壓V°ut2(Vea。)614。注意於時間Tr2,輸出電壓 二m二衝之,象’未造成負斜率之現象,上升時間為Tr2=Tr。 第6圖D)顯示在電壓上升時運算放大器5Q4之輸出電壓 V_:(Ve^)616。注意電壓上升時負載有變動變動,於之上升過 Ϊί造成過衝及負斜率之現象。树間Tr3,輸出電壓U 現象’未造成負斜率之現象,上升時間為Tr3=Tr。由 銥丄圖、⑴⑻(C)可知,V〇utl= V〇ut2= V°ut3 ’ Trl= Tr2= Tr3。因此, 藉由閉迴路的方式作為軟啟動的控制機制達成輸出電壓於上升 =會發生過衝之現象,同時可控制軟啟動時,在不同負載時,穩 出之上升時間,並改善輸出上升時負載變動時造成負斜率^ 藉由以上較佳之具體實施例之詳述,係希望能更加清楚描述 本創作之特徵與精神,而並非以上述所揭露的較佳具體實例來^ 本發明之範疇加以限制。相反的,其目的是希望能涵蓋各種改變 及具相等性的安排於本發明所欲申請之專利範嘴内。 【圖式簡單說明】 第1圖(習知技術)為固定頻率之脈波寬度調變器(PulseWidth Modulator, PWM)控制1C輸出電壓上升波形及輸出之 脈波寬度之波形圖。Zoom in 5| Trl=Tr. Figure 6 (C) shows the operation under a heavier load v = output voltage V°ut2 (Vea.) 614. Note that at time Tr2, the output voltage is two m twice, like 'no negative slope phenomenon, and the rise time is Tr2=Tr. Fig. 6D) shows the output voltage V_: (Ve^) 616 of the operational amplifier 5Q4 when the voltage rises. Note that the load fluctuates when the voltage rises, and rises over Ϊί to cause overshoot and negative slope. Between the trees Tr3, the output voltage U phenomenon 'has not caused a negative slope, and the rise time is Tr3=Tr. From the map, (1), (8), and (C), V〇utl = V〇ut2 = V°ut3 'Trl = Tr2 = Tr3. Therefore, the closed-loop method is used as the control mechanism of the soft start to achieve the phenomenon that the output voltage rises and the overshoot occurs, and at the same time, when the soft start is started, the rise time is stabilized at different loads, and the output rise is improved. Negative slopes caused by load variations. It is intended that the features and spirit of the present invention be more clearly described by the detailed description of the preferred embodiments above, and not by the preferred embodiments disclosed herein. limit. On the contrary, it is intended to cover various modifications and equivalent arrangements within the scope of the invention as claimed. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 (Practical technique) is a waveform diagram of a 1C output voltage rising waveform and an output pulse width of a fixed frequency pulse width modulator (PWM).

Claims (1)

13395031339503 單PWM輸出最大之工作週期為100%。 7· 如申請專利範圍第5項之閉迴路軟啟動之控制裝置,其中該 互補PWM輸出最大之工作週期為50%。 17The single PWM output has a maximum duty cycle of 100%. 7· For the closed loop soft start control device of the fifth application patent scope, the complementary PWM output has a maximum duty cycle of 50%. 17
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