TWI334570B - - Google Patents

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Publication number
TWI334570B
TWI334570B TW096119849A TW96119849A TWI334570B TW I334570 B TWI334570 B TW I334570B TW 096119849 A TW096119849 A TW 096119849A TW 96119849 A TW96119849 A TW 96119849A TW I334570 B TWI334570 B TW I334570B
Authority
TW
Taiwan
Prior art keywords
instruction
repetitive
loop
program
frequency
Prior art date
Application number
TW096119849A
Other languages
English (en)
Chinese (zh)
Other versions
TW200849087A (en
Inventor
Wen Chi Hsu
zhi wei Yang
Yu Kuang Wu
Jia Jou Tsai
Original Assignee
Holtek Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Holtek Semiconductor Inc filed Critical Holtek Semiconductor Inc
Priority to TW096119849A priority Critical patent/TW200849087A/zh
Priority to US12/076,879 priority patent/US20080301421A1/en
Publication of TW200849087A publication Critical patent/TW200849087A/zh
Application granted granted Critical
Publication of TWI334570B publication Critical patent/TWI334570B/zh

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181—Instruction operation extension or modification
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3808—Instruction prefetching for instruction reuse, e.g. trace cache, branch target cache
    • G06F9/381—Loop buffering

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
TW096119849A 2007-06-01 2007-06-01 Method of accelerating the excution of repeatative commands and its micro controller TW200849087A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
TW096119849A TW200849087A (en) 2007-06-01 2007-06-01 Method of accelerating the excution of repeatative commands and its micro controller
US12/076,879 US20080301421A1 (en) 2007-06-01 2008-03-25 Method of speeding up execution of repeatable commands and microcontroller able to speed up execution of repeatable commands

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW096119849A TW200849087A (en) 2007-06-01 2007-06-01 Method of accelerating the excution of repeatative commands and its micro controller

Publications (2)

Publication Number Publication Date
TW200849087A TW200849087A (en) 2008-12-16
TWI334570B true TWI334570B (https=) 2010-12-11

Family

ID=40089598

Family Applications (1)

Application Number Title Priority Date Filing Date
TW096119849A TW200849087A (en) 2007-06-01 2007-06-01 Method of accelerating the excution of repeatative commands and its micro controller

Country Status (2)

Country Link
US (1) US20080301421A1 (https=)
TW (1) TW200849087A (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9158702B2 (en) * 2012-12-28 2015-10-13 Intel Corporation Apparatus and method for implementing a scratchpad memory using priority hint
TWI553642B (zh) * 2013-12-12 2016-10-11 慧榮科技股份有限公司 資料存取命令執行方法以及使用該方法的快閃記憶體裝置

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05297993A (ja) * 1992-04-16 1993-11-12 Dia Semikon Syst Kk マイクロプロセッサの駆動制御装置
US6263448B1 (en) * 1997-10-10 2001-07-17 Rambus Inc. Power control system for synchronous memory device
US6194940B1 (en) * 1999-09-27 2001-02-27 Lucent Technologies Inc. Automatic clock switching
US6917608B1 (en) * 2000-12-22 2005-07-12 National Semiconductor Corporation Microsequencer microcode bank switched architecture
TWI234737B (en) * 2001-05-24 2005-06-21 Ip Flex Inc Integrated circuit device
JP4870292B2 (ja) * 2001-09-27 2012-02-08 ラピスセミコンダクタ株式会社 割り込み処理可能な情報処理装置
JP3924256B2 (ja) * 2003-03-12 2007-06-06 インターナショナル・ビジネス・マシーンズ・コーポレーション コンパイラ装置、コンパイラプログラム、記録媒体、コンパイル方法、実行時情報生成装置、及び実行時情報生成プログラム
JP4610218B2 (ja) * 2004-03-30 2011-01-12 ルネサスエレクトロニクス株式会社 情報処理装置
JP4724461B2 (ja) * 2005-05-17 2011-07-13 Ｏｋｉセミコンダクタ株式会社 システムｌｓｉ
US7467277B2 (en) * 2006-02-07 2008-12-16 International Business Machines Corporation Memory controller operating in a system with a variable system clock
US7730340B2 (en) * 2007-02-16 2010-06-01 Intel Corporation Method and apparatus for dynamic voltage and frequency scaling

Also Published As

Publication number Publication date
TW200849087A (en) 2008-12-16
US20080301421A1 (en) 2008-12-04

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees