1333674 九、發明說明 【發明所屬之技術領域】 本發明是關於蝕刻方法及記錄媒體。 【先前技術】 例如，在半導體裝置之製程中，所知的 ，將存在於半導體晶圓（以下，稱爲「晶圓 φ 矽氧化膜予以乾蝕刻之方法（參照專利文獻 如此之乾蝕刻方法是由使收納有晶圓之反應 真空狀態之低壓狀態，一面將晶圓調溫至特 將含有氟化氫氣（HF )和氨氣（NH3 )之混 反應室內，使矽氧化膜予以變質而生成反應 工程，和將該反應生成物予以加熱而使其氣 加熱工程所構成，使矽氧化膜之面變質成反 ，藉由加熱予以除去，依此蝕刻矽氧化膜。 φ 但是，矽氧化膜則有產生原因、成膜法 類，例如有藉由將晶圓放置在大氣中，自然 自然氧化膜；藉由藥液處理所產生之化學 CVD ( Chemical Vapor Deposition)裝置依: 成膜之CVD系氧化膜（熱氧化膜、BPSG等 矽氧化膜中，在上述蝕刻方法之變質工程中 執行混合氣體之反應的是自然氧化膜或化學 相同矽氧化膜，相對於CVD系氧化膜等也 即是，在上述乾蝕刻方法中，可以抑制相對 有不使用電漿 」）之表面的 1、2、3 ) ° 室內成爲接近 定溫度，一面 合氣體供給至 生成物之變質 化（昇華）之 應生成物之後 等不同的各種 產生在矽上的 氧化膜；藉由 據CVD反應所 )等。從該些 ，選擇性活躍 氧化膜，即使 不活躍執行。 於自然氧化膜 -5- 1333674 或化學氧化膜的飩刻選擇比變高，其他構造被餽刻之事態 ，並且可以有效率僅除去自然氧化膜或化學氧化膜。因此 ’該乾蝕刻方法是以除去附著於晶圓之自然氧化膜或化學 氧化膜之工程，當作例如對晶圓執行成膜處理之前的前處 理爲佳。 另外，作爲蝕刻CVD系氧化膜之方法，是執行使用 藥液之濕蝕刻、利用反應性氣體電漿之電漿蝕刻等。 [專利文獻1]美國專利申請公開第20〇4/0 1 824 1 7號說 明書 [專利文獻2]美國專利申請公開第2004/0 1 84792號說 明書 [專利文獻3 ]日本專利特開2 0 0 5 - 3 9 1 8 5號公報 【發明內容】 [發明所欲解決之課題] 但是，在CVD系氧化膜之濕蝕刻中，則有於形成在 晶圓上之CVD系氧化膜以外之其他膜，容易受到藥液而 造成壞影響之問題。再者，電漿蝕刻中，則有在晶圓上產 生因電漿所引起之電性損傷（充電損傷）之問題。因此， CVD系氧化膜之蝕刻，則以新開發出之方法爲佳，例如可 以考慮適用由上述變質工程和加熱工程所構成之無電漿的 乾蝕刻方法。但是，在上述乾蝕刻方法中，因對CVD系 氧化膜變質之變質工程中的反應速度慢，故變質工程需要 長時間，有效率變差之問題。並且，氧化膜之變質（反應 -6- 1333674 生成物之生成）是有當進行至氧化膜之表审某‘程度深度時 ，則成爲飽和狀態（Saturation )，不再前進至該以上之 深度的性質。即是，藉由一次變質工程及加熱工程可以蝕 刻之蝕刻量則有限界。因此，爲了取得CVD系氧化膜所 要求之程度之蝕刻量，必須多數次重複執行變質工程和加 熱工程，效率爲差。 本發明是鑒於上述點而所創作出者，其目的爲提供因 φ 應各矽氧化膜之種類，可以有效率乾蝕刻各種矽氧化膜之 蝕刻方法。 [用以解決課題之手段] 爲了解決上述課題，若藉由本發明，則一種蝕刻方法 ，爲蝕刻矽氧化膜之方法，其特徵爲：具有：變質工程， 將含有氟化氫氣及氨氣之混合氣體供給至上述矽氧化膜之 表面，使上述矽氧化膜和上述混合氣體予以化學反應，並 # 使上述矽氧化膜予以變質而生成反應生成物；和加熱工程 ，加熱上述反應生成物而予以除去，在上述變質工程中， 因應上述矽氧化膜之種類，因應上述矽氧化膜之種類，調 節上述矽氧化膜之溫度，及上述混合氣體中之氟化氫氣之 分壓。若藉由如此之鈾刻方法，則在變質工程中，可以因 應矽氧化膜之種類，調節反應生成物成爲飽和狀態之深度 〇 在此，當作使存在於基板表面之矽氧化膜變質而生成 反應生成物之處理，爲例如COR ( Chemical Oxide 13336741333674 IX. Description of the Invention [Technical Field] The present invention relates to an etching method and a recording medium. [Prior Art] For example, in the process of a semiconductor device, it is known that it is present on a semiconductor wafer (hereinafter, referred to as a "wafer φ 矽 oxide film to be dry etched (refer to the patent document such that the dry etching method is The wafer is heated to a mixed reaction chamber containing hydrogen fluoride (HF) and ammonia (NH3) in a low-pressure state in which the reaction vacuum state of the wafer is stored, thereby degrading the tantalum oxide film to form a reaction process. And heating the reaction product to heat the gas, so that the surface of the tantalum oxide film is deteriorated and removed by heating, thereby etching the tantalum oxide film. φ However, the tantalum oxide film is produced. The reason and the film formation method are, for example, a natural natural oxide film by placing a wafer in the atmosphere; a chemical CVD (Chemical Vapor Deposition) device produced by chemical treatment: a film-forming CVD-based oxide film ( In a tantalum oxide film such as a thermal oxide film or a BPSG, a reaction of a mixed gas in a modification process of the above etching method is a natural oxide film or a chemically identical tantalum oxide film, relative to CVD. In the above-described dry etching method, it is possible to suppress the surface of the surface which is not used with the plasma "1, 2, 3). The indoor temperature is close to the constant temperature, and the gas is supplied to the product. After the formation of the product (sublimation), various kinds of oxide films which are generated on the crucible, etc., by CVD reaction or the like. From these, the selective active oxide film is not actively executed. In the natural oxide film -5 - 1333674 or chemical oxide film, the etching selectivity is higher, other structures are fed, and the natural oxide film or chemical oxide film can be removed efficiently. Therefore, the dry etching method is a process of removing the natural oxide film or the chemical oxide film attached to the wafer, and it is preferable to perform the pre-treatment before performing the film formation process on the wafer, for example. Further, as a method of etching the CVD-based oxide film, wet etching using a chemical liquid, plasma etching using a reactive gas plasma, or the like is performed. [Patent Document 1] US Patent Application Publication No. 20 〇 4/0 1 824 1 7 [Patent Document 2] US Patent Application Publication No. 2004/0 1 84792 [Patent Document 3] Japanese Patent Laid-Open No. 2 0 0 5 - 3 9 1 8 5 SUMMARY OF THE INVENTION [Problems to be Solved by the Invention] However, in the wet etching of a CVD-based oxide film, there is a film other than the CVD-based oxide film formed on the wafer. It is easy to be affected by the liquid medicine and cause bad influence. Further, in the plasma etching, there is a problem that electrical damage (charge damage) due to plasma is generated on the wafer. Therefore, the etching of the CVD-based oxide film is preferably a newly developed method, and for example, a dry etching method using a plasma-free process composed of the above-described deterioration engineering and heating engineering can be considered. However, in the above dry etching method, since the reaction speed in the deterioration of the CVD-based oxide film is slow, the deterioration process requires a long time and the efficiency is deteriorated. Further, the deterioration of the oxide film (the formation of the reaction-6-1333674 product) is such that when the thickness of the oxide film is judged to a certain depth, it becomes a saturation state and does not proceed to the depth. nature. That is, the amount of etching that can be etched by one metamorphic engineering and heating engineering is limited. Therefore, in order to obtain the etching amount required for the CVD-based oxide film, it is necessary to repeatedly perform the deterioration engineering and the heating engineering, and the efficiency is poor. The present invention has been made in view of the above points, and an object thereof is to provide an etching method capable of efficiently etching various tantalum oxide films efficiently due to the type of each of the oxide films. [Means for Solving the Problem] In order to solve the above problems, according to the present invention, an etching method is a method of etching a tantalum oxide film, which is characterized in that it has a modification process and contains a mixed gas of hydrogen fluoride gas and ammonia gas. The surface of the ruthenium oxide film is supplied to the ruthenium oxide film and the mixed gas to chemically react, and the ruthenium oxide film is modified to form a reaction product, and the reaction product is heated and heated to remove the reaction product. In the above-described deterioration process, depending on the type of the ruthenium oxide film, the temperature of the ruthenium oxide film and the partial pressure of the fluorinated hydrogen gas in the mixed gas are adjusted in accordance with the type of the ruthenium oxide film. According to such a uranium engraving method, in the metamorphic process, the depth of the reaction product to be saturated can be adjusted depending on the type of the ruthenium oxide film, and the ruthenium oxide film existing on the surface of the substrate is deteriorated. The treatment of the reaction product is, for example, COR (Chemical Oxide 1333674
Removal )處'理（化學性氧化除去處理）。COR處理是將 含有氟化氫氣（HF)等之鹵元素之氣體，和氨氣（NH3) * 等之鹽基性氣體當作處理氣體而供給至基板，依此使基板 - 上之矽氧化膜和處理氣體之氣體分子予以化學反應，使產 生反應生成物。於使用氟化氫氣和氨氣之時，主要生成含 有氟矽酸氨（（NH4) 2SiF6)或水分（H20)之反應生成 物。再者，加熱反應生成物而予以除去之處理，是例如 PHT ( Post Heat Treatment)處理。PHT處理是加熱施有 _ C OR處理之後的晶圓，使氟矽酸氨等之反應生成物予以氣 化（昇華）之處理。 在上述變質工程中，即使將上述矽氧化膜之溫度設爲 35 °C亦可。再者，在上述變質工程中，即使將上述混合氣 體中之上述氟化氫氣之分壓設爲15mT〇rr (大約2.00Pa) 以上亦可。並且，在上述變質工程中，即使將混合氣體中 之上述氨氣之分壓設爲比上述氟化氫氣之分壓小亦可。即 使上述反應生成物之蝕刻量爲30奈米以上亦可。 φ 上述矽氧化膜即使藉由CVD法形成亦可。再者，上 述矽氧化膜即使使用BPS G膜或是使用偏壓高密度電漿 CVD法而所形成之矽氧化膜亦可。 並且’若藉由本發明，則提供一種記錄媒體，爲記錄 有可藉由處理系統之控制部而實行之程式的記錄媒體，其 特徵爲：上述程式是藉由上述控制電腦實行，依此使上述 處理系統執行上述中任一之飩刻方法。 1333674 [發明效果] _ 若藉由本發明，則可以因應各砂氧化膜之種類，效率 佳乾蝕刻各種矽氧化膜。因不使用電漿，故不用擔心晶圓 會受到因電漿所引起之充電損傷。不用擔心會對蝕刻對象 物以外之其他部份造成壞影響。 由構 藉W 對 針圓 ， 晶 先的 首板 0 基 態之 形理 施處 實所 佳法 最方 之刻 明餓 發之 本及 明涉 1說所 式 > 態 方下形 施以施 實 實 [ 本 造予以說明。第1圖是形成當作半導體裝置之DRAM ( Dynamic Random Access Memory)之製造過程途中的晶圓 W之槪略剖面圖，表示晶圓W之表面（裝置形成面）之 一部份。晶圓 W例如爲構成被形成略圓盤形之薄狀板的 矽晶圓，在Si (矽）層100之表面上，形成有屬於絕緣膜 之 BPSG ( Boron-Doped Phospho Silicate Glass )膜 101。 • BPSG膜101爲加入有硼（B)和磷（P)之矽氧化膜（二 氧化矽（Si〇2))。該 BPSG 膜 101 是在 CVD ( Chemical Vapor Deposition)裝置等中，藉由熱CVD法被形成在晶 圓W表面上之CVD系之矽氧化膜。 在BPSG膜101之上面，具有閘極電極之閘極部G是 被並列設置。各閘極部G是具備有閘極電極1 〇2、硬罩幕 層103及側壁部（邊牆）1〇4。閘極電極102例如爲poly-S i (多晶矽）層。閘極電極1 〇 2是並列形成在B P S G膜 102上面。各P〇ly-Si層（閘極電極102)上面，形成有例 1333674 如WSi (鎢矽化）層1〇5。硬罩幕層1〇3是由例如SiN( 氮化矽）等之絕緣體所構成。硬罩幕層103是各被形成在 WSi層105之上面。側壁部104爲例如SiN膜等之絕緣體 。側壁部1 〇 4是形成各覆蓋各Ρ ο 1 y _ S i層（閘極電極1 0 2 )、WSi層105及硬罩幕層103之兩側面。該SiN膜（側 壁部104 )之下端部是被形成至接觸於BPSG膜101之上 面的位置。 而且，在BPSG膜101之上方，以覆蓋BPSG膜101 及各閘極部G全體之方式，形成有例如HDP-Si02膜（矽 氧化膜）110。該HDP-Si02膜110是使用偏壓高密度電漿 CVD法（HDP-CVD法）而所形成之CVD系之矽氧化膜（ 電漿CVD氧化膜），當作層間絕緣膜使用。並且，HDP-Si〇2膜110和BPSG膜101雖然皆爲CVD系氧化膜，但 是HDP-Si02膜110比起BPSG膜101密度高，爲硬材料 。在HDP-Si02膜110之表面還未形成膜，成爲露出之狀 能。 在HDP-Si02膜1 10中，被形成在兩個閘極部G彼此 間（各閘極部G )之SiN膜（側壁部1 04 )彼此之間）， 形成有接觸孔Η。接觸孔Η是被形成從HDP-Si〇2膜1 10 之上面貫通至BPSG膜101。在接觸孔Η之內部側方，使 各閘極部G之硬罩幕層1〇3之上面一部份，及設置成互相 相象之S iN膜（側壁部1 〇 4 )露出。在接觸孔Η之底部， 露出BPSG膜101之表面。接觸孔Η是藉由例如電漿蝕刻 等，藉由對閘極部G之SiN膜（側壁部1 〇4 )及硬罩幕層 -10- 1333674 103，選擇（異方性）蝕刻HDP-Si02膜110而’形成。 接著，針對對上述晶圓W執行露出於接觸孔Η之底 部的BPSG膜101之蝕刻處理的處理系統予以說明。如第 2圖所示之處理系統1，是具有使晶圓W對處理系統1搬 入搬出之搬入搬出部2、鄰接於搬入搬出部2而設置之兩 個裝載鎖定室3、各鄰接於裝載鎖定室3而被設置，執行 當作加熱工程之PHT ( Post Heat Treatment )處理工程之 φ PHT處理裝置4、各鄰接於各PHT處理裝置4而被設置， 執ί了當作變質工程之C0R( Chemical Oxide Removal)處 理工程之COR處理裝置5、當作將控制命令供至處理系統 1之各部的控制電腦8。相對於各裝載鎖定室3,各被連結 之PHT處理裝置4、COR處理裝置5是從裝載鎖定室3側 起以該順序被並列形成在一直線上。 搬入搬出部2是具有在內部設置搬運構成略圓盤形狀 之晶圓W之第一晶圓搬運機構1 1的搬運室1 2。晶圓搬運 Φ 機構11是具有將晶圓w保持略水平之兩個搬運手臂na 、1 1 b。在搬運室1 2之側方，例如具備有3個載置可收容 多數晶圓W之載體13a。再者，設置有使晶圓W旋轉光 學性求出偏心量而執行定位之定位器1 4。 如此之搬入搬出部2中’晶圓W是藉由搬送手臂ua 、lib保持’由於藉由晶圓搬運裝置π之驅動，在略水平 面內旋轉及前進移動或是升降’而搬運至所欲之位置。即 是’藉由使搬運手臂11a、lib對載置台1〇上之載體i3a 、定位器14、裝載鎖定室3進退，執行晶圓w之搬入搬 -11 - 1333674 出。 各裝載鎖定室3是經閘閥16’各連結於搬運室12° 在各裝載鎖定室3內，設置有晶圓W之第二晶圓搬運機 構17。晶圓搬運機構17具有將晶圓W保持略水平之搬運 手臂17a。再者，裝載鎖定室3之內部可抽真空。 在如此之裝載鎖定室3中，晶圓W是藉由搬運手臂 17a被保持，藉由晶圓搬運機構17之驅動，在略水平面內 旋轉及前進移動或是升降而被搬運。然後’藉由使搬運手 臂17a對縱列連接於各裝載鎖定室3之PHT處理裝置4予 以進退，晶圓W則相對於PHT處理裝置4被搬入搬出。 並且，藉由經各PHT處理裝置4，使搬運手臂17a對COR 處理裝置5予以進退，使晶圓W相對於COR處理裝置5 被搬入搬出。 PHT處理裝置4是具備有收納晶圓W之密閉構造之 處理室（處理空間）21。再者，雖然無圖式，但設置有用 以將晶圓W搬入搬出至處理室21內之搬入搬出口，設置 有開關該搬入搬出口之閘閥2 2。處理室2 1是經閘閥2 2， 而被連結於裝載室3。 如第3圖所示般，在PHT處理裝置4之處理室21內 ’設置有將晶圓W略水平載置之載置台23。並且，具備 有擁有例如加熱氮氣（N2 )等之惰性氣體而供給至處理室 21之供給路25之供給機構26、具備有排氣處理室21之 排氣路27的排氣機構28。供給路25是連接於氮氣之供給 源3 0。再者’在供給路2 5上設置有可調節供給路2 5之開 -12- 1333674 關動作及氮氣之供給流量的流量調整閥3 1。在排氣路2 7 • ♦ 設置有開關閥3 2、用以執行強制排氣之排氣栗3 3。 並且’ PHT處理裝置4之閘閥22、流量調整閥3 1、 開關閥3 2、排氣泵3 3等之各部動作，室藉由控制電腦8 之控制命令而各被控制。即是，藉由供給機構26供給氮 氣，藉由排氣機構28之排氣等是藉由控制電腦8而被控 制。 φ 如第4圖所示般’ COR處理裝置5具備有密閉構造之 反應室40。反應室40之內部成爲收納晶圓w之處理室（ 處理空間）41。反應室40之內部是成爲收納晶圓W之處 理室（處理空間）4 1。在反應室4 〇之內部設置有使晶圓 W成爲略水平之狀態下予以載置的載置台42。再者，在 COR處理裝置5設置有將氣體供給置處理室41之供給機 構43、排氣處理室41內之排氣機構44。 在反應室40之側壁部設置有用以使晶圓w搬入搬出 # 置處理室41內之搬入搬出口 53，設置有開關該搬入搬出 口 53之閘閥54。處理室41是經閘閥54而連結於處理室 21。在反應室40之頂面部具備有擁有使處理氣體吐出之 多數吐出口之噴淋頭52。 載置台42以俯視觀看時是構成略圓形，被固定於反 應室40之底部。在載置台42之內部設置有調節載置台42 之溫度的溫度調節器55。溫度調節器55是具備有例如使 調溫用之液體（例如水等）循環之管路。藉由執行與如此 流入管路內之液體熱交換，調節載置台42之上面溫度， -13- 1333674 並且在載置台42和載置台42上之晶圓W之間執行熱交 換’調節晶圓W之溫度。並且，溫度調節器55並不限定 於此，即使爲例如利用電阻熱加熱載置台4 2及晶圓W的 電加熱器等亦可。 供給機構43具備有上述噴淋頭52、將氟化氫氣供給 至處理室41 (HF)之氟化氫氣供給路61、將氨氣（NH3 )供給至處理室4 1之氨氣供給路62、將當作惰性氣體之 氬氣（Ar )供給至處理室41之氬氣供給路63、將當作惰 性氣體之氮氣（N2)供給至處理室41之氮氣供給路64。 氟化氫氣供給路6 1、氣氣供給路6 2、氬氣供給路6 3、氮 氣供給路6 4是連接於噴淋頭5 2。在處理室4 1是經由噴淋 頭52被擴散噴出氟化氫氣、氨氣 '氬氣、氮氣。 氟化氫氣供給路6 1是連接於氟化氫氣之供給源71。 在氟化氫氣供給路61設置有可調節氟化氫供給路61之開 關動作及氟化氫氣之供給流量之流量調整閥72。氨氣供給 路62是連接於氨氣之供給源73。在氨氣供給路62上設置 有可調節氨氣供給路62之開關動作及氨氣之供給流量之 流量調整閥74。氨氣供給路63是連接於氬氣之供給源75 。氬氣供給路63上設置有可調節氬氣供給路63之開關動 作及氬氣之供給流量的流量調整閥7 6。氮氣供給路64是 連接於氮氣之供給源77。在氮氣供給路64上設置有可調 節氮氣供給路64之開關動作及氮氣之供給流量的流量調 整閥7 8。 排氣機構44是具備擁有開關閥82、用以執行強制排 -14- 1333674 . 氣之排氣栗83的排氣路85。排氣路85之上流端部是開口 於反應室40之底部。 並且’ COR處理裝置5之閘閥54、溫度調節器55、 流量調整閥72、74、76、78'開關閥72、排氣泵83等之 各部動作，是藉由控制電腦8之控制命令而各被控制。即 是’藉由供給機構43供給氟化氫氣、氨氣、氬氣、氮氣 ，藉由排氣機構44之排氣，藉由溫度調節器55之溫度調 φ 節等是藉由控制電腦8被控制。 處理系統1之各功能要素是經由訊號線連接於自動控 制處理系統1全體動作的控制電腦8。在此，功能要素是 指爲了實現例如上述晶圓搬運機構1 1、晶圓搬運機構！ 7 、PHT處理裝置4之閘閥22、流量調整閥31、排氣泵33 、COR處理裝置5之閘閥54、溫度調節器55、流量調節 閥72、74、76、78、開關閥72、排氣泵83等之特定製程 條件所動作之所有要素。控制電腦8典型來說是可以依存 • 於所實行之軟體，而實現任意功能之泛用型電腦。 如第2圖所示般，控制電腦8是具有CPU (中央運算 裝置）之運算部8a、連接於運算部8a之輸入輸出部8b、 被插入於輸入輸出部8b且儲存有控制軟體之記錄媒體8c 。該記錄媒體8c是藉由控制電腦8被實行，記錄有使處 理系統1執行後述特定基板處理方法之控制軟體（程式） 。控制電腦8是藉由實行該控制軟體，以藉由特定製程處 理程式實現所定義之各種製程條件（例如，處理室41之 壓力等）的方式，控制處理系統1之各功能要素。即是， -15- 1333674 如之後詳細說明般，供給實現順序執行COR處理裝置 5 中之COR處理工程，和PHT處理裝置4中之PHT處理χ 程之蝕刻方法的控制命令。 記錄媒體8c即使爲固定性設置在控制電腦8上者， 或是可拆卸自如安裝於設置在控制電腦8上之無圖示讀$ 裝置上而藉由該讀取裝置予以讀取者亦可。最典型的實$ 形態中，記錄媒體8c是由處理系統1廠商的服務人員$ 裝控制軟體的硬碟驅動器。在其他實施形態中，記錄媒H 8c是如寫入控制軟體之CD-ROM或是DVD-ROM般之可移 除式碟。如此之可移除式碟是藉由被設置在電腦8之無_ 示之光學性讀取裝置讀取。再者，記錄媒體8 c即使；^ RAM ( random access memory)或是 ROM ( read only memory )中之任一形式者既可。並且，記錄媒體 8c即使 爲卡匣式之 ROM亦可。即是，可將在電腦之技術領域中 所知之任一者當作記錄媒體8c使用。並且，在配置多數 處理系統1之工場中，即使於統籌控制各處理系統1之控 制電腦8的管理電腦，儲存控制軟體亦可。此時，各處理 系統1是經通訊回線由管理電腦操作，實行特定程式。 接著，針對如上述般所構成之處理系統1中之晶圓W 之處理方法予以說明。首先，如第1圖所示般，在HD-Si〇2膜1 10形成接觸孔Η之晶圓W，被收納在載體13a內 ’被搬運至處理系統1。 處理系統1是如第2圖所示般，收納有多數片晶圓W 之載體13a被載置在載置台13上。藉由晶圓搬運機構11 -16 - 1333674 由載體13a取出一片晶圓w，被搬入至裝載鎖·定室3。當 曰曰圓W被乐入至裝載鎖定室3時，裝載鎖定室3密閉， 被減壓。之後，閘閥22、54被開啓，裝載鎖定室3和相 對於大氣壓各被減壓之PHT處理裝置4之處理室21、 COR處理裝置5之處理室4則互相被貫通。晶圓w是藉 由晶圓搬運機構17自裝載鎖定室3被搬出，以依照處理 室21之搬入搬出口（無圖式）、處理室21、搬入搬出口 53內之順序通過的方式’前進移動，被搬入至處理室41 〇 在處理室41中’晶圓w是在將裝置形成面當作上面 之狀態’從晶圓搬運機構1 7之搬運手臂1 7 a被交接至載 置台42。當晶圓W被搬入時，搬送手臂17a則從處理室 41退出。搬入搬出口 5 3則關閉，處理室41則密閉。然後 ，COR處理工程則開始。 處理室4 1密閉後’從氨氣供給路6 2、氬氣供給路6 3 、氮氣供給路64’各供給氨氣、氬氣、氮氣至處理室41 。再者’處理室41內之壓力，成爲比大氣壓低壓狀態。 並且’載置台42上之晶圓W之溫度是藉由溫度調節器55 而被調節成特定之目標値（例如，大約3 5 °C左右）。 之後，自氟化氫氣供給路61供給氟化氫氣至處理室 41。在此，處理室41因事先被供給著氨氣，故藉由供給 氟化氫氣，處理室41之環境是成爲由含有氟化氫氣和氨 氣之混合氣體所構成之處理環境。如此一來，藉由混合氣 體被供給於處理室41內之晶圓W之表面，對晶圓W執行 -17- 1333674 COR處理。_ 藉由處理室41內之低壓狀態之處理環境，存在於晶 圓W表面之接觸孔Η底部的BPSG膜101，是與混合氣體 中之氟化氫氣之分子及氨氣之分子化學反應，變質成反應 生成物101’（參照第5圖）。當作反應生成物101’，是生 成氟矽酸氨或水分等。並且，因該化學反應是等方性進行 ，故化學反應是從接觸孔Η之底部進行至Si層之上面， 並且在Si層之上方，也從接觸孔Η之正下方往橫方向進 行。 COR處理中是藉由調節各處理氣體之供給流量、惰性 氣體之供給流量、排氣流量等，調節成能夠維持處理室4 1 內之混合氣體（處理環境）之壓力比大氣壓更減壓的一定 壓力（例如大約80mTorr (大約1 0 · 7P a )左右）。再者， 混合氣體中之氟化氫氣之分壓，即使調節成大約1 5 mTorr (大約 2. OOPa)以上亦可。再者，如上述般，晶圓 W之 溫度，即是在BPSG膜101中，執行化學反應之部份之溫 度（BPSG膜101與混合氣體接觸之部份（即是，接觸孔 Η之底部）之溫度），即使維持成例如大約35 °C以上之一 定溫度亦可。依此，可以促進化學反應，提高反應生成物 101’之生成速度，迅速形成反應生成物101’之層。再者， 可以使化學反應成爲飽和狀態之深度（從BPSG膜101之 表面至化學反應停止之位置之間的距離）充分變深。即是 ，反應生成物101’到達Si層100之上面爲止，化學反應 並無在途中停止，可充分進行。並且，反應生成物101’中 -18- 1333674 之氟矽酸氨之昇華點爲100°C，晶圓W之溫度設爲100°C 以上時，則有可能無法良好執行反應生成物101’之生成。 ' 因此，晶圓W之溫度是以未滿大約1 oot爲佳。 上述化學反應成爲飽和狀態之深度，是依存於屬於變 質對象物的矽氧化膜之種類（在本實施形態中 BPS G膜 1 0 1 )、矽氧化膜之溫度（或是接觸於矽氧化膜之混合氣 體之溫度）、混合氣體中之氟化氫氣之分壓等。即是，因 φ 應矽氧化膜之種類，各調節矽氧化膜之溫度及氟化氫氣之 分壓，依此可以控制化學反應成爲飽和狀態之深度、反應 生成物1 〇 1 ’之生成量等，或是可以控制之後詳細說明之 PHT處理後之蝕刻量。化學反應成爲飽和狀態之深度，即 是蝕刻量於BPSG膜101時，藉由將BPSG膜101之溫度 調節成 3 5 °C以上，及將氟化氫氣之分壓調節成大約 15mTorr (大約2.00Pa)以上，則可設成大約30nm (奈米 )以上。 • 並且，以往所執行之COR處理中，晶圓W之溫度是 設爲大約3 0°C以下左右。再者，即使提高混合氣體中之氟 化氫氣之分壓，化學反應也僅執行至每程度之深度。因此 ，藉由COR處理之蝕刻量有界限，可以藉由一次COR處 理確實蝕刻之蝕刻量，在例如BPSG膜1 0 1中是設爲大約 30nm未滿左右。對此，在本實施形態中，將晶圓W之溫 度設爲比以往溫度高，設爲35t以上，並且使混合氣體中 之氟化氫氣之分壓比以往高，上昇成大約15mT〇rr (大約 2. OOPa )以上，依此，可以提高化學反應成爲飽和狀態之 -19- 1333674 深度，即使以一次COR處理亦可以實施充分之蝕刻量。Removal) (chemical oxidation removal treatment). In the COR treatment, a gas containing a halogen element such as hydrogen fluoride (HF) and a salt-based gas such as ammonia (NH3)* are supplied as a processing gas to the substrate, whereby the tantalum oxide film on the substrate is The gas molecules of the processing gas are chemically reacted to produce a reaction product. When hydrogen fluoride gas and ammonia gas are used, a reaction product containing ammonia fluoroantimonate ((NH4) 2SiF6) or moisture (H20) is mainly produced. Further, the treatment for heating and removing the reaction product is, for example, a PHT (Post Heat Treatment) treatment. The PHT treatment is a process in which a wafer after the _C OR treatment is heated to vaporize (sublimate) a reaction product such as ammonia fluoroantimonate. In the above deterioration process, the temperature of the above-mentioned tantalum oxide film may be 35 °C. Further, in the above-described deterioration process, the partial pressure of the hydrogen fluoride gas in the mixed gas may be 15 mT 〇 rr (about 2.00 Pa) or more. Further, in the above-described deterioration process, the partial pressure of the ammonia gas in the mixed gas may be set to be smaller than the partial pressure of the hydrogen fluoride gas. The etching amount of the reaction product may be 30 nm or more. φ The above-mentioned tantalum oxide film may be formed by a CVD method. Further, the above-mentioned tantalum oxide film may be formed by using a BPS G film or a tantalum oxide film formed by a bias high-density plasma CVD method. And, by the present invention, a recording medium is provided which is a recording medium on which a program executable by a control unit of a processing system is recorded, wherein the program is executed by the control computer, thereby The processing system performs the etching method of any of the above. 1333674 [Effect of the Invention] According to the present invention, it is possible to efficiently etch various tantalum oxide films in accordance with the type of each of the sand oxide films. Since no plasma is used, there is no need to worry about the wafer being damaged by the charging caused by the plasma. Don't worry about bad effects on other parts than the object being etched. By the structure of the W, the needle circle, the first form of the first plate 0 of the crystal first place, the best method of the best method, the enlightenment of the hungry hair and the description of the style of the body > the state of the lower form Real [this is to be explained. Fig. 1 is a schematic cross-sectional view showing a wafer W in the middle of a manufacturing process of a DRAM (Dynamic Random Access Memory) as a semiconductor device, showing a part of the surface (device forming surface) of the wafer W. The wafer W is, for example, a tantalum wafer constituting a thin disk-shaped thin plate, and a BPSG (Born-Doped Phospho Silicate Glass) film 101 belonging to an insulating film is formed on the surface of the Si (germanium) layer 100. • The BPSG film 101 is a tantalum oxide film (cerium oxide (Si〇2)) to which boron (B) and phosphorus (P) are added. The BPSG film 101 is a CVD-based tantalum oxide film formed on the surface of the wafer W by a thermal CVD method in a CVD (Chemical Vapor Deposition) device or the like. On the upper surface of the BPSG film 101, the gate portions G having the gate electrodes are arranged in parallel. Each of the gate portions G is provided with a gate electrode 1 〇 2, a hard mask layer 103, and a side wall portion (side wall) 1〇4. The gate electrode 102 is, for example, a poly-S i (polysilicon) layer. The gate electrode 1 〇 2 is formed side by side on the B P S G film 102. On each of the P〇ly-Si layers (gate electrodes 102), an example 1333674 such as a WSi (tungsten-deposited) layer 1〇5 is formed. The hard mask layer 1〇3 is made of an insulator such as SiN (tantalum nitride). Hard mask layers 103 are each formed over the WSi layer 105. The side wall portion 104 is an insulator such as a SiN film. The side wall portion 1 〇 4 is formed on both sides of each of the covering layers ο 1 y _ S i (gate electrode 1 0 2 ), the WSi layer 105, and the hard mask layer 103. The lower end portion of the SiN film (side wall portion 104) is formed to be in contact with the upper surface of the BPSG film 101. Further, for example, an HDP-SiO 2 film (tantalum oxide film) 110 is formed over the BPSG film 101 so as to cover the entire BPSG film 101 and each of the gate portions G. The HDP-SiO 2 film 110 is a CVD-based tantalum oxide film (plasma CVD oxide film) formed by a bias high-density plasma CVD method (HDP-CVD method), and is used as an interlayer insulating film. Further, although both of the HDP-Si 2 film 110 and the BPSG film 101 are CVD-based oxide films, the HDP-SiO 2 film 110 has a higher density than the BPSG film 101 and is a hard material. A film is not formed on the surface of the HDP-SiO 2 film 110, and it is exposed. In the HDP-SiO2 film 1 10, a contact hole is formed between the SiN films (side wall portions 104) between the two gate portions G (each gate portion G). The contact hole is formed to penetrate from the upper surface of the HDP-Si 2 film 1 10 to the BPSG film 101. On the inner side of the contact hole, the upper portion of the hard mask layer 1〇3 of each gate portion G and the SiN film (side wall portion 1 〇 4) which are disposed to be adjacent to each other are exposed. At the bottom of the contact hole, the surface of the BPSG film 101 is exposed. The contact hole is selected by anisotropic etching of the HDP-Si02 by, for example, plasma etching or the like, by the SiN film (side wall portion 1 〇 4 ) of the gate portion G and the hard mask layer -10- 1333674 103 . The film 110 is 'formed. Next, a processing system for performing etching processing of the BPSG film 101 exposed to the bottom portion of the contact hole 上述 on the wafer W will be described. The processing system 1 shown in FIG. 2 is a loading/unloading unit 2 for loading and unloading the wafer W into the processing system 1, and two loading lock chambers 3 provided adjacent to the loading/unloading unit 2, each adjacent to the loading lock. The chamber 3 is installed, and the φ PHT processing apparatus 4 that performs the PHT (Post Heat Treatment) treatment process as a heating process is disposed adjacent to each of the PHT processing apparatuses 4, and the COR (Chemical Engineering) is used as a deterioration engineering. The COR processing unit 5 of the Oxide Removal process is provided as a control computer 8 for supplying control commands to the respective units of the processing system 1. With respect to each of the load lock chambers 3, the respective PHT processing apparatus 4 and COR processing apparatus 5 are connected in parallel in this order from the side of the load lock chamber 3 in this order. The loading/unloading unit 2 is a transport chamber 1 2 having a first wafer transport mechanism 1 that transports a wafer W having a substantially disk shape therein. Wafer Handling Φ The mechanism 11 is provided with two carrying arms na and 1 1 b that hold the wafer w slightly horizontal. On the side of the transfer chamber 12, for example, three carriers 13a on which a plurality of wafers W can be accommodated are mounted. Further, a positioner 14 for performing positioning by rotating the wafer W optically to obtain an eccentric amount is provided. In the loading/unloading unit 2, the wafer W is held by the transport arm ua and lib, and is driven by the wafer transport device π, rotated in a horizontal plane, moved forward or lowered, and transported to the desired position. position. In other words, by carrying the transport arm 11a, lib on the carrier i3a on the mounting table 1 and the positioner 14 and the load lock chamber 3, the loading and unloading of the wafer w is performed -11 - 1333674. Each of the load lock chambers 3 is a second wafer transfer mechanism 17 in which the gates 16 are connected to the transfer chamber 12 at each of the load lock chambers 3 and the wafer W is provided. The wafer transfer mechanism 17 has a transfer arm 17a that holds the wafer W slightly horizontal. Further, the inside of the load lock chamber 3 can be evacuated. In the load lock chamber 3 as described above, the wafer W is held by the transport arm 17a, driven by the wafer transport mechanism 17, and rotated, moved forward, or moved in a horizontal plane. Then, the wafer W is carried in and out with respect to the PHT processing apparatus 4 by moving the transport arm 17a to the PHT processing apparatus 4 which is connected in series to each of the load lock chambers 3. Then, the transport arm 17a advances and retracts the COR processing apparatus 5 via the respective PHT processing apparatuses 4, and the wafer W is carried in and out with respect to the COR processing apparatus 5. The PHT processing apparatus 4 is a processing chamber (processing space) 21 having a hermetic structure in which the wafer W is housed. Further, although there is no drawing, a gate valve 22 for switching the loading and unloading port is provided for loading and unloading the wafer W into and out of the processing chamber 21. The processing chamber 21 is connected to the loading chamber 3 via the gate valve 22. As shown in Fig. 3, a mounting table 23 for vertically placing the wafer W is provided in the processing chamber 21 of the PHT processing apparatus 4. Further, a supply mechanism 26 that supplies an inert gas such as nitrogen gas (N2) to the supply path 25 of the processing chamber 21, and an exhaust mechanism 28 that includes the exhaust passage 27 of the exhaust processing chamber 21 are provided. The supply path 25 is connected to a supply source of nitrogen 30. Further, the supply path 25 is provided with a flow rate adjusting valve 31 which can adjust the opening operation of the supply path 25 and the supply flow rate of nitrogen gas. In the exhaust road 2 7 • ♦ An on-off valve 3 is provided, and an exhaust valve 3 3 for performing forced exhaust is provided. Further, each of the gate valve 22, the flow rate adjusting valve 31, the switching valve 3, the exhaust pump 3, and the like of the PHT processing device 4 operates, and the chamber is controlled by controlling the control command of the computer 8. That is, the supply of nitrogen by the supply mechanism 26, the exhaust of the exhaust mechanism 28, and the like are controlled by controlling the computer 8. φ As shown in Fig. 4, the COR processing apparatus 5 is provided with a reaction chamber 40 having a hermetic structure. The inside of the reaction chamber 40 serves as a processing chamber (processing space) 41 for accommodating the wafer w. The inside of the reaction chamber 40 is a processing chamber (processing space) 41 for accommodating the wafer W. Inside the reaction chamber 4, a mounting table 42 on which the wafer W is placed in a slightly horizontal state is provided. Further, the COR processing apparatus 5 is provided with a supply mechanism 43 for supplying gas to the processing chamber 41 and an exhaust mechanism 44 in the exhaust processing chamber 41. A gate valve 54 for opening and closing the wafer w is placed in the side wall portion of the reaction chamber 40 so that the wafer w can be carried in and out of the processing chamber 41. The processing chamber 41 is coupled to the processing chamber 21 via a gate valve 54. On the top surface portion of the reaction chamber 40, a shower head 52 having a plurality of discharge ports for discharging the processing gas is provided. The mounting table 42 is formed in a substantially circular shape in a plan view and is fixed to the bottom of the reaction chamber 40. A temperature regulator 55 that adjusts the temperature of the mounting table 42 is provided inside the mounting table 42. The temperature regulator 55 is provided with a pipe for circulating a liquid for temperature adjustment (e.g., water). By performing heat exchange with the liquid in the inflow line, the temperature of the upper surface of the stage 42 is adjusted, -13 - 1333674, and heat exchange is performed between the stage 42 and the wafer W on the stage 42 to adjust the wafer W. The temperature. Further, the temperature regulator 55 is not limited thereto, and may be, for example, an electric heater that heats the mounting table 42 and the wafer W by resistance heat. The supply unit 43 includes the shower head 52, a fluorinated hydrogen supply path 61 for supplying fluorinated hydrogen gas to the processing chamber 41 (HF), and an ammonia gas supply path 62 for supplying ammonia gas (NH3) to the processing chamber 41. Argon gas (Ar) as an inert gas is supplied to the argon gas supply path 63 of the processing chamber 41, and nitrogen gas (N2) which is an inert gas is supplied to the nitrogen gas supply path 64 of the processing chamber 41. The fluorinated hydrogen supply path 161, the gas supply path 6, the argon supply path 633, and the nitrogen supply path 614 are connected to the shower head 52. In the processing chamber 41, hydrogen fluoride, ammonia gas "argon gas, nitrogen gas" is diffused and discharged through the shower head 52. The hydrogen fluoride gas supply path 61 is a supply source 71 connected to hydrogen fluoride gas. The fluorinated hydrogen supply path 61 is provided with a flow rate adjusting valve 72 that regulates the switching operation of the hydrogen fluoride supply path 61 and the supply flow rate of the fluorinated hydrogen gas. The ammonia supply path 62 is a supply source 73 connected to the ammonia gas. The ammonia supply path 62 is provided with a flow rate adjustment valve 74 that regulates the switching operation of the ammonia supply path 62 and the supply flow rate of the ammonia gas. The ammonia supply path 63 is a supply source 75 connected to argon gas. The argon supply path 63 is provided with a flow rate adjusting valve 76 that can adjust the switching operation of the argon supply path 63 and the supply flow rate of the argon gas. The nitrogen supply path 64 is a supply source 77 connected to nitrogen. The nitrogen supply path 64 is provided with a flow rate adjusting valve 7 that regulates the switching operation of the nitrogen gas supply path 64 and the supply flow rate of nitrogen gas. The exhaust mechanism 44 is provided with an exhaust passage 85 having an on-off valve 82 and a forced exhaust valve 83 for performing a forced discharge of -14 - 1333674. The flow end portion of the exhaust passage 85 is open to the bottom of the reaction chamber 40. Further, the operation of each of the gate valve 54, the temperature regulator 55, the flow rate adjusting valves 72, 74, 76, 78' the on-off valve 72, the exhaust pump 83, and the like of the COR processing device 5 is controlled by the control command of the computer 8. controlled. That is, the supply of hydrogen fluoride, ammonia gas, argon gas, and nitrogen gas by the supply mechanism 43 is performed by the exhaust of the exhaust mechanism 44, and the temperature adjustment of the temperature regulator 55 is controlled by the control computer 8. . Each functional element of the processing system 1 is a control computer 8 that is connected to the entire operation of the automatic control processing system 1 via a signal line. Here, the functional element means that, for example, the above-described wafer transfer mechanism 1 1 and the wafer transfer mechanism are realized! 7. Gate valve 22 of PHT processing device 4, flow regulating valve 31, exhaust pump 33, gate valve 54 of COR processing device 5, temperature regulator 55, flow regulating valve 72, 74, 76, 78, switching valve 72, exhaust All elements of the specific process conditions of pump 83 and the like. The control computer 8 is typically a general-purpose computer that can perform any function depending on the software being implemented. As shown in Fig. 2, the control computer 8 is a computing unit 8a having a CPU (central computing unit), an input/output unit 8b connected to the computing unit 8a, and a recording medium inserted in the input/output unit 8b and storing the control software. 8c. The recording medium 8c is executed by the control computer 8, and a control software (program) for causing the processing system 1 to execute a specific substrate processing method to be described later is recorded. The control computer 8 controls the various functional elements of the processing system 1 by executing the control software to implement various defined process conditions (e.g., pressure of the processing chamber 41) by a specific process processing program. That is, -15-1333674 is supplied with a control command for sequentially executing the COR processing in the COR processing apparatus 5 and the etching method of the PHT processing in the PHT processing apparatus 4, as will be described in detail later. The recording medium 8c can be read by the reading device even if it is fixedly mounted on the control computer 8, or can be detachably mounted on the unillustrated reading device provided on the control computer 8. In the most typical real form, the recording medium 8c is a hard disk drive that is loaded with the control software by the service personnel of the processing system 1 vendor. In other embodiments, the recording medium H 8c is a CD-ROM or a DVD-ROM removable disc such as a write control software. Such a removable disc is read by an optical reading device provided on the computer 8 without a display. Furthermore, the recording medium 8c may be either of RAM (random access memory) or ROM (read only memory). Further, the recording medium 8c may be a cartridge type ROM. That is, any of those known in the technical field of computers can be used as the recording medium 8c. Further, in the factory where the majority of the processing systems 1 are arranged, even if the management computer of the control computer 8 of each processing system 1 is integrated, the storage control software can be stored. At this time, each processing system 1 is operated by the management computer via the communication loop to execute a specific program. Next, a method of processing the wafer W in the processing system 1 configured as described above will be described. First, as shown in Fig. 1, a wafer W in which a contact hole is formed in the HD-Si 2 film 1 10 is carried in the carrier 13a and transported to the processing system 1. In the processing system 1, as shown in FIG. 2, the carrier 13a in which a plurality of wafers W are accommodated is placed on the mounting table 13. A wafer w is taken out from the carrier 13a by the wafer transfer mechanism 11 -16 - 1333674, and is carried into the load lock chamber 3. When the round W is entered into the load lock chamber 3, the load lock chamber 3 is sealed and decompressed. Thereafter, the gate valves 22, 54 are opened, and the load lock chamber 3 and the processing chamber 21 of the PHT processing apparatus 4 which is depressurized with respect to the atmospheric pressure, and the processing chamber 4 of the COR processing apparatus 5 are penetrated each other. The wafer w is carried out from the loading lock chamber 3 by the wafer transfer mechanism 17, and is moved in the order of the loading/unloading port (not shown) of the processing chamber 21, the processing chamber 21, and the loading/unloading port 53. The movement is carried into the processing chamber 41. In the processing chamber 41, the "wafer w is in a state in which the device forming surface is the upper surface" is transferred from the carrying arm 17a of the wafer transporting mechanism 17 to the mounting table 42. When the wafer W is carried in, the transfer arm 17a is withdrawn from the processing chamber 41. When the loading and unloading port 5 3 is closed, the processing chamber 41 is sealed. Then, the COR processing project begins. After the processing chamber 4 1 is sealed, ammonia gas, argon gas, and nitrogen gas are supplied from the ammonia gas supply path 6 2, the argon gas supply path 63, and the nitrogen gas supply path 64' to the processing chamber 41. Further, the pressure in the processing chamber 41 is lower than the atmospheric pressure. Further, the temperature of the wafer W on the mounting table 42 is adjusted to a specific target enthalpy by the temperature regulator 55 (for example, about 35 ° C or so). Thereafter, hydrogen fluoride gas is supplied from the hydrogen fluoride supply path 61 to the processing chamber 41. Here, since the processing chamber 41 is supplied with ammonia gas in advance, the environment of the processing chamber 41 is a processing environment composed of a mixed gas containing hydrogen fluoride and ammonia by supplying hydrogen fluoride gas. As a result, the mixed gas is supplied to the surface of the wafer W in the processing chamber 41, and the wafer W is subjected to -17 - 1333674 COR processing. _ The BPSG film 101 present at the bottom of the contact hole on the surface of the wafer W is chemically reacted with the molecules of the hydrogen fluoride gas and the ammonia gas in the mixed gas by the processing environment of the low pressure state in the processing chamber 41, and is transformed into Reaction product 101' (see Fig. 5). The reaction product 101' is produced by the formation of ammonia fluoroantimonate or water. Further, since the chemical reaction proceeds in an isotropic manner, the chemical reaction proceeds from the bottom of the contact hole to the upper surface of the Si layer, and also above the Si layer, from the immediately below the contact hole to the lateral direction. In the COR process, the supply flow rate of each process gas, the supply flow rate of the inert gas, the exhaust gas flow rate, and the like are adjusted so that the pressure of the mixed gas (treatment environment) in the treatment chamber 4 1 can be maintained at a lower pressure than the atmospheric pressure. Pressure (for example, about 80 mTorr (about 1 0 · 7P a )). Further, the partial pressure of the hydrogen fluoride gas in the mixed gas may be adjusted to be about 15 mTorr or more (about 2. OOPa) or more. Further, as described above, the temperature of the wafer W, that is, the temperature at which the chemical reaction is performed in the BPSG film 101 (the portion where the BPSG film 101 is in contact with the mixed gas (that is, the bottom of the contact hole) The temperature is maintained at a constant temperature of, for example, about 35 ° C or higher. Thereby, the chemical reaction can be promoted, the rate of formation of the reaction product 101' can be increased, and the layer of the reaction product 101' can be rapidly formed. Further, the depth at which the chemical reaction becomes saturated (the distance from the surface of the BPSG film 101 to the position where the chemical reaction is stopped) can be sufficiently deepened. That is, the reaction product 101' reaches the upper surface of the Si layer 100, and the chemical reaction does not stop in the middle, and can be sufficiently carried out. Further, in the reaction product 101', the sublimation point of fluorocarbonic acid ammonia of -18 to 1333674 is 100 ° C, and when the temperature of the wafer W is 100 ° C or more, the reaction product 101' may not be satisfactorily executed. generate. Therefore, the temperature of the wafer W is preferably less than about 1 oot. The depth at which the chemical reaction becomes saturated is dependent on the type of the tantalum oxide film belonging to the object to be modified (in the present embodiment, the BPS G film is 10 1 ), the temperature of the tantalum oxide film (or the contact with the tantalum oxide film). The temperature of the mixed gas), the partial pressure of the hydrogen fluoride in the mixed gas, and the like. In other words, the temperature of the tantalum oxide film and the partial pressure of the hydrogen fluoride gas are adjusted by the type of the oxide film, and the depth of the chemical reaction to the saturation state and the amount of the reaction product 1 〇 1 ' can be controlled. Alternatively, the amount of etching after the PHT treatment described later can be controlled. The chemical reaction becomes a depth of saturation, that is, when the etching amount is applied to the BPSG film 101, the temperature of the BPSG film 101 is adjusted to 35 ° C or higher, and the partial pressure of the hydrogen fluoride gas is adjusted to about 15 mTorr (about 2.00 Pa). The above may be set to be about 30 nm (nanometer) or more. • In the conventional COR process, the temperature of the wafer W is set to be about 30 °C or lower. Further, even if the partial pressure of the fluorinated hydrogen gas in the mixed gas is increased, the chemical reaction is only performed to a depth of every degree. Therefore, the amount of etching by the COR treatment is limited, and the amount of etching that can be surely etched by the primary COR treatment can be set to about 30 nm or less in the BPSG film 101, for example. On the other hand, in the present embodiment, the temperature of the wafer W is set to be higher than the conventional temperature, and is 35t or more, and the partial pressure of the hydrogen fluoride gas in the mixed gas is higher than the conventional one, and is increased to about 15 mT 〇 rr (about 2. OOPa) or more, according to this, it is possible to increase the depth of the chemical reaction to a saturated state of -19 - 1333674, and a sufficient etching amount can be performed even with one COR treatment.
然而，在COR處理中，即使在形成於BPSG膜101之 上方之HDP-Si02膜110中，亦可與混合氣體化學反應。 因此，有可能由於C0R處理而使HDP-Si02膜變質。爲了 抑制該HD-Si02膜110之變質，若將混合氣體中之氨氣之 分壓設爲比氟化氫氣之分壓小即可。即是，若將氨氣之供 給流量設爲比氟化氫氣之供給流量小即可。如此一來，可 以防止化學反應在BPSG膜101活躍進行之間，HDP-SiOz 膜1 10進行化學反應。即是，可以一面抑制HDP-Si02膜 1 10等之變質，一面效率佳選擇性僅使BPSG膜101予以 變質。因此，可以防止HDP-Si02膜110之損傷。如此一 來，藉由調節混合氣體中之氨的分壓，BPSG膜 101和 HDP-Si02 B 1 1〇之間，即是雖然爲相同矽氧化膜但密度 、組成、成膜方法互不相同者之彼此間，可以使化學反應 之反應速度、反應生成物之生成量等設爲互不相同之値， 或是可以將之後詳細說明之PHT處理後之蝕刻量設爲互不 相同者。並且，將氨氣之分壓設爲比氟化氫氣之分壓小之 時的化學反應，應不是藉由BPSG膜101和混合氣體之化 學反應而決定反應生成物1〇1’之生成速度的反應速率控制 ，而是藉由氟化氫氣決定反應生成物1〇1’之生成速度的供 給速率控制反應。 當充分形成反應生成物101’，完成COR處理時，處 理室4 1強制被排氣減壓。依佌，自處理室4 1強制性排出 氟化氫氣或氨氣。當完成處理室41之強制排氣時，搬入 -20-However, in the COR process, even in the HDP-SiO 2 film 110 formed above the BPSG film 101, it is possible to chemically react with the mixed gas. Therefore, it is possible to deteriorate the HDP-SiO 2 film due to the COR treatment. In order to suppress the deterioration of the HD-SiO 2 film 110, the partial pressure of the ammonia gas in the mixed gas may be set to be smaller than the partial pressure of the hydrogen fluoride gas. That is, the supply flow rate of the ammonia gas may be set to be smaller than the supply flow rate of the hydrogen fluoride gas. In this way, it is possible to prevent the chemical reaction from being actively carried out between the BPSG film 101 and the HDP-SiOz film 10 to carry out a chemical reaction. In other words, it is possible to suppress deterioration of the HDP-SiO 2 film 1 10 and the like, and to selectively deteriorate only the BPSG film 101 while having excellent efficiency. Therefore, damage of the HDP-SiO 2 film 110 can be prevented. In this way, by adjusting the partial pressure of ammonia in the mixed gas, the BPSG film 101 and the HDP-SiO 2 B 1 1〇 are the same as the same tantalum oxide film, but the density, composition, and film formation methods are different from each other. The reaction rate of the chemical reaction, the amount of formation of the reaction product, and the like may be different from each other, or the etching amount after the PHT treatment described later may be different from each other. Further, when the partial pressure of the ammonia gas is set to be smaller than the partial pressure of the hydrogen fluoride gas, the reaction rate of the reaction product 1〇1' is determined not by the chemical reaction of the BPSG film 101 and the mixed gas. Rate control, but a feed rate control reaction that determines the rate of formation of the reaction product 1〇1' by hydrogen fluoride gas. When the reaction product 101' is sufficiently formed and the COR treatment is completed, the treatment chamber 41 is forcibly decompressed by the exhaust gas. According to the enthalpy, hydrogen fluoride or ammonia gas is forcibly discharged from the processing chamber 41. When the forced exhaust of the processing chamber 41 is completed, the loading -20-
1333674 搬出口 53則開口 ’晶圓W則藉由晶圓搬運g構 理室41被搬出，並被搬入PHT處理裝置4之處理 如上述般，完成COR處理工程。 在PHT處理裝置4中，晶圓W是使表面當作 狀態下，被載置在處理室21內。當搬入晶圓w時 手臂17a自處理室21退出，處理室21被密閉，開 處理工程。在PHT處理中，一面排氣處理室21內 對處理室21內供給高溫之加熱器體，處理室21內 則上昇。依此，加熱藉由上述COR處理所產生之 成物101’而使予以氣化，並自接觸孔Η之下方通 孔Η內，被排出至HDP-Si02膜之外側（晶圓W之 。即是，如第6圖所示般，藉由自BPSG膜101除 生成物101 ’，在Si層100之上方，形成與接觸孔 部連通之空間H’。如此一·來，於COR處理後，可 執行 PHT處理，除去反應生成物101’，等方性 BPSG 膜 1 0 1。 如此一來，藉由於COR處理之後實施PHT處 可以將BPSG膜101蝕刻至特定深度。並且，在上 處理中，因對於屬於矽氧化膜之HDP-Si〇2膜1 η 生若干與混合氣體的化學反應，故HDP-Si〇2膜1 變質，產生少量之反應生成物。但是，如上述般 膜101和HDP-Si〇2膜1 10是反應生成物之生成量 同，在HDP-Si02膜110中生成反應生成物之深虔 在BPSG膜101中生成反應生成物101’之深度是非 17自處 室21。 ?上面之 :，搬運 始PHT 丨，一面 丨之溫度 反應生 .過接觸 .外部） :去反應 Η之底 '以藉由 乾蝕刻 :理，則 述COR )，也發 1 0表面 ，BPSG :互不相 :，比起 常少。 -21 - 1333674 因此，藉由PHT處理，自HDP-Si〇2膜110除去反應生成 物之深度，即是HDP-Si02膜110之蝕刻量，是被抑制成 比起BPSG膜110之蝕刻量非常少之量。如此一來，藉由 在COR處理中將混合氣體中之氨氣之分壓調節成比氟化 氫氣之分壓小，則可以各調節矽氧化膜（BPSG膜10、 HDP-Si02膜110)之PHT處理後之蝕刻量。即是，可以 調節蝕刻選擇比。在本實施形態中，相對於HDP-Si02膜 110等之其他構造，可以提高BPSG膜101之蝕刻選擇比 〇 當完成PHT處理時，停止加熱氣體之供給，PHT處理 裝置4之搬入搬出口被打開。之後，晶圓W是藉由晶圓搬 送機構17自處理室21被搬出，而返回至裝載鎖定室3。如 此一來，完成PHT處理'裝置4中之PHT處理工程。 晶圓W回至裝載鎖定室3，裝載鎖定室3密閉之後， 使裝載鎖定室3和搬送室1 2連通。然後，藉由晶圓搬送 機構11，自裝載鎖定室3搬出晶圓W，返回至載置台13 上之載體13a。如上述般，完成處理系統1中之一連串蝕 刻處理工程。 並且’在處理系統1中’完成蝕刻處理之後的晶圓W ，是在其他處理系統中，被搬入至例如CVD裝置等之成 膜裝置，對晶圓W執行例如藉由CVD法等之成膜處理》 如此之成膜處理中，是如第7圖所示般，以埋入接觸孔Η 及空間Η ’之方式執行成膜。依此，在接觸孔η及空間η ’ 內形成電容。電容C是在閘極部G之間，形成能夠貫通 -22- 1333674 HDP-Si02膜110及BPSG膜101，電容器C之·下端部是 空間H’內連接於Si層100之上面。 若藉由如此之處理系統1，不使用電漿，可以有效 乾蝕刻BPSG膜101。因此，不用擔心因電漿所引起之 電損傷等，對形成於晶圓W上之B P S G膜1 0 1以外之其 構造（膜或層）造成壞影響。再者，藉由各調節氟化氫 之分壓及BPSG膜101之溫度，可以提升COR處理工程 參 化學反應對BPSG膜101之速度，再者，可以使在COR 理工程中化學反應成爲飽和狀態之深度充分變深。因此 可以提升COR處理工程之通過量，並且提升BPSG膜1 之蝕刻量。即使不多次重複COR處理工程和PHT處理 程，亦可以一次取得充分之蝕刻量。 以上，雖然針對本發明之最佳實施形態予以說明， 是本發明並不限定於該些例。若爲該項技術者，在申請 利範圍中所記載之技術性思想之範疇下，當然可以想到 φ 種變形例或是修正例，針對該些變形例或是修正例當然 屬於本發明技術範圍內。 氟化氫氣或氨氣之外，被供給至處理室41之氣體 種類，並不限定於以上之實施形態。例如，被供給置處 室4 1之惰性羽j體即使僅爲急氣亦可。再者，如此之惰 氣體即使爲其他惰性氣體’例如氦（He)、氣（Xe)中 任一者亦可’或是混合鐘氣、氮氣、氦氣、氛氣中之2 類以上之氣體亦可。 處理系統1之構造並不限定於以上實施形態所示者 在 率 充 他 氣 中 處 » 0 1 工 但 專 各 也 的 理 性 之 種 -23- 1333674 有 系 運 運 統 定 97 藉 裝 膜 後 矽 於 板 於 之 孔 法 例如，COR處理裝置、PHT處理裝置之外，即使爲具備 成膜裝置之處理系統亦可。例如，如第8圖所示之處理 統90般，即使成爲將具備有晶圓搬運機構91之共通搬 室92，經裝載鎖定室93對搬運室12連結，在該共通搬 室92周圍，配設COR處理裝置95、ΡΗΤ處理裝置96 例如CVD裝置等之成膜裝置的構成亦可。在該處理系 90中，藉由晶圓搬運機構91，將晶圓W相對於裝載鎖 室92、COR處理裝置95、ΡΗΤ處理裝置96、成膜裝置 各被搬入搬出。共通搬運室92內爲可抽真空。即是， 由使共通搬運室92內成爲真空狀態，不使自ΡΗΤ處理 置96搬出之晶圓W接觸於大氣中之氧，可以搬入至成 裝置97。因此，可以防止自然氧化膜附著於ΡΗΤ處理 之晶圓W，可以最佳執行成膜（電容c之形成）。 在以上之實施形態中，雖然例示屬於半導體晶圓之 晶圓W當作具有矽氧化膜之基板，但是基板並不限定 此，即使爲其他種類者，例如L C D基板用玻璃、C D基 、印刷基板、陶瓷基板等亦可。 再者，在處理系統1被處理之基板構造，並不限定 以上實施形態中所說明者。又，在處理系統1中被實施 蝕刻並不限定於實施形態般用以在形成電容C前對接觸 Η之底部執行者，本發明可以適用於各種類型之蝕刻方 處理系統1中成爲施予蝕刻對象物之矽氧化膜也不限 定於BPSG膜，例如即使爲HDP-Si02膜1 10膜等、其他 1333674 種類之矽氧化膜亦可。於此時，因應矽氧化膜之種類’調 節COR處理工程之矽氧化膜之溫度，及混合氣體中之氟 * 化氫氣之分壓，依此可以調節反應生成物成爲飽和狀態之 深度、蝕刻量。尤其，可比在以往之自然氧化膜或化學氧 化膜中所執行之蝕刻方法，更加深反應生成物成爲飽和狀 態之深度，再者提升蝕刻量。 再者，針對形成在基板之CVD矽氧化膜，該CVD系 φ 氧化膜之成膜所使用之CVD法之種類並不特別限定。例 如，即使爲熱CVD法、常壓CVD法 '減壓CVD法、電漿 C V D法等亦可。 並且，本發明亦可以適用 CVD系氧化膜以外之矽氧 化膜，例如自然氧化膜、藉由光阻除去工程等中之藥液處 理而所產生之化學氧化膜、藉由熱氧化法所形成之熱氧化 膜等之矽氧化膜之矽氧化膜之蝕刻。即使在如此之CVD 矽氧化膜以外之矽氧化膜，亦可以藉由調節COR處理中 φ 之氟化氫氣之分壓和矽氧化膜之溫度，增減蝕刻量。 例如，在之前的處理工程（光阻除去工程等）中被處 理後’至執行下一個處理工程（成膜工程）之期間，長時 間放置晶圓W，即使在晶圓W上形成厚自然氧化膜之時 ’亦可以於執行下一個處理工程之前，藉由執行本發明所 涉及之蝕刻方法所產生之自然氧化膜之除去工程，則可以 充分除去自然氧化膜。因此，於完成之前的處理工程後， 可延長至實施自然氧化膜之除去工程或實施下一個處理工 程的等待時間。因此，可以使管理時間（Q-time )持有自 -25- 1333674 由度。 並且’在晶圓W上混有自然氧化膜和層間絕緣膜等 之外的矽氧化膜（BPSG )等，於僅除去自然氧化膜之時 ，在COR處理中’若使晶圓W之溫度變低，或將混合氣 體中之氟化氫氣之分壓調節成較低即可。例如，使晶圓W 之溫度成爲大約3 0 °C以下，使混合氣體中之氟化氫氣之分 壓大約成15mTorr(大約爲2.00Pa)以下亦可。依此，可 以一面抑制層間絕緣膜等之其他矽氧化膜之變質，一面效 率佳使自然氧化膜變質。即是，可以一面抑制其他構造之 損傷，一面效率佳除去自然氧化膜。 當作在晶圓上混有自然氧化膜和其他種類之矽氧化膜 等者，則有例如第9圖所示之構造。在第9圖中，在晶圓W， 之表面形成有Si層150，在其上面，兩個並列設置有具有 閘極電極1 5 1之閘極部G ’。各閘極部G ’具備有閘極電極1 5 1 (Si02層）、硬罩幕（HM)層152(SiN)及側壁部（邊 牆）153。即是’在Si層150之上面，形成有屬於閘極氧化 膜之兩個Si〇2膜155，在各Si 〇2膜155之上面，各形成有當 作閘極電極151之Poly-Si層，在各P〇ly-Si層（閘極電極 151)之上面’各形成有SiN層（硬罩幕（FM)層152) »1333674 The exit port 53 is opened. The wafer W is carried out by the wafer transfer g process chamber 41 and is carried into the PHT processing apparatus 4. As described above, the COR process is completed. In the PHT processing apparatus 4, the wafer W is placed in the processing chamber 21 with the surface as a state. When the wafer w is loaded, the arm 17a is withdrawn from the processing chamber 21, and the processing chamber 21 is sealed and opened for processing. In the PHT process, a heater body having a high temperature is supplied to the inside of the processing chamber 21 in the exhaust gas treatment chamber 21, and the inside of the processing chamber 21 rises. Accordingly, the object 101' produced by the COR treatment is heated and vaporized, and is discharged into the outside of the HDP-SiO2 film from the underside of the contact hole (wafer W). As shown in Fig. 6, by removing the product 101' from the BPSG film 101, a space H' communicating with the contact hole portion is formed above the Si layer 100. Thus, after the COR process, The PHT treatment can be performed to remove the reaction product 101', the isotropic BPSG film 1 0 1. Thus, the BPSG film 101 can be etched to a specific depth by performing the PHT after the COR treatment, and, in the upper process, Since the HDP-Si〇2 film 1 η is chemically reacted with the mixed gas, the HDP-Si〇2 film 1 is degraded, and a small amount of the reaction product is produced. However, the film 101 and HDP are as described above. The -Si〇2 film 1 10 is the same as the amount of formation of the reaction product, and the depth of the reaction product is formed in the HDP-SiO 2 film 110. The depth of the reaction product 101' formed in the BPSG film 101 is the non-17-part chamber 21. ? The above:, the beginning of the PHT 搬运, one side of the temperature response. Over contact. External) : Go to the bottom of the reaction. ' By dry etching: COR, then COR), also emits 10 surface, BPSG: no phase: no less than usual. -21 - 1333674 Therefore, the depth of the reaction product is removed from the HDP-Si 2 film 110 by the PHT treatment, that is, the etching amount of the HDP-SiO 2 film 110 is suppressed to be much larger than the etching amount of the BPSG film 110. A small amount. In this way, by adjusting the partial pressure of the ammonia gas in the mixed gas to be smaller than the partial pressure of the hydrogen fluoride in the COR process, the PHT of the tantalum oxide film (BPSG film 10, HDP-SiO 2 film 110) can be adjusted each. The amount of etching after processing. That is, the etching selection ratio can be adjusted. In the present embodiment, the etching selection ratio of the BPSG film 101 can be increased with respect to the other structure such as the HDP-SiO 2 film 110. When the PHT processing is completed, the supply of the heating gas is stopped, and the loading and unloading port of the PHT processing apparatus 4 is opened. . Thereafter, the wafer W is carried out from the processing chamber 21 by the wafer transfer mechanism 17, and is returned to the load lock chamber 3. As a result, the PHT processing in the PHT process 'device 4 is completed. The wafer W is returned to the load lock chamber 3, and after the load lock chamber 3 is sealed, the load lock chamber 3 and the transfer chamber 12 are communicated. Then, the wafer transfer mechanism 11 carries out the wafer W from the load lock chamber 3 and returns to the carrier 13a on the mounting table 13. As described above, one of the series of etching processes in the processing system 1 is completed. Further, the wafer W after the completion of the etching process in the processing system 1 is carried into a film forming apparatus such as a CVD apparatus in another processing system, and the film W is formed by, for example, a CVD method. In the film formation process as described above, as shown in Fig. 7, the film formation is performed so as to embed the contact hole Η and the space Η '. Accordingly, a capacitance is formed in the contact hole η and the space η '. The capacitor C is formed between the gate portions G so as to penetrate the -22- 1333674 HDP-SiO 2 film 110 and the BPSG film 101, and the lower end portion of the capacitor C is connected to the upper surface of the Si layer 100 in the space H'. If the system 1 is treated as such, the BPSG film 101 can be effectively dry etched without using plasma. Therefore, there is no fear of electrical damage or the like caused by the plasma, which adversely affects the structure (film or layer) other than the B P S G film 1 0 1 formed on the wafer W. Furthermore, by adjusting the partial pressure of hydrogen fluoride and the temperature of the BPSG film 101, the speed of the COR process engineering chemical reaction to the BPSG film 101 can be increased, and further, the chemical reaction can be made saturated in the COR process. Fully deepen. Therefore, the throughput of the COR processing project can be improved, and the etching amount of the BPSG film 1 can be increased. Even if the COR processing project and the PHT process are not repeated many times, a sufficient amount of etching can be obtained at one time. Although the preferred embodiments of the present invention have been described above, the present invention is not limited to the examples. For those skilled in the art, it is of course possible to think of variants or modifications in the scope of the technical idea described in the scope of application, and it is of course within the scope of the present invention to modify or modify the modifications. . The type of gas supplied to the processing chamber 41 other than the hydrogen fluoride gas or the ammonia gas is not limited to the above embodiment. For example, the inert feather body to be supplied to the chamber 4 1 may be only an emergency gas. Furthermore, such an inert gas may be a gas of two or more types of a mixture of a gas, a nitrogen gas, a helium gas, and a gas, even if it is another inert gas such as helium (He) or gas (Xe). Also. The structure of the processing system 1 is not limited to those shown in the above embodiments. The rationality of the work is 0 + 1 1 but the specialized rationality of the work is -23- 1333674. The hole method of the plate, for example, a COR processing device or a PHT processing device, may be a processing system including a film forming device. For example, in the same manner as the processing system 90 shown in FIG. 8, even if the common transfer chamber 92 including the wafer transfer mechanism 91 is connected to the transfer chamber 12 via the load lock chamber 93, it is arranged around the common transfer chamber 92. The configuration of the film forming apparatus such as the COR processing apparatus 95 and the ΡΗΤ processing apparatus 96 such as a CVD apparatus may be employed. In the processing system 90, the wafer W is carried into and out of the loading lock chamber 92, the COR processing device 95, the helium processing device 96, and the film forming apparatus by the wafer transfer mechanism 91. The inside of the common transfer chamber 92 is evacuated. In other words, by bringing the inside of the common transfer chamber 92 into a vacuum state, the wafer W that has not been carried out by the self-twisting treatment unit 96 is brought into contact with the oxygen in the atmosphere, and can be carried into the forming device 97. Therefore, it is possible to prevent the natural oxide film from adhering to the wafer W to be processed, and it is possible to optimally perform film formation (formation of the capacitor c). In the above embodiment, the wafer W belonging to the semiconductor wafer is exemplified as the substrate having the tantalum oxide film. However, the substrate is not limited thereto, and even other types such as glass for LCD substrates, CD-based, and printed substrates are used. Ceramic substrates, etc. are also available. Further, the substrate structure to be processed by the processing system 1 is not limited to the one described in the above embodiment. Further, the etching performed in the processing system 1 is not limited to the embodiment. The present invention can be applied to the bottom of the contact crucible before forming the capacitor C. The present invention can be applied to various types of etching processing systems 1 to be subjected to etching. The tantalum oxide film of the object is not limited to the BPSG film, and may be, for example, an HDP-SiO 2 film 1-10 film or the like, and other 1333674 type ruthenium oxide films. At this time, depending on the type of the ruthenium oxide film, the temperature of the ruthenium oxide film in the COR treatment process and the partial pressure of the fluorinated hydrogen gas in the mixed gas are adjusted, whereby the depth of the reaction product to be saturated and the amount of etching can be adjusted. . In particular, the etching method performed in the conventional natural oxide film or chemical oxide film can further deepen the depth of the product into a saturated state, and further increase the etching amount. Further, the type of CVD method used for film formation of the CVD system φ oxide film is not particularly limited with respect to the CVD ruthenium oxide film formed on the substrate. For example, it may be a thermal CVD method, a normal pressure CVD method, a reduced pressure CVD method, a plasma C V D method, or the like. Further, in the present invention, a ruthenium oxide film other than a CVD-based oxide film, for example, a natural oxide film, a chemical oxide film produced by a chemical treatment in a photoresist removal process, or the like, may be applied by a thermal oxidation method. Etching of a tantalum oxide film of a tantalum oxide film such as a thermal oxide film. Even in the case of the tantalum oxide film other than the CVD tantalum oxide film, the etching amount can be increased or decreased by adjusting the partial pressure of the hydrogen fluoride gas of φ in the COR treatment and the temperature of the tantalum oxide film. For example, after being processed in the previous processing project (photoresist removal engineering, etc.), the wafer W is placed for a long time during the execution of the next processing project (film formation process), even if a thick natural oxidation is formed on the wafer W. At the time of the film, the natural oxide film can be sufficiently removed by performing the removal process of the natural oxide film produced by the etching method according to the present invention before the next process is performed. Therefore, after the completion of the previous processing, the waiting time for the removal of the natural oxide film or the execution of the next processing project can be extended. Therefore, the management time (Q-time) can be held from -25 to 1333674 degrees. Further, 'the surface of the wafer W is mixed with a tantalum oxide film (BPSG) other than a natural oxide film or an interlayer insulating film, etc., and when only the natural oxide film is removed, the temperature of the wafer W is changed during the COR process. Low, or the partial pressure of the hydrogen fluoride in the mixed gas can be adjusted to be low. For example, the temperature of the wafer W may be set to about 30 ° C or lower, and the partial pressure of the hydrogen fluoride gas in the mixed gas may be about 15 mTorr (about 2.00 Pa) or less. According to this, it is possible to suppress the deterioration of the other oxide film such as the interlayer insulating film, and to improve the natural oxide film while improving the efficiency. That is, it is possible to remove the natural oxide film with high efficiency while suppressing damage to other structures. For example, a structure in which the natural oxide film and other types of tantalum oxide film are mixed on the wafer is as shown in Fig. 9. In Fig. 9, a Si layer 150 is formed on the surface of the wafer W, and a gate portion G' having a gate electrode 151 is disposed in parallel on the upper surface. Each of the gate portions G' includes a gate electrode 15 1 (SiO 2 layer), a hard mask (HM) layer 152 (SiN), and a side wall portion (side wall) 153. That is, 'on the Si layer 150, two Si〇2 films 155 belonging to the gate oxide film are formed, and on each of the Si〇2 films 155, a Poly-Si layer as the gate electrode 151 is formed. A SiN layer (hard mask (FM) layer 152) is formed on each of the P〇ly-Si layers (gate electrode 151).
然後’在各Si〇2膜155、Poly-Si層（閘極電極151) 、SiN 層（硬罩幕（HM)層152)之兩側，各形成有由絕緣體所 構成之側壁部153。並且’以覆蓋該些兩個閘極部G，之方 式’形成屬於層間絕緣膜之BSPG膜156，在BPSG膜156之 上面’形成有PE-Si02膜157。該PE-Si02膜157爲使用電漿 1333674 CVD ( PECVD ： Plasma Enhanced CVD)法 M 所形成之 CVD系之氧化膜。在兩個閘極部G’之間（側壁部153之間 • )，以貫通PE_Si02膜157和BPSG膜156之方式，形成有接 觸孔Η。在接觸孔Η之底部，露出Si層150，在該Si層150形 成有自然氧化膜160。即是，在該構造中，混有3種類之矽 氧化膜，即是自然氧化膜160、BPSG膜156及PE-Si02膜157 。即使於自如此之晶圓W’除去自然氧化膜1 60之時，亦可 φ 以藉由適當調節晶圓W’之溫度和混合氣體中之氟化氫氣之 分壓，抑制BPSG膜156及PE-Si02膜157之損傷（CD移位） ，選擇性除去自然氧化膜160。再者，若因應自然氧化膜 160之厚度，調節晶圓W’之溫度和混合氣體中之氟化氫氣 之分壓時，即使長期間被放置而形成厚自然氧化膜1 60， 亦可以確實除去。並且，於對如此之晶圓W ’除去自然氧化 膜160之後所執行之電容形成（成膜處理）中，藉由自露 出於接觸孔Η底部之Si層150除去自然氧化膜160，則可以 φ 確實將電容器之下端部連接於Si層150。 [實施例] (實驗1 ) 本發明者是進行硏究對矽氧化膜執行蝕刻之時的COR 處理工程中之條件的實驗1。實施蝕刻之對象物，爲藉由 熱氧化法所形成之熱氧化膜（Si02膜）。然後，各測量將 晶圓w之溫度設爲25°c、30°c、35°c、4〇t：之時的氟化 氫氣之分壓和鈾刻量之關係。氟化氫氣之分壓是在 -27- 1333674 5mTorr (大約 〇.67Pa)至 35mTorr (大約 4.67Pa)之間變 化。將其結果表不於第10圖之曲線圖。如第10圖所示般 ，將晶圓W之溫度設爲2 5 °C之時，蝕刻量最多的爲將氟 化氫氣之分壓設爲大約lOmTorr (大約1.33Pa)之時，此 時之餘刻量大約爲35nm。然後，成爲將氧化氫氣之分壓 設爲比大約lOmTorr (大約1.33Pa)越低時則蝕刻量越減 少，再者越高時蝕刻量越減少之結果。晶圓 W之溫度設 爲3 0°C之時，蝕刻量最多是在將氟化氫氣之分壓設爲大約 3 0mT〇rr (大約4.00Pa)之時，此時之蝕刻量大約爲40ηπι 左右。將晶圓W之溫度設爲35 °C之時，越增高氟化氫氣 之分壓^越增加触刻量。氟(化氣氣之分壓成爲至20mTorr (大約2.67PO左右，是比起將晶圓W之溫度設爲25°C 、3 0 °C之時，雖然飩刻量少，但是當氟化氫氣之分壓成爲 25mTorr (大約3.33Pa )左右以上時，蝕刻量則比將晶圓 W之溫度設爲25 °C、30 °C之時多。蝕刻量最多是在將氟 化氫氣之分壓設爲大約35mTorr (大約4.67Pa)之時，此 時之蝕刻量爲大約50nm左右。於將晶圓W之溫度設爲40 °C之時，也與設爲35 °C之時相同，越增高氟化氫氣之分壓 ，越增加蝕刻量。氟化氫氣之分壓成爲至30mT〇rr (大約 4.00Pa)左右，比起將晶圓W之溫度設爲25°C ' 30°C之 時，雖然蝕刻量少，但是當氟化氫氣之分壓成爲30mT〇rr (大約4.00Pa )左右以上時，蝕刻量則比將晶圓 W之溫 度設爲25°C、30 °C之時多。餓刻量最多是在將氣化氣氣之 分壓設爲大約35mTorr (大約4.67Pa)之時，此時之蝕刻 1333674 量爲大約40nm左右。由上述結果可知取得大‘約35nm左 右以上之蝕刻量。 (實驗2 ) 本發明者進行硏究對矽氧化膜執行蝕刻時之COR處 理工程之條件的實驗2。實施蝕刻之對象物，爲藉由電漿 CVD法所形成之電漿CVD氧化膜（Si02膜）。然後，各 φ 測量將晶圓W之溫度設爲2 5 °C、3 0 °C、3 5 °C、4 0 °C之時 的氟化氫氣之分壓和蝕刻量之關係。氟化氫氣之分壓是在 5mTorr (大約 0.67Pa)至 35mTorr (大約 4.67Pa)之間變 化。將其結果表示於第1 1圖之曲線圖。如第1 1圖所示般 ，將晶圓 W之溫度設爲2 5 t之時，蝕刻量最多的爲將氟 化氫氣之分壓設爲大約20mTorr (大約2.67Pa)之時，此 時之蝕刻量大約爲3 Onm。然後，成爲將氟化氫氣之分壓 設爲比大約20mTorr (大約2.67Pa )越低時則蝕刻量越減 φ 少，再者越高時蝕刻量越減少之結果。晶圓W之溫度設 爲3 (TC之時，蝕刻量最多是在將氟化氫氣之分壓設爲大約 30mTorr (大約4.00Pa)之時，此時之蝕刻量大約爲35nm 左右。將晶圓W之溫度設爲3 5 °C之時，越增高氟化氫氣 之分壓，越增加蝕刻量。氟化氫氣之分壓成爲至25mTorr (大約3.33Pa)左右，是比起將晶圓W之溫度設爲25°C 、3 0 °C之時，雖然蝕刻量少，但是當氟化氫氣之分壓成爲 3 0 m T 〇 r r (大約4 · Ο Ο P a )左右以上時，蝕刻量則比將晶圓 W之溫度設爲25 °C、30 °C之時多。蝕刻量最多是在將氟 -29- —1333674 化氫氣之分壓設爲大約35mTorr (大約4.67Pa)之時，此 時之蝕刻量爲大約40nm以上。於將晶圓W之溫度設爲40 °C之時，也與設爲35 °C之時相同，越增高氟化氫氣之分壓 ，越增加蝕刻量。蝕刻量最多是在將氟化氫氣之分壓設爲 大約35mTorr (大約4.67Pa)之時。 (實驗3 ) 本發明者進行COR處理中使混合氣體中之氟化氫氣 之分壓和氨氣之分壓變化之時，比較對各種材料的蝕刻量 的實驗3。執行蝕刻之對象物爲Poly-Si、SiN、電漿CVD 氧化膜、熱氧化膜之4種類。作爲混合氣體，是使用混合 氟化氫氣、氨氣、氬氣之3種類之氣體。然後，對於各對 象物，在以下之4個條件A、B'C、D(參照第12圖）， 各執行C0R處理，之後執行PHT。然後，測量PHT處理 厚之反應生成物之除去量，即是蝕刻量。並且，算出蝕刻 量之平均値、標準偏差等。 (條件A ) 將混合氣體全體之壓力（Press)設爲40mTorr (大約 5.33Pa )，將氟化氫氣之分壓及氨氣之分壓各設爲 18mTorr (大約2.40Pa)。即是，將氟化氫氣之分壓和氨 氣之分壓設爲相同値。 (條件B ) -30- 1333674 將混合氣體之壓力設爲8〇mT〇rr( 氟化氫氣之分壓設爲26.7mTorr (大約 ' 分壓設爲 15.2mTorr (約 2.03Pa)。即 設爲比氟化氬氣之分壓低。 (條件C ) 將混合氣體之壓力設爲80 mTorr ( φ 氟化氫氣之分壓和氨氣之分壓各設爲爲 3.5 6 Pa )。即是，藉由一面使混合氣體 氫氣之分壓與條件B相同，一面減少氬 之分壓上昇，使氟化氫氣之分壓和氨氣 (條件D ) 將混合氣體之壓力設爲80mT〇rr( 9 氟化氫氣之分壓設爲32.9mTorr (大約 分壓設爲 18_8mTorr (約 2.51Pa)。即 比條件B減少，並使氟化氫氣之分壓和 件B上昇，並且使氨氣之分壓比氟化氫 將以上實驗3之條件表示於第12 果表示於第12圖之表及第13圖之曲縛 所示般，在任一條件A至D中，針對調 熱氧化膜，比起Poly-Si、SiN蝕刻量是 關於電漿CVD氧化膜、熱氧化膜，確 大約 1 0.7Pa )，將 3.56Pa)，氨氣之 是’將氨氣之分壓 大約1 0.7 P a )，將 26.7mTorr (大約 全體之壓力及氣化 氣之分壓，使氨氣 之分壓成爲相同値 大約10.7Pa)，將 4.39Pa)，氨氣之 是，使氬氣之分壓 氨氣之分壓各比條 氣之分壓小。 圖，將實驗3之結 [圖上。如第1 3圖 i漿CVD氧化膜、 取得更多蝕刻量， 實取得高蝕刻選擇 -31 - 1333674 比。再者，Poly-Si、SiN之蝕刻量雖然在任一條件A至D 中皆幾乎不改變，但是電漿CVD氧化膜、熱氧化膜之蝕 刻量是條件B、C、D比A更多。電漿CVD氧化膜之蝕刻 量比較多的是C、D。再者，電漿CVD氧化膜之蝕刻量對 熱氧化膜之蝕刻量的比率最少的爲條件B，電漿CVD氧化 膜之蝕刻量對熱氧化膜之蝕刻量的比率最多爲條件C。藉 由上述結果，可知對於混有電漿CVD氧化膜和熱氧化膜 之晶圓，於欲一面防止電漿CVD氧化膜之蝕刻，一面選 擇性僅蝕刻熱氧化膜之時，則以將COR處理中之混合氣 體狀態設爲條件B，即是將氨氣之分壓設爲比氟化氫氣之 分壓小的狀態爲佳。 [產業上之利用可行性] 本發明是可以適用於蝕刻方法及記錄媒體。 【圖式簡單說明】 第1圖是表示執行B P S G膜之蝕刻之前的晶圓表面之 構造的槪略縱剖面圖。 第2圖是處理系統之槪略平面圖。 第3圖是表示PHT處理裝置之構成的說明圖。 第4圖是表示COR處理裝置之構成的說明圖。 第5圖是表示C OR處理後之晶圓狀態的槪略縱剖面 圖。 第6圖是表示PHT處理後之晶圓狀態的槪略縱剖面圖 13.33674 第7圖是表示成膜處理後之晶圓狀態的槪略縱剖面圖 〇 第8圖是另外實施形態所涉及之處理系統之槪略縱剖 面圖。 第9圖是表示另外實施形態所涉及之晶圓表面構造之 槪略縱剖面圖。 第10圖是表示實驗1之實驗結果的曲線圖。 第11圖是表示實驗2之實驗結果的曲線圖。 第1 2圖是表示實驗3之實驗條件及實驗結果的曲線 圖。 第13圖是表示實驗3之實驗結果的曲線圖。 【主要元件之符號說明】 W :晶圓 1 :處理系統 4 : PHT處理裝置 5 : COR處理裝置 8 :控制電腦 4 〇 :反應室 41 :處理室 61 :氟化氫氣供給路 6 2 :氨氣供給路 8 5 :排氣路 -33-Then, side walls 153 each made of an insulator are formed on both sides of each of the Si〇2 film 155, the Poly-Si layer (gate electrode 151), and the SiN layer (hard mask (HM) layer 152). Further, a BSPG film 156 which is an interlayer insulating film is formed by covering the two gate portions G, and a PE-SiO 2 film 157 is formed on the upper surface of the BPSG film 156. The PE-SiO 2 film 157 is a CVD-based oxide film formed by using a plasma 1333674 CVD (PECVD: Plasma Enhanced CVD) method M. A contact hole is formed between the two gate portions G' (between the side wall portions 153) so as to penetrate the PE_SiO2 film 157 and the BPSG film 156. At the bottom of the contact hole, a Si layer 150 is exposed, and a natural oxide film 160 is formed in the Si layer 150. That is, in this structure, three types of ruthenium oxide films, that is, a natural oxide film 160, a BPSG film 156, and a PE-SiO 2 film 157 are mixed. Even when the natural oxide film 1 60 is removed from such a wafer W', the BPSG film 156 and PE- can be suppressed by appropriately adjusting the temperature of the wafer W' and the partial pressure of the hydrogen fluoride in the mixed gas. The damage of the Si02 film 157 (CD shift) selectively removes the natural oxide film 160. Further, when the temperature of the wafer W' and the partial pressure of the hydrogen fluoride in the mixed gas are adjusted in accordance with the thickness of the natural oxide film 160, the thick natural oxide film 1 60 can be surely removed even if it is left for a long period of time. Further, in the capacitance formation (film formation process) performed after removing the natural oxide film 160 from such a wafer W', the natural oxide film 160 is removed from the Si layer 150 exposed at the bottom of the contact hole, and φ can be The lower end of the capacitor is indeed connected to the Si layer 150. [Examples] (Experiment 1) The inventors conducted an experiment 1 to investigate the conditions in the COR treatment process when etching the tantalum oxide film. The object to be etched is a thermal oxide film (SiO 2 film) formed by a thermal oxidation method. Then, each measurement sets the temperature of the wafer w to the relationship between the partial pressure of hydrogen fluoride and the uranium engraving amount at 25 ° C, 30 ° c, 35 ° c, 4 〇 t:. The partial pressure of hydrogen fluoride is varied from -27 to 1333674 5 mTorr (about 〇.67 Pa) to 35 mTorr (about 4.67 Pa). The results are not shown in the graph of Fig. 10. As shown in Fig. 10, when the temperature of the wafer W is set to 25 ° C, the etching amount is the time when the partial pressure of the hydrogen fluoride gas is about 10 mTorr (about 1.33 Pa). The amount is approximately 35 nm. Then, when the partial pressure of the oxidized hydrogen gas is set to be lower than about 10 mTorr (about 1.33 Pa), the etching amount is decreased, and the higher the etching amount is, the more the etching amount is decreased. When the temperature of the wafer W is set to 30 ° C, the etching amount is at most about 10 0 TT rr (about 4.00 Pa), and the etching amount at this time is about 40 ηπι. When the temperature of the wafer W is set to 35 ° C, the higher the partial pressure of the hydrogen fluoride gas is, the more the amount of the etch is increased. Fluorine (the partial pressure of the gas is 20mTorr (about 2.67PO or so, when the temperature of the wafer W is 25 ° C, 30 ° C, although the amount of engraving is small, but when hydrogen fluoride When the partial pressure is about 25 mTorr (about 3.33 Pa) or more, the etching amount is larger than when the temperature of the wafer W is 25 ° C or 30 ° C. The etching amount is at most the partial pressure of the hydrogen fluoride gas. At 35 mTorr (about 4.67 Pa), the etching amount at this time is about 50 nm. When the temperature of the wafer W is 40 ° C, the same as when it is set to 35 ° C, the higher the hydrogen fluoride gas is. The partial pressure increases the amount of etching. The partial pressure of hydrogen fluoride gas is about 30 mT 〇 rr (about 4.00 Pa), and the amount of etching is small, compared to when the temperature of the wafer W is 25 ° C ' 30 ° C. However, when the partial pressure of hydrogen fluoride gas is about 30 mT 〇rr (about 4.00 Pa) or more, the etching amount is more than when the temperature of the wafer W is 25 ° C or 30 ° C. The amount of hungry is at most When the partial pressure of the vaporized gas is set to about 35 mTorr (about 4.67 Pa), the amount of etching 1333674 at this time is about 40 nm. From the above results, it is known that 'Experimental amount of about 35 nm or more. (Experiment 2) The inventors conducted an experiment to investigate the conditions of the COR treatment process when etching the tantalum oxide film. The object to be etched is by the plasma CVD method. A plasma CVD oxide film (SiO 2 film) is formed. Then, each φ is measured to set the temperature of the wafer W to 25 ° C, 30 ° C, 35 ° C, and 40 ° C. The relationship between the partial pressure and the amount of etching. The partial pressure of hydrogen fluoride is varied from 5 mTorr (about 0.67 Pa) to 35 mTorr (about 4.67 Pa). The result is shown in the graph of Fig. 11. As shown, when the temperature of the wafer W is set to 25 t, the etching amount is the most when the partial pressure of the hydrogen fluoride gas is about 20 mTorr (about 2.67 Pa), and the etching amount at this time is about 3 Onm. Then, when the partial pressure of hydrogen fluoride gas is set to be lower than about 20 mTorr (about 2.67 Pa), the etching amount is decreased by φ, and the higher the etching amount is, the lower the etching amount is. 3 (At the time of TC, the etching amount is at most when the partial pressure of hydrogen fluoride gas is set to about 30 mTorr (about 4.00 Pa). The etching amount is about 35 nm. When the temperature of the wafer W is 35 ° C, the partial pressure of hydrogen fluoride is increased, and the etching amount is increased. The partial pressure of hydrogen fluoride is about 25 mTorr (about 3.33 Pa). When the temperature of the wafer W is set to 25 ° C and 30 ° C, the amount of etching is small, but when the partial pressure of hydrogen fluoride is 3 0 m T 〇 rr (about 4 · Ο Ο P a When the temperature is about 25 ° C or 30 ° C, the etching amount is larger than the temperature of the wafer W. The etching amount is at most about when the partial pressure of fluorine -29-1333674 hydrogen is set to about 35 mTorr (about 4.67 Pa), and the etching amount at this time is about 40 nm or more. When the temperature of the wafer W is 40 ° C, the partial pressure of the hydrogen fluoride gas is increased as the temperature is set to 35 ° C, and the etching amount is increased. The etching amount is at most when the partial pressure of the hydrogen fluoride gas is set to about 35 mTorr (about 4.67 Pa). (Experiment 3) In the present invention, when the partial pressure of the hydrogen fluoride gas in the mixed gas and the partial pressure of the ammonia gas were changed in the COR treatment, Experiment 3 for comparing the etching amounts of various materials was compared. The object to be etched is of four types: Poly-Si, SiN, plasma CVD oxide film, and thermal oxide film. As the mixed gas, three types of gases of mixed hydrogen fluoride gas, ammonia gas, and argon gas are used. Then, for each of the following four conditions A, B'C, and D (refer to Fig. 12), the C0R process is performed, and then the PHT is executed. Then, the amount of removal of the reaction product of the thick PHT treatment was measured, that is, the amount of etching. Further, the average 値, standard deviation, and the like of the etching amount are calculated. (Condition A) The pressure of the entire mixed gas was set to 40 mTorr (about 5.33 Pa), and the partial pressure of the hydrogen fluoride gas and the partial pressure of the ammonia gas were each set to 18 mTorr (about 2.40 Pa). That is, the partial pressure of the hydrogen fluoride gas and the partial pressure of the ammonia gas are set to be the same. (Condition B) -30- 1333674 The pressure of the mixed gas is set to 8 〇 mT 〇 rr (the partial pressure of hydrogen fluoride is set to 26.7 mTorr (about 'the partial pressure is set to 15.2 mTorr (about 2.03 Pa). The partial pressure of argon gas is low. (Condition C) The pressure of the mixed gas is set to 80 mTorr (the partial pressure of φ hydrogen fluoride and the partial pressure of ammonia gas are set to 3.5 6 Pa each). That is, by one side mixing The partial pressure of the gas hydrogen is the same as that of the condition B, and the partial pressure of argon is decreased, and the partial pressure of the hydrogen fluoride gas and the ammonia gas (condition D) are set to a pressure of 80 mT 〇rr of the mixed gas (9 partial pressure of hydrogen fluoride gas is set to 32.9mTorr (approx. partial pressure is set to 18_8mTorr (about 2.51Pa). That is, it is lower than the condition B, and the partial pressure of the hydrogen fluoride gas and the component B are raised, and the partial pressure of the ammonia gas is expressed as the condition of the above experiment 3 than the hydrogen fluoride. The 12th fruit is shown in the table of Fig. 12 and the curve of Fig. 13, in any of the conditions A to D, for the tempering oxide film, the amount of etching compared to the Poly-Si, SiN is related to plasma CVD oxidation. The membrane, the thermal oxide film, is about 1 0.7 Pa), which will be 3.56 Pa), and the ammonia gas is 'the partial pressure of ammonia is about 1 0.7. P a ), 26.7mTorr (about the pressure of the whole and the partial pressure of the gasification gas, so that the partial pressure of the ammonia gas becomes the same 値 about 10.7Pa), which will be 4.39Pa), and the ammonia gas is the partial pressure of the argon gas. The partial pressure of ammonia gas is smaller than the partial pressure of the gas. Figure, the conclusion of experiment 3 [Figure. As shown in Fig. 1 3, the plasma CVD oxide film, which achieves a larger amount of etching, achieves a high etching selectivity of -31 - 1333674. Further, although the etching amount of Poly-Si and SiN hardly changes in any of the conditions A to D, the etching amount of the plasma CVD oxide film or the thermal oxide film is more than the conditions B, C, and D. The etching amount of the plasma CVD oxide film is C and D. Further, the ratio of the etching amount of the plasma CVD oxide film to the etching amount of the thermal oxide film is the condition B, and the ratio of the etching amount of the plasma CVD oxide film to the etching amount of the thermal oxide film is at most Condition C. From the above results, it is understood that for the wafer in which the plasma CVD oxide film and the thermal oxide film are mixed, it is desirable to prevent the etching of the plasma CVD oxide film while selectively etching only the thermal oxide film. The state of the mixed gas in the medium is the condition B, that is, the partial pressure of the ammonia gas is preferably set to be smaller than the partial pressure of the hydrogen fluoride gas. [Industrial Feasibility] The present invention is applicable to an etching method and a recording medium. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic longitudinal cross-sectional view showing the structure of a wafer surface before etching of a B P S G film. Figure 2 is a schematic plan view of the processing system. Fig. 3 is an explanatory view showing the configuration of a PHT processing apparatus. Fig. 4 is an explanatory view showing the configuration of a COR processing apparatus. Fig. 5 is a schematic longitudinal sectional view showing the state of the wafer after the C OR treatment. Fig. 6 is a schematic longitudinal cross-sectional view showing the state of the wafer after the PHT processing. Fig. 13673. Fig. 7 is a schematic longitudinal cross-sectional view showing the state of the wafer after the film formation process. Fig. 8 is a view showing the processing according to another embodiment. A schematic longitudinal section of the system. Fig. 9 is a schematic longitudinal cross-sectional view showing the surface structure of a wafer according to another embodiment. Fig. 10 is a graph showing the experimental results of Experiment 1. Fig. 11 is a graph showing the experimental results of Experiment 2. Fig. 1 is a graph showing the experimental conditions and experimental results of Experiment 3. Fig. 13 is a graph showing the experimental results of Experiment 3. [Description of Symbols of Main Components] W: Wafer 1: Processing System 4: PHT Processing Device 5: COR Processing Device 8: Control Computer 4: Reaction Chamber 41: Processing Chamber 61: Hydrogen Fluoride Supply Path 6 2: Ammonia Supply Road 8 5: Exhaust Road-33-