TWI333268B - Flip-chip bonding process - Google Patents

Description

1333268 _ Case No. 92117785__Year _g_Amendment_ V. INSTRUCTION DESCRIPTION (1) - TECHNICAL FIELD OF THE INVENTION The present invention relates to a wafer packaging process, and more particularly to a flip chip bonding process. The Flip Chip Interconnect Technology (FC) is a method of arranging a plurality of bonding pads on an active surface of a die by means of an area array. And forming a bump on the pad. Then, after the wafer is flipped, the bumps are used to electrically and mechanically connect the pads of the wafer to the contacts on the carrier (c). 〇ntact), such that the wafer can be electrically connected to the carrier via the bumps and electrically connected to the external electronic device via the internal wiring of the carrier. It is worth noting that the flip chip bonding technology (FC) system can be applied to the high Piri Count chip package structure, and at the same time has many advantages such as reducing the chip package area and shortening the signal transmission path. It has been widely used in the field of wafer packaging. The chip package structure of the common application of flip chip bonding technology is, for example, a chip chip ball array (Flip Chip Ball Gi^id Affay, FC/BGA) and a flip chip array (FHp). Chip pin Grid

Array '' FC/PGA) and other types of chip package structures. . Please refer to the 1A~ιέ diagram, which sequentially shows a schematic flow chart of a conventional flip chip bonding process. Conventional flip chip bonding processes generally include steps of bumping, die sawing, bonding, and reflow (ref1〇w). As shown in the figure,

10787twfl.ptc Page 6 1333268 - Case No. 921177 Dipped _η 曰 Amendment 5, Invention Description (2) · Bump making means forming by evaporation, printing or electroplating The bumps 120 are on the pads 114 of the wafer 110, wherein the bumps 120 are, for example, tin-lead bumps, and the bumps 120 form a spherical body after reflow, and the lateral wearing area of the bottoms of the bumps 12 is equal to The transverse cross-sectional area of the Under Bump Metallurgy (UBM) 116 formed on the pad 114. The wafer 110 is then cut as shown in Figure 1B ' to form a single wafer crucible 2. Next, as shown in FIG. 1C, the wafer bonding means that after the wafer ji 2 is overturned, the back side of the wafer 112 is adsorbed by a vacuum collet, and the wafer 112 is moved onto the carrier 130 to make the wafer 112 The bumps 12〇 are respectively contacted with the contacts 132 of the corresponding carriers 130. Finally, as shown in FIG. 1}, the reflow solderings 120' are, for example, feeding the wafers 112 and the carriers 13 into the reflow oven. The rejuvenation is such that the fabrication of the flip chip bond between the wafer 112 and the carrier 丨3 可 can be electrically and mechanically connected by the bump 丨 2 '. Finally, as shown in FIG. 1E, after the flip chip bonding is completed, a bottom filling process is usually performed, and an underfill 140 is filled between the wafer 1 12 and the carrier 13 〇. In the space, the bump 丨 2 is used to protect the portion of the bump 并 2 and simultaneously buffer the carrier 1 3 〇 and the wafer 1 1 2 in the = 2 ' ' due to the thermal expansion coefficient (CTE) mismatch between the two The phenomenon of thermal stress. η 9 & value ^? It should be noted that in the conventional flip chip bonding process, due to the influence of the reverse thermal stress between the wafer paleo-carriers 130, the reliable 3 ^ ^ and ff between the two must be overcome The bumps 120 are connected to the ends of the wafer 12 and the carrier 130 without being subjected to excessive shear stress, so that the bumps are

1333268

Year _Η 修正 Corrected the production of 'cracks. Please refer to the first, which shows the spherical convexity in the first figure. The conventional bump 120 is a spherical shape, and its height is known by the magnitude of the shear stress distribution (not shown by the length of the arrow). The maximum shear stress is located at the ends of the bump 1 2 0. And the minimum $ is located at the central portion of the bump 丨2 ,, however, the bump 丨2 〇 is reflowed: η ^ is connected to the wafer 1 1 2 and the lateral cross-sectional area ηββ of the carrier 1 30 is smaller than The lateral wearing area A of the central portion is so easy to cause the shear stress formed on the early protruding area of the bump to be excessively concentrated on the two sides of the & block 120, thereby affecting the reliability of the bump bonding. County Planning 2! U.S. Patent No. 5,9,6,6,7,0,0, the first to use the narrow &<1>1(^〇11^1^(13〇1(^1') caller and structural connection first ί, flute = ϊ, substrate, used to increase the reliability of the electronic assembly module. Its path handle is, for example, a ceramic substrate, and the second substrate is, for example, a printed electric ball and an eve: the bottom of the cymbal has a plurality of grid arrays (BG A ) type solder bH & / ductile solder bump (the first extension structure in exMndable solder is, for example, a magazine, the plate disposed on the solder bump is disposed on the second substrate and When reflowing, this weld 2 = swells and extends from the original height 为 to height D,: weld ΪΪ 32:^2);:; surface tension is extended to high center, and the temperature when the ball is reflowed is too The j is melted and melted to reduce the reliability of the support, and when the 12 blocks are obtained, the fabrication cost is high among the bumps. The exhibit member must be embedded in the solder bump.

1 333 268 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ A film spacer pedestal is used to control the gap between the wafer and the substrate to improve the reliability of the chip package structure, and the solder joint (s ο 1 derj 〇int) can accurately control the gap pad. Height and change its structure via reflow. However, the material of the film gap pad is a solder mask material, and it is difficult to form a gap pad having a uniform thickness, and the solder mask material is easily deformed by heat to affect the reliability of the support, and the cost of the patterned solder mask film is too high. SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide a flip chip bonding process for mitigating excessive stress concentration at both ends of a bump to improve the reliability of bump bonding. In order to achieve the above object of the present invention, the present invention provides a flip chip bonding process suitable for a wafer and performing bump fabrication on the surface of the wafer, and after the wafer is diced into a single wafer, each wafer The plurality of pads and the plurality of bumps correspondingly connected, and the lateral cross-sectional areas of the bumps are smaller than the transverse cross-sectional areas of the pads. Next, a carrier and at least one support member are further provided, wherein the carrier has a plurality of contacts corresponding to the bumps, and the support member is disposed between the wafer and the carrier, and the height of the support member is less than or equal to The height of the bump. The wafers are then placed on the carrier in a flip-chip junction and the bumps are brought into contact with the contacts. Finally, the bumps are reflowed so that the lateral cross-sectional area of the central portion of the bump is smaller than the transverse cross-sectional area of the two ends, and the height of the support before reflow and after reflow is not

10787twfl.ptc Page 9 1333268 _ Case No. 92117785_年月日日__ V. Description of invention (5) Change. According to a preferred embodiment of the present invention, the bump after the reflowing is a ridge, and the central portion of the column has a transverse cross-sectional area that is less than a transverse cross-sectional area at both ends. Further, the transverse cross-sectional area of one end of the bump after reflow is equal to the transverse cross-sectional area of the bottom metal layer formed on the pad, and the lateral cut area of the other end of the bump is equal to the transverse cross-sectional area of the joint. Therefore, in the flip chip bonding process of the present invention, when the bump is finally soldered back, the molten bump is subjected to surface tension, so that the lateral wearing area of the central portion of the original spherical bump is reduced, and the lateral cross-sectional area of both ends is reduced. The enlargement further causes the spherical bump to deform and exhibit a columnar structure to alleviate the phenomenon of excessive stress concentration at both ends of the bump to improve the reliability of the bump joint. The above and other objects, features, and advantages of the present invention will become more apparent and understood. Figure E is a flow chart showing a flip chip bonding process in accordance with a preferred embodiment of the present invention. Referring to FIG. 2A, first, bump fabrication is performed on the surface of a wafer 210, and the bumps 220 are formed on the pads 214 of the wafer 210 by evaporation, printing or electroplating, for example, bumps. 220 is, for example, a tin-lead bump or a lead-free bump, and the bump 220 can form a ball-bottom metal layer 216 as an interface between the connection bump 220 and the pad 214, and the bump 220 can be reflowed. A spheroid is formed.

10787twfl.ptc Page 10 1333268 _ Case No. 921Π785_年月日 ____ V. Invention Description (6) Finally, after the wafer 210 is cut into a wafer 2 2 2, each wafer 212 has multiple The pad 2 14 and the corresponding plurality of bumps 2 20 are connected, and the bumps 220 do not completely cover the ball-bottom metal layer 216 of the pad 214. It should be noted that, assuming that the lateral cross-sectional area of the bottom metal layer 216 on the bonding pad 2 14 is, for example, A0, in the process of forming the bump, the bottom of the bump 120 completely covers the spherical metal layer 2 16 . The lateral wearing area of the bottom of the bump 220 is substantially equal to the transverse cross-sectional area A0 of the bottom metal layer. The difference in this embodiment is that the bottom of the bump 220 covers only the bottom metal layer 216 of the solder pad 214. The surface of the central region, and the lateral cross-sectional area of the bottom of the bump 220 will be less than the transverse cross-sectional area A0 of the bottom metal layer 216. In the present embodiment, during the process of forming the bumps 220, for example, a proper treatment is performed on the surface of the ball-bottom metal layer 216 of the bonding pad 2 14 , for example, covering or attaching a protective layer (not shown). The surrounding area of the bottom metal layer 216, but only the surface of the central portion of the bottom metal layer 216 is exposed, after which the bump 20 is only covered with the central portion of the bottom metal layer 216 after the fabrication is completed, and finally After the protective layer is removed, the surface of the uncovered ball-bottom metal layer 216 is exposed to the outside of the bump 220. In this way, the lateral cross-sectional area of one end of the bump 2 0 0 connecting the bottom metal layer 216 is smaller than the transverse cross-sectional area A 0 of the bottom metal layer 216. Of course, other methods can be used by those skilled in the art. This can also be achieved, for example, by covering the surrounding area of the bottom metal layer 216 with a photoresist or other solder resist material. Then, as shown in FIG. 2B, the wafer bonding step is performed, after the wafer 212 is overturned, the back surface of the wafer 212 is adsorbed by a vacuum nozzle, and the wafer 212 is moved over a carrier 230. ,among them

10787twfl.ptc Page 11 1333268 _ Case No. 92117785 _ _ _ _ Amendment _ V. Description of the invention (7) The carrier 230 is, for example, a plastic slab, a ceramic substrate or a printed circuit board, and the surface of the carrier 230 A plurality of contacts 232 are disposed corresponding to each of the bumps 220. Next, as shown in FIG. 2C, a support member 240 is provided, and the support member 240 is disposed between the wafer 2 12 and the carrier 230 to form a reliable height h2 and is located on the area around the wafer 212. . The height of the support member 240 is, for example, equal to h2, and the height of the bump 220 is, for example, h3, and the height h 3 of the bump 220 is greater than or equal to the height h2 of the support member 240. Next, as shown in FIG. 2D, the wafer 212 is disposed on the carrier 230, and the bumps 220 of the wafer 212 respectively contact the contacts 232 of the carrier 230. In the above-described flip chip bonding process, one end of the support member 240 is first fixed to the carrier 230, for example, and after the flip chip bonding, the other end of the support member 240 is fixed to the wafer 212, or one end of the branch member 240. For example, it is first fixed on the wafer 212, and after the flip chip bonding, the other end of the support member 240 is fixed on the carrier 230. Finally, as shown in FIG. 2E, the reflow solder bump 220, for example, the wafer 212 and the carrier 230 are sent to the reflow furnace for reflow, so that the wafer 212 and the carrier 230 can be electrically connected by the bump 220. The mechanical connection is made, at which point the height of the bump 220 is equal to the height h2 of the support member 24〇. It is worth noting that during the reflow process, the height of the support member 240 before and after reflow is not significantly changed or deliberately changed to maintain a fixed height between the wafer 2 i 2 and the carrier 230. Between the support member 240 may be a high melting point metal or other high rigidity material, and the melting point of the support member 24 is much larger than the melting point of the bump 2 2 Λ (for example, tin-lead alloy), so Melting occurs and the reliability of its support is reduced. Further, in the present embodiment, the molten bump

10787twfl.ptc Page 12 1333268 I No. 921] 7785 Correction Λ. 曰 V. Invention Description (8) 220 only needs to be caused by the surface tension to make the original spherical bump 2 20 central. The lateral cross-sectional area 卩' of the crucible is reduced, and the transverse cross-sectional areas AO and A1 at both ends thereof become larger, and the spherical convex block 22 is deformed to have a columnar structure or a neck-column structure. Finally, the lateral cross-sectional area A of the central portion of the stud bump 220 will be smaller than the lateral wearing area A〇, A1 of the both ends, and one end of the bump 2 20 (refer to the ball-bottom metal layer 216 of the contact pad 214) The transverse cross-sectional area A0 of one end is equal to the transverse cross-sectional area of the bottom metal layer 216, and the transverse cross-sectional area A1 of the other end of the bump 22 (referring to one end of the contact contact 232) is equal to the contact 232 stomach Transverse cross-sectional area. In terms of manufacturing cost, the support member only needs to be disposed on the surface of the wafer or the carrier by attaching or soldering, and the manufacturing capacity is low, and the cost is low to replace the use of the solder mask film or the stretchable solder bumps. The way the cost is produced. Therefore, under the same bump volume, when the transverse cross-sectional area Α〇, Α1 is not the height h 2 of the columnar bump 220 will be greater than the reliable height h of the conventional spherical bump 120 to slow the shear stress at both ends of the bump 220 . In addition, the volume distribution of the above-mentioned bumps 220 is more rational than the distribution of the volume of the conventional spherical bumps 12, and therefore has a good effect for alleviating the damage caused by stress concentration. Please refer to FIG. 2F, which shows an enlarged schematic view of the columnar bumps in FIG. The size of the shear stress distribution (indicated by the length of the arrow) is shown in the figure. The maximum shear stress is located at the 'ends' of the bumps 220, and the minimum shear stress is located at the center of the bumps 20, however Since the lateral wearing area Α' of the central portion of the bump 2 20 is smaller than the transverse cross-sectional area AO, A1 of the bump 220 connected to the ends of the wafer 212 and the carrier 230, the shearing stress is determined at both ends of the bump 2 20

IH Page 13 10787twf1.ptc 1333268 _ Case No. 92117785_Yearly Date Correction _ V. Invention Description (9) 'The cloth will be more rationalized, so the reliability of the bump joint will be improved. On the other hand, since the stress relief effect of the stud bumps is good, the conventional underfill process is not required after the flip chip bonding, which simplifies the flip chip package process. As can be seen from the above description, the flip chip bonding process of the present invention firstly performs bump fabrication on the surface of the wafer, and after the wafer is diced into a single wafer, each wafer has a plurality of pads and corresponding connections. A plurality of bumps, and the lateral cross-sectional areas of the bumps are smaller than the transverse cross-sectional areas of the pads. Then, a carrier and at least one support member are further provided, wherein the carrier has a plurality of contacts corresponding to the bumps, and the support member is disposed between the wafer and the carrier, and the height of the support member is less than or equal to The height of the bump. The wafers are then placed on the carrier in a flip chip bond and the bumps are brought into contact with the contacts. Finally, the bumps are reflowed such that the lateral cross-sectional area of the central portion of the bump is less than the transverse cross-sectional area of the ends. Therefore, in the distribution of the shear stress, it is not excessively concentrated on both ends of the bump, and the probability of the bump being broken is reduced, thereby improving the reliability of the bump joint. In summary, the flip chip bonding process of the present invention has the following advantages: (1) The support member and the bump do not need to be increased in height by a reflow process to form a columnar bump between the wafer and the carrier. . (2) The support member may be a high melting point metal or other high rigidity material, and its melting point is much larger than the melting point of the bump, so that the 'melting phenomenon does not occur and the reliability of the support is lowered. (3) The height of the support member does not change deliberately before and after reflow, which maintains a fixed height between the wafer and the carrier,

10787twfl.ptc Page 14 1333268 _ Case No. 92117785_Yearly 曰 Amendment _ V. Invention Description (10) 'And improve the reliability of its support. _ (4) In terms of manufacturing cost, the support member only needs to be disposed on the surface of the wafer or the carrier by attaching or soldering, which is easy to manufacture and low in cost. Although the present invention has been described above in terms of a preferred embodiment, it is not intended to limit the invention, and it is obvious to those skilled in the art that the present invention may be modified and retouched without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims.

10787twfl.ptc Page 15 1333268 . ♦ _ Case No. 92117785_年月曰 _ _ 简单 Simple Description ’ The first A to E E diagrams illustrate the flow of a conventional flip chip bonding process. FIG. 1F is an enlarged schematic view showing the spherical bumps in FIG. 1E. 2A to 2E are schematic views showing the flow of a flip chip bonding process in accordance with a preferred embodiment of the present invention. FIG. 2F is an enlarged schematic view showing the columnar bumps in FIG. 2E. [Illustration description] 1 0 : Vacuum nozzle 1 1 0 , 2 1 0 : Wafer 1 1 2 , 2 1 2 : Wafer 1 14 , 214 : Pad 1 2 0, 2 2 0 : Bump 1 30 , 2 3 0 : carrier 1 3 2, 2 3 2 : contact 140: primer 2 4 0 : support A, A', A0, A1: transverse cross-sectional area h, h2: height

10787twf1.ptc Page 16

Claims (1)

1333268 _ Case No. 92117785_Yearly Revision _ VI. Patent Application Scope 1 1. A flip chip bonding process comprising at least the following steps: providing a wafer, wherein the wafer has a plurality of pads and a plurality of bumps correspondingly connected And the lateral loading area of the one of the bumps connecting the ones of the solder pads is smaller than the lateral cross-sectional area of the solder pads; a carrier is provided, wherein the carrier has a plurality of contacts corresponding to the bumps; Providing at least one support member disposed between the wafer and the carrier, wherein the height of the support member is less than or equal to a height of the bumps; and the wafer is disposed on the carrier in a flip chip manner And causing the bumps to contact the contacts; and re-welding the bumps such that a central cross-sectional area of the central portions of the bumps is less than or equal to a transverse cross-sectional area of the two ends thereof, and the support is reflowed The height before and after reflow does not change. 2. The flip chip bonding process of claim 1, wherein one end of the support member is first fixed to the carrier, and then after the flip chip bonding, the other end of the support member is fixed to the wafer. on. 3. The flip chip bonding process of claim 1, wherein one end of the support member is first fixed on the wafer, and then after the flip chip bonding, the other end of the support member is fixed on the carrier. . 4. The flip chip bonding process of claim 1, wherein the carrier comprises one of a ceramic substrate and a plastic substrate. 5. The flip chip bonding process of claim 1, wherein the carrier comprises a printed circuit board. 6. The flip chip bonding process as described in claim 1 of the patent application, wherein 10787twfl.ptc Page 17 1333268 Amendment Case No. 92117785 VI. Scope of Application These bumps are formed by electroplating and printing one of them. 7. A bump process for a wafer comprising, at least: providing a wafer having a plurality of wafers, each of the plurality of pads having a plurality of pads; forming a ball-bottom metal layer Each of the pads; forming a protective layer on the bottom metal layer, and a portion of the surface of the ball metal layer is exposed to the protective layer; A plurality of bumps are formed on the pads, and the bumps are connected to a portion of the surface of the bottom metal layer. The lateral cross-section of the bottom of each of the & blocks is smaller than the transverse cross-sectional area of the bottom metal layer. 8. The bump process as described in claim 7 of the patent application further includes reflowing the bumps. 9. The bump process of claim 8, wherein the protective layer is removed after reflowing the bumps. 1 0. The bump process of claim 7, wherein the material of the protective layer comprises a solder resist material. 1 1. The bump process of claim 7, wherein the material of the protective layer comprises a photosensitive material. 1 2. The bump process of claim 7, wherein the material of the bump comprises a tin-lead alloy. Page 18