TWI331358B - Overlay mark, and fabrication and application of the same - Google Patents

Overlay mark, and fabrication and application of the same Download PDF

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TWI331358B
TWI331358B TW96115044A TW96115044A TWI331358B TW I331358 B TWI331358 B TW I331358B TW 96115044 A TW96115044 A TW 96115044A TW 96115044 A TW96115044 A TW 96115044A TW I331358 B TWI331358 B TW I331358B
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strip
pattern
shaped
exposure
rectangle
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TW96115044A
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Chinese (zh)
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TW200842937A (en
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Chih Hao Huang
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Macronix Int Co Ltd
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1331358 P950250 22737twf.doc/n 九、發明說明: 【發明所屬之技術領域】 本發明是有關於一種1C製程所用的重疊標記(overlay mark),且特別是關於可用以檢查一下晶圓層與定義一上晶 圓層之微影製程之間的對準度(alignment accuracy)的重疊 標記’其形成方法,以及其在對準度檢查上的應用。 【先前技術】 隨著1C製程的線寬持續縮小,上下晶圓層之間的對準 度也愈來愈重要。因此,一般會在晶圓上形成重疊標記, 並利用其來檢查對準度,其中最常見的重疊標記即所謂的 盒中盒(box-in-box,BIB)式重疊標記。 傳統的BIB重疊標記是應用於上下晶圓層各自以單一 光罩定義的情形,包括部分下晶圓層中圍成矩形的4條溝 ^,以及該部分下晶圓層上方亦圍成矩形的4條狀光阻圖 形,其是在定義上晶圓層的微影製程中形成的,且被前述 4溝渠圍繞。其中’4溝渠是以其上有對應圖案的一光罩定 義的,且4條狀光阻圖形是以其上有對應圖案的另一光罩 定義的。量測該二矩形的中心位置的差異,即可得知上下 晶圓層之間的對準度。 另一方面,當製程線寬縮小時,元件關鍵尺寸(crkicai dimension,CD)的控制也更加重要。當製程需要在—晶圓 層上形成圖案配置型態不同的兩區域時,常會使用兩個光 罩分別對兩區域之光阻層進行曝絲件不同的兩次曝光, 明之雙重曝光製程,以使各區域皆具有預定關鍵尺寸。 P950250 22737twf.doc/n 當前述下上晶圓層的_ π 兩光罩的兩次曝光化製財至少有—者包括使用 【發明内容】 騍時,前述重疊標記即不再適用》 本發明提供一插备田 程之-下晶圓層c標記,用以檢查經過-圖案化製 準度,此圖案化製上晶_之一微影製程之間的對 次曝光步驟。"與微影製程二者中#有—者包括兩 ^明並提供—種上述重疊標記的形成方法。 #"明亚提供—種檢查對準度的方法,其形成上述重 且不°己以在如述圖案化製程與微影製糕二者中至少有一 者匕括又重曝光製程的情形下,檢查下晶圓層和前述微 影製程之間的對準度。 本發明之重疊標記包括下晶圓層的·^部分’其中有第 一 Χ向、第一Υ向、第二X向及第二Υ向下條狀圖形, 並包括由前述微影製程所形成的第一 X洵、第一Υ向、第 —X向及第二γ向條狀光阻圖形,位於該部分之下晶圓層 的上方,且被前述下條狀圖形所圍繞。前述圖案化製程與 微影製程二者中至少有一者包括兩次曝光少驟’分別用以 定義第一元件區與第二元件區。當前述圖案化製程包括兩 次曝光步驟時,第一 X向與第一 Υ向下條狀圖形同時定 義’且第二X向與第二Υ向下條狀圖形同時定義。當前述 微影製程包括兩次曝光步驟時’第一 X向與第一 Υ向條狀 光阻圖形同時定義,且第二X向與第二Υ向條狀光阻圖 同時定義。 1331358 P950250 22737twf.doc/n f發明之重疊標記的職方法包括在前關案 :形成㈣各下紐_,並麵额f彡製財 ^ J條狀,阻圖形。本發明之檢查對準度的方法則是二2 標記之後,量測各該條狀光賴軸對於各 ^圖:的位置,以估算在該第—元件區與該 ;1331358 P950250 22737twf.doc/n IX. Description of the Invention: [Technical Field of the Invention] The present invention relates to an overlay mark used in a 1C process, and in particular to check the wafer layer and define one The overlay mark of the alignment accuracy between the lithography processes of the upper wafer layer is formed, and its application in alignment inspection. [Prior Art] As the line width of the 1C process continues to shrink, the alignment between the upper and lower wafer layers becomes more and more important. Therefore, overlapping marks are generally formed on the wafer and used to check the alignment, and the most common overlapping mark is a so-called box-in-box (BIB) type overlapping mark. The conventional BIB overlay mark is applied to the case where the upper and lower wafer layers are each defined by a single mask, including four trenches in a portion of the lower wafer layer, and a rectangular portion above the lower wafer layer. A strip-shaped photoresist pattern formed in a lithography process defining a wafer layer and surrounded by the aforementioned four trenches. Where the '4 trenches are defined by a mask having a corresponding pattern thereon, and the four strips of photoresist pattern are defined by another mask having a corresponding pattern thereon. By measuring the difference in the center position of the two rectangles, the alignment between the upper and lower wafer layers can be known. On the other hand, when the process line width is reduced, the control of the crkicai dimension (CD) is also more important. When the process needs to form two regions with different pattern configurations on the wafer layer, two photomasks are used to respectively perform different exposures of the photoresist layers of the two regions, and the double exposure process is Each zone has a predetermined critical dimension. P950250 22737twf.doc/n When the two exposures of the _ π reticle of the aforementioned lower wafer layer are at least at least included, the use of the above-mentioned overlapping mark is no longer applicable. A field-to-wafer layer c mark is inserted to inspect the pass-patterned degree of alignment, which is used to perform a sequential exposure step between the lithography processes. " With the lithography process, there are two ways to include the above-mentioned overlapping mark formation method. #"Mingya provides a method for checking the alignment, which forms the above-mentioned weight and does not have to be in the case of at least one of the patterning process and the lithography cake as described above. Check the alignment between the lower wafer layer and the aforementioned lithography process. The overlap mark of the present invention includes a first portion of the lower wafer layer having a first direction, a first direction, a second direction, and a second line of the lower line, and includes the lithography process The first X 洵, first Υ, X-th and second γ-direction strip photoresist patterns are located above the wafer layer below the portion and are surrounded by the lower strip pattern. At least one of the foregoing patterning process and lithography process includes two exposures less than 'details' for defining the first component region and the second component region, respectively. When the aforementioned patterning process includes two exposure steps, the first X direction is defined simultaneously with the first Υ downward strip pattern and the second X direction is defined simultaneously with the second Υ downward strip pattern. When the aforementioned lithography process includes two exposure steps, the first X-direction is simultaneously defined with the first-direction strip-shaped photoresist pattern, and the second X-direction and the second-direction strip-shaped photoresist pattern are simultaneously defined. 1331358 P950250 22737twf.doc/n f The method of overlapping markings invented includes the case of the former case: the formation of (4) each of the next _, and the denomination of the f. The method for checking the alignment of the present invention is to measure the position of each strip of light on each of the maps after the second and second marks to estimate the position in the first element region;

了晶圓層與定義上晶圓層之微影製程之間J 例如=:::與各方法中’前述各下條狀圖形 實施例中,前述下條狀圖形定義出第—矩形, 且則述條狀光阻圖形定義出第二矩 準時,第-第二X向下二 條狀圖形之,線的交點例如可與第-第二 光阻_之中線與第—第二γ向條狀雜圖形之 阻^=,合°在此情形下,前述下條狀圖形與條狀光 阻圖形例如是分別定義出第—正方形與第二正方形。 笛一i外’在前述下條狀圖形與條狀光阻圖形分別定義出 第膜ί與第二矩形,第—x向與第—¥向下條狀圖形以 步向與第二γ向下條狀圖形以第 步驟定義,第-x向與第—γ向條狀光阻圖形以第 一=步驟定義,第二X向與第:γ向條狀光阻圖形以第 =光,定義,第-第三曝光步驟用以定義第一元件區 且弟二弟四曝辭驟用以定義第二元件區的情形下,第一 1331358 P950250 22737twf.doc/n 佳:二 ,下條狀圖形所定義的兩邊較 定矩门形^由第一 X向與第一 狀光阻圖形所 ^的兩邊,同矩形之由第二χ向與第二丫向下條 狀圖形所定義的兩邊對應第二矩形之由第二父向與^ 向條狀光阻圖形所定義的兩邊。 /、 一 ^述兩次曝光步驟例如是組成—雙重曝光製 私,其中兩次曝光步驟所定義的第一元件區 例如分別為-圖案密集區與一圖案稀疏區 一記憶胞陣列區與一周邊電路區。 、刀引马 化贺明之重疊標記,即可在下晶圓層之圖案 化製私與疋義上晶圓層之微影製程二者中至少有一者包括 ^次曝光製程,且這兩次曝程分収㈣—元件區应 區的情形下’檢查第1件區中上下晶圓層在; 向上的對準度,並檢查第二元件區中上下晶圓層 在入及Y兩方向上的對準度。 明之述和其他目的、特徵和優點更明顯易 ,下文特舉較佳實施例並配合所關式,詳 【實施方式】 ,然在以下各實施例中,下晶圓層之圖案化製程或定 上B曰圓層之微衫製私所包括的兩次曝光步驟組成了定義 同光阻層的雙重曝光製程’但本發明之應用並不僅限於 這種f月形,而亦可應用至同—晶圓層由先後形成之二圖案 化光,層所疋義、此二圖案化光^且層分別由該兩次曝光步 驟所定義的情形。 8 c S ) 1331358 P950250 22737twf.doc/n 乃吖— 八「斤貝呢^ T合下條狀圖形皆 成的溝渠’但本發明之下條㈣形並賴限於此,^形 是任何其他可以光學方式偵測到的圖形型態。 可以 第一實施例 圖1Α〜1Ε繪示本發明第一實施例之重疊 , 方法,其帽1Ε緣示該重疊標記及其使时形的j成 本實施例巾下晶圓層賴案化製程與定義上晶圓與二 製程各自皆包括一雙重曝光製程。 微衫 請參照圖1A’在對基底之第一元件區1〇4進 光步驟時,即同時在位於非元件區中之預定區域曝 部分下晶圓層108上的正光阻層11()中形成第一 γ 的 曝光區112a與第一 X向條狀曝光區U2b,其中非 通常是切割道(scribe line)區。此第一曝光步驟所用=第^ 光罩上具有第一元件區104的圖案及對應第一 丫向條狀曝 光區112a與第一 X向條狀曝光區U2b的圖案,並將第 二兀件區102遮住。下文中類似之曝光步驟所用的光罩的 圖案設計皆可以此類推,故不再贅述。 第一元件區104與第二元件區1〇2例如有一者是圖案 岔集區,另一者疋圖案稀疏區。圖案密集區例如是—記^ 胞陣列區,圖案稀疏區例如是一周邊電路區,而下晶圓層 的圖案例如是接觸窗開口的圖案’此時下晶圓層即是一介 電層。 請參照圖1B,接著使用第二光罩對第二元件區1〇2Between the wafer layer and the lithography process defining the wafer layer, for example, J: =::: and in each of the above methods, the foregoing lower strip pattern defines the first rectangle, and the strip is described. When the second photoresist is defined as the second moment, the first-second X-down two-bar graph, the intersection of the lines can be, for example, the first-second photoresist-neutral line and the second-second γ-direction strip-shaped pattern. In this case, the lower strip pattern and the strip photoresist pattern define, for example, a first square and a second square, respectively.笛一i outside' in the foregoing lower strip pattern and strip photoresist pattern respectively define the first film ί and the second rectangle, the -x direction and the -¥ downward strip pattern in the step direction and the second γ downward strip pattern Defined by the first step, the -x-direction and the -γ-direction strip-shaped photoresist pattern are defined by the first=step, and the second X-direction and the γ-direction strip-like photoresist pattern are defined by the first light, the first-first In the case where the three exposure steps are used to define the first component area and the second two are used to define the second component area, the first 1331358 P950250 22737 twf.doc/n is better: second, the two sides defined by the lower strip pattern are compared. The fixed gate shape is formed by the first X direction and the two sides of the first photoresist pattern, the two sides of the same rectangle defined by the second 与 and the second 丫 downward strip pattern, and the second rectangle is the second The parent and the two sides defined by the strip photoresist pattern. The two exposure steps are, for example, composition-dual exposure, wherein the first element regions defined by the two exposure steps are, for example, a pattern dense region and a pattern sparse region, a memory cell array region and a periphery. Circuit area. At least one of the patterning process of the lower wafer layer and the lithography process of the wafer layer on the lower wafer layer includes a second exposure process, and the two exposure processes are performed. Divide (4)—In the case of the component area, check the upper and lower wafer layers in the first area; the upward alignment, and check the pair of upper and lower wafer layers in the second element area in the in and out directions. Accuracy. The description and other objects, features and advantages are more obvious, and the preferred embodiments are described below in conjunction with the related embodiments. In the following embodiments, the patterning process of the lower wafer layer is determined. The double exposure step included in the upper layer of the micro-shirts constitutes a double exposure process that defines the same photoresist layer. However, the application of the present invention is not limited to such a f-shaped shape, but can also be applied to the same- The wafer layer is formed by two patterned lights which are successively formed, the layers are defined, and the two patterned lights are respectively defined by the two exposure steps. 8 c S ) 1331358 P950250 22737twf.doc/n Nai 吖 - 八 " 斤 斤 ^ T T T T T T T T T T T T T T T 但 但 但 但 但 但 但 但 但 但 但 但 但 但 但 但 但 但 但 但 但 但 但 但 但 但 但 但 但 但 但 但The first embodiment of the present invention is shown in FIG. 1 to FIG. 1 to illustrate the overlap of the first embodiment of the present invention, and the method of the cap 1 indicates the overlapping mark and the time cost of the j-shaped embodiment. The wafer layer processing process and the definition wafer and the second process each include a double exposure process. The micro-shirt is referred to FIG. 1A' when the first component region of the substrate is in the light-in step, that is, at the same time. A predetermined area in the non-element region exposes a portion of the positive photoresist layer 11 on the lower wafer layer 108 to form a first gamma exposed region 112a and a first X-direction strip-shaped exposed region U2b, wherein the non-typically a scribe line (scribe Line). The first exposure step uses a pattern of the first element region 104 and a pattern corresponding to the first lateral strip-shaped exposure region 112a and the first X-direction strip-shaped exposure region U2b, and The second element area 102 is hidden. The reticle used in the similar exposure step below The pattern design can be deduced in this way, so it will not be described again. For example, the first element region 104 and the second element region 1〇2 are, for example, a pattern collection region, and the other is a pattern sparse region. ^ Cell array region, the pattern sparse region is, for example, a peripheral circuit region, and the pattern of the lower wafer layer is, for example, a pattern of contact window openings. The lower wafer layer is a dielectric layer. Please refer to FIG. 1B, and then use Second mask to the second component area 1〇2

9 (.S 1331358 p950250 22737twf.doc/n 進行第二曝光步驟時,即同時於該部分下晶圓層灌上的 ,光阻層110中形成第二Y向條狀曝光區112c與第二X 二條狀曝^區112d。各條狀曝光區112a〜md中的光阻材 =:在後續的顯影製程中與第一第二元件區1〇4、1〇2元件 區中的曝光區同時被除去,因此在其後用以形成第-第二 兀件區104、102夕n <下晶圓層圖案的蝕刻製程中,對應之第 赢*^向溝木U4a、第一 X向溝渠U4b、第二Y向溝渠114c • — X向清渠U4d會形成在該部分下晶圓層108中, f 1E所不。其中’漠渠心與mb由第一曝光步驟 義'籌木⑽與114(1則是由第二曝光步驟所定義, ' 第二曝光步觸皆屬於下晶圓層之圖案化製程的一部 1。另外’上述正光卩且層110可換成負光阻層,不過,此 =所用之第-第二光罩的圖案設計須可使i以〜丨创成為 曝光區’預定區域1〇6的其他部分則變成曝光區。 、请參照圖ic,於〜上晶圓層(未繪示)之後,即進行下 魯 3包括雙重曝光製程的微影製程。首先形成正光阻層 6 ’再使用第二光罩詩第一元件區104進行第三曝光步 ’以同時形成第一元件區104的曝光區與未曝光區,並 =預定區域106内-半的正光阻層116中形成第一 γ向條 二未曝光區116a及第〜χ向條狀未曝光區116b,其中第 —光罩上對應預定區域1〇6之圖案如標號12者所示。 、/_請參照圖1D,接著使用第四光罩對第二元件區102 進仃第四曝光步驟,以同時形成第二元件區102的曝光區 與未曝光區,並在預定區域1〇6内另一半的正光阻層116 1331358 P950250 22737twf.doc/n 令形成第二Y向條狀未曝光區116c及第二X向條狀未曝 光區116d ’其中第四光罩上對應預定區域之圖案如標 號14者所示。此時預定區域106之除條狀未曝光區 116a〜116d以外的部分皆為曝光區。 另外’上述正光阻層116亦可換成負光阻層,不過, 此時所用之第三第四光罩的圖案設計須可使U6a〜116(1成 為曝光區,預定區域106的其他部分成為未曝光區。 接著進行顯影以形成第一第二元件區104、102的光阻 圖案,並同時使條狀未曝光區116a〜116d成為條狀光阻圖 形118a、118b、118c、118d,其被前述各溝渠114a〜n4d 所圍繞,如圖1E所示。這4條溝渠U4a〜i14d及4條狀 光阻圖形118a〜l 18d即構成本第一實施例之重疊標記。 請參照圖1E,在以上製程中,4條溝渠U4a〜U4d定 ,出第一矩形115,且4條狀光阻圖形118a〜U8d定義出 第一矩形119。冓渠U4a〜114d和條狀光阻圖形U8a〜n8d =置安排例如滿足以下條件:當下晶圓層與該微影製程 對準時,第一第二γ向溝渠U4a、u4c之中線與第 第-X向溝渠114b、114d之中線的交點和第―第二γ =條狀光阻圖形118a、118e之中線與第—第二χ向條狀 =^形服、蘭之中線的交點重合。在此情形下,4 U4a〜114(1與4錄植_⑽〜刪例如是分 別疋義出第一正方形與第二正方形。 ^卜’上晶圓層例如是—金屬層,此時溝渠u4a〜u4d 的位置即可猎由此金屬層的反射率變化來债測。在一實施 1331358 P950250 22737twf.doc/n Ϊ中上介電層’其中圖案為接觸窗開口的圖 案,上曰曰0層則為-金屬層,此^ 開口,且有部分將被定義成導線。 H、入接觸固 請續參㈣m,u缝疊標記 104、皿各自之中下晶圓層 』 對準度的方法例如為下述者案之間的 + γ θ、>* 可在弟一兀件區104的對車* ’夏測第-γ向條狀光_形ma與第一 γ向溝& 斤a之間的距離120,再與預設的標準值比較 二 圓層圖案與其上方光阻圖案在X方 、技/又,里'、彳弟—X向條狀光阻圖形118b與第— 即^曰fiMb之間的距離130,再與預設的標準值比較, P 了付知第一元件區104之下s圄S闰安螽甘 案在Y方向上的對準度。θθ®層圖案與其上方光阻圖 在第二元件區102的對準度方面,量測第三γ 盘二18e與第:Υ向溝渠114c之間的距離14° :、再 準值比較,即可得知第二元件區搬之下晶圓 心二與其上方光阻圖案在χ方向上的對準度;量測第二 11 =與第二Χ向溝渠114d之間的距離 再/、預汉的私準值比較,即可得知第二元件 圖案與其上方光阻圖案在γ方向上的對準度。 案與前述微影製程較義之上晶圓層圖案之間的對=圖 第一實施例 12 1331358 P950250 22737twf.doc/n 圖2A〜2D繪示本發明第二實施例之重疊標記的形成 方法’其中圖2D繪示該重疊標記及其使用情形的一例。 本實施例中只有下晶圓層的圖案化製程包括一雙重曝光製 私,定義上晶圓層之微影製程的曝光步驟只有一次,其定 義第一與第二元件區。 、π參照圖2A ’在對基底之第一元件區204進行使用第 光罩的第一曝光步驟時,即同時在位於非元件區之預定 區域206中的部分下晶圓層2〇8上的正光阻層21〇中形成 第Υ向條狀曝光區212a與第一 X向條狀曝光區212b。 、—,參照圖2B,接著使用第二光罩對第二元件區2〇2 進行第二曝光步驟時,即同時於該部分下晶圓層2〇8上的 正光阻層210中形成第二Y向條狀曝光區212c與第二X 向條狀曝光區212(1。各曝光區212&〜212(1中的光阻材料會 在後續的顯影製程中與第一第二元件區2〇4、2〇2元件區中 的曝光區同時被除去,因此在其後用以形成第一第二元件 區204、202之下晶圓層圖案的餘刻製程中,對應之第一 γ =溝渠214a、第一 X向溝渠214b、第二γ向溝渠21如與 第一X向溝渠214d會形成在該部分下晶圓層2〇8中,如 ,21)所不。其中,溝渠214a與214b由第一曝光步驟所 ,義,溝渠214c與214d則是由第二曝光步驟所定義,此 第二曝光步驟皆屬於下晶圓層之圖案化製程的一部 分。另外,上述正光阻層210亦可換成負光阻層,其 之製程變化如第一實施例之情形。 請參照圖2C,於一上晶圓層(未繪示)形成之後,形成 13 1331358 P950250 22737twfdoc/n 另一正光阻層,再使用第三光罩對第一第二元件區204、 2〇2進行第三曝光步驟,以同時形成第一第二元件區、 202的曝光區與未曝光區,並在預定區域200内的正光阻 層中形成第一 Y向條狀未曝光區216a、第一 χ向條狀未 曝光區216b、第二γ向條狀未曝光區216c與第二χ向條 狀未曝光區216d。此時預定區域206之除條狀未曝光區 216a〜216d以外的部分皆為曝光區。另外,上述正光阻層 亦可換成負光阻層,不過,‘時所用之光罩的圖案須與前 述第三光罩的圖案互補。 接著進行顯影以形成第一第二元件區2〇4、2〇2的光阻 圖案,並同時使條狀未曝光區216a〜216d成為條狀光阻圖 . 形218a、21扑、218c、218d,其被前述各溝渠214a〜2Md • 所圍繞,如圖2D所示。這4條溝渠214a〜214d及4條狀 光阻圖形218a〜218d即構成本第二實施例之重疊標記。 請參照圖2D,在以上製程中,4條溝渠214a〜2Md定 義出第一矩形215,且4條狀光阻圖形218a〜218d定義出 鲁第二矩形219。溝渠214a〜214d和條狀光阻圖形218a〜218d 的位置安排例如滿足以下條件:當下晶圓層與該微影製程 元王對準日才,弟一弟_一 Y向溝渠214a、214c之中線與第 一第二X向溝渠214b、214d之中線的交點和第一第二γ 向條狀光阻圖形218a、218c之中線與第一第二χ向條狀 光阻圖形218b、218d之中線的交點重合。在此情形下,4 條溝渠214a〜214d與4條狀光阻圖形218a〜218d例如是分 別定義出第一正方形與第二正方形。 1331358 P950250 22737twfdoc/n 明繽麥照圖2D’以上述重疊標記推算第一第二元件區 204、202各自之中下晶圓層圖案與其上方光阻圖案之間= 對準度的方法例如為下述者。在第—元件區撕的對準度 方面,里測第一弟二γ向條狀光阻圖形218a、218c之中 =23與第-γ向溝渠214a之_距離跡再與預設的 ^準值比較,即可得知第一元件區綱之下晶圓層圖案與 “上方光阻圖案在X方向上的對準度;量測第—第二9 (.S 1331358 p950250 22737twf.doc/n) When the second exposure step is performed, that is, simultaneously filling the wafer layer under the portion, the second Y-direction strip exposure region 112c and the second X are formed in the photoresist layer 110. a strip-shaped exposure region 112d. The photoresist in each of the strip-shaped exposed regions 112a-md =: simultaneously with the exposed region in the first second element region 1〇4, 1〇2 element region in a subsequent development process Removed, so in the etching process for forming the first and second element regions 104, 102, and the lower wafer layer pattern, the corresponding first wins the groove U4a and the first X-direction trench U4b. The second Y-direction trench 114c • — the X-direction clear channel U4d is formed in the lower wafer layer 108 of the portion, f 1E does not. wherein the 'different channel and the mb are determined by the first exposure step' (10) and 114 (1 is defined by the second exposure step, 'the second exposure step is part of the patterning process of the lower wafer layer. In addition, the above-mentioned positive aperture and layer 110 can be replaced by a negative photoresist layer, but This = the pattern design of the first-second mask used must be such that the other part of the predetermined area 1〇6 becomes the exposure area. According to FIG. ic, after the upper wafer layer (not shown), the lithography process including the double exposure process is performed. First, a positive photoresist layer 6' is formed, and then the second photomask first element region 104 is used. The third exposure step is performed to simultaneously form the exposed region and the unexposed region of the first element region 104, and the first γ-to-bar two unexposed regions 116a and the first portion are formed in the positive-resist layer 116 of the predetermined region 106. The strip-shaped unexposed area 116b is formed, wherein the pattern corresponding to the predetermined area 1〇6 on the first photomask is as shown by reference numeral 12. / / Please refer to FIG. 1D, and then the second photomask is used to the second element region 102. The fourth exposure step is further performed to simultaneously form the exposed region and the unexposed region of the second element region 102, and the positive resist layer 116 1331358 P950250 22737 twf.doc/n of the other half in the predetermined region 1〇6 is formed to form the second Y To the strip-shaped unexposed area 116c and the second X-direction strip-shaped unexposed area 116d', wherein the pattern of the corresponding predetermined area on the fourth mask is as shown by reference numeral 14. At this time, the strip-shaped unexposed area 116a of the predetermined area 106 is removed. The parts other than ~116d are exposed areas. In addition, the above positive photoresist layer 116 is also The negative photoresist layer is replaced, but the pattern design of the third fourth mask used at this time is such that U6a to 116 (1 becomes an exposure region, and other portions of the predetermined region 106 become unexposed regions. Then development is performed to form The photoresist pattern of the first and second element regions 104, 102, and at the same time, the strip-shaped unexposed regions 116a to 116d are strip-shaped photoresist patterns 118a, 118b, 118c, 118d surrounded by the respective trenches 114a to n4d. As shown in Figure 1E. The four trenches U4a to i14d and the four strip-shaped photoresist patterns 118a to 18d constitute the overlapping marks of the first embodiment. Referring to FIG. 1E, in the above process, the four trenches U4a to U4d define a first rectangle 115, and the four strip-shaped photoresist patterns 118a to U8d define a first rectangle 119. The trenches U4a to 114d and the strip photoresist patterns U8a to n8d=arrange, for example, satisfying the following conditions: when the lower wafer layer is aligned with the lithography process, the first and second γ are directed to the trench U4a, u4c and the first -X intersects the intersection of the lines in the trenches 114b, 114d and the intersection of the second - γ = strip-shaped photoresist patterns 118a, 118e and the second-to-second slant-like strips coincide. In this case, 4 U4a~114 (1 and 4 recording _(10)~ deleting, for example, respectively, the first square and the second square are distinguished. The upper wafer layer is, for example, a metal layer, and at this time, the trench u4a The position of ~u4d can be used to test the reflectivity change of the metal layer. In an implementation, 1331358 P950250 22737twf.doc/n Ϊ upper dielectric layer 'the pattern is the contact window opening pattern, the upper layer 0 layer Then, it is a metal layer, and the opening is made, and some parts are defined as wires. H. Incoming contact, please continue to refer to (4) m, u-stitching mark 104, and the middle and lower wafer layers of the dish. For the following cases, + γ θ, >* can be used in the 兀 兀 104 104 of the * * ' ' ' ' ' ' γ γ γ γ γ γ γ γ γ γ γ γ γ γ γ γ γ γ γ γ γ γ γ γ The distance between the two is compared with the preset standard value. The two-layer pattern and the photoresist pattern above it are in the X-square, the technology/, and the ', the younger brother-X-direction strip-shaped photoresist pattern 118b and the first-- The distance 130 between the fiMbs is compared with the preset standard value, and the alignment of the s圄S闰安螽甘 case in the Y direction under the first element region 104 is known. θθ® The distance between the pattern and the upper photoresist pattern in the second element region 102 is measured, and the distance between the third γ disk 2 18e and the first directional channel 114c is measured by 14°: The alignment of the wafer core 2 and the photoresist pattern above it in the second direction after the second component region is moved; measuring the distance between the second 11 = and the second buffer trench 114d, and the pre-existing private value Comparing, the alignment of the second element pattern with the upper photoresist pattern in the γ direction can be known. The pair between the wafer layer pattern and the wafer pattern above the lithography process is the same as the first embodiment 12 1331358 P950250 22737 twf.doc/n FIGS. 2A to 2D illustrate a method of forming an overlay mark according to a second embodiment of the present invention, wherein FIG. 2D illustrates an example of the overlap mark and its use case. In this embodiment, only the pattern of the lower wafer layer is shown. The process includes a double exposure process, and the exposure step of defining the wafer layer lithography process is only one time, which defines the first and second component regions. π is referred to FIG. 2A 'in the first component region 204 of the substrate. When using the first exposure step of the photomask, it is located at the same time A first strip-shaped exposed area 212a and a first X-direction strip-shaped exposed area 212b are formed in a portion of the positive photoresist layer 21 on the lower wafer layer 2〇8 in the predetermined region 206 of the element region. Referring to FIG. 2B And then performing a second exposure step on the second element region 2〇2 using the second mask, that is, simultaneously forming a second Y-direction strip exposure region in the positive photoresist layer 210 on the portion of the lower wafer layer 2〇8 212c and the second X-direction strip exposure region 212 (1. Each exposure region 212 & 〜212 (the photoresist material in 1 will be in the subsequent development process with the first second component region 2 〇 4, 2 〇 2 components The exposed regions in the regions are simultaneously removed, so that in the subsequent process for forming the wafer layer pattern under the first second device regions 204, 202, the corresponding first γ = trench 214a, first X-direction The trench 214b, the second gamma directional trench 21, and the first X-direction trench 214d may be formed in the portion of the lower wafer layer 2〇8, such as 21). Wherein, the trenches 214a and 214b are defined by a first exposure step, and the trenches 214c and 214d are defined by a second exposure step, which is part of a patterning process of the lower wafer layer. In addition, the positive photoresist layer 210 may be replaced by a negative photoresist layer, and the process variation thereof is as in the case of the first embodiment. Referring to FIG. 2C, after an upper wafer layer (not shown) is formed, 13 1331358 P950250 22737twfdoc/n another positive photoresist layer is formed, and the third photomask is used to the first second component region 204, 2〇2. Performing a third exposure step to simultaneously form the exposed regions and unexposed regions of the first second element region 202, and forming a first Y-direction strip-shaped unexposed region 216a in the positive photoresist layer in the predetermined region 200, first The strip-shaped unexposed regions 216b, the second gamma-direction strip-unexposed regions 216c, and the second-direction strip-shaped unexposed regions 216d. At this time, portions other than the strip-shaped unexposed areas 216a to 216d of the predetermined area 206 are exposed areas. Alternatively, the positive photoresist layer may be replaced by a negative photoresist layer, however, the pattern of the photomask used in the case must be complementary to the pattern of the third photomask described above. Then, development is performed to form a photoresist pattern of the first second element regions 2〇4, 2〇2, and at the same time, the strip-shaped unexposed regions 216a to 216d are strip-shaped photoresist patterns. Shapes 218a, 21, 218c, 218d It is surrounded by the aforementioned ditches 214a~2Md, as shown in Fig. 2D. The four trenches 214a to 214d and the four strip-shaped photoresist patterns 218a to 218d constitute the overlapping marks of the second embodiment. Referring to FIG. 2D, in the above process, the four trenches 214a to 2Md define a first rectangle 215, and the four strip photoresist patterns 218a to 218d define a second rectangle 219. The positional arrangement of the trenches 214a to 214d and the strip-shaped photoresist patterns 218a to 218d satisfies, for example, the following conditions: when the lower wafer layer is aligned with the lithography process king, the younger brother _ a Y-direction ditch 214a, 214c The intersection of the line with the line of the first and second X-direction trenches 214b, 214d and the line of the first and second γ-direction strip-shaped photoresist patterns 218a, 218c and the first and second strip-shaped photoresist patterns 218b, 218d The intersection of the middle lines coincides. In this case, the four trenches 214a to 214d and the four strip-shaped photoresist patterns 218a to 218d define, for example, a first square and a second square, respectively. 1331358 P950250 22737twfdoc / n Ming Mai photo 2D' with the above overlapping marks to estimate the alignment between the lower wafer layer pattern and the upper photoresist pattern of the first and second element regions 204, 202, for example, the lower Narrator. In terms of the alignment of the first element region tearing, the _ distance trace of the first and second γ-direction strip-shaped photoresist patterns 218a, 218c and the first-γ-direction ditches 214a are further determined by the preset The value comparison can be used to know the alignment of the wafer layer pattern under the first component region and the "alignment of the upper photoresist pattern in the X direction; measurement first - second

=„218b、218d之中線225與第—x向溝渠21扑 之間的距離230,再與預設的鮮航較,即可得 之下晶圓層圖案與其上方光阻圖案在丫方向上 在第二元件區2〇2的對準度方面,量測 元件[1 202^240 ’再與預设的標準值比較’即可得知第二 =件£ 202之下晶圓層圖案與其上方= 218b, 218d, the distance 225 between the line 225 and the -x to the ditches 21, and then compared with the preset fresh air, the lower wafer layer pattern and the upper photoresist pattern in the 丫 direction In terms of the alignment of the second element region 2〇2, the measuring element [1 202^240 ' is compared with the preset standard value] to know the wafer layer pattern below the second = piece 202

==第-第二X向條狀光阻圖== ^ 、’ 彳、弟一乂向溝渠214(1之間的距離250,真盘箱 =的標準值比較,即可得知第二元件區202之下日n j 就是第—第二元件區綱、2G2 圖=對準度也 程所定義之上晶圓層圖案之間的對準度I ·〜、該微影製 第三實施例 記的形成 圖3A〜3D繪示本發明第三實施例之重疊標 15 1331358 P950250 22737twf.doc/n 方法’其中圖3D I會示該重疊標記及其使用情形的一例。 本實施例中只有定義上晶圓層之微影製程包括一雙重曝光 製程,下晶圓層的圖案化製程的曝光步驟只有一次,其定 義第一與第二元件區。== The first-second X-direction strip-shaped photoresist diagram == ^, ' 彳, the younger one to the ditch 214 (the distance between the two is 250, the standard value of the true disk box = the second component can be known The area nj is the first-second element area, the 2G2 picture = the alignment degree between the wafer layer patterns defined by the alignment degree I · ~, the third embodiment of the lithography system 3A to 3D illustrate a superimposition 15 1331358 P950250 22737 twf.doc/n method of the third embodiment of the present invention, wherein FIG. 3D I shows an example of the overlapping mark and its use case. In this embodiment, only the definition is The lithography process of the wafer layer includes a double exposure process, and the exposure process of the patterning process of the lower wafer layer is only one time, which defines the first and second component regions.

請參照圖3A,在對第一第二元件區3〇4、3〇2進行使 用第-光罩的曝光辣時,㈣時在位於非元件區中之預 定區域306中的部分下晶圓層谓上的正光阻層31〇中形 成第一 Y向條狀曝光區312a、第一 χ向條狀曝光區312卜 第二Y向條狀曝光區312c與第二X向條狀曝光區312d。 312a^ci t的光阻材料會在後續的顯影製程中 弟-第—讀區3〇4、搬元件區中的曝光區同時被除 。,因此在其後用以形成第一第二元件區3〇4 3〇2之曰、 圓層圖案的侧製程中,對應之第-Y向溝渠314a、第Γ 2 = :?、第二Y向溝渠3MC與第二X向溝渠_ 曰开:成在該部分下晶圓層3〇8 +,如3d所示。 層310亦可換成負光阻層,不過,此時所用之 先罩的圖案須與前述第一光罩的圖案互補。 ^^犯,於-上晶圓層(未繪示)之後,即進 ,再使用第二光罩對第_二3=^_= ==成第一元件區304的曝光區與== 狀未曝内—半的正光阻層316中形成第— 及第—χ向條狀未曝光區遍,其“ —先罩上對應預定區域306的圖案如標號32者所示。Referring to FIG. 3A, when the first second element region 3〇4, 3〇2 is subjected to exposure exposure using the photomask, (4) a portion of the lower wafer layer in the predetermined region 306 in the non-element region. A first Y-direction strip-shaped exposure region 312a, a first-direction strip-shaped exposure region 312, a second Y-direction strip-shaped exposure region 312c, and a second X-direction strip-shaped exposure region 312d are formed in the positive photoresist layer 31. The photoresist material of 312a^ci t is simultaneously removed in the subsequent development process in the younger-first read zone 3〇4, the exposed area in the transfer element region. Therefore, in the side process for forming the first and second element regions 3〇4 3〇2 and the circular layer pattern, the corresponding first-Y direction trench 314a, second = 2 = :?, second Y To the trench 3MC and the second X-channel trench _ : open: the wafer layer 3 〇 8 + in this portion, as shown in 3d. Layer 310 can also be replaced with a negative photoresist layer, however, the pattern of the mask used at this time must be complementary to the pattern of the first mask described above. ^^, after the upper wafer layer (not shown), then enter, and then use the second mask pair _ 2 3 = ^ _ = = = into the first element area 304 exposure area and = = The first and the first-perforated strip-shaped unexposed regions are formed in the unexposed inner-half positive photoresist layer 316, and the pattern of the corresponding predetermined region 306 is shown as the label 32.

S 16 1331358 * . P950250 22737twf.d〇c/n 請參照圖3C,接著使用第三光罩對第二元件區3〇2 進行第三曝光步驟’以同時形成第二元件區3〇2的曝光區 與未曝光區,並在預定區域306内另一半的正光阻層316 中形成第二Y向條狀未曝光區316c及第二X向條狀未曝 光區316d’其中第三光罩上對應預定區域3〇6的圖案如標 號34者所示。此時預定區域306之除條狀未曝光區 316a〜316d以外的部分皆為曝光區。 • 接著進行顯影以形成第一第二元件區304、302的光阻 圖案’並同時使條狀未曝光區316a〜316(1成為條狀光阻圖 形 318a、318b、318c、318d,其被前述各溝渠 314a〜314d 所圍繞,如圖3D所示。這4條溝渠314a〜314d及4條狀 光阻圖形318a〜318d即構成本第三實施例之重疊標記。 請參照圖3D,在以上製程中,4條溝渠314a〜3Md定 義出第一矩形315,且4條狀光阻圖形318a〜318d定義出 第一矩开> 319。溝渠314a〜314d和條狀光阻圖形3i8a〜3i8d 的位置安排例如滿足以下條件:當下晶圓層與該微影製程 完全對準時,第一第二γ向溝渠314a、314c之中線與第 一第一 X向溝渠314b、314d之中線的交點和第一第二γ 向條狀光阻圖形318a、318c之中線與第一第二χ向條狀 光阻圖形318b、318d之中線的交點重合。在此情形下,4 條溝渠314a〜314d與4條狀光阻圖形318a〜318d例如是分 別定義出第一正方形與第二正方形。 請續參照圖3 D ’以上述重疊標記推知第一第二元件區 304、302各自之中下晶圓層圖案與其上方光阻圖案的對準 17 1331358S 16 1331358 * . P950250 22737twf.d〇c/n Referring to FIG. 3C, the third exposure step is performed on the second element region 3〇2 using the third mask to simultaneously form the exposure of the second element region 3〇2. a second Y-direction strip unexposed area 316c and a second X-direction strip unexposed area 316d' are formed in the positive and negative resistive layers 316 of the other half of the predetermined area 306, wherein the third mask corresponds The pattern of the predetermined area 3〇6 is as indicated by reference numeral 34. At this time, portions other than the strip-shaped unexposed regions 316a to 316d of the predetermined region 306 are exposed regions. • development is then performed to form the photoresist pattern ' of the first second element regions 304, 302 and simultaneously strip-shaped unexposed regions 316a-316 (1 become strip-shaped photoresist patterns 318a, 318b, 318c, 318d, which are Each of the trenches 314a to 314d is surrounded, as shown in Fig. 3D. The four trenches 314a to 314d and the four strip photoresist patterns 318a to 318d constitute the overlapping marks of the third embodiment. Referring to Fig. 3D, in the above process The four trenches 314a to 3Md define a first rectangle 315, and the four strip photoresist patterns 318a to 318d define a first moment opening > 319. The positions of the trenches 314a to 314d and the strip photoresist patterns 3i8a to 3i8d The arrangement satisfies, for example, the following conditions: when the lower wafer layer is completely aligned with the lithography process, the intersection of the line between the first and second γ-direction trenches 314a, 314c and the first first X-direction trenches 314b, 314d A line connecting the second γ-direction strip-shaped photoresist patterns 318a and 318c to the intersection of the lines of the first and second-direction strip-shaped photoresist patterns 318b and 318d. In this case, the four trenches 314a to 314d and The four strip photoresist patterns 318a to 318d define, for example, a first square and a second square, respectively. Shaped. Please continue with reference to FIG. 3 D 'to the overlapping each mark being aligned with the inferred wafer layer pattern thereabove a second photoresist pattern to the first element region 304,302 171,331,358

1 I P950250 22737twf.doc/n 度的方法例如為下述者。在第一元件區3〇4的對準度方 面,量測第一 Y向條狀光阻圖形318a與第一第二γ向溝 渠314a、314c的中線327之間的距離32〇,再與預設的標 準值比較’即可得知第一元件區3〇4之光阻圖案與其下方 下晶圓層圖案在X方向上的對準度;量測第—χ向條狀光 阻圖形318b與第-第二Χ向溝渠遍、3Md的中線329 之間的距離謂’再與預設的鮮值味,即可得知第一The method of 1 I P950250 22737twf.doc/n is, for example, the following. In terms of the alignment of the first element region 3〇4, the distance between the first Y-direction strip-shaped photoresist pattern 318a and the first second γ-to-ditch 314a, 314c center line 327 is measured, and then The preset standard value comparison ' can be used to know the alignment degree of the photoresist pattern of the first component region 3〇4 and the lower wafer layer pattern in the X direction; and measure the first-direction strip photoresist pattern 318b The distance between the first and second ditches, the midline 329 of 3Md, is said to be 'the first fresh taste, and the first is known.

το件區304之光阻圖案與其下方之下晶圓層圖案在γ方向 上的對準度。 在第二元件區3G2的對準度方面,量測第二丫向條狀 光阻圖形318c與第一第二γ向溝渠遍、31如的中線奶 之間的距離340,再與職的鮮值比較,即可得知第二 區3G2之光阻圖案與其下方之下晶圓層圖案在γ方向 ^的對準度;量·: χ向條狀光阻_簡與第一第 向溝木314b、314d的中線329之間的距離350,再盥 準值ί較,即可得知第二元件區302之光阻圖案 …、之下晶圓層圖案在γ方向上的對準度。這些對準 件1ίί04、302中下晶圓層圖案與由前 衣i斤疋義之上晶圓層圖案之間的對準度。 曰η Μ上述4明可知’利用本發明之重疊標記,即可在下 ::層:圖案化製程與定義上晶圓層之微影製程二者中至 第一 人曝光製程,且這兩次曝光製程分別定義 下二Ϊ與第二元件區的情形下’檢查第-元件區中上 下曰曰®層在ΜΥ兩方向上的對準度,並檢查第二元件區 18 1331358 P950250 22737twf.doc/n 中上下晶圓層在x及Y兩方向上的對準度。 限定以較佳實施例揭露如上,然其並非用以 和範圍内,當可作些許之更動與潤飾,因 = 範圍當視伽之申請專·圍所界定者為準。 【圖式簡單說明】The alignment of the photoresist pattern of the region 304 with the wafer layer pattern below it in the gamma direction. In terms of the alignment degree of the second element region 3G2, the distance 340 between the second lateral strip-shaped photoresist pattern 318c and the first second γ to the trench line 31, such as the center line milk, is measured, and then Comparing the fresh values, the alignment of the photoresist pattern of the 3G2 in the second region with the wafer layer pattern below the γ direction can be known; the amount: the strip-shaped photoresist _ simple and the first first trench The distance 350 between the center lines 329 of the wood 314b, 314d, and then the value λ, can be used to know the alignment of the photoresist pattern of the second element region 302 and the wafer layer pattern in the γ direction. . The alignment between the lower wafer layer pattern of these alignment members 1 ίί04, 302 and the wafer layer pattern over the front cover.曰η Μ Μ 明 Μ Μ Μ 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用 利用The process defines the alignment of the lower and second component regions, respectively, to check the alignment of the upper and lower 曰曰® layers in the first component region in both directions, and check the second component region 18 1331358 P950250 22737twf.doc/n The alignment of the upper and lower wafer layers in both the x and Y directions. The invention is disclosed in the above preferred embodiments, but it is not intended to be used in the scope of the invention, and the scope of the invention is defined by the scope of the application. [Simple description of the map]

圖1Α〜1Ε綠示本發㈣—實施例之重疊標記的形成 方法,其中圖1Ε繪示該重疊標記及其使用情形的一例。 、圖2Α〜2D繪示本發明第二實施例之重疊標記的形成 方法,其巾® 2D繪補重疊標記及其使職形的一例。 圖3Α〜3D繪示本發明第三實施例之重疊標記的形成 方法,其中圖3D繪示該重疊標記及其使用情形的一例。 【主要元件符號說明】 12、14、32、34 :光罩圖案 102/202/302、104/204/304 :第二元件區、第—元件區 106、206、306 :預定區域Fig. 1 Α 1 1 Ε green display (4) - a method of forming an overlap mark of an embodiment, wherein Fig. 1 Ε shows an example of the overlap mark and its use case. 2A to 2D illustrate a method of forming an overlay mark according to a second embodiment of the present invention, in which the towel® 2D complements the overlap mark and an example of the job. 3A to 3D illustrate a method of forming an overlap mark according to a third embodiment of the present invention, and Fig. 3D shows an example of the overlap mark and its use case. [Description of main component symbols] 12, 14, 32, 34: reticle pattern 102/202/302, 104/204/304: second component area, first-element area 106, 206, 306: predetermined area

108、208、308 :部分的下晶圓層 110、116、210、310、316 :正光阻層 112a、212a、312a :第一 Υ向條狀曝光區 112b、212b、312b :第一 X向條狀曝光區 112c、212c、312c .弟—Y向條狀曝光區 112d、212d、312d :第二X向條狀曝光區 114a、214a、314a :第一 Y 向溝渠 114b、214b、314b :第一 X 向溝渠 19 1331358 P950250 22737twf.doc/n 114c、214c、314c :第二.Y 向溝準 114d、214d、314d:第二 X 向溝渠 115、215、315 :第二矩形 116a、216a、316a:第一 Y向條狀未曝光區 116b、216b、316b :第一 X向條狀未曝光區 116c、216c、316c :第二Y向條狀未曝光區 116d、216d、316d:第二X向條狀未曝光區 118a、218a、318a :第一 Y向條狀光阻圖形 Π 8b、218b、318b .第一 X向條狀光阻圖形 118c、218c、318c :第二Y向條狀光阻圖形 118d、218d、318d ·苐二X向條狀光阻圖形 119、 219、319 :第一矩形 120、 130、140、150、220、230、240、250、320、330、 340、350 :距離 223、225、327、329 :中線 Ι-Γ、ΙΙ-ΙΓ :剖面線 20108, 208, 308: part of the lower wafer layers 110, 116, 210, 310, 316: positive photoresist layers 112a, 212a, 312a: first vertical strip exposure regions 112b, 212b, 312b: first X-direction strips Exposure regions 112c, 212c, 312c. Di-Y-direction strip exposure regions 112d, 212d, 312d: second X-direction strip exposure regions 114a, 214a, 314a: first Y-direction trenches 114b, 214b, 314b: first X-direction ditches 19 1331358 P950250 22737twf.doc/n 114c, 214c, 314c: second. Y-direction grooves 114d, 214d, 314d: second X-direction ditches 115, 215, 315: second rectangles 116a, 216a, 316a: First Y-direction strip-shaped unexposed areas 116b, 216b, 316b: first X-direction strip-shaped unexposed areas 116c, 216c, 316c: second Y-direction strip-shaped unexposed areas 116d, 216d, 316d: second X-direction strip Unexposed areas 118a, 218a, 318a: first Y-direction strip photoresist patterns b 8b, 218b, 318b. First X-direction strip-shaped photoresist patterns 118c, 218c, 318c: second Y-direction strip-shaped photoresist pattern 118d, 218d, 318d · 苐 two X-direction strip photoresist patterns 119, 219, 319: first rectangle 120, 130, 140, 150, 220, 230, 240, 250, 320, 330, 340, 350: distance 223 , 225, 327, 329: midline Ι-Γ, ΙΙ-ΙΓ: section line 20

Claims (1)

99-7-29 99-7-29 月&gt; 修正 3充 曰 申請專利範困 1· 一種 曰圓辣4叠標記,用以檢查經過—_化製程之-下 :麵疋義-上晶圓層之-微影製程之間 該的一部分’其中有一第 2 -第-Y向下條狀圖形、一第 =圖 第二Y向下條狀圖形;以及 门卜條狀圖形及- 由該微影製程所形成的一第 向及―第二丫向條狀光阻 曰曰圓層的上方,且被該些下條狀圖形所圍繞,4 Μ -欠曝與該郷製程二者巾至少有二者包括兩 曝ί步驟’刀別用以定義—第—元件區與-第二元件區; S該圖案化製程包括兩次曝光步時·&quot; 條狀圖形與該第—Υ向下錄圖_時定義,i該 向下條狀圖形與該第二丫向下條狀圖形同時定義;並且 當該微影製程包括兩次曝光步驟時,該第一 χ 光阻圖形與該第—γ向條狀光阻_贿定義,且該第、二 χ向條狀光阻®形與該f二¥祕狀光關_時定義。 2·如申請專利範圍第1項所述之重疊標記,其中每一 下條狀圖形包括該下晶圓層中的一溝渠。 3. 如申請專利範圍第1項所述之重疊標記,其中該些 下條狀圖形定義出一第一矩形,且該些條狀光阻圖形定義 出一第二矩形。 4. 如申請專利範圍第3項所述之重疊標記’其中該第 21 1331358 99-7-29 一X向下條狀圖形和該第二X向下條狀圖形之間的中線與 該第一Y向下條狀圖形和該第二γ向下條狀圖形之間的中 線有一個第一交點,該第一 X向條狀光阻圖形和該第二χ 向條狀光阻圖形之間的中線與該第—γ向條狀光阻圖形和 該第二γ向條狀光阻圖形之間的中線有一個第二交點,當 該下晶圓層與該微影製程完全對準時,該第二交點與該; 一交點重合。 5·如申請專利範圍第4項所述之重疊標記,其中當該 下晶圓層與該微影製程完全對準時,該第一矩形與該第Γ 矩形皆為正方形。 〜 6·如申請專利範圍第3項所述之重疊標記,其中 該第一X向與第一γ向下條狀圖形以第一曝光步騍定 義’該第二X向與第二γ向下條狀圖形以第二曝光步驟定 f,該第一X向與第一γ向條狀光阻圖形以第三曝光步騍 定義’且該第二X向與第二丫向條狀光阻圖形 步驟定義; 布嗓先 該第一與第三曝光步驟是用以定義該第一元件區, 該第二與第四曝光步驟是用以定義該第二元件區;並且 ,第-矩形之由該第—X向與第—Y向下條狀圖 疋義的兩邊對應該第二矩形之由該第一χ向與第 狀光阻圖形所定義的兩邊,且該I矩形之錢第二3 與第,γ向下條狀圖形所定義的兩邊對應該第二矩形之^ 該第二X向與第二丫向紐光_賴定義的兩邊。 7·如申請專利範圍第1項所述之重疊標記,其中該兩 22 99-7-29 次曝光步驟组成一雙重曝光製程。 8.如申請專利範圍第7項所述之重疊標記,其中該第 元件區為圖案您集區’該第一元件區為一圖案稀疏區。 —9.如申請專利範圍第8項所述之重疊標記,其中該圖 案密集區為一記憶胞陣列區,且該圖案稀疏區 邊電 路區。 ιυ.— .悝夏登棵記的形成方法,該重疊標記是用以檢查 ,-圖案化製程之一下晶圓層與定義一上晶圓層之一微 衫製程之間的對準度,該形成方法包括: 在該圖案化製程中,於該下晶圓層的一部分中形成一 X向下條狀圖形一第—Υ向下條狀圖形、一第二乂 。下條狀圖形及-第二Υ向下條狀圖形;以及 =微影製程中,於該部分之該下晶圓層的上方形成 狀朵…向、:第一丫向、一第二χ向及-第二γ向條 先阻圖形,其被該些下條狀圖形圍繞,其令 該圖案化製程與該微影製程二者中 次曝分別㈣定H元倾與;兩 條狀製程包括兩次曝光步驟時’該第一 x向下 向下二】:;:向下條狀圖形同時定義,且該第二χ 本該微弋—Υ向下條狀圖形同時定義; 光阻二==曝光步驟時,該第一 χ向條狀 X向條狀紋狀光__時㈣,且該第二 11 第二Y向條狀光阻圖形同時定義。 n.如申請專利範圍第10項所述之重疊標記=方 23 1331358 99-7-29 法,其中每一下條狀圖形包括該下晶圓層中的一溝渠。 12. 如申請專利範圍第1G項所述之重疊標記的开讀方 法,其中該些下條狀圖形定義n矩形,且該些條狀 光P且圖形定義出一第二矩形。 13. 如申請專利朗第12項所述之重疊標記的形成方 法,其中該第-X向下條狀圖形和該第向下條狀圖形 之間的中線與該第—Υ向下條狀圖形和該第二γ向下條狀 圖形之間的中線有-個第-交點,該第—χ向條狀光阻圖 形和該第二X向條狀光阻圖形之_中線與該第一 ¥向條 狀光阻圖形和該第二Υ向條狀光阻圖形之間的中線有一個 第二交點’倾下晶_與賴影製程完 二交點與該第一交點重合。 斧 14. 如申請專利範圍第13項所述之重疊標 法’其中當該下晶圓層與额職程完全 矩形與該第二矩形皆為正方形β 乐 法,利範1第12項所述之重疊標記的形成方 義向下條狀圖形以第一曝光步驟定 ί:3:二Ϊ二二向下條狀圖形以第二曝光步驟定 定義,且該第二X向與第第三曝光步驟 步驟定義; 帛—γ向條狀光_形以第四曝光 光步驟是用以定義該第-元件區,且 該第二與第㈣光步驟是用叹義該第二元件區;並且 24 -L JJ0 -L JJ0 99-7-29 定義的兩邊對應該形- 2下條狀圖形所 與第CtT第一矩形之由該第二X向 該第二X向與第一 的兩邊對應該第二矩形之由 i ^申請專鄕園的兩邊。 法,㈣16項所述之重疊標記的形成方 -圖案=7°件區為-圖案密集區’該第二元= 法,Hlf”範圍第17項所述之重疊標記的形成方 區為二周^電=集區為一記憶胞陣列區,且該圖案稀疏 程之查的方法,用以檢查經過一圖案化製 :曰曰圓層和疋義一上晶圓層之一微影製程之間的對 一二舌該圖案化製程與該微影製程二者中至少有一者包括 一,重曝光製程,該雙重曝光製程包括分別用以定義一第 元件區與-第二元件區的兩次曝光步驟,該方法包括: 形成一重疊標記’其步驟包括: 在該圖案化製程中,於該下晶圓層的一部分中形 成一第一 X向下條狀圖形、一第一 γ向下條狀圖形、 一第二x向下條狀圖形及一第二γ向下條狀圖形;以 及 在該微影製程中,於該部分之該下晶圓層的上方 25 99-7-29 置 下晶圓 一第一 x向、一第…、-第二X向及一第 =向條狀光阻圖形,其被該些下條狀圖形圍繞,复 田該圖案化製程包括一雙重曝光製程時,該二 條狀圖形與該第—γ向下條狀圖卵時定義,且 2二X向下條狀圖形與該第二¥向下條狀圖形 —義,而當該微影製程包括一雙重曝光製程時,該 2向條狀光_形與該第—γ向條狀光_形°同 義’且該第二χ向條狀光阻圖形與該第二 光阻圖形同時定義;以及 條狀 條狀光阻圖形相對於各該下條狀圖形的位 估异在該第一元件區與該第二元件區各自之 圓層輿該撒敏金j -V日曰此,1. =X 〜’TIHE丹咏矛一凡1干區谷自之中, 度 層與該微影製程之間的X方向對準度與γ方向對^ 19 其中母K条狀圖形包括該下晶圓層中的一溝渠。 21.如申請專利範圍第19項所述之檢查對準产 ',其中該些下條狀_定義出一第—矩形,且条狀 先阻圖形定義出一第二矩形。 —條狀 22·如申請專利範圍第21項所狀檢查對準度的 中該第—x向下條狀圖形和該第二X向下條ΐ圖形 4的中線與該第-Y向下紐卿和該第二 ,間的中線有一個第一交點,該第…條狀= 形和該第二X向條狀光阻圖形之間的中線與該第一Y向箱 狀光阻圖形和該第二γ向條狀光阻圖形之間的中線有一值 26 1331358 99-7-29 第二交點’當該下晶8層細微影製料全對準時,該第 二交點與該第一交點重合。 μ 23.如申明專利乾圍第22項所述之檢查對準度的方 法’其中當該下晶圓層與該微影製程完全對準時,該 矩形與該第二矩形皆為正方形。 Λ ,24.Μ請專鄉_ 21韻述讀查脾度的方 法,其中 義,ϋ- X二^ Υ向下條狀圖形以第-曝光步驟定 義,該第一X向與第二γ向 義,該第-X向與第狀圖形以第一曝光步驟定 定義,且該第二X向與第三曝光步驟 步驟定義; 向條狀光阻圖形以第四曝光 該第驟是用以定義該第-元件區,且 該第-矩形之由定義該第二元件區;並且 疋義的兩邊對應兮第 向與第一Υ向下條狀圖形所 狀先阻圖形所^二矩形之由該第一Χ向與第 一 Υ向條 ^二丫向下條㈣之由該第二χ向 向與第二義相應該第二矩形之由 條狀光阻圖形所定義的兩邊。 2799-7-29 99-7-29 Month&gt; Correction 3 Filling the patent application case 1 · A round and spicy 4 stack mark for checking the process of the process - the process a portion of the layer-to-shadow process between which has a 2nd-th-Y downward strip pattern, a second pattern = a second Y downward strip pattern, and a gate strip pattern and - by the lithography process Forming a first direction and a second-direction strip-shaped photoresist layer above and surrounded by the lower strip-shaped patterns, at least two of which are included in the undercut and the undercut process The two exposure steps 'knife are used to define - the first component area and the second component area; S the patterning process includes two exposure steps · &lt; strip graphics and the first - Υ downward recording _ Defining, i the downward strip pattern is defined simultaneously with the second down strip pattern; and when the lithography process comprises two exposure steps, the first photoresist pattern and the first gamma strip photoresist _ Bribe definition, and the first and second directions are defined by the strip-shaped photoresist pattern and the fringe. 2. The overlay mark of claim 1, wherein each of the lower strip patterns comprises a trench in the lower wafer layer. 3. The overlay mark of claim 1, wherein the lower strip patterns define a first rectangle, and the strip pattern patterns define a second rectangle. 4. The overlap mark according to item 3 of the patent application scope, wherein the 21st line between the X 1331358 99-7-29-X downward strip pattern and the second X-down strip pattern is associated with the first Y a center line between the downward strip pattern and the second γ-down strip pattern has a first intersection, a center line between the first X-direction strip-shaped photoresist pattern and the second-direction strip-shaped photoresist pattern Forming a second intersection with the center line between the first γ-direction strip-shaped photoresist pattern and the second γ-direction strip-shaped photoresist pattern, when the lower wafer layer is completely aligned with the lithography process, the first Two intersections and the; one intersection coincides. 5. The overlay mark of claim 4, wherein the first rectangle and the second rectangle are square when the lower wafer layer is fully aligned with the lithography process. </ RTI> </ RTI> </ RTI> </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> </ RTI> <RTIgt; The pattern is determined by a second exposure step f, the first X-direction and the first γ-direction strip-shaped photoresist pattern are defined by a third exposure step ′ and the second X-direction and second bis-direction strip-shaped photoresist pattern steps are defined The first and third exposure steps are for defining the first component region, the second and fourth exposure steps are for defining the second component region; and, the first rectangle is the first component region; The two sides of the X-direction and the -Y-down bar graph correspond to the two sides defined by the first pupil and the first photoresist pattern, and the money of the I rectangle is the second 3 and the first, γ The two sides defined by the downward stripe pattern correspond to the two sides of the second rectangle and the second side of the second X-ray. 7. The overlap mark as described in claim 1 wherein the two 22 99-7-29 exposure steps constitute a double exposure process. 8. The overlay mark of claim 7, wherein the first element area is a pattern of the pool area. The first element area is a pattern sparse area. The overlay mark of claim 8, wherein the pattern dense area is a memory cell array area, and the pattern is sparse area side circuit area. υ υ — — — — — — — 悝 悝 悝 悝 悝 悝 悝 悝 悝 悝 悝 悝 悝 悝 悝 悝 悝 悝 悝 悝 悝 悝 悝 悝 悝 悝 悝 悝 悝 悝 悝 悝 悝 悝 悝 悝 悝 悝 悝The forming method includes: forming, in the patterning process, an X-down bar-shaped pattern, a first-down bar-shaped pattern, and a second ridge in a portion of the lower wafer layer. a lower strip pattern and a second second downward strip pattern; and a lithography process, forming a shape above the lower wafer layer of the portion... direction: first direction, second direction and a second gamma-ray strip first-resistance pattern surrounded by the lower strip-like patterns, wherein the patterning process and the lithography process are respectively exposed to a sub-exposure (4), and the two-dimensional process includes two exposures. When the step is 'the first x down 2'::;: the downward bar pattern is defined at the same time, and the second χ 该 Υ Υ Υ Υ Υ Υ Υ Υ Υ Υ ; ; ; Υ Υ Υ Υ Υ = = = = = = = = = = The first twisted strip X-shaped strip-shaped strip light __ (four), and the second 11 second Y-direction strip photoresist pattern are simultaneously defined. n. The overlap mark of claim 10, wherein the lower strip pattern includes a trench in the lower wafer layer. 12. The method of reading an overlay mark as described in claim 1G, wherein the lower strip patterns define n rectangles, and the strips of light P and the pattern define a second rectangle. 13. The method of forming an overlap mark according to claim 12, wherein a center line between the first-X downward strip pattern and the lower strip pattern and the first-down strip pattern and the The center line between the second γ-down strip patterns has a first-intersection point, the first-direction strip-shaped photoresist pattern and the _ center line of the second X-direction strip-shaped photoresist pattern and the first direction The center line between the strip-shaped photoresist pattern and the second-direction strip-shaped photoresist pattern has a second intersection point 'pour-off crystal' and the second intersection of the ray-forming process coincides with the first intersection. Axe 14. The overlapping method as described in claim 13 of the patent application, wherein when the lower wafer layer and the forehead are completely rectangular and the second rectangle is square β, the method described in item 12 of Lifan 1 The forming of the overlapping mark is defined by the first exposure step: 3: the second downward bar pattern is defined by the second exposure step, and the second X and third exposure step steps are defined a 帛-γ-direction strip light _-shaped fourth exposure light step is used to define the first element region, and the second and fourth (fourth) light steps are to sigh the second element region; and 24-L JJ0 -L JJ0 99-7-29 defines the two sides corresponding to the shape of the second strip and the second rectangle of the CtT first rectangle from the second X to the second X and the first two sides corresponding to the second rectangle i ^ Apply for both sides of the park. Method, (4) The formation of the overlap mark described in item 16 is - pattern = 7° piece area is - pattern dense area 'The second element = method, Hlf" range 17th item of the overlap mark is formed for two weeks ^Electrical = the cluster is a memory cell array, and the method of pattern sparseness is used to check between a patterning process: a circular layer and a lithography process on a wafer layer At least one of the patterning process and the lithography process includes a re-exposure process including two exposure steps for defining a first element region and a second element region, respectively. The method includes: forming an overlap mark, the step of: forming, in the patterning process, forming a first X-down strip pattern, a first γ-down strip pattern, and a portion of the lower wafer layer a second x-down strip pattern and a second γ-down strip pattern; and in the lithography process, the wafer is first placed on the lower portion of the lower wafer layer 25 99-7-29 To, a first..., a second X direction, and a second = strip photoresist pattern, Surrounded by the lower strips, the patterning process of Futian includes a double exposure process, the two strip patterns are defined with the first γ downward strip image, and the 2nd X down strip pattern and the second The downward strip pattern is defined, and when the lithography process comprises a double exposure process, the 2-direction strip light _ shape is synonymous with the first γ-strip strip light _ shape and the second slant strip The photoresist pattern is defined simultaneously with the second photoresist pattern; and the strip strip photoresist pattern is estimated to be different from each of the lower strip patterns in a circular layer of the first element region and the second element region. The Samin's j-V is 曰 ,, 1. =X ~ 'TIHE 咏 咏 一 凡 一 一 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 ^ 19 wherein the parent K strip pattern includes a trench in the lower wafer layer. 21. The inspection alignment product as described in claim 19, wherein the lower strips define a first rectangle. And the strip-shaped first-resistance pattern defines a second rectangle. - Strips 22 · Check the alignment degree as in the scope of claim 21 The middle line of the first-x downward strip pattern and the second X-down strip pattern 4 has a first intersection with the mid-line of the first-Y downward button and the second, the first... a neutral line between the shape and the second X-direction strip photoresist pattern and a center line between the first Y-direction box-shaped photoresist pattern and the second γ-direction strip-shaped photoresist pattern has a value of 26 1331358 99-7-29 Second intersection point 'When the underlying 8-layer micro-shadow material is fully aligned, the second intersection point coincides with the first intersection point. μ 23. For example, the inspection pair described in claim 22 The method of accuracy 'where the rectangle and the second rectangle are both square when the lower wafer layer is completely aligned with the lithography process. Λ , 24. 专 专 专 _ 韵 韵 韵 韵 韵 的 的, wherein the first X direction and the second γ are defined by a first exposure step defined by the first exposure step, wherein the first X direction and the second γ are defined by a first exposure step, And the second X-direction and the third exposure step are defined; the fourth exposure to the strip-shaped photoresist pattern is used to define the first-element region, and the first-rectangle By defining the second component region; and the two sides of the derogation correspond to the first direction and the first Υ downward strip pattern, the first resistance pattern is formed by the first 与 direction and the first 条 条 ^ The lower strip (four) is bounded by the second side and the second side corresponding to the two sides defined by the strip photoresist pattern. 27
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