US10289605B2
(en)
|
2006-04-12 |
2019-05-14 |
Intel Corporation |
Apparatus and method for processing an instruction matrix specifying parallel and dependent operations
|
US11163720B2
(en)
|
2006-04-12 |
2021-11-02 |
Intel Corporation |
Apparatus and method for processing an instruction matrix specifying parallel and dependent operations
|
US9886416B2
(en)
|
2006-04-12 |
2018-02-06 |
Intel Corporation |
Apparatus and method for processing an instruction matrix specifying parallel and dependent operations
|
US9965281B2
(en)
|
2006-11-14 |
2018-05-08 |
Intel Corporation |
Cache storing data fetched by address calculating load instruction with label used as associated name for consuming instruction to refer
|
US10585670B2
(en)
|
2006-11-14 |
2020-03-10 |
Intel Corporation |
Cache storing data fetched by address calculating load instruction with label used as associated name for consuming instruction to refer
|
US10228949B2
(en)
|
2010-09-17 |
2019-03-12 |
Intel Corporation |
Single cycle multi-branch prediction including shadow cache for early far branch prediction
|
US9842005B2
(en)
|
2011-03-25 |
2017-12-12 |
Intel Corporation |
Register file segments for supporting code block execution by using virtual cores instantiated by partitionable engines
|
US9934072B2
(en)
|
2011-03-25 |
2018-04-03 |
Intel Corporation |
Register file segments for supporting code block execution by using virtual cores instantiated by partitionable engines
|
US10564975B2
(en)
|
2011-03-25 |
2020-02-18 |
Intel Corporation |
Memory fragments for supporting code block execution by using virtual cores instantiated by partitionable engines
|
US9766893B2
(en)
|
2011-03-25 |
2017-09-19 |
Intel Corporation |
Executing instruction sequence code blocks by using virtual cores instantiated by partitionable engines
|
US9990200B2
(en)
|
2011-03-25 |
2018-06-05 |
Intel Corporation |
Executing instruction sequence code blocks by using virtual cores instantiated by partitionable engines
|
US11204769B2
(en)
|
2011-03-25 |
2021-12-21 |
Intel Corporation |
Memory fragments for supporting code block execution by using virtual cores instantiated by partitionable engines
|
US9921845B2
(en)
|
2011-03-25 |
2018-03-20 |
Intel Corporation |
Memory fragments for supporting code block execution by using virtual cores instantiated by partitionable engines
|
US10372454B2
(en)
|
2011-05-20 |
2019-08-06 |
Intel Corporation |
Allocation of a segmented interconnect to support the execution of instruction sequences by a plurality of engines
|
US10031784B2
(en)
|
2011-05-20 |
2018-07-24 |
Intel Corporation |
Interconnect system to support the execution of instruction sequences by a plurality of partitionable engines
|
US9940134B2
(en)
|
2011-05-20 |
2018-04-10 |
Intel Corporation |
Decentralized allocation of resources and interconnect structures to support the execution of instruction sequences by a plurality of engines
|
US10521239B2
(en)
|
2011-11-22 |
2019-12-31 |
Intel Corporation |
Microprocessor accelerated code optimizer
|
US10191746B2
(en)
|
2011-11-22 |
2019-01-29 |
Intel Corporation |
Accelerated code optimizer for a multiengine microprocessor
|
US9891915B2
(en)
|
2013-03-15 |
2018-02-13 |
Intel Corporation |
Method and apparatus to increase the speed of the load access and data return speed path using early lower address bits
|
US9886279B2
(en)
|
2013-03-15 |
2018-02-06 |
Intel Corporation |
Method for populating and instruction view data structure by using register template snapshots
|
TWI619077B
(zh)
*
|
2013-03-15 |
2018-03-21 |
英特爾股份有限公司 |
執行群組爲區塊的多重執行緒指令的方法、電腦可讀取媒體及電腦系統
|
US11656875B2
(en)
|
2013-03-15 |
2023-05-23 |
Intel Corporation |
Method and system for instruction block to execution unit grouping
|
US9904625B2
(en)
|
2013-03-15 |
2018-02-27 |
Intel Corporation |
Methods, systems and apparatus for predicting the way of a set associative cache
|
US9965285B2
(en)
|
2013-03-15 |
2018-05-08 |
Intel Corporation |
Method and apparatus for efficient scheduling for asymmetrical execution units
|
US9898412B2
(en)
|
2013-03-15 |
2018-02-20 |
Intel Corporation |
Methods, systems and apparatus for predicting the way of a set associative cache
|
US9891924B2
(en)
|
2013-03-15 |
2018-02-13 |
Intel Corporation |
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|
US10140138B2
(en)
|
2013-03-15 |
2018-11-27 |
Intel Corporation |
Methods, systems and apparatus for supporting wide and efficient front-end operation with guest-architecture emulation
|
US10146548B2
(en)
|
2013-03-15 |
2018-12-04 |
Intel Corporation |
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|
US10146576B2
(en)
|
2013-03-15 |
2018-12-04 |
Intel Corporation |
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|
US10169045B2
(en)
|
2013-03-15 |
2019-01-01 |
Intel Corporation |
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|
US10180856B2
(en)
|
2013-03-15 |
2019-01-15 |
Intel Corporation |
Method and apparatus to avoid deadlock during instruction scheduling using dynamic port remapping
|
US9569216B2
(en)
|
2013-03-15 |
2017-02-14 |
Soft Machines, Inc. |
Method for populating a source view data structure by using register template snapshots
|
US10198266B2
(en)
|
2013-03-15 |
2019-02-05 |
Intel Corporation |
Method for populating register view data structure by using register template snapshots
|
US9934042B2
(en)
|
2013-03-15 |
2018-04-03 |
Intel Corporation |
Method for dependency broadcasting through a block organized source view data structure
|
US10248570B2
(en)
|
2013-03-15 |
2019-04-02 |
Intel Corporation |
Methods, systems and apparatus for predicting the way of a set associative cache
|
US10255076B2
(en)
|
2013-03-15 |
2019-04-09 |
Intel Corporation |
Method for performing dual dispatch of blocks and half blocks
|
US10275255B2
(en)
|
2013-03-15 |
2019-04-30 |
Intel Corporation |
Method for dependency broadcasting through a source organized source view data structure
|
US9858080B2
(en)
|
2013-03-15 |
2018-01-02 |
Intel Corporation |
Method for implementing a reduced size register view data structure in a microprocessor
|
US9823930B2
(en)
|
2013-03-15 |
2017-11-21 |
Intel Corporation |
Method for emulating a guest centralized flag architecture by using a native distributed flag architecture
|
US10503514B2
(en)
|
2013-03-15 |
2019-12-10 |
Intel Corporation |
Method for implementing a reduced size register view data structure in a microprocessor
|
US9811377B2
(en)
|
2013-03-15 |
2017-11-07 |
Intel Corporation |
Method for executing multithreaded instructions grouped into blocks
|
US10552163B2
(en)
|
2013-03-15 |
2020-02-04 |
Intel Corporation |
Method and apparatus for efficient scheduling for asymmetrical execution units
|
US9811342B2
(en)
|
2013-03-15 |
2017-11-07 |
Intel Corporation |
Method for performing dual dispatch of blocks and half blocks
|
US9632825B2
(en)
|
2013-03-15 |
2017-04-25 |
Intel Corporation |
Method and apparatus for efficient scheduling for asymmetrical execution units
|
US10740126B2
(en)
|
2013-03-15 |
2020-08-11 |
Intel Corporation |
Methods, systems and apparatus for supporting wide and efficient front-end operation with guest-architecture emulation
|
US9582322B2
(en)
|
2013-03-15 |
2017-02-28 |
Soft Machines Inc. |
Method and apparatus to avoid deadlock during instruction scheduling using dynamic port remapping
|
US9575762B2
(en)
|
2013-03-15 |
2017-02-21 |
Soft Machines Inc |
Method for populating register view data structure by using register template snapshots
|
US9946538B2
(en)
|
2014-05-12 |
2018-04-17 |
Intel Corporation |
Method and apparatus for providing hardware support for self-modifying code
|