TWI328980B - A layout and method for reducing crosstalk between parallel signal lines - Google Patents

A layout and method for reducing crosstalk between parallel signal lines Download PDF

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TWI328980B
TWI328980B TW94136955A TW94136955A TWI328980B TW I328980 B TWI328980 B TW I328980B TW 94136955 A TW94136955 A TW 94136955A TW 94136955 A TW94136955 A TW 94136955A TW I328980 B TWI328980 B TW I328980B
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line
delay
parallel
signal lines
crosstalk
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TW94136955A
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Chinese (zh)
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TW200718293A (en
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Yu-Hsu Lin
Shang Tsang Yeh
Chuan-Bing Li
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Hon Hai Prec Ind Co Ltd
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九 、發明說明: 【發明所屬之技術領域】 的佈線ί 行訊號線路間遠端串損 【先前技術】 而對:在ΐ輸通道上傳輸時,因電磁耦合 線上注入了耦:電5體現爲在被干擾之訊號Nine, invention description: [Technical field of the invention] Wiring of the far-end line loss between the lines of the signal [Prior Art] And: When transmitting on the transmission channel, the coupling is injected on the electromagnetic coupling line: the electric 5 is embodied as Signal being disturbed

產口中,而且隨著訊號速率之提高, 加:漸減小’數位系統總串擾量也急劇增 之-敕曰影響系統之性能,嚴重影響訊號傳輸 常,甚至引起電路之誤觸發,導致系統無法正 決击述情況,業界需要進行串擾分析並探索解 ‘ ®4之方法。業界解決事擾通常從以下 面考慮:In the mouth of the product, and as the signal rate increases, the increase: the total crosstalk of the digital system also increases sharply - affecting the performance of the system, seriously affecting the signal transmission, and even causing false triggering of the circuit, resulting in the system being unable to To determine the situation, the industry needs to conduct crosstalk analysis and explore the solution to 'TM4'. The industry's solution to the problem is usually considered from the following:

a) 降低§fl號緣之變換速率。通常器件選型時, ΐ滿设計規範之同時,儘量選擇訊號緣變換速率較 忮之器件,並且避免不同種類之訊號混合使用,因爲 快速變換之訊號有潛在之串擾危險。 b) 採用遮罩措施。爲訊號提供包地是解決串擾 問題之有效途徑。然而包地會導致佈線量增加,使原 本有限之佈線區域更為擁擠。此外,地線遮罩要達到 預期目的,地線上接地點間距一般要小於訊號變化緣 長度之兩倍。同時地線也會增大訊號之分佈電容,使 傳輸線阻抗增大,訊號緣變緩。 c) 合理設置層和佈線。合理設置佈線層和佈線 間距,減小並行訊號線之長度,縮短訊號層和平面層 之間距,增大訊號線之間距,減小並行訊號線長度, 6 1328980 諸如此類措施都可以減小串擾。 d)設置不同之佈線層。爲不同速率之訊號設置 不同的佈線層,並合理設置平面層,也是解決串擾之 方法之一。a) Reduce the rate of change of the §fl edge. In general, when selecting a device, try to select a device with a better signal edge conversion rate and avoid mixing different types of signals, because the fast-changing signal has the potential for crosstalk. b) Use masking measures. Providing a packet for the signal is an effective way to solve the crosstalk problem. However, the package will cause an increase in the amount of wiring, making the originally limited wiring area more crowded. In addition, the ground plane mask should achieve the intended purpose, and the grounding point spacing on the ground line is generally less than twice the length of the signal change edge. At the same time, the ground line also increases the distributed capacitance of the signal, so that the impedance of the transmission line increases and the edge of the signal becomes slower. c) Set the layers and wiring properly. Reasonably set the wiring layer and wiring spacing, reduce the length of the parallel signal line, shorten the distance between the signal layer and the plane layer, increase the distance between the signal lines, and reduce the length of the parallel signal line. 6 1328980 Such measures can reduce crosstalk. d) Set different wiring layers. Setting different wiring layers for signals of different speeds and setting the plane layer reasonably is also one of the methods to solve crosstalk.

從以上第c)種解決方案中可知減小並行訊號線之長 度和增大訊號線之間距可以相應減小串擾,若並行訊 號線之長度和間距均不允許再改變,而並行訊號線間 必然 >產生由近及遠逐漸增加之遠端串擾。在習知技術 中,該並行訊號線平行傳輸,若以Lm表示兩訊號線 間之互感,L表示各訊號線的感抗,Cm表 =之互容’C表示各訊號線之容抗,“表 輸訊號上升緣延時,Tpd表示受擾線中串擾訊 唬傳輸之時間,則遠端串擾FEXT的計算如下: F五灯[%]=_Zk 1ττIt can be seen from the above solution c) that reducing the length of the parallel signal line and increasing the distance between the signal lines can reduce crosstalk correspondingly. If the length and spacing of the parallel signal lines are not allowed to be changed, the parallel signal lines are inevitable. > Produces far-end crosstalk that increases gradually from near to far. In the prior art, the parallel signal lines are transmitted in parallel. If Lm is the mutual inductance between the two signal lines, L is the inductive reactance of each signal line, and the mutual capacitance 'C of the Cm table= indicates the capacitive reactance of each signal line. The table signal signal rises the delay time, and Tpd indicates the time of the crosstalk signal transmission in the victim line. The far end crosstalk FEXT is calculated as follows: F five lights [%]=_Zk 1ττ

L C -S] 阵、見侵擾線對受擾線在各時間點之遠端串擾將 敁文擾線中串擾訊號傳輸時間之增 _L C -S] array, see the intrusion line to the far-end crosstalk of the victim line at each time point will increase the transmission time of the crosstalk signal in the framed line _

=線間之介電參數-定時’該並行訊“ Td -圖中:直IK以得二其仿真曲線圖“ 串Ϊ波形之時間點’在座標圖形中,橫座^表 Β,單位爲秒;縱座標表示振幅,盆單位爲^ :該=曲〇=可以看出,此時遠端串二幅較 二二::r伏,且該串擾訊號延時 性,ΐ ί ί:要串二在訊λ線間影響傳輸訊號之完整 擾之佈線ί構與方法:種減小並行訊號線路間遠端串 【發明内容】 7 ® 味姑ΐ於以上技術内容,有必要提供一種減小並行π 旒線路間遠端串擾之佈線架構及方法。 β 二種減小並行訊號線路間遠端串擾之佈 綠巫匕括一侵擾線以及一受擾線,該受擾線與該侵i it行,其中該受擾線具有複數段,各段之間透過一 延時模組連接。 一種減小並行訊號線路間遠端串擾之方法,該並 號線路包括一侵擾線以及一受擾線,該受擾線與 以如擾線平行,其中該減小並行訊號線路間遠端串擾 之方法包括以下步驟: 將與該侵擾線平行之受擾線分成複數段,且各段 間透過一延時模組連接;及 /設定該延時模組之延時,以避免該延時模組前後 之受擾線中之遠端串擾相互疊加。 本發明之有盈效果在於減小並行訊號間遠端串 擾’提高了訊號傳輸之完整性。 【實施方式】 請參閱第一圖,本發明減小並行訊號線路間遠端 串擾之佈線架構第一實施例原理圖,本實施例中兩並 行訊號線包括一侵擾線100、一受擾線200以及一延 時模組400,該侵擾線1〇〇中傳輸訊號3〇〇之上升緣 延時r τ爲200ps’該延時模組4〇〇採用蛇形線結構。 先將該受擾線200平均分成兩段,該兩段之間接 入該延時模組400。設定該延時模組4〇〇,使該受擾 線200中之串擾訊號透過該延時模組4⑻延時等於該 侵擾線100中傳輸訊號300的上升緣延時。由於該侵 擾線100與該受擾線200在延時模組4〇〇之外的部分 平行傳輸,各段傳輸線中串擾訊號傳輸時間Tpd變爲 原來的1/2’則根據上述兩傳輸線平行時遠端串擾的計 算公式 F£AT[%]=-Zk lTr =知,當該侵擾線100與該受擾線2〇〇平= Dielectric parameter between lines - Timing 'The parallel signal' Td - In the figure: Straight IK to get its simulation curve "Time point of string waveform" in the coordinate graph, horizontal seat ^ table Β, in seconds The ordinate indicates the amplitude, and the basin unit is ^: the = 〇 = can be seen, at this time, the far-end string two is more than two:: r volt, and the crosstalk signal delay, ΐ ί ί: to string two λ λ 线 线 线 线 线 线 线 线 线 线 线 线 线 线 线 线 线 线 线 线 线 线 线 线 线 线 线 线 线 线 线 线 线 线 线 线 线 线 线 线 线 线 线 线 线 线 线 线 线 线Wiring architecture and method for far-end crosstalk between lines.二 two kinds of reducing the far-end crosstalk between parallel signal lines, the green line includes an intrusion line and a victim line, the victim line and the intrusion line, wherein the victim line has a plurality of segments, each segment Connected through a delay module. A method for reducing far-end crosstalk between parallel signal lines, the parallel line comprising an intrusion line and a victim line, the victim line being parallel to, for example, a line of confusion, wherein the reducing the far-end crosstalk between the parallel signal lines The method includes the following steps: dividing a victim line parallel to the intrusion line into a plurality of segments, and connecting the segments through a delay module; and/or setting a delay of the delay module to avoid interference of the delay module before and after the delay module The far-end crosstalk in the line is superimposed on each other. The beneficial effect of the present invention is to reduce the far-end crosstalk between parallel signals' to improve the integrity of the signal transmission. [Embodiment] Referring to the first figure, a schematic diagram of a first embodiment of a wiring structure for reducing far-end crosstalk between parallel signal lines is provided. In this embodiment, two parallel signal lines include an intrusion line 100 and a victim line 200. And a delay module 400, wherein the rising edge delay r τ of the transmission signal 3〇〇 in the intrusion line 1〇〇 is 200 ps′. The delay module 4〇〇 adopts a serpentine line structure. The victim line 200 is first divided into two segments, and the delay module 400 is connected between the two segments. The delay module 4 is set such that the delay signal in the victim line 200 is delayed by the delay module 4 (8) to be equal to the rising edge delay of the transmission signal 300 in the interference line 100. Since the intrusion line 100 and the victim line 200 are transmitted in parallel except for the delay module 4, the crosstalk signal transmission time Tpd in each segment of the transmission line becomes 1/2' of the original transmission line according to the above two transmission lines. End crosstalk calculation formula F£AT[%]=-Zk lTr = know, when the intrusion line 100 is level with the victim line 2

200中訊號傳輸時間變爲習知技 :時:擾J :受擾線之遠端串擾仿真曲線Λ%τ二直; ί二所可示見透Γ°技術遠端串擾之仿真曲線二 擡如二ϊ i t時Ε-009秒,即4〇〇ps,則其遠端串 ^仿真m 30所* ’可見其後—遠 ^ 退端串擾滯後0.2E-009秒,即200ps。 ¥擾比月j 一 虫m凊ί閱第三圖,本發明減小並行訊號線路間遠端 ίΪΐΙΓίΪ構第二實施例原理圖,本實施例中兩並 仃虎線包括一侵擾線100、一受擾線2〇〇以及 3?〇Γ00,該侵擾線_中傳輸訊號上升緣延時 j 200ps。先將該受擾線平均分成5段各段 么間接人一延時模組400 ’並設定該等延時模组 ,使该等延時模組400延時大於或等於該侵擾 =)()中傳輸訊號300的上升緣延時rr。由於在各時 杈組400之間該侵擾線1〇〇與該受擾線2〇〇平= 置,各段傳輸線中串擾訊號傳輸時間變爲f知 ^ 受擾線中串擾訊號的傳輸時間Tpd之1/5,則根: ,兩傳輸線平行時其遠端串擾之計算公式可知遠端 串擾減小爲習知技術中遠端串擾之1/5。 由上述兩實施例可知,若將該受擾線2〇〇平 成n(n爲自然數)段,其各段間接入一延時模组4〇〇, 巧f受擾線200中之遠端串擾將減小至習知技術中 逡端串擾之1/N,但是在此方法之運用中,爲節省佈 ;二間和保證訊號之平行傳輸,一般在受擾線中接入 L個A延時杈組即可。該等延時模組可以選用蛇形線 旋線,也可以選用延時觸發器等。這樣透過對 號的傳輸進行延時處理,避免該受擾線 ==線長度之增加而增大,可大大減小兩並行訊 旒傳輸線間的遠端串擾,提高了訊號傳輸的完整性。 本發明所述減小並行訊號線路間遠端串擾之佈 f架構及方法亦可運用於並行傳輪的差分對線路 中。欲減小複數並行差分對線路之間的遠端串擾, 每一差分對分別視為侵擾線和受擾線,然後將被 ,為受擾線之差分對中兩訊號線分別分成複數段,且 各段之間透過延時模組連接。 ,亡料,本發明符合發明專利要件,羞依法提 出專利申請。惟,以上所述者僅為本發明之較佳 藝ί之士’在爰依本發明精神所 作之4效修飾或變化,皆應涵蓋於以下之申請專利範 圍内 【圖式簡單說明】 第一圖係本發明減小並行訊號線路間遠端串擾之佈 第一實施例原理圖。 Μ 第二圖係本發明減小並行訊號線路間遠端串擾之 線架構第一實施例仿真曲線圖和習知 仿真曲線圖。 第三圖係本發明減小並行訊號線路間遠端串 線架構第二實施例原理圖。 【主要元件符號說明】 侵擾線 100 傳輸訊號 300 受擾線 200 延時模組 400In 200, the transmission time of the signal becomes a conventional technique: time: disturbance J: the far-end crosstalk simulation curve of the victim line Λ%τ is straight; ί2 can be seen as the simulation curve of the far-end crosstalk of the technology Two ϊ it Ε 009 seconds, that is, 4 〇〇 ps, then its far-end string ^ simulation m 30 * ' visible after - far ^ back-end crosstalk lag 0.2E-009 seconds, that is 200ps. The second embodiment of the present invention reduces the distance between the parallel signals. The second embodiment of the present invention includes an intrusion line 100 and a The disturbed line 2〇〇 and 3?〇Γ00, the inrush line _ medium transmission signal rising edge delay j 200ps. First, the victim line is divided into 5 segments, the indirect person-delay module 400', and the delay modules are set, so that the delay module 400 has a delay greater than or equal to the intrusion=) () in the transmission signal 300 The rising edge delay rr. Since the intrusion line 1〇〇 and the victim line 2 are flat between the time groups 400, the transmission time of the crosstalk signal in each of the transmission lines becomes the transmission time Tpd of the crosstalk signal in the victim line. 1/5, then the root: The calculation formula of the far-end crosstalk when the two transmission lines are parallel can be seen that the far-end crosstalk is reduced to 1/5 of the far-end crosstalk in the prior art. It can be seen from the above two embodiments that if the victim line 2 is flattened into n (n is a natural number) segment, a delay module 4 is connected between each segment, and the far-end crosstalk in the victim line 200 is obtained. It will be reduced to 1/N of the crosstalk of the prior art, but in the application of this method, in order to save the cloth; the parallel transmission of the two and the guaranteed signals, generally accessing L A delays in the victim line 杈Group can be. These delay modules can be selected from a serpentine line or a delay trigger. In this way, the delay of the transmission of the signal is processed to avoid the increase of the length of the victim line == the line length, which can greatly reduce the far-end crosstalk between the two parallel signal transmission lines and improve the integrity of the signal transmission. The architecture and method for reducing far-end crosstalk between parallel signal lines of the present invention can also be applied to differential pair lines of parallel transmission. To reduce the far-end crosstalk between the complex parallel differential pair lines, each differential pair is regarded as an intrusion line and a victim line, respectively, and then the two signal lines in the differential pair of the victim line are respectively divided into multiple segments, and The segments are connected by a delay module. , the death of the material, the invention meets the requirements of the invention patent, shame to file a patent application. However, the above description is only for the preferred embodiment of the present invention. The four-effect modification or variation made in the spirit of the present invention should be included in the following patent application [Simplified Description] First BRIEF DESCRIPTION OF THE DRAWINGS The present invention is a schematic diagram of a first embodiment of a fabric for reducing far-end crosstalk between parallel signal lines. The second figure is a simulation graph and a conventional simulation graph of the first embodiment of the present invention for reducing the far-end crosstalk between parallel signal lines. The third figure is a schematic diagram of a second embodiment of the present invention for reducing the far-end string architecture between parallel signal lines. [Main component symbol description] Intrusion line 100 Transmission signal 300 Disturbed line 200 Delay module 400

Claims (1)

1328980 十、申請專利範圍: 1 ·種,小並行讯號線路間遠端串擾之佈線架構,包 "^擾線以及一受擾線,該受擾線與該侵擾線平 ΐ1良在於··該受擾線具有複數段,各段之間透 過一延時模組連接。 利範圍第1項所述之減小並行訊號線路間 擾之佈線架構,其中該等延時模組用蛇形線或 螺方疋線結構進行延時。 / 利1㈣第1項所述之減小並行訊號線路間 ^鈿串擾之佈線架構,其中該等延時模組爲延時觸發 利範圍帛1""員所述之減小並行訊號線路間 =擾之佈線架構,其中該等延時模組的延時被設 g g大於或等於該侵擾線傳輸訊號之上升緣延遲的 行訊號線路間遠端串擾之方法,該並行 包括一侵擾線以及一受擾線,該受擾線與該 钕擾線=行,該方法包括以下步驟: 將f该侵擾線平行的受擾線分成複數段,且各段之間 <透過一延時模組連接;及 设定,等延時模組之延時,以避免該等延時模組前後 之=擾線中之遠端串擾相互疊加。 專利範圍第5項所述之減小並行訊號線路間 之方法,其中該等延時模組的延時被設定爲 7^1等於該侵擾線傳輸訊號的上升緣延遲之時間。 a# 利範圍第5項所述之減小並行訊號線路間 ϊ結構其中該等延時模組用蛇形線或螺旋 申》月專利範圍第5項所述之減小並行訊號線路間 11 1328980 遠端串擾之方法,其中該等延時模組爲延時觸發器。1328980 X. Patent application scope: 1 · Kind, the wiring structure of the far-end crosstalk between small parallel signal lines, the package "^ disturbing line and a disturbed line, the disturbed line and the intrusion line are flat. The victim line has a plurality of segments, and the segments are connected by a delay module. The wiring structure for reducing the interference of parallel signal lines according to item 1 of the benefit range, wherein the delay modules are delayed by a serpentine line or a spiral line structure. / 1 (4) The wiring structure for reducing crosstalk between parallel signal lines, as described in item 1, wherein the delay module is a delay-triggered range 帛1"" The wiring structure, wherein the delay of the delay module is set to be greater than or equal to the far-end crosstalk between the line signals of the rising edge delay of the intrusion line transmission signal, the parallel comprising an intrusion line and a victim line. The disturbed line and the snubber line=line, the method comprising the steps of: dividing the disturbed line parallel to the intrusion line into a plurality of segments, and connecting each segment by a delay module; and setting, The delay of the delay module is to avoid superimposing the far-end crosstalk in the interference line before and after the delay module. The method of reducing parallel signal lines according to item 5 of the patent scope, wherein the delay of the delay modules is set to be 7^1 equal to the time of the rising edge delay of the intrusion line transmission signal. a# The range of parallel signal inter-line ϊ structures described in item 5 of the benefit range, wherein the delay modules are reduced by parallel lines between the parallel signal lines as described in item 5 of the serpentine line or the spiral application. The crosstalk method, wherein the delay modules are delay flip-flops. 1212
TW94136955A 2005-10-21 2005-10-21 A layout and method for reducing crosstalk between parallel signal lines TWI328980B (en)

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